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Quartus II MegaFunctions:
Lpm_mux,inv,xor
FPGA Laboratory
Massaken Barzeh
Damascus, Syria
Prepared by
Ali Deeb & Hasan Ahmad
Supervisor: Eng. Hisham Saadaldin
27 April 2013, Third Semester
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Abstract
In This Homework , we firstly deploy frequency divider to test 4:1 bit lpm_mux. Then we build
the multiplexer using lpm_inv and lpm_xor.
Table of Contents
1 Introduction .............................................................................................................................................. 11
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2 Project 1: Test Circuit for a 4 bit to 1 lpm_Mux ...................................................................................... 11
2.1 Frequency divider using lpm_counter: ................................................................................................. 11
2.Block diagram forTest Circuit ................................................................................................................. 12
2.3.Functional Simulation ........................................................................................................................... 12
2.4 Timing simulation ................................................................................................................................. 13
3 Multiplexer design using lpm_inv and lpm_xor ...................................................................................... 13
3.1 Block diagram ....................................................................................................................................... 13
3.2 Functional Simulation ........................................................................................................................... 14
3.2.1 Timing Simulation ............................................................................................................................. 14
Figure 1:Circuit Schematic ......................................................................................................................... 11
Figure 2:4:1 Mux Truth table ...................................................................................................................... 11
Figure 7:project 2 Block Diagram .............................................................................................................. 13
Figure 8:Functional Simulation .................................................................................................................. 14
Figure 9 :Timing simulation. ...................................................................................................................... 14
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1 Introduction
The basic function of a multiplexer: combining multiple inputs into a single data stream. A multiplexer of
2n inputs has n select lines, which are used to select which input line to send to the output. Figure 2 shows
the truth table of 4:1 Mux .And Figure 1 shows the corresponding circuit schematic.
In Section two we will use the predefined lpm_mux megafunction .While in section 3 we will use the
lpm_inv and lpm_xor.
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2.3.Functional Simulation
Functional simulates the behavior of flattened netlists (connectivity of the design) extracted from the
design files. That means that it doesnt take into account the processing and the transmission time.
We clearly see how the output frequency(the selected signal) is consistent with the truth table.
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