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ELEKTROIK
(ELECTROICS)
Chapter 2
DIODE P
pn junction
Metal contacts
and wire leads
p n
- IF I =0A
Rlimit Rlimit
Vbias Vbias
+ + - - +
VR VF
IR
Fig.6: Ideal characteristic curve (blue)
Dr. N.M. Safri/SEU3003_diode PN 9
Activity
VF = 0 V
Vbias
IF = R
limit
IR = 0 A
VR = Vbias
VR VF
0 0.7 V
IR
Fig.8: Characteristic curve of silicon diode (blue)
Dr. N.M. Safri/SEU3003_diode PN 13
Activity
VF = 0.7 V
Vbias – VF
IF = Rlimit
IR = 0 A
VR = Vbias
IR IF = Imajority - IR
}
Imajority
- - -- +
+ -+ - - - -
+ - -+
-
- p -+ - + - +
-+ n -
-+
-- -+ - +- Metal contacts
-+
}
depletion region and wire leads
VF
nV T
I F = I R e − 1
where IR is the reverse saturation current
VF is the applied forward-bias voltage across the diode
n is an ideality factor, which is a function of the operating
conditions and physical construction; it has a range of 1
and 2 depending a wide variety of factors
Dr. N.M. Safri/SEU3003_diode PN 17
The I-V Characteristics
(Thermal voltage (VT))
VT is called the thermal voltage and is determined by
kT
VT =
q
VR VF
0 0.7 V (knee voltage)
VR VF
0 0.7 V (knee voltage)
Small reverse
current due to
the high
reverse *Note the difference
between the IF and IR scales.
resistance
IR (µA)
Fig.10: Characteristic curve of silicon diode (blue)
Dr. N.M. Safri/SEU3003_diode PN 21
Activity
VF = 0.7 V + IFr’d
Vbias – 0.7 V
IF = Rlimit + r’d
at 25°°C + ∆T at 25°°C
VR 0
0.7 V
VF
0.7 V - ∆V
Rlimit Rlimit
1.0 kΩ 1.0 kΩ
+ +
Vbias 10 V Vbias 5V
- -
(a) (b)
Dr. N.M. Safri/SEU3003_diode PN 25
Outline
Activity (Answer)
Rlimit Ideal model
1.0 kΩ
+ VF = 0 V
Vbias 10 V
- IF = Vbias / Rlimit = 10 V / 1.0 kΩ = 10 mA
VRlimit = IF Rlimit = (10 mA) (1.0 kΩ) = 10 V
(a)
0 VD 0 0 VD
0.7 V VD (knee voltage)
(Si) ID (µA)
0.3 V
(Ge)
Dr. N.M. Safri/SEU3003_diode PN 28
Outline
Load Line and Graphical Analysis
The circuit of Fig. 12 is the simplest of diode configuration.
It will be used to describe the analysis of a diode circuit using
its actual characteristics.
ID (mA)
VD
+ -
- ID
R
E
+ + -
0 VD (V)
(a) (b)
Fig.12: Series diode configuration: (a) circuit; (b) characteristics
VD
+ -
- IDQ = ? Q-point
ID
R
E Load line
+ + -
0 VDQ = ? VD (V)
(a) (b)
Fig.12: Series diode configuration: (a) circuit; (b) characteristics
VD ID (mA)
+ -
- 20 mA Q-point
ID IDQ ≅ 18.6 mA
R = 0.5 kΩ
+ + - Load line
E = 10 V
0 V = 0.7 V 10 V VD (V)
DQ
VD ID (mA)
+ -
- ID
R = 1 kΩ
+ 10 mA Q-point
+ - IDQ ≅ 9.3 mA Load line
E = 10 V
0 V = 0.7 V 10 V VD (V)
DQ
VD
+ - ID (mA)
- ID At ID = 9 mA, VD = 0.75 V
R = 1 kΩ
10 mA
(from the curve),
+ Q-point
+ - IDQ ≅ 9 mA
Load line
E = 10 V RD = VD / ID ≅ 83 Ω
0 V ≅ 0.75 V 10 V V (V)
DQ D
In general,
The higher the current through a diode, the lower is the dc resistance level.
Dr. N.M. Safri/SEU3003_diode PN 38
Outline
Internal resistance
As the operating point (Q-point) of a diode moves from one
region to another, the resistance of the diode will also change
due to nonlinear shape of the diode characteristic curve.
DC or Static Resistance
The application of a dc voltage to a circuit containing a
semiconductor diode will result in an operating point on the
characteristic curve that will not change with time.
Resistance of a diode, RD = VD / ID
AC or Dynamic Resistance
If a sinusoidal rather than a dc input is applied, the varying
input will move the instantaneous operating point up and
down a region of the characteristics and thus defines a
specific change in current and voltage.
Dr. N.M. Safri/SEU3003_diode PN 39
Outline
Internal resistance
AC or Dynamic Resistance
∆Id Q-point
(dc operation)
∆Vd
AC or Dynamic Resistance
Q-point ∆Id
∆Vd
∆Id Q-point
(dc operation)
Resistance of a diode
rd = ∆Vd / ∆Id
∆Vd
In general,
the lower the Q-point of operation (smaller current or lower voltage), the higher is the
ac resistance. Dr. N.M. Safri/SEU3003_diode PN 41
Outline
Diode with DC Power Supply
Series Connection
Determine ID, VD2 and VO for the series circuit of Fig. 13.
+VD2 -
Si Si
+20 V V
IR O
ID 5.6 kΩ
Fig.13
Determine VO, I1, ID1 and ID2 for the parallel diode configuration
of Fig. 14.
I1 0.33 kΩ
+
R ID1 ID2
+
E 10 V D1 Si D2 Si VO
-
Fig.14
Determine I1, I2, and ID2 for the network of Fig. 15.
Si 3.3 kΩ
D1 R1 I1
+
E 20 V D2 Si
-
ID2
I2 5.6 kΩ
R2
Fig.15
D1
-5 V
0V VO
D2
1 kΩ
Fig.16
D1
-5 V
0V VO
D2
2.2 kΩ
Fig.17 -5 V
+5 V
V1 V2 VO
1 kΩ
D1 0V 0V 0V
V1
0V 5V 0V
V2 5V 0V 0V
D2 VO
5V 5V 5V
Fig.18
AD logic gate
Dr. N.M. Safri/SEU3003_diode PN 47
Outline
Diode with AC Power Supply
Vp Vp Vp
Vi
+ -
Vp + +
Vi R Vo
0 T/2 T t
- -
1 cycle
Fig.19
Vi = Vp sin ωt
- -
Vi Vo
Vo = 0 V
Diode is reverse-biased
- +
0 T/2 T t I=0A 0 T/2 T t
Vi R Vo
Vi + - Vo
Vp Vp
Vdc = 0 Vdc = 0.318 Vp Vdc
0 T/2 T t 0 T/2 T t
1. Bridge Network
2. Center-Tapped Transformer
Bridge Network
Vi
+ D1 D2
Vp
-
Vo +
Vi
0 T/2 T t R
D3
1 cycle -
D4
Vi = Vp sin ωt Fig.20
Center-Tapped Transformer
Vi D1
1:2
+
Vi
Vp + Vo +
- -
Vi +
0 T/2 T t R
- Vi
1 cycle -
D2
Vi = Vp sin ωt
Fig.21
Vp D2 is conducting D2 Vp
Vdc
0 T/2 T t
Vdc = 0 Vdc = 2 (0.318 Vp) 0 T/2 T t
= 0.636 Vp
Dr. N.M. Safri/SEU3003_diode PN 55
Outline
Diode with AC Power Supply
RECTIFIER with FILTER CAPACITACE
If a capacitor is added in parallel with the load resistor of a
half-wave rectifier to form a simple filter circuit, we can
begin to transform the half-wave sinusoidal output into a dc
voltage.
Vi + -
+ +
Vi C R Vo
Vp
- -
0 T/2 T t
1 cycle Fig.22
Vi = Vp sin ωt
Vi - + Vo
+
Vo = Vc
C R Vo
Vi -
0 T/2 T t 0 T/2 T t
-
+
Vi Vo
Vp Vdc
Vdc = 0 Vdc = Vp – Vr(p-p)/2
= [1 – 1/(2fRC)] Vp 0 T t
0 T/2 T t T/2
Vi
5V
- +
Vp = 20 V + +
Vi R Vo
0 T/2 T t
- -
Fig.23
Vi Vo
5V
Diode is not Vo = 0 V
- + conducting at Vi ≤ - 5 V
0 T/2 T t - + 0 T/2 T t
Vi R Vo
Vi -
Vo
+
Vp + 5
Vp
0 T/2 T t 0 T/2 T t
Vi
5V
+ -
Vp = 20 V + +
Vi R Vo
0 T/2 T t
- -
Fig.24
VR VF
0 0.7 V
(knee
Zener
voltage)
avalanche
region
IR (µA)
+ -
3. Assume that during the period when the diode is in the “off” state
the capacitor holds on to its established voltage level.
5. Check that the total swing of the output matches that of the input.
Dr. N.M. Safri/SEU3003_diode PN 66
Outline
Activity
Determine Vo for the network of Fig. 25 for the input indicated.
Vi
C = 1µF
+ +
f = 1000 Hz
10 Vi R Vo
5 V-
+ 100 kΩ
0 t1 t2 t3 t4 t - -
- 20
T Fig.25