VINAYAKA MISSIONS UNIVERSITY V.M.K.V.

ENGINEEING COLLEGE DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Digital Logic circuits

IV SEM EEE

Unit 1
Part - A
1. 2. 3. 4. 5. 6. 7. 8. 9. What is a Binary Number? Write any 4 number systems used in digital systems. Convert ( 54 )10 into binary, octal and hexadecimal codes. What is the advantage of Gray code? Mention its other names. Convert ( 3102 . 12 )4 to its decimal equivalent. Write Absorptive law. Define and Prove De-Morgan's law. What is SOP? Give one example. Simplify the equation by using Kmap. Y=A' B C' D + A' B C D + A B C' D + A B C D. 10. Perform the following subtraction by using the 2's complement method 23)10 11. Perform the following subtraction by using the 1's complement method (100011 11100)10 12. State the methods used to simplify the Boolean equations. 13. Define the truth table. 14. What are the basic laws of Boolean algebra? 15. State and prove Absorption theorem. 16. State and prove Distributive theorem. 17. What is meant by Duality in Boolean theorem? 18. State and prove Associate law. 19. Convert to canonical SOP form Y = A+ BC 20. State and prove Distributive law. 21. Explain Prime implicant. 22. What is Min term? Give an Example. 23. Prove De-Morgans theorem for a 4 variable function. 24. With an example explain Max terms.

(39

Part - B
1. Reduce the following functions using K-map. i) f (A, B, C, D) = m ( 1, 4, 8, 10, 11, 20, 22, 24, 25, 26 ) + d( 0, 12, 16, 17 ) ii) f (A, B, C, D) = M ( 4, 5, 6, 7, 8, 12, 13 ) + d( 1, 15 ) 2. Simplify the following Boolean function by using a Quine-Mc-Cluskey method F( A, B, C, D ) = M ( 0, 2, 3, 6, 7, 8, 10, 12, 13 ) and verify using K-map method.

3. Simplify the following using Tabulation method. Y = m ( 0, 1, 9, 15, 24, 29, 30 ) + d ( 8, 11, 31) 4. Using a Kmap method simplify the Boolean function and obtain i) minimal SOP and ii) minimal POS expression. Y = (A+B+C+D) (A+B+C+D) (A+B+C+D)(A+B+C+D) (A+B+C+D) (A+B+C+D) (A+B+C+D) (A+B+C+D) (A+B+C+D) (A+B+C+D) 5. Simplify the following expressions using Boolean algebra. i) ii) iii) F1 = AB+ABC+A(B+AB) F2 = AB+AC+ABC(AB+C) F3 = A' B' C' + A' B C' + AB' C' + ABC'

6. Perform the following number conversions i) ( 2 F 3 )16 = ( )8 = ( )10 ii) ( 5 3 . 6 2 )10 = ( )2 = ( )8 iii) ( 1 0 7 . 5 2 )8 = ( )10 = ( )16 7. Perform the following subtractions i) CB216 - 97216 using 16's complement ii) 1110012 from 1010112 using 2's complement iii) 32 - 47 using 1's complement iv) 69B16 - C1416 using 15's complement 8. Prepare Karnaugh maps for the following functions a) f = ABC +ABC +BC b) f = A + B + C 9. Using the Karnaugh map method, simplify the following functions into minimal sum of products f(u,v,w,x) = m (0, 2, 5, 7, 9, 11, 13, 15, 16, 18, 21, 23, 25, 27, 29, 31) 10. Obtain the canonical SOP and POS of sum of the following expression F = X1X2X3 + X1X3X4 + X1X2X4

Unit 2
Part A
1. 2. 3. 4. 5. 6. 7. 8. 9. What are Universal gates? Why are they called so? What is a combinational circuit? Mention an Example. Define Half Adder and Full Adder. What do you mean by carry propagation delay? What is a multiplexer? Design Half-adder using only NAND gates. Draw a block diagram of 1:8 De-Multiplexer using two 1:4 De-multiplexer. What is a Decoder? Which combinational circuit is described by the following equation

Y= A'B' + A'B + AB' + AB. 10. Implement AND function using only NOR gates. 11. Write the truth table and logic symbol of a three input OR gate. 12. What is the only condition under which an OR gate output will be 0? 13. Is there such a thing as a 3- input NOT gate? 14. Differentiate positive and negative logic system. 15. Under what conditions will the output of an AND gate be 0? 16. Define the NAND and NOR gates with their truth tables. 17. Explain the term Universal Gate. 18. Explain how the basic gates can be realized using NAND gates. 19. Write a short note on logic gates. 20. Verify the following operations are commutative but not associative NAND b) NOR 21. Explain how the basic gates can be realized using NOR gates. 22. Verify the following operations are commutative and associative a) AND OR 23. What is a magnitude comparator? 24. Draw a circuit of a full adder using two half adder and an OR gate. 25. Write truth table of a half subtractor?

a) b)

Part B
1. Explain about logic gates with their truth tables and symbols. 2. i) Design a combination logic circuit with three input variables that will produce a logic 1 output, when more than one input variables are in logic1. ii) Design a Half adder using logic gates. 3. Design a Binary to Gray code converter circuit. 4. Construct a 4-bit priority encoder and explain its operation. 5. Explain the function of 4:1 multiplexer. 6. Implement the following Boolean function using MUX. i) F ( A, B, C, D ) = M ( 0, 3, 5, 8, 9, 10, 12, 14 ) using 8:1 Mux ii) F ( A, B, C, D ) = m ( 0, 1, 2, 4, 6, 9, 12, 14 ) using two 4:1 Mux 7. Realize the following function as i) Multilevel NAND - NAND gate network and ii) Multilevel NOR - NOR network. 8. Design a full adder circuit using logic gates. 9. Implement a two bit comparator circuit with suitable gates. 10. Draw a combinational circuit that has 4 inputs A, B, C, D and one output Z. Behavior of the circuit is as follows: output Z is equal to 1 when two inputs A and C or B and D has 1, and also when any three inputs has 1.

Unit 3
Part A
1. 2. 3. 4. 5. 6. What is a Flip-Flop? Compare Combinational circuits and Sequential circuits. Write the truth tables of JK and D flip-flops. Write the Characteristic tables of RS and T flip-flops. Differentiate the two models of synchronous sequential circuits. How many flip-flops are required to build a binary counter that counts from 0 to 127? 7. Mention the types of Shift register. 8. Compare Synchronous and Asynchronous counters. 9. Write the applications of flip flops. 10. Draw block diagram of Master-Slave JK flip-flop. 11. Write down the characteristic equation of SR flip-flop. 12. What is D flip-flop? 13. Show how an SR flip-flop can be converted into a D flip-flop. 14. What is the advantage of D flip-flop over an SR flip-flop? 15. What is meant by edge triggering? 16. Draw the logic diagram of a master-slave D flip flop using NAND gates. 17. List four basic flip flop applications. 18. What advantage does a JK flip flop have over an SR flip-flop? 19. What is a ripple counter? 20. What is a modulus counter? 21. Draw the logic diagram of a binary ripple counter using toggle flip flops. 22. What is the procedure for designing a synchronous counter? 23. How is a modulus counter built using count reset? 24. What is a synchronous counter? 25. What is a shift register?

Part - B
1. Explain the function of Master-Slave RS flip-flop. 2. Realize T flip-flop using RS flip-flop and also convert JK flip-flop to D flipflop. 3. Design a MOD-5 synchronous counter using JK flip-flops. 4. Design a sequential circuit for the given state diagram using T flip-flop. . 0 3

5. 6. 7. 8. 9.

Explain the function of 4 bit Ripple counter. Draw its timing diagram. Briefly explain the operation of basic RS flipflop. Design a synchronous BCD counter with JK flipflops. Design a 4-bit binary synchronous counter with D flipflops. Design a synchronous counter with the following sequence: 0000, 0010, 0100, 0110, 1000, 1010, 1100, 1110, 0000 . 10. With a suitable flip flop design a 3 bit gray counter.

Unit 4
Part A
1. Write the comparison between Synchronous and Asynchronous circuits. 2. Describe cycles in Asynchronous sequential circuits. 3. What is Hazard? Mention its types. 4. How can hazards be eliminated? 5. Design hazard free circuit for the equation f ABC = m ( 1, 3, 6, 7 ) 6. Define critical race and non-critical race. 7. List the two models of asynchronous sequential circuits. 8. Differentiate static-0 and static-1 hazards. 9. Compare fundamental and pulse mode asynchronous sequential circuits. 10. Describe the design procedure for asynchronous sequential circuits. 11. When are two states said to be equivalent states? 12. What are the advantages of merging process? 13. What do you meant by critical and non-critical race? 14. How can we avoid races in asynchronous circuits? 15. What are the different types of hazards in asynchronous circuits?

Part - B
1. Design a logic system that has two inputs X, Y and a single output Z, which is to behave in the following manner. Initially both inputs and output are equal to 0. Whenever XY=10, the Z becomes 1 and whenever XY = 01, the Z becomes 0. When X=Y=0 or X=Y=1, the output Z does not change: it remains in the previous state. 2. Design an asynchronous sequential circuit with two inputs X , Y and with one output Z. Whenever Y is 1, input X transferred to Z. When Y is 0, the output does not change for any change in X. 3. Find a primitive flow table for an asynchronous sequential circuit that has two inputs X2 and X1 and one output Z. When X1 =0, the output Z is 0. The first change in X2 that occurs while X1 is 1 will cause output z to be 1. The output Z will remain 1 until X1 returns to 0. 4. Construct a asynchronous circuit which has two inputs X1, X2; and two outputs Z1 and Z2 that satisfies the following four conditions. i) When X1X2 = 00 output Z1Z2 = 00

ii) iii) iv)

When X1 = 1 and X2 changes from 0 to 1, the output Z1Z2 = 01 When X2 = 1 and X1 changes from 0 to 1, the output Z1Z2 = 10 Otherwise the output does not change.

5. Briefly explain about Hazards.

Unit 5
Part A
1. What is programmable logic array? How it differs from PROM? 2. Give the comparison between PROM, PLA and PAL. 3. Draw the circuit diagram of 2 inputs TTL NAND gate with totem-pole output. 4. Define noise margin. 5. Write the characteristic of logic gates. 6. Give the characteristic of ECL family. 7. Define propagation delay. 8. Compare Totem pole and Open collector output. 9. What is Tristate logic? 10. Define the parameters a) Fan-in b) Fan-out. 11. Explain the term volatile memory. 12. What is ROM? 13. How many address bits are needed for a given number of memory locations? 14. List the applications of PLA. 15. What are the steps used for implementing combinational circuit using PLA? 16. Explain the advantages and disadvantages of dynamic RAM. 17. What are the advantages of dynamic RAM over static RAM? 18. How are UV-EPROM data written and erased? 19. What is the reason for the refresh operation in dynamic RAM cell? 20. State the differences among ROM, PROM and EPROM. 21. Explain the difference between RAM and ROM. 22. What are the advantages of FPGA? 23. Define the term mask programming. 24. Explain the difference between primary and secondary memories. 25. Define the terms a) memory word b) byte

Part - B
1. Define following parameters a) Current and voltage b) Fan-out Noise margin d) propagation delay e) Power dissipation 2. i) Explain the difference between RAM and ROM. ii) Explain the difference between EPROM and PROM. 3. Implement the following function using PLA. A(x,y,z) = m (1, 2, 4, 6), B(x, y, z) = m (0, 1, 6, 7), C(x, y, z) = m (2, 6) 4. Write notes about ECL logic family. c)

5. A combinational circuit is defined by the functions: F1 = m(3, 5, 7) F2 = m(4, 5, 7). Implement the circuit with a PLA having 3 inputs, 3 product terms and 2 outputs. 6. Write short notes on i) CMOS Inverter. ii) Tristate TTL inverter. 7. Explain about TTL logic family. 8. Short notes on Memory devices with suitable diagram.