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SIMATIC S7-300 SIMATIC S7-300 CPU 31xC and CPU 31x, Technical Specifications

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Preface


Guide to the S7-300
documentation

1
Operating and display
elements

2
Communication

3
Memory concept

4
Cycle and reaction times

5
General technical data

6
Technical data of CPU 31xC

7
Technical data of CPU 31x

8
Appendix

A
SIMATIC
S7-300
CPU 31xC and CPU 31x,
Technical Specifications
Manual
12/2006
A5E00105475-07
This manual is part of the documentation package
with order number: 6ES7398-8FA10-8BA0



Safety Guidelines
This manual contains notices you have to observe in order to ensure your personal safety, as well as to prevent
damage to property. The notices referring to your personal safety are highlighted in the manual by a safety alert
symbol, notices referring only to property damage have no safety alert symbol. These notices shown below are
graded according to the degree of danger.

Danger
indicates that death or severe personal injury will result if proper precautions are not taken.

Warning
indicates that death or severe personal injury may result if proper precautions are not taken.

Caution
with a safety alert symbol, indicates that minor personal injury can result if proper precautions are not taken.
Caution
without a safety alert symbol, indicates that property damage can result if proper precautions are not taken.
Notice
indicates that an unintended result or situation can occur if the corresponding information is not taken into
account.
If more than one degree of danger is present, the warning notice representing the highest degree of danger will
be used. A notice warning of injury to persons with a safety alert symbol may also include a warning relating to
property damage.
Qualified Personnel
The device/system may only be set up and used in conjunction with this documentation. Commissioning and
operation of a device/system may only be performed by qualified personnel. Within the context of the safety notes
in this documentation qualified persons are defined as persons who are authorized to commission, ground and
label devices, systems and circuits in accordance with established safety practices and standards.
Prescribed Usage
Note the following:

Warning
This device may only be used for the applications described in the catalog or the technical description and only in
connection with devices or components from other manufacturers which have been approved or recommended by
Siemens. Correct, reliable operation of the product requires proper transport, storage, positioning and assembly
as well as careful operation and maintenance.
Trademarks
All names identified by are registered trademarks of the Siemens AG. The remaining trademarks in this
publication may be trademarks whose use by third parties for their own purposes could violate the rights of the
owner.
Disclaimer of Liability
We have reviewed the contents of this publication to ensure consistency with the hardware and software
described. Since variance cannot be precluded entirely, we cannot guarantee full consistency. However, the
information in this publication is reviewed regularly and any necessary corrections are included in subsequent
editions.

Siemens AG
Automation and Drives
Postfach 48 48
90437 NRNBERG
GERMANY
Order No.: A5E00105475-07
01/2007
Copyright Siemens AG 2006.
Technical data subject to change

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 iii
Preface
Purpose of the Manual
This manual contains essential information:
about installation
about communication
about the memory concept
about cycle and response times
about CPU technical data.
You will then learn the points to consider when upgrading to one of the CPUs discussed in
this manual.
Required basic knowledge
To understand this manual, you require a general knowledge of automation engineering.
You will also need a knowledge of STEP 7 basic software.
Area of application
Table 1 Scope of this manual
as of version CPU Convention:
CPU designations:
Order number
Firmware
CPU 312C 6ES7312-5BE03-0AB0 V2.6
CPU 313C 6ES7313-5BF03-0AB0 V2.6
CPU 313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
CPU 313C-2 DP 6ES7313-6CF03-0AB0 V2.6
CPU 314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
CPU 314C-2 DP
CPU 31xC
6ES7314-6CG03-0AB0 V2.6
CPU 312 6ES7312-1AE13-0AB0 V2.6
CPU 314 6ES7314-1AG13-0AB0 V2.6
CPU 315-2 DP 6ES7315-2AG10-0AB0 V2.6
CPU 315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
CPU 317-2 DP 6ES7317-2AJ10-0AB0 V2.5
CPU 317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
CPU 319-3 PN/DP
CPU 31x
6ES7318-3EL00-0AB0 V2.5

Preface

CPU 31xC and CPU 31x, Technical Specifications
iv Manual, 12/2006 , A5E00105475-07
Note
There are a number of features that are specific to the F-CPUs within the S7 range. For
further details, please refer to the product information:
http://support.automation.siemens.com/WW/view/en/11669702/133300

Note
For new modules, or modules of a more recent version, we reserve the right to include a
Product Information containing latest information.

Changes in comparison to the previous version
Compared to the previous version of this manual CPU31xC and CPU31x, Technical Data,
with the footnote number: A5E00105474-06, Release 01/2006, the following changes apply:
Isochronous mode on PROFIBUS DP for CPU 315-2 PN/DP, CPU 317-2 PN/DP and
CPU 319-3 PN/DP.
Configurable process image for CPU 315-2 PN/DP, CPU 317-2 PN/DP and
CPU 319-3 PN/DP.
Expansion of block-related messages for all CPUs (SFC105 to SFC108)
Activating/deactivating PROFINET IO devices on PROFINET CPUs (expansion SFC12)
Extended diagnostics for PROFINET CPUs
Support of maintenance events at the PROFINET CPUs
Minimum update time of 250 s at PROFINET IO devices operating on CPU 319
Web server functionality for PROFINET CPUs
Time synchronization over DP
Time synchronization by way of Ethernet (NTP) at PROFINET CPUs
Increase of the number of entries in the diagnostics buffer to 500 for all PROFINET CPUs
Firmware update on the net
OUC expansion (UDP and ISO-on-TCP) for all PROFINET CPUs
Watchdog interrupt time > 500 s can be configured (for OB35) at CPU 319-3 PN/DP
CPU reset to factor settings
Measuring sensor for diagnostic repeater, for DP CPUs (SFC 103)
I&M data of the CPU (plant and location ID, for example)
Included product information on memory expansion (A5E00830173-01) in the manual
Approvals
See Technical Data > Standards and Certifications.
Preface

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 v
CE Label
See Technical Data > Standards and Certifications.
Coding for Australia (C-tick)
See Technical Data > Standards and Certifications.
Standards
See Technical Data > Standards and Certifications.
Documentation classification
The documentation listed below is part of the S7-300 documentation package.
This is also available on the Internet at:
http://support.automation.siemens.com/WW/view/en/ plus the relevant article ID.

Name of manual Description
YOU ARE READING the Manual
CPU 31xC and CPU 31x, Technical Specifications
Article ID: 12996906

Operation and display elements,
communication, memory concept, cycle and
response times, technical specifications
Operating Instructions
S7-300, CPU 31xC and CPU 31x: Installation
Article ID: 12996906

Configuration, installation, wiring, addressing,
commissioning, maintenance and the test
functions, diagnostics and troubleshooting.
System Manual
PROFINET System Description
Article ID: 19292127

Basic information concerning PROFINET:
Network components, data exchange and
communication, PROFINET IO, Component
Based Automation, sample application
PROFINET IO and Component Based
Automation
Programming Manual
From PROFIBUS DP to PROFINET IO
Article ID: 19289930

Guideline for the migration from PROFIBUS DP
to PROFINET I/O.
Manual
CPU 31xC: Technological functions
Article ID: 12429336
CD with examples

Description of the individual technological
functions Positioning, Counting. PtP
connection, rules
The CD contains examples of the technological
functions
Manual
S7-300 Automation System: Module data
Article ID: 8859629

Descriptions of functions and technical
specifications of signal modules, power supply
modules and interface modules
Instruction List
CPU 31xC and CPU 31x
Article ID: 13206730

List of operation repertoire of CPU and its
execution times. List of executable blocks.
Preface

CPU 31xC and CPU 31x, Technical Specifications
vi Manual, 12/2006 , A5E00105475-07
Name of manual Description
Getting Started
The following Getting Started editions are available
as a collective volume:
S7-300 Getting Started Collection
Article ID: 15390497
PROFINET Getting Started Collection
Article ID: 19290251

The Getting Started guides use a specific
example to take you through the various
commissioning steps required to obtain a fully
functional application.
In addition to the S7-300 documentation package, you will need to refer to the following
descriptions:

Name of the manual Description
Reference Manual
System software for S7-300/400 system and
standard functions
Article ID: 1214574

This manual, which consists of 2 volumes (1
and 2), provides a comprehensive overview of
the OBs, SFCs, SFBs, IEC functions,
diagnostics data, system status list (SSL), and
events associated with the S7-300 and S7-400
CPU operating systems. This manual is part of
the STEP 7 reference information. A description
is also available in the online help for STEP 7.
Manual
Programming with STEP 7
Article ID: 18652056

This manual provides a comprehensive
overview of programming with STEP 7. This
manual is part of the STEP 7 basic information.
A description is also available in the online help
for STEP 7.
Manual
SIMATIC NET: Twisted Pair and Fiber-Optic
Networks
Article ID: 8763736

Description of Industrial Ethernet networks,
network configuration, components, installation
guidelines for networked automation systems in
buildings, etc.
Configuration Manual
Component Based Automation: Configure
SIMATIC iMap plants
Article ID: 22762190

Description of the SIMATIC iMap configuration
software
Configuration Manual
Component Based Automation: SIMATIC iMap
STEP 7 AddOn, create PROFINET components
Article ID: 22762278

Descriptions and instructions for creating
PROFINET components with STEP 7 and for
using SIMATIC devices in Component Based
Automation
Manual
Isochronous mode
Article ID: 15218045

Description of the system property "Isochronous
mode"
Manual
SIMATIC communication
Article ID: 1254686

Basics, services, networks, communication
functions, connecting PGs/OPs, engineering
and configuring in STEP 7.
Preface

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 vii
Recycling and Disposal
The devices described in this manual can be recycled, due to their ecologically compatible
components. For environment-friendly recycling and disposal of your old equipment, contact
a certified disposal facility for electronic scrap.
Contact
See Product Information Technical Support, Contact and Training.
This product information is also available on the Internet at:
http://www.siemens.com/automation/service
Once there, please search for the article with the number 19293011.
Training
See Product Information Technical Support, Contact and Training.
SIMATIC Technical Support
See Product Information Technical Support, Contact and Training.
Service & support on the Internet
See Product Information Technical Support, Contact and Training.
Preface

CPU 31xC and CPU 31x, Technical Specifications
viii Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 ix
Table of contents
Preface...................................................................................................................................................... iii
1 Guide to the S7-300 documentation ....................................................................................................... 1-1
2 Operating and display elements ............................................................................................................. 2-1
2.1 Operating and display elements: CPU 31xC............................................................................. 2-1
2.1.1 Operating and display elements: CPU 31xC............................................................................. 2-1
2.1.2 Status and error indicators: CPU 31xC...................................................................................... 2-4
2.2 Operating and display elements: CPU 31x................................................................................ 2-5
2.2.1 Operating and display elements: CPU 312, 314, 315-2 DP: ..................................................... 2-5
2.2.2 Operating and display elements: CPU 317-2 DP ...................................................................... 2-7
2.2.3 Operating and display elements: CPU 31x-2 PN/DP ................................................................ 2-9
2.2.4 Operating and display elements: CPU 319-3 PN/DP .............................................................. 2-11
2.2.5 Status and error displays of CPU 31x...................................................................................... 2-13
3 Communication....................................................................................................................................... 3-1
3.1 Interfaces ................................................................................................................................... 3-1
3.1.1 Multi-Point Interface (MPI) ......................................................................................................... 3-1
3.1.2 PROFIBUS DP........................................................................................................................... 3-3
3.1.3 PROFINET (PN)......................................................................................................................... 3-5
3.1.4 Point to Point (PtP) .................................................................................................................... 3-8
3.2 Communication services............................................................................................................ 3-9
3.2.1 Overview of communication services ........................................................................................ 3-9
3.2.2 PG communication................................................................................................................... 3-10
3.2.3 OP communication................................................................................................................... 3-11
3.2.4 Data exchanged by means of S7 basic communication.......................................................... 3-11
3.2.5 S7 communication ................................................................................................................... 3-12
3.2.6 Global data communication (MPI only).................................................................................... 3-13
3.2.7 Routing..................................................................................................................................... 3-14
3.2.8 Point-to-point connection ......................................................................................................... 3-18
3.2.9 Data consistency...................................................................................................................... 3-19
3.2.10 Communication by means of PROFINET................................................................................ 3-20
3.2.10.1 PROFINET IO System............................................................................................................. 3-23
3.2.10.2 Blocks for PROFINET IO......................................................................................................... 3-25
3.2.10.3 Open communication via Industrial Ethernet ........................................................................... 3-27
3.2.10.4 SNMP Communication Service................................................................................................ 3-30
3.3 Web Server .............................................................................................................................. 3-30
3.3.1 Language settings.................................................................................................................... 3-32
3.3.2 Web pages............................................................................................................................... 3-35
3.3.2.1 Start page with general CPU information ................................................................................ 3-35
3.3.2.2 Identification............................................................................................................................. 3-37
3.3.2.3 Diagnostics buffer .................................................................................................................... 3-38
3.3.2.4 Alarms...................................................................................................................................... 3-40
3.3.2.5 PROFINET............................................................................................................................... 3-42
3.3.2.6 Variable status ......................................................................................................................... 3-44
3.3.2.7 Variable tables ......................................................................................................................... 3-45
Table of contents

CPU 31xC and CPU 31x, Technical Specifications
x Manual, 12/2006 , A5E00105475-07
3.4 S7 connections......................................................................................................................... 3-48
3.4.1 S7 connection as communication path .................................................................................... 3-48
3.4.2 Assignment of S7 connections................................................................................................. 3-49
3.4.3 Distribution and availability of S7 connection resources.......................................................... 3-50
3.4.4 Connection resources for routing............................................................................................. 3-52
3.5 DPV1........................................................................................................................................ 3-53
4 Memory concept ..................................................................................................................................... 4-1
4.1 Memory areas and retentivity..................................................................................................... 4-1
4.1.1 CPU memory areas.................................................................................................................... 4-1
4.1.2 Retentivity of load memory, system memory and RAM............................................................. 4-2
4.1.3 Retentivity of memory objects.................................................................................................... 4-4
4.1.4 Address areas of system memory ............................................................................................. 4-6
4.1.5 Properties of the SIMATIC Micro Memory Card ........................................................................ 4-9
4.2 Memory functions..................................................................................................................... 4-11
4.2.1 General: Memory functions...................................................................................................... 4-11
4.2.2 Load user program from SIMATIC Micro Memory Card to the CPU ....................................... 4-12
4.2.3 Handling with modules............................................................................................................. 4-13
4.2.3.1 Download of new blocks or delta downloads........................................................................... 4-13
4.2.3.2 Uploading blocks...................................................................................................................... 4-13
4.2.3.3 Deleting blocks......................................................................................................................... 4-13
4.2.3.4 Compressing blocks................................................................................................................. 4-14
4.2.3.5 Promming (RAM to ROM) ........................................................................................................ 4-14
4.2.4 CPU memory reset and restart ................................................................................................ 4-14
4.2.5 Recipes .................................................................................................................................... 4-15
4.2.6 Measured value log files .......................................................................................................... 4-16
4.2.7 Backup of project data to SIMATIC Micro Memory Card......................................................... 4-18
5 Cycle and reaction times......................................................................................................................... 5-1
5.1 Overview .................................................................................................................................... 5-1
5.2 Cycle time................................................................................................................................... 5-2
5.2.1 Overview .................................................................................................................................... 5-2
5.2.2 Calculating the cycle time .......................................................................................................... 5-5
5.2.3 Different cycle times................................................................................................................... 5-8
5.2.4 Communication load .................................................................................................................. 5-9
5.2.5 Cycle time extension as a result of testing and commissioning functions............................... 5-11
5.2.6 Cycle extension through Component Based Automation (CBA) ............................................. 5-11
5.3 Response time ......................................................................................................................... 5-14
5.3.1 Overview .................................................................................................................................. 5-14
5.3.2 Shortest response time ............................................................................................................ 5-16
5.3.3 Longest response time............................................................................................................. 5-17
5.3.4 Reducing the response time with direct I/O access................................................................. 5-18
5.4 Calculating method for calculating the cycle/response time.................................................... 5-19
5.5 Interrupt response time ............................................................................................................ 5-21
5.5.1 Overview .................................................................................................................................. 5-21
5.5.2 Reproducibility of Time-Delay and Watchdog Interrupts ......................................................... 5-23
5.6 Sample calculations ................................................................................................................. 5-23
5.6.1 Example of cycle time calculation............................................................................................ 5-23
5.6.2 Sample of response time calculation ....................................................................................... 5-24
5.6.3 Example of interrupt response time calculation....................................................................... 5-26
Table of contents

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 xi
6 General technical data............................................................................................................................ 6-1
6.1 Standards and approvals........................................................................................................... 6-1
6.2 Electromagnetic compatibility .................................................................................................... 6-5
6.3 Transportation and storage conditions for modules................................................................... 6-7
6.4 Mechanical and climatic environmental conditions for S7-300 operation.................................. 6-7
6.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage
of S7-300.................................................................................................................................... 6-9
6.6 Rated voltages of S7-300 ........................................................................................................ 6-10
7 Technical data of CPU 31xC................................................................................................................... 7-1
7.1 General technical data............................................................................................................... 7-1
7.1.1 Dimensions of CPU 31xC.......................................................................................................... 7-1
7.1.2 Technical data of the Micro Memory Card................................................................................. 7-2
7.2 CPU 312C.................................................................................................................................. 7-3
7.3 CPU 313C.................................................................................................................................. 7-9
7.4 CPU 313C-2 PtP and CPU 313C-2 DP................................................................................... 7-15
7.5 CPU 314C-2 PtP and CPU 314C-2 DP................................................................................... 7-22
7.6 Technical data of the integrated I/O......................................................................................... 7-30
7.6.1 Arrangement and usage of integrated I/Os.............................................................................. 7-30
7.6.2 Analog I/O................................................................................................................................ 7-36
7.6.3 Parameterization...................................................................................................................... 7-42
7.6.4 Interrupts.................................................................................................................................. 7-47
7.6.5 Diagnostics............................................................................................................................... 7-48
7.6.6 Digital inputs............................................................................................................................. 7-49
7.6.7 Digital outputs .......................................................................................................................... 7-51
7.6.8 Analog inputs ........................................................................................................................... 7-53
7.6.9 Analog outputs ......................................................................................................................... 7-55
8 Technical data of CPU 31x ..................................................................................................................... 8-1
8.1 General technical data............................................................................................................... 8-1
8.1.1 Dimensions of CPU 31x............................................................................................................. 8-1
8.1.2 Technical data of the SIMATIC Micro Memory Card................................................................. 8-2
8.2 CPU 312..................................................................................................................................... 8-3
8.3 CPU 314..................................................................................................................................... 8-9
8.4 CPU 315-2 DP ......................................................................................................................... 8-14
8.5 CPU 315-2 PN/DP................................................................................................................... 8-21
8.6 CPU 317-2 DP ......................................................................................................................... 8-30
8.7 CPU 317-2 PN/DP................................................................................................................... 8-38
8.8 CPU 319-3 PN/DP................................................................................................................... 8-47
Table of contents

CPU 31xC and CPU 31x, Technical Specifications
xii Manual, 12/2006 , A5E00105475-07
A Appendix.................................................................................................................................................A-1
A.1 Information about upgrading to a CPU 31xC or CPU 31x .........................................................A-1
A.1.1 Scope .........................................................................................................................................A-1
A.1.2 Changed behavior of certain SFCs............................................................................................A-3
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP....................................A-4
A.1.4 Runtimes that change while the program is running..................................................................A-5
A.1.5 Converting the diagnostic addresses of DP slaves ...................................................................A-5
A.1.6 Reusing existing hardware configurations .................................................................................A-6
A.1.7 Replacing a CPU 31xC/31x .......................................................................................................A-6
A.1.8 Using consistent data areas in the process image of a DP slave system.................................A-7
A.1.9 Load memory concept for the CPU 31xC/31x ...........................................................................A-8
A.1.10 PG/OP functions ........................................................................................................................A-8
A.1.11 Routing for the CPU 31xC/31x as an intelligent slave...............................................................A-8
A.1.12 Changed retentive behavior of CPUs with firmware V2.0.12 or higher .....................................A-9
A.1.13 FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP, a CPU
317 or a CPU 319-3 PN/DP.......................................................................................................A-9
A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET interface ...........A-10
Glossary ..................................................................................................................................... Glossary-1
Index................................................................................................................................................ Index-1
Tables
Table 1 Scope of this manual..................................................................................................................... iii
Table 1-1 Ambient influence on the automation system (AS).................................................................... 1-1
Table 1-2 Galvanic isolation....................................................................................................................... 1-1
Table 1-3 Communication between sensors/actuators and the PLC......................................................... 1-2
Table 1-4 The use of local and distributed I/O........................................................................................... 1-2
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs).................... 1-2
Table 1-6 CPU performance ...................................................................................................................... 1-2
Table 1-7 Communication .......................................................................................................................... 1-3
Table 1-8 Software..................................................................................................................................... 1-3
Table 1-9 Supplementary features............................................................................................................. 1-3
Table 2-1 Mode selector switch settings .................................................................................................... 2-3
Table 2-2 Differences of the CPUs 31xC................................................................................................... 2-3
Table 2-3 Mode selector switch settings .................................................................................................... 2-6
Table 2-4 Mode selector switch settings .................................................................................................... 2-8
Table 2-5 Mode selector switch settings .................................................................................................. 2-10
Table 2-6 Mode selector switch settings .................................................................................................. 2-12
Table 2-7 General status and error displays of the CPU 31x .................................................................. 2-13
Table 2-8 Bus error displays of CPU 31x................................................................................................. 2-13
Table 3-1 Operating modes for CPUs with two DP interfaces ................................................................... 3-3
Table 3-2 Communication services of the CPUs ....................................................................................... 3-9
Table of contents

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 xiii
Table 3-3 Client and server in S7 communication, using connections with unilateral / bilateral
configuration............................................................................................................................. 3-12
Table 3-4 GD resources of the CPUs ...................................................................................................... 3-13
Table 3-5 Number of routing connections for DP CPUs .......................................................................... 3-15
Table 3-6 System and standard functions which are new or have to be replaced .................................. 3-25
Table 3-7 System and standard functions in PROFIBUS DP which can be emulated in PROFINET
IO functions.............................................................................................................................. 3-26
Table 3-8 OBs in PROFINET IO and PROFIBUS DP.............................................................................. 3-26
Table 3-9 Distribution of connections....................................................................................................... 3-50
Table 3-10 Availability of connection resources......................................................................................... 3-51
Table 3-11 Number of routing connection resources (for DP/PN CPUs)................................................... 3-52
Table 3-12 Interrupt blocks with DPV1 functionality .................................................................................. 3-54
Table 3-13 System function blocks with DPV1 functionality ...................................................................... 3-55
Table 4-1 Retentivity of the work memory.................................................................................................. 4-3
Table 4-2 Retentivity behavior of memory objects (applies to all CPUs with DP/MPI-SS)........................ 4-4
Table 4-3 Retentive behavior of DBs for CPUs with firmware >= V2.0.12 ................................................ 4-5
Table 4-4 Address areas of system memory ............................................................................................. 4-6
Table 5-1 Cyclic program processing......................................................................................................... 5-3
Table 5-2 Formula for calculating the process image (PI) transfer time.................................................... 5-5
Table 5-3 CPU 31xC: Data for calculating the process image (PI) transfer time....................................... 5-5
Table 5-4 CPU 31x: Data for calculating the process image (PI) transfer time ......................................... 5-6
Table 5-5 Extending the user program processing time ............................................................................ 5-6
Table 5-6 Operating system processing time at the scan cycle check point ............................................. 5-7
Table 5-7 Extended cycle time due to nested interrupts............................................................................ 5-7
Table 5-8 Cycle time extension as a result of errors.................................................................................. 5-8
Table 5-9 Cycle time extension as a result of testing and commissioning functions............................... 5-11
Table 5-10 Formula: Shortest response time............................................................................................. 5-16
Table 5-11 Formula: Longest response time ............................................................................................. 5-18
Table 5-12 Calculating the response time.................................................................................................. 5-20
Table 5-13 Process and diagnostic interrupt response times.................................................................... 5-21
Table 5-14 Process and diagnostic interrupt response times.................................................................... 5-22
Table 6-1 Use in industrial environments................................................................................................... 6-4
Table 7-1 Available SIMATIC Micro Memory Cards .................................................................................. 7-2
Table 7-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card............................. 7-2
Table 7-3 Technical data of CPU 312C ..................................................................................................... 7-3
Table 7-4 Technical data of CPU 313C ..................................................................................................... 7-9
Table 7-5 Technical data for CPU 313C-2 PtP/ CPU 313C-2 DP............................................................ 7-15
Table of contents

CPU 31xC and CPU 31x, Technical Specifications
xiv Manual, 12/2006 , A5E00105475-07
Table 7-6 Technical data of CPU 314C-2 PtP and CPU 314C-2 DP....................................................... 7-22
Table 7-7 Parameters of standard DI ....................................................................................................... 7-42
Table 7-8 Parameters of the interrupt inputs............................................................................................ 7-42
Table 7-9 Parameters of standard AI ....................................................................................................... 7-44
Table 7-10 Parameters of standard AO..................................................................................................... 7-45
Table 7-11 Start information for OB40, relating to the interrupt inputs of the integrated I/O..................... 7-48
Table 7-12 Technical data of digital inputs................................................................................................. 7-49
Table 7-13 Technical data of digital outputs .............................................................................................. 7-51
Table 7-14 Technical data of analog inputs ............................................................................................... 7-53
Table 7-15 Technical data of analog outputs............................................................................................. 7-55
Table 8-1 Available SIMATIC Micro Memory Cards .................................................................................. 8-2
Table 8-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card............................. 8-3
Table 8-3 Technical data for the CPU 312................................................................................................. 8-3
Table 8-4 Technical data for the CPU 314................................................................................................. 8-9
Table 8-5 Technical data for the CPU 315-2 DP...................................................................................... 8-14
Table 8-6 Technical data for the CPU 315-2 PN/DP................................................................................ 8-21
Table 8-7 Technical data for the CPU 317-2 DP...................................................................................... 8-30
Table 8-8 Technical data for the CPU 317-2 PN/DP................................................................................ 8-38
Table 8-9 Technical data for the CPU 319-3 PN/DP................................................................................ 8-47
Table A-1 Consistent data .......................................................................................................................... A-7


CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 1-1
Guide to the S7-300 documentation
1
Overview
There you find a guide leading you through the S7-300 documentation.
Selecting and configuring
Table 1-1 Ambient influence on the automation system (AS)
Information on.. is available in ...
What provisions do I have to make for AS installation
space?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Configuring - Component dimensions
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Mounting - Installing the mounting rail
How do environmental conditions influence the AS? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Appendix
Table 1-2 Galvanic isolation
Information on.. is available in ...
Which modules can I use if electrical isolation is required
between sensors/actuators?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Electrical
assembly, protective measures and grounding
Module Data Manual
Under what conditions do I have to isolate the modules
electrically?
How do I wire that?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Electrical
assembly, protective measures and grounding
CPU 31xC and CPU 31x operating instructions: Installation:
Wiring
Under which conditions do I have to isolate stations
electrically?
How do I wire that?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation Configuring Configuring subnets
Guide to the S7-300 documentation

CPU 31xC and CPU 31x, Technical Specifications
1-2 Manual, 12/2006 , A5E00105475-07
Table 1-3 Communication between sensors/actuators and the PLC
Information on.. is available in ...
Which module is suitable for my sensor/actuator? For CPU: CPU 31xC and CPU 31x Manual, Technical Data
For signal modules: Reference manual of your signal
module
How many sensors/actuators can I connect to the module? For CPU: CPU 31xC and CPU 31x Manual, technical data
of signal modules: Reference manual of your signal module
To connect my sensors/actuators to the PLC, how do I wire
the front connector ?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Wiring Wiring the front connector
When do I need expansion modules (EM) and how do I
connect them?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Distribution of
modules to several racks
How to mount modules on racks / mounting rails S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Assembly Installing modules on the mounting
rail
Table 1-4 The use of local and distributed I/O
Information on.. is available in ...
Which range of modules do I want to use? For local I/O and expansion devices: Module Data reference
manual
For distributed I/O and PROFIBUS DP: Manual of the
relevant I/O device
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs)
Information on.. is available in ...
Which rack / mounting rail is most suitable for my
application?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring
Which interface modules (IM) do I need to connect the EMs
to the CU?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Distribution of
modules to several racks
What is the right power supply (PS) for my application? S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring
Table 1-6 CPU performance
Information on.. is available in ...
Which memory concept is best suited to my application? CPU 31xC and CPU 31x Manual, Technical Data
How do I insert and remove Micro Memory Cards? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Commissioning Commissioning modules
Removing / inserting a Micro Memory Card (MMC)
Which CPU meets my demands on performance? S7-300 instruction list: CPU 31xC and CPU 31x
Length of the CPU response / execution times CPU 31xC and CPU 31x Manual, Technical Data
Which technological functions are implemented? Technological Functions Manual
How can I use these technological functions? Technological Functions Manual

Guide to the S7-300 documentation

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 1-3
Table 1-7 Communication
Information on.. is available in ...
Which principles do I have to take into account? Communication with SIMATIC Manual
PROFINET System Manual, System Description
Options and resources of the CPU CPU 31xC and CPU 31x Manual, Technical Data
How to use communication processors (CPs) to optimize
communication
CP Manual
Which type of communication network is best suited to my
application?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Configuring
subnets
How to network the various components S7-300, CPU 31xC and CPU 31x Operating Instructions:
Hardware and Installation: Configuring Configuring
subnets
What to take into account when configuring PROFINET
networks
SIMATIC NET Manual, Twisted-Pair and Fiber Optic
Networks (6GK1970-1BA10-0AA0) Network Configuration
PROFINET System Manual, System Description
Installation and Commissioning
Table 1-8 Software
Information on.. is available in ...
Software requirements of my S7-300 system CPU 31xC and CPU 31x Manual, Technical Data
Technical Data
Table 1-9 Supplementary features
Information on.. is available in ...
How to implement monitor and modify functions
(Human Machine Interface)
For text-based displays: The relevant Manual
For Operator Panels: The relevant Manual
For WinCC: The relevant Manual
How to integrate process control modules For PCS7: The relevant Manual
What options are offered by redundant and fail-safe
systems?
S7-400H Manual Redundant Systems
Fail-Safe Systems Manual
Information to be observed when migrating from PROFIBUS
DP to PROFINET IO
Programming Manual: From PROFIBUS DP to PROFINET
IO

Guide to the S7-300 documentation

CPU 31xC and CPU 31x, Technical Specifications
1-4 Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-1
Operating and display elements
2
2.1 Operating and display elements: CPU 31xC
2.1.1 Operating and display elements: CPU 31xC
Operating and display elements of CPU 31xC
1 2
3
4
5
6
7
STOP
RUN
FRCE
DC5V
SF
MRES
STOP
RUN
X1
X11 X12
X2
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Number Designation
Status and error displays
Slot for the SIMATIC Micro Memory Card incl. the ejector
Connections of the integrated I/O.
Power supply connection
2. Interface X2 (PtP or DP)
1. Interface X1 (MPI)
Mode selector switch
Operating and display elements
2.1 Operating and display elements: CPU 31xC
CPU 31xC and CPU 31x, Technical Specifications
2-2 Manual, 12/2006 , A5E00105475-07
The figure below illustrates the integrated digital and analog I/Os of the CPU with open front
covers.
RUN
STOP
MRES
SF
BF
DC5V
FRCE
RUN
X11 X12
2
2 1 3
1 2 3
STOP



Number Designation
Analog I/Os
each with 8 digital inputs
each with 8 digital outputs
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.

Operating and display elements
2.1 Operating and display elements: CPU 31xC
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-3
Mode selector switch
Use the mode selector switch to set the CPU operating mode.
Table 2-1 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory
reset
Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode selector
switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the
help of Status and Error LEDs

Power supply connection
Each CPU is equipped with a double-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Differences between the CPUs
Table 2-2 Differences of the CPUs 31xC
Element CPU
312C
CPU
313C
CPU
313C-2 DP
CPU
313C-2 PtP
CPU
314C-2 DP
CPU
314C-2 PtP
9-pole DP
interface (X2)
X X
15-pole PtP
interface (X2)
X X
Digital inputs 10 24 16 16 24 24
Digital outputs 6 16 16 16 16 16
Analog inputs 4 + 1 4 + 1 4 + 1
Analog outputs 2 2 2
Technological
functions
2 counte
rs
3 counte
rs
3 counters 3 counters 4 counters
1 channel for
positioning
4 counters
1 channel for
positioning

Operating and display elements
2.1 Operating and display elements: CPU 31xC
CPU 31xC and CPU 31x, Technical Specifications
2-4 Manual, 12/2006 , A5E00105475-07
2.1.2 Status and error indicators: CPU 31xC

LED designation Color Meaning
SF Red Hardware or software error
BF (for CPUs with DP
interface only)
Red Bus error
DC5V Green 5-V power for CPU and S7-300 bus is OK
FRCE Yellow Force job is active
RUN Green CPU in RUN
The LED flashes during STARTUP at a rate of 2 Hz, and in HOLD
state at 0.5 Hz.
STOP Yellow CPU in STOP and HOLD or STARTUP
The LED flashes at 0.5 Hz when the CPU requests a memory reset,
and during the reset at 2 Hz.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the
help of Status and Error LEDs
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-5
2.2 Operating and display elements: CPU 31x
2.2.1 Operating and display elements: CPU 312, 314, 315-2 DP:
Operating and display elements
X1 X2
1
2
3
4
5
6
FRCE
MRES
STOP
RUN
STOP
RUN
DC5V
BF
SF
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Number Designation
Slot for the SIMATIC Micro Memory Card incl. the ejector
2. Interface X2 (only for CPU 315-2 DP)
Power supply connection
1. Interface X1 (MPI)
Mode selector switch
Status and error displays
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
2-6 Manual, 12/2006 , A5E00105475-07
Mode selector switch
The mode selector switch is used to set the CPU operating mode.
Table 2-3 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory reset Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode
selector switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs
Power supply connection
Each CPU is equipped with a 2-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-7
2.2.2 Operating and display elements: CPU 317-2 DP
Operating and display elements
1 2 3
4
5
6
7
STOP
RUN
FRCE
DC5V
SF
BF2
BF1
MRES
STOP
RUN
X1 X2
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Number Description
Bus error indicators
Status and error displays
Slot for the SIMATIC Micro Memory Card incl. the ejector
Mode selector switch
Power supply connection
1. Interface X1 (MPI/DP)
2. Interface X2 (DP)
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
2-8 Manual, 12/2006 , A5E00105475-07
Mode selector switch
Use the mode selector switch to set the CPU operating mode.
Table 2-4 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory reset Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode
selector switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs
Power supply connection
Each CPU is equipped with a 2-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-9
2.2.3 Operating and display elements: CPU 31x-2 PN/DP
Operating and display elements
1 2 3
4
5
6
7
8
BF2
X2
MAC-ADD.:
X1-X2-X3
X4-X5-X6
RX /
TX
LlNK
X1
STOP
RUN
FRCE
DC5V
SF BF1
MRES
STOP
RUN
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Number Description
Bus error indicators
Status and error displays
Slot for the SIMATIC Micro Memory Card incl. the ejector
Mode selector switch
Status display of 2nd interface (X2)
2. Interface X2 (PN)
Power supply connection
1. Interface X1 (MPI/DP)
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
2-10 Manual, 12/2006 , A5E00105475-07
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.

Mode selector switch
You can use the mode selector switch to set the current operating mode of the CPU.
Table 2-5 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory reset Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode selector
switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs
Power supply connection
Each CPU is equipped with a 2-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-11
2.2.4 Operating and display elements: CPU 319-3 PN/DP
Operating and display elements
1 2 3
4
8
BF2
X3
MAC-ADD.:
X1-X2-X3
X4-X5-X6
X1
STOP
RUN
FRCE
DC5V
SF BF1
MRES
STOP
RUN
BF3
X2
5
6
9
7
10
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Number Designation
Bus error indicators
Status and error displays
Slot for the SIMATIC Micro Memory Card incl. the ejector
Mode selector switch
3. Interface X3 (PN)
Green LED (LED designation: LINK)
Yellow LED (LED designation: RX/TX)
Power supply connection
1. Interface X1 (MPI/DP)
2. Interface X2 (DP)
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
2-12 Manual, 12/2006 , A5E00105475-07
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.

Mode selector switch
You can use the mode selector switch to set the current operating mode of the CPU.
Table 2-6 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory reset Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode selector
switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs
Power supply connection
Each CPU is equipped with a 2-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 2-13
2.2.5 Status and error displays of CPU 31x
General status and error displays
Table 2-7 General status and error displays of the CPU 31x
LED designation Color Meaning
SF red Hardware or software error.
DC5V green 5-V power for the CPU and the S7-300 bus
FRCE yellow LED is lit: Active force job
LED flashes at 2 Hz: Node flash test function (only CPUs with
firmware V2.2.0 or higher)
RUN green CPU in RUN
The LED flashes during STARTUP at a rate of 2 Hz, and in HOLD
state at 0.5 Hz.
STOP yellow CPU in STOP, or HOLD, or STARTUP
The LED flashes at 0.5 Hz when the CPU requests a memory reset,
and during the reset at 2 Hz.
Status displays for the interfaces X1, X2 and X3
Table 2-8 Bus error displays of CPU 31x
CPU LED designation Color Meaning
315-2 DP BF red Bus error at DP interface (X2)
BF1: red Bus error at interface 1 (X1) 317-2 DP
BF2: red Bus error at interface 2 (X2)
BF1: red Bus error at interface 1 (X1)
BF2: red Bus error at interface 2 (X2)
LINK green Connection at interface 2 (X2) is active
31x-2 PN/DP
RX/TX yellow Receive / Transmit data at interface 2 (X2)
BF1: red Bus error at interface 1 (X1)
BF2: red Bus error at interface 2 (X2)
BF3: red Bus error at interface 3 (X3)
LINK
1
green Connection at interface 3 (X3) is active
319-3 PN/DP
RX/TX
1
yellow Receive / transmit data at interface 3 (X3)
1
In the case of the CPU 319-3 PN/DP are located directly at the RJ45 socket (LEDs are not
labeled!)
Operating and display elements
2.2 Operating and display elements: CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
2-14 Manual, 12/2006 , A5E00105475-07
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-1
Communication
3
3.1 Interfaces
3.1.1 Multi-Point Interface (MPI)
Availability
All the CPUs described here are equipped with an MPI interface
A CPU equipped with an MPI/DP interface is configured and supplied as
MPI interface.
Properties
The MPI (Multi-Point Interface) represents the CPU interface for PG/OP connections, or for
communication on an MPI subnet.
The default transmission rate of all CPUs is 187.5 kbps. You can also set 19.2 kbps for
communication with an S7-200. The
315-2 PN/DP, 317-2 and 319-3 PN/DP CPUs support transmission rates to 12 Mbps.
The CPU automatically broadcasts its bus configuration via the MPI interface (the
transmission rate, for example). A PG, for example, can thus receive the correct parameters
and automatically connect to a MPI subnet.

Note
You may only connect PGs to an MPI subnet which is in RUN.
Other stations (for example, OP, TP, ...) should not be connected to the MPI subnet while
the system is in RUN. Otherwise, transferred data might be corrupted as a result of
interference, or global data packages may be lost.

Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
3-2 Manual, 12/2006 , A5E00105475-07
Time synchronization
The CPU's MPI interface supports time synchronization. The CPU can be programmed for
operation as time master (with default synchronization intervals) or time slave.
Default setting: No time synchronization
The synchronization mode is set in the "Clock" tab of the CPU or interface properties dialog
box in HW Config.
When operated as time slave, the CPU receives a synchronization message frame from one
time master and sets its internal time accordingly.
When operated as time master, the CPU broadcasts time synchronization message frames
at programmed synchronization intervals at the MPI interface to other node stations of the
MPI subnet. Time synchronization is initiated immediately when you set the CPU time by
way of PG or SFC.
Time synchronization at the MPI interface is also available at:
At the DP Interface
At the PROFINET Interface
In the AS of the central configuration



Note
The CPU may only be operated as time slave at one of these interfaces.

Example 1
A CPU operating as time slave on the DP interface can only operate as time master on the
MPI interface and/or within the AS.
Example 2
The CPU time is synchronized by a time server by way of PROFINET interface; this CPU
can only be operated as time master at the DP / MPI
interface or within the AS.
Devices capable of MPI communication
PG/PC
OP/TP
S7-300 / S7-400 with MPI interface
S7-200 (only at 19.2 kbps)
Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-3
3.1.2 PROFIBUS DP
Availability
CPUs with the "DP" have at least one DP interface.
The 315-2 PN/DP and 317-2 PN/DP CPUs feature an integrated MPI/DP interface.
The 317-2 DP and 319-3 PN/DP CPUs feature an MPI/DP interface plus an additional DP
interface. The factory setting of the CPU's MPI/DP interface is MPI mode. You need to set
DP mode in STEP 7 if you want to use the DP interface.
Operating modes for CPUs with two DP interfaces
Table 3-1 Operating modes for CPUs with two DP interfaces
MPI/DP interface PROFIBUS DP interface
MPI
DP master
DP slave
1)

not configured
DP master
DP slave
1)

1)
simultaneous operation of the DP slave on both interfaces is excluded
Properties
The PROFIBUS DP interface is mainly used to connect distributed I/O. PROFIBUS DP
allows you to create large subnets, for example.
The PROFIBUS DP interface can be set for operation in master or slave mode, and supports
transmission rates up to 12 Mbps.
The CPU broadcasts its bus parameters (transmission rate, for example) via the PROFIBUS
DP interface when master mode is set. This functionality automatically provides the correct
parameters for online operation of a programming device, for example. In your configuration
you can specify to disable bus parameter broadcasting.

Note
(for DP interface in slave mode only)
When you disable the "Test, Commissioning, Routing" check box in the DP interface
properties dialog box in STEP 7, the transmission rate settings of the master automatically
override corresponding user-specific settings. This disables the routing function at this
interface.

Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
3-4 Manual, 12/2006 , A5E00105475-07
Time synchronization
The CPU's DP interface supports time synchronization. The CPU can be programmed for
operation as time master (at corresponding synchronization intervals) or time slave.
Default setting: No time synchronization
The synchronization mode is set in the "Clock" tab of the interface properties dialog box in
HW Config.
When operated as time slave, the CPU receives a synchronization message frame from one
time master and sets its internal time accordingly.
When operated as time master on the DP interface, the CPU broadcasts time
synchronization message frames at programmed synchronization intervals to other node
stations of the PROFIBUS DP subnet. Time synchronization is initiated immediately when
you set the CPU time by way of PG or SFC.
Time synchronization at the DP interface is also available at:
At the MPI Interface
At the PROFINET Interface
In the AS of the central configuration



Note
The CPU may only be operated as time slave at one of these interfaces.
Example 1
A CPU operating as time slave on the DP interface can only operate as time master on the
MPI interface and/or within the AS.
Example 2
The CPU time is synchronized by a time server by way of PROFINET interface; this CPU
can only be operated as time master at the DP / MPI
interface or within the AS.
Devices capable of PROFIBUS DP communication
PG/PC
OP/TP
DP slaves
DP master
Actuators/Sensors
S7-300/S7-400 with PROFIBUS DP interface
Reference
Further information on PROFIBUS: http://www.profibus.com
Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-5
3.1.3 PROFINET (PN)
Availability
CPUs with a "PN" name suffix are equipped with a PROFINET interface.
Connecting to Industrial Ethernet
You can use the integrated PROFINET interface of the CPU to establish a connection to
Industrial Ethernet.
The integrated PROFINET interface of the CPU can be configured via MPI or PROFINET
interface.
Time Synchronization using PROFINET
The CPU can be operated on the PROFINET interface as time client based on NTP
(Network Time Protocol).
Default setting: No time synchronization based on NTP
Set the "Time synchronization based on NTP" option to synchronize the CPU on PROFINET.
This option is available in the "Time synchronization" properties of the PROFINET interface.
Also enter the IP addresses of the NTP server and a synchronization interval.
Information on suitable NTP servers and on NTP is available, for example, at contribution ID:
17990844.
In addition to the PROFINET interface, the system also supports time synchronization on the
MPI or DP interface. The CPU clock may only be synchronized by a time master or server.
Example
The time of CPU 319-3 PN/DP is synchronized by a time server on PROFINET over NTP.
This configuration only allows operation of the CPU as time master on the DP and/or MPI
interface within the AS.

Note
The PROFINET interface cannot be operated as time server, that is, the CPU cannot
synchronize any other clocks on PROFINET.

Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
3-6 Manual, 12/2006 , A5E00105475-07
Devices capable of PROFINET (PN) communication
PROFINET IO devices (for example, interface module IM 151-3 PN in an ET 200S)
PROFINET CBA components
S7-300 / S7-400 with PROFINET interface (for example, CPU 317-2 PN/DP or CP 343-1)
Active network components (a switch, for example)
PG/PC with Ethernet card
IE/PB Link
Properties of the PROFINET interface

Properties
IEEE standard 802.3
Connector design RJ45
Transmission speed 100 Mbps max.
Media Twisted Pair Cat5 (100BASE-TX)


Note
Networking PROFINET components
The use of switches, rather than hubs, for networking PROFINET components brings about
a substantial improvement in decoupling bus traffic, and improves runtime performance
under higher bus load. PROFINET CBA with cyclic PROFINET interconnections requires the
use of switches in order to maintain compliance with performance specifications. Full duplex
mode at 100 Mbps is mandatory for cyclic PROFINET interconnections.
PROFINET IO also requires the use of switches and 100 Mbps full duplex mode.

Addressing ports
Each port of a PROFINET interface requires a separate diagnostics address. Programming
the addresses in HW Config.
For further information, refer to the PROFINET System Description System Manual.
Diagnostics messages (error and maintenance information) for reporting problems detected
in the user program can be enabled at OB 82 (enable set in HW Config) and evaluated, for
example, by calling SFB 54. The system also supports extended diagnostics by providing
diverse data records read by calling SFB 52 and SSLs (System Status Lists) which you can
read by calling SFC 51.
Diagnostics is also supported in STEP 7 (for example, communications diagnostics, network
connection, Ethernet statistics, IP parameters etc.).
Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-7
Send clock and update time
A 319-3 PN/DP CPU operating as IO controller supports send clocks of 250 s, 500 s or
1 ms.
Controllers and devices can be operated on a PROFINET IO subnet at a synchronized send
clock. A higher send clock of a controller is adapted appropriately for devices which do not
support this rate. That is, you could operate devices both at a send clock of 250 s and 1 ms
on a 319-3 PN/DP CPU (IO controller) which operates at a send clock of 250 s.
You can program the update time of devices within a relatively wide range. This again
depends on the send clock. Update times you can program for a 319-3 PN/DP CPU:

Send
clock
Update time
250 s 250 s to 128 ms
500 s 500 s to 256 ms
1 ms 1 ms to 512 ms
The minimum update time is determined by the number of IO devices used, by the volume of
configured user data, and by the time slice for PROFINET IO communication. STEP 7
automatically makes allowances for these dependencies in your system configuration.
Reference
For instructions on how to configure the integrated PROFINET interface, refer to S7-300,
CPU 31xC and CPU 31x operating instructions (Setup).
For further information on PROFINET, refer to PROFINET System Description System
Manual.
For detailed information on Ethernet networks, network configuration and network
components refer to the SIMATIC NET Manual: Twisted-Pair and Fiber Optic Networks ,
available under article ID 8763736 at http://support.automation.siemens.com.
Component Based Automation, Commissioning Systems - Tutorial,
Article ID: 18403908
Further information about PROFINET: http://www.profinet.com
See also
PROFINET IO System (Page 3-23)
Communication
3.1 Interfaces
CPU 31xC and CPU 31x, Technical Specifications
3-8 Manual, 12/2006 , A5E00105475-07
3.1.4 Point to Point (PtP)
Availability
CPUs with the "PtP" name suffix have at least one PtP interface.
Features
Using the PtP interface of your CPU, you can connect external devices with serial interface.
You can operate such a system at transmission rates up to 19.2 kbps in full duplex mode
(RS 422), and up to 38.4 kbps in half duplex mode (RS 485).
Transmission rate
Half duplex: 38.4 kbps
Full duplex: 19.2 kbps
Drivers
PtP communication drivers installed in those CPUs:
ASCII drivers
3964(R) Protocol
RK 512 (CPU 314C-2 PtP only)
Devices capable of PtP communication
Devices equipped with a serial port, for example, barcode readers, printers, etc.
Reference
CPU 31xC: Technological functions manual
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-9
3.2 Communication services
3.2.1 Overview of communication services
Selecting the communication service

You need to decide on a communication service, based on functionality requirements. Your
choice of communication service will have no effect on:
the functionality available,
whether an S7 connection is required or not, and
the time of connecting.
The user interface can vary considerably (SFC, SFB, ...), and is also determined by the
hardware used (SIMATIC CPU, PC, ...).
Overview of communication services
The table below provides an overview of communication services offered by the CPUs.
Table 3-2 Communication services of the CPUs
Communication service Functionality Time at which the S7
connection is established ...
via MPI via DP via
PtP
via
PN
PG communication Commissioning, test,
diagnostics
From the PG, starting when
the service is being used
X X X
OP communication Monitor and modify Via OP at POWER ON X X X
S7 basic communication Data exchange Is programmed at the blocks
(SFC parameters)
X X
S7 communication Data exchange in server
and client mode:
Configuration of
communication required.
Via active partner at POWER
ON.
Only in
server
mode
Only in
server
mode
X
Global data
communication
Cyclic data exchange (for
example, flag bits)
Does not require an S7
connection
X
Routing PG functions
(only for CPUs with
DP or PROFINET
interface)
For example testing,
diagnostics on other
networks also
From the PG, starting when
the service is being used
X X X
Point-to-point connection Data exchange via serial
interface
Does not require an S7
connection
X
PROFIBUS DP Data exchange between
master and slave
Does not require an S7
connection
X
PROFINET CBA Data exchange by means
of component based
communication
Does not require an S7
connection
X
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-10 Manual, 12/2006 , A5E00105475-07
Communication service Functionality Time at which the S7
connection is established ...
via MPI via DP via
PtP
via
PN
PROFINET IO Data exchange between IO
controllers and the IO
devices
Does not require an S7
connection
X
Web Server Diagnostics Does not require an S7
connection
X
SNMP
(Simple Network
Management Protocol)
Standard protocol for
network diagnostics and
configuration
Does not require an S7
connection
X
Open communication via
TCP/IP
Data exchange via
Industrial Ethernet with
TCP/IP protocol (by means
of loadable FBs)
Does not require an S7
connection, is handled in the
user program by means of
loadable FBs
X
Open communication by
means of ISO on TCP
Data exchange via
Industrial Ethernet with
ISO-on-TCP protocol (by
means of loadable FBs)
Does not require an S7
connection, is handled in the
user program by means of
loadable FBs
X
Open communication by
means of UDP
Data exchange via
Industrial Ethernet with
UDP protocol (by means of
loadable FBs)
Does not require an S7
connection, is handled in the
user program by means of
loadable FBs
X
See also
Distribution and availability of S7 connection resources (Page 3-50)
Connection resources for routing (Page 3-52)
3.2.2 PG communication
Features
PG communication is used to exchange data between engineering stations (PG, PC, for
example) and SIMATIC modules which are capable of communication. This service is
available for MPI, PROFIBUS and Industrial Ethernet subnets. Transition between subnets is
also supported.
PG communication provides the functions needed to download / upload programs and
configuration data, to run tests and to evaluate diagnostic information. These functions are
integrated in the operating system of
SIMATIC S7 modules.
A CPU can maintain several simultaneous online connections to one or multiple PGs.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-11
3.2.3 OP communication
Features
OP communication is used to exchange data between operator stations (OP, TP, for
example) and SIMATIC modules which are capable of communication. This service is
available for MPI, PROFIBUS and Industrial Ethernet subnets.
OP communication provides functions you require for monitoring and modifying. These
functions are integrated in the operating system of SIMATIC S7 modules. A CPU can
maintain several simultaneous connections to one or several OPs.
3.2.4 Data exchanged by means of S7 basic communication
Properties
S7-based communication is used to exchange data between S7 CPUs and the
communication-capable SIMATIC modules within an S7 station (acknowledged data
exchange). Data are exchanged across non-configured S7 connections. The service is
available via MPI subnet, or within the station to function modules (FM).
S7-based communication provides the functions you require for data exchange. These
functions are integrated into the CPU operating system. The user can utilize this service by
means of "System function" (SFC) user interface.
Reference
Further Information
on SFCs, refer to Instruction list.
For further information refer to STEP 7 Online Help or System and Standard Functions
reference manual.
on communication are found in the Communication with SIMATIC Manual.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-12 Manual, 12/2006 , A5E00105475-07
3.2.5 S7 communication
Properties
A CPU can always operate in server or client mode in S7 communication: We distinguish
between
communication with unilateral configuration (for PUT/GET only)
communication with bilateral configuration (for USEND, URCV, BSEND, BRCV, PUT,
GET)
However, the functionality depends on the CPU. A CP is therefore required in certain
situations.
Table 3-3 Client and server in S7 communication, using connections with unilateral / bilateral
configuration
CPU Use in server mode for
connections with unilateral
configuration
Use in server mode for
connections with bilateral
configuration
Use as client
31xC >= V1.0.0 Generally possible on
MPI/DP interface without
configuration of user
interface
Only possible with CP
and loadable FBs.
Only possible with CP
and loadable FBs.
31x >= V2.0.0 Generally possible on
MPI/DP interface without
configuration of user
interface
Only possible with CP
and loadable FBs.
Only possible with CP
and loadable FBs.
31x >= V2.2.0 Generally possible on
MPI/DP/PN interface
without configuration of user
interface
Possible on
PROFINET interface
with loadable FBs
or
with CP and loadable
FBs.
Possible on
PROFINET interface
with loadable FBs
or
with CP and loadable
FBs.
The user interface is implemented using standard function modules (FBs) from the standard
library of STEP 7, under communication blocks.
Reference
For further information on communication, refer to the Communication with SIMATIC
manual.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-13
3.2.6 Global data communication (MPI only)
Properties
Global data communication is used for cyclic exchange of global data via MPI subnets (for
example, I, Q, M) between SIMATIC S7 CPUs (data exchange without acknowledgement).
One CPU broadcasts its data to all other CPUs on the MPI subnet. This function is
integrated in the CPU operating system.
Reduction ratio
The reduction ratio specifies the cyclic intervals for GD communication. You can set the
reduction ratio when you configure global data communication in STEP 7. For example, if
you set a reduction ratio of 7, global data are transferred only with every 7th cycle. This
reduces CPU load.
Send and receive conditions
Conditions which should be satisfied for GD communication:
For the transmitter of a GD packet:
Reduction ratiotransmitter x cycle timetransmitter 60 ms
For the receiver of a GD packet:
Reduction ratioreceiver x cycle timereceiver
< reduction ratiotransmitter x cycle timetransmitter
A GD packet may be lost if you do not adhere to these conditions. The reasons being:
the performance of the "smallest" CPU in the GD circuit
asynchronous transmitting / receiving of global data at the stations
When setting in STEP 7: Transmit after each CPU cycle, and the CPU has a short scan
cycle time (< 60 ms), the operating system might overwrite a GD packet of the CPU before it
is transmitted. The loss of global data is indicated in the status box of a GD circuit, if you set
this function in your STEP 7 configuration.
GD resources of the CPUs
Table 3-4 GD resources of the CPUs
Parameters CPU 31xC, 312, 314 CPU 315-2 DP, 315-2
PN/DP, 317-2 DP, 317-2
PN/DP, 319-3 PN/DP
Number of GD circuits per CPU Max. 4 Max. 8
GD packets transmitted per GD circuit Max. 1 Max. 1
GD packets transmitted by all GD circuits Max. 4 Max. 8
GD packets received per GD circuit Max. 1 Max. 1
GD packets received by all GD circuits Max. 4 Max. 8
Data length per GD packet max. 22 bytes max. 22 bytes
Consistency max. 22 bytes max. 22 bytes
Min. reduction ratio (default) 1 (8) 1 (8)
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-14 Manual, 12/2006 , A5E00105475-07
3.2.7 Routing
Properties
STEP 7 V5.1 + SP4 or higher allows you to access your S7 stations on all subnets with your
PG/PC, for example, to
download user programs
download a hardware configuration, or
perform debugging and diagnostic functions.



Note
If you use your CPU as I-slave, the routing function is only possible when the
DP interface is switched to active IN STEP 7, set the Test, Commission Routing check
box on the properties dialog of the DP interface. For detailed information, refer to the
Programming with STEP 7 manual, or directly to the STEP 7 Online Help

Routing network nodes: MPI - DP
Gateways between subnets are routed in a SIMATIC station that is equipped with interfaces
to the respective subnets. The figure below shows CPU 1 (DP master) acting as router for
subnets 1 and 2.
PG
S7-300
CPU 1 (DP-Master)
S7-300
CPU 2 (DP-Slave)
Subnet 1 (MPl, for example)
Subnet 2 (PROFlBUS DP, for example)


The figure below shows the MPI access to PROFINET via PROFIBUS CPU 1 (315-2 DP, for
example) is the router for subnet 1 and 2;
CPU 2 is the router for subnet 2 and 3.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-15
Routing network nodes: MPI - DP - PROFINET
CPU 1
(315-2 DP, for
example)
Subnet 3 (PROFlNET) Subnet 2 (PROFlBUS)
DP
(Master)
Subnet 1 (MPl)
MPl/DP
(slave active)
CPU 2
(317-2 PN/DP)
CPU 3
(317-2 PN/DP)
PN PN
PG
MPl


Number of connections for routing
The CPUs with DP interface provide a different number of connections for the routing
function:
Table 3-5 Number of routing connections for DP CPUs
CPU As of firmware version Number of connections for routing
31xC, CPU 31x 2.0.0 Max. 4
317-2 DP 2.1.0 Max. 8
31x-2 PN/DP 2.2.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24
DP slave (active): Max. 14

Interface X2 configured as:
PROFINET: Max. 24
319-3 PN/DP 2.4.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24
DP slave (active): Max. 14

Interface X2 configured as:
DP master Max. 24
DP slave (active): Max. 14

Interface X3 configured as:
PROFINET: Max. 48
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-16 Manual, 12/2006 , A5E00105475-07
Requirements
The station modules are "capable of routing" (CPUs or CPs).
The network configuration does not exceed project limits.
The modules have loaded the configuration data containing the latest "knowledge" of the
entire network configuration of the project.
Reason: All modules participating in the network transition must receive the routing
information defining the paths to other subnets.
In your network configuration, the PG/PC you want to use to establish a connection via
network node must be assigned to the network it is physically connected to.
The CPU must set to master mode, or
If the CPU is set to operate in slave mode, the Test, Commissioning, Routing functionality
must be enabled by setting the check box in STEP 7, in the
DP interface for DP slave properties dialog box.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-17
Routing: Example of a TeleService application
The figure below shows the example of an application for remote maintenance of an S7
station using a PG. The connection to other subnets is here established via modem
connection.
The lower section of the figure shows how to configure this in STEP 7.
PG
PG
DP Master
(31xC-2DP, for example)
DP slave
(31xC-2DP, for
example)
Modem
Subnet 1
(MPl, for example)
Subnet 2
(PROFlBUS DP, for example)
Subnet 1
(MPl, for example)
Subnet 2
(PROFlBUS DP, for example)
TeleService
adapter
DP Master
(CPU 31xC-2DP, for
example)
DP slave
(CPU 31xC-2DP, for
example)
Modem
Configuration in STEP 7
Real structure


Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-18 Manual, 12/2006 , A5E00105475-07
Reference
Further information
on configuring in STEP 7 is found in the Configuring Hardware and Connections in
STEP 7 manual
of a basic nature is contained in the Communication with SIMATIC Manual.
about the TeleService adapter is available under article ID 20983182 on the Internet URL
http://support.automation.siemens.com.
on SFCs, refer to Instruction list.
For further information refer to STEP 7 Online Help or System and Standard Functions
reference manual.
on communication are found in the Communication with SIMATIC Manual.
3.2.8 Point-to-point connection
Properties
PtP communication enables you to exchange data via serial port. PtP communication can be
used to interconnect automation devices, computers or communication-capable systems of
external suppliers. The function also allows adaptation to the protocol of the communication
partner.
Reference
Further Information
on SFCs are found in the Instruction list.
For detailed information, refer to the STEP 7 Online Help , or to the System and Standard
Functions Reference Manual.
on communication is found in the Communication with SIMATIC Manual.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-19
3.2.9 Data consistency
Features
A data area is consistent if it can be read or written to from the operating system as a
consistent block. Data exchanged collectively between the stations should belong together
and originate from a single processing cycle, that is, be consistent. If the user program
contains a programmed communication function, for example, access to shared data with X-
SEND/ XRCV, access to that data area can be coordinated by means of the "BUSY"
parameter itself.
With PUT/GET functions
For S7 communication functions, such as PUT/GET or write / read via OP communication,
which do not require a block in the user program on the CPU (operating in server mode),
allowances must be made in the program for the extent of the data consistency. The
PUT/GET functions for S7 communication, or for reading/writing variables via OP
communication, are executed at the CPU's scan cycle checkpoint. To save a defined
process alarm response time, the communication variables are copied in blocks of up to 64
bytes (CPU 317, CPU 319: 160 bytes) to / from work memory at the scan cycle checkpoint of
the operating system. Data consistency is not guaranteed for larger data areas.

Note
If a defined data deficiency is required, the defined communication variables in the user
program of the CPU may be no larger than 64 bytes (for CPU 317, CPU 319: 160 bytes.)

Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-20 Manual, 12/2006 , A5E00105475-07
3.2.10 Communication by means of PROFINET
What is PROFINET?
Within the framework of Totally Integrated Automation (TIA), PROFINET represents a
consequent enhancement of:
PROFIBUS DP, the established fieldbus and
Industrial Ethernet, the communication bus for the cell level
Experience gained from both systems was and is being integrated into PROFINET.
PROFINET is an Ethernet-based automation standard of PROFIBUS International
(previously PROFIBUS Users Organization e.V.), and defines a multi-vendor communication,
automation, and engineering model.
Objectives in PROFINET
The objectives in PROFINET are:
Open Ethernet Standard for automation based on Industrial Ethernet.
Although Industrial Ethernet and Standard Ethernet components can be used together,
the Industrial Ethernet devices are more sturdy and therefore better suited for industrial
environments (temperature, immunity to interference, etc.)
Use of TCP/IP and IT standards
Automation with real-time Ethernet
Total integration of field bus systems
Implementing PROFINET in SIMATIC
We have integrated PROFINET as follows:
Communication between field devices is implemented in SIMATIC by way of PROFINET
IO.
Communication between controllers which operate as components in distributed systems
are implemented
in SIMATIC by means of PROFINET CBA (Component Based Automation).
Installation engineering and network components are available in SIMATIC NET.
Established IT standards from the Office environment (e.g., SNMP=Simple Network
Management Protocol for network parameter assignment and diagnosis) are used for
remote maintenance and network diagnostics.
Documentation from PROFIBUS International on the Internet
Numerous texts on the subject of PROFINET are available from the URL
"http://www.profinet.com" from PROFIBUS International (formerly PROFIBUS Nutzer-
Organisation, PNO)
Further information is available on the Internet at: http://www.siemens.com\profinet\
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-21
What is PROFINET IO?
Within the framework of PROFINET, PROFINET IO is a communication concept for the
implementation of modular, distributed applications.
PROFINET IO allows you to create automation solutions, which are familiar to you from
PROFIBUS.
That is, you have the same application view in STEP 7, regardless of whether you configure
PROFINET or PROFIBUS devices.
What is PROFINET CBA (Component Based Automation)?
Within the framework of PROFINET, PROFINET CBA is an automation concept for the
implementation of applications with distributed intelligence.
PROFINET CBA lets you create distributed automation solutions, based on default
components and partial solutions.
Component Based Automation allows you to use complete technological modules as
standardized components in large systems.
The components are also created in an engineering tool which may differ from vendor to
vendor. Components of SIMATIC devices are created, for example, with STEP 7.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-22 Manual, 12/2006 , A5E00105475-07
Extent of PROFINET CBA and PROFINET IO
PROFINET IO and CBA represent two different views of automation devices on Industrial
Ethernet.
lO data view Component view
One cable, lT standards, standard applications
protocols, controller, etc.
- Distributed l/Os
- Usual lO view in STEP 7
(PROFlNET Component Description) (Generic Station Description)
- Distributed intelligence
- Plant-wide engineering
GSD PCD
PROFlNET
PROFlNET CBA PROFlNETlO

Figure 3-1 Extent of PROFINET IO and Component Based Automation
Component Based Automation divides the entire system into various functions. These
functions are configured and programmed.
PROFINET IO provides you with a view of the system that is very similar to the view
obtained in PROFIBUS. You continue to configure and program the individual automation
devices.
Reference
Further Information
on PROFINET IO and PROFINET CBA is available in the PROFINET system
specification.
For differences and similarities between PROFIBUS DP and PROFINET IO, refer to the
From PROFIBUS DP to PROFINET IO programming manual.
For further information about PROFINET CBA, refer to the documentation on
SIMATIC iMap and Component Based Automation.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-23
3.2.10.1 PROFINET IO System
Functions of PROFINET IO
The following graphic shows the new functions in PROFINET IO
PC
PC
PC
PC
PC PG/PC
PC
PC
lE/PB Link
PN lO
P1
P2
P3
P4
P5
P6
P7
CPU 319-3
PN/DP
P1
lM 154-8
CPU
P1
P2
P3
PG
PB
lE
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
2
3
4
5 6
1
7
8
Switch 1 Switch 2
Company network
PROFlBUS
lndustrial Ethernet
lO
Controllers
DP master
lO
Controllers
DP master
PN
PN
ET 200
(DP slave)
ET 200
(DP slave)
lO device lO device
lO device lO device
Router
PN PN
PN PN



The graphic shows Examples of connection paths
The connection of company
network and field level
You can access devices at the field level from PCs in your company network
Example:
PC - Switch 1 - Router - Switch 2 - CPU 319-3 PN/DP .
Connections between the
automation system and field
level
You can, of course, also access other areas on the Industrial Ethernet from a PG at the
field level.
Example:
PG - integrated switch IM 154-8 CPU - Switch 2 - integrated switch IO device ET
200S - on IO device: ET 200S .
The IO controller of the CPU
IM 154-8 CPU directly
controls devices on the
Industrial Ethernet and
PROFIBUS.
At this point, you can see the extended IO feature between the IO controller and IO
device(s) on the Industrial Ethernet:
The IM 154-8 CPU is operated as IO controller for the IO devices ET 200S and
ET 200S
The IM 154-8 CPU is also the IO controller for
ET 200 (DP slave) by way of IE/PB Link.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-24 Manual, 12/2006 , A5E00105475-07
The graphic shows Examples of connection paths
The CPU 319-3 PN/DP can
be operated as IO controller or
DP master
Here you can see that a CPU can be both the IO controller for an IO device and the DP
master for a DP slave:
The 319-3 PN/DP CPU is operated as IO controller for the IO devices
ET 200S and ET 200 S
The CPU 319-3 PN/DP is the DP master for a DP slave . The
DP slave is assigned locally to the CPU and is not visible on the Industrial
Ethernet.
Reference
Further Information
about PROFINET can be found in the programming manual From PROFIBUS DP to
PROFINET IO
This manual also provides a clear overview of the new PROFINET blocks and system
status lists.
See also
PROFINET (PN) (Page 3-5)
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-25
3.2.10.2 Blocks for PROFINET IO
Content of this section
This section covers:
Blocks designed for use with PROFINET
Blocks designed for use with PROFIBUS DP
Blocks designed for use with PROFINET IO and PROFIBUS DP
Compatibility of the new blocks
New blocks were implemented for PROFINET IO, as PROFINET is capable of handling
larger quantity frameworks. The new blocks are also used for PROFIBUS.
Comparison of the system and standard functions of PROFINET IO and PROFIBUS DP
For CPUs with integrated PROFINET interface, the table below provides an overview of:
System and standard functions for SIMATIC which you will have to upgrade for migration
from PROFIBUS DP to PROFINET IO.
New system and standard functions
Table 3-6 System and standard functions which are new or have to be replaced
Blocks PROFINET IO PROFIBUS DP
SFC12 (deactivation and
activation of DP slaves/IO
devices)
Yes
CPU S7-300: FW V2.4 or
higher:
Yes
SFC13 (reading diagnostics
data from a DP slave)
No
Replaced by:
Event-driven: SFB 54
Status-driven: SFB 52
Yes
SFC58/59 (write/read record in
I/O)
No
Replaced by: SFB 53/SFB 52
Yes
already replaced by SFB53/52
in DPV1
SFB 52/53 (read/write record) Yes Yes
SFB 54 (evaluate interrupt) Yes Yes
SFC102 (read predefined
parameters - S7-300 CPU only)
No
Replaced by: SFB81
Yes for S7-300
SFB81 (read predefined
parameters)
Yes Yes
SFC5 (query start address of a
module)
No (replaced with: SFC70) Yes
SFC70 (query start address of a
module)
Yes Yes
SFC49 (query the slot at a
logical address)
No
Replaced by: SFC71
Yes
SFC71 (query the slot at a
logical address)
Yes Yes
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3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-26 Manual, 12/2006 , A5E00105475-07
The table below provides an overview of SIMATIC system and standard functions which
must be emulated by other functions when migrating from PROFIBUS DP to PROFINET IO.
Table 3-7 System and standard functions in PROFIBUS DP which can be emulated in PROFINET
IO functions
Blocks PROFINET IO PROFIBUS DP
SFC55 (write dynamic
parameters)
No
Emulate using SFB53
Yes
SFC56 (write predefined
parameters)
No
Emulate using SFB81 and
SFB53
Yes
SFC57 (assign module
parameters)
No
Emulate using SFB81 and
SFB53
Yes
SIMATIC system and standard functions not supported in PROFINET IO:
SFC7 (trigger hardware interrupt on DP master)
SFC11 (synchronize groups of DP slaves)
SFC72 (read data from communication partner within local S7 station)
SFC73 (write data to communication partner within local S7 station)
SFC74 (cancel communication with partner within local S7 station)
SFC103 (determine the bus topology in a DP master system)
Comparison of the organization blocks of PROFINET IO and PROFIBUS DP
The table below shows the changes to OB83 and OB86 in PROFINET IO compared to
PROFIBUS DP.
Table 3-8 OBs in PROFINET IO and PROFIBUS DP
Blocks PROFINET IO PROFIBUS DP
OB83 (hot swapping of
modules/submodules)
Also supported on S7-300, new
error information
S7-300 does not support this
function
Slaves integrated via the GSD
file report the removal/insertion
of modules/submodules during
operation in the form of a
diagnostics interrupt and thus
via OB82.
S7 slaves report a station failure
and call OB86 when an
insertion/removal interrupt is
generated.
OB86 (rack failure) New error information Unchanged
Detailed information
For detailed information about the blocks, refer to the System Software for S7-300/400
System and Standard Functions Reference Manual.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-27
3.2.10.3 Open communication via Industrial Ethernet
Requirements
STEP 7 V5.3 + Servicepack 1 or higher
Functionality
The CPUs with integrated PROFINET interface as of firmware V2.3.0 or V2.4.0 support the
functionality of open communication by means of Industrial Ethernet (abbreviated: open IE
communication)
Following services are available for open IE communication:
Connection oriented protocols
TCP according to RFC 793, connection type B#16#01, firmware V2.3.0 and higher
TCP according to RFC 793, connection type B#16#11, firmware V2.4.0 and higher
ISO on TCP according to RFC 1006, as of firmware V2.4.0
Connectionless protocols
UDP according to RFC 768, as of firmware V2.4.0
Features of the communication protocols
The following distinctions are made between protocol types in data communication:
Connection oriented protocols:
Prior to data transmission these establish a (logical) connection to the communication
partner and close this again, if necessary, after transmission is completed. Connection
oriented protocols are used when security in especially important in data transmission. A
physical cable can generally accommodate several logical connections.
For the FBs to open communication by means of Industrial Ethernet, the following
connection oriented protocols are supported:
TCP according to RFC 793 (connection types B#16#01 and B#16#11)
ISO on TCP according to RFC 1006 (connection type B#16#12)
Connectionless protocols:
These operate without a connection. There is also no establishing or terminating a
connection to remote partner. Wireless protocols transmit data to the remote partner
without any acknowledgement; data transfer is, therefore, not secure.
The FBs for open communication over Industrial Ethernet support the following wireless
protocol:
UDP according to RFC 768 (connection type B#16#13)
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
3-28 Manual, 12/2006 , A5E00105475-07
How to use open IE communication
To allow data to be exchanged with other communication partners, STEP 7 provides the
following FBs and UDTs under "Communication Blocks" in the "Standard Library":
Connection oriented protocols: TCP, ISO-on-TCP
FB 63 "TSEND" for sending data
FB 64 "TRCV" for receiving data
FB 65 "TCON", for connecting
FB 66 "TDISCON", for disconnecting
UDT 65 "TCON_PAR" with the data structure for the configuration of the connection
Connectionless protocol: UDP
FB 67 "TUSEND" for sending data
FB 68 "TURCV" for receiving data
FB 65 "TCON" for establishing the local communication access point
FB 66 "TDISCON" for resolving the local communication access point
UDT 65 "TCON_PAR" with the data structure for configuring the local communication
access point
UDT 66 "TCON_ADR" with the data structure of the address parameters of the remote
partner
Data blocks for the configuration of the connection
Data blocks for configuring TCP and ISO-on-TCP connections.
To configure your connection, you need to create a DB that contains the data structure of
UDT 65 "TCON_PAR." This data structure contains all parameters you need to establish
the connection. You need to create such a data structure for each connection, and you
can also organize it in a global DB.
The CONNECT parameter of the FB65 "TCON" contains a reference to the address of
the corresponding connection description (for example, P#DB100.DBX0.0, byte 64).
Data blocks for the configuration the local UDP communication access point
To assign parameters for the local communication access point, create a DB containing
the data structure from the UDT 65 "TCON_PAR" This data structure contains the
required parameters you need to establish the connection between the user program and
the communication level of the operating system
The CONNECT parameter of the FB 65 "TCON" contains a reference to the address of
the corresponding connection description (e.g., P#DB100.DBX0.0 Byte 64).



Note
Setting up the connection description (UDT 65)
Declare the communication interface at the "local_device_id" parameter in UDT65
"TCON_PAR". Example, B#16#03: communication via integrated IE interface of CPU
319-3 PN/DP.
Communication
3.2 Communication services
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-29
Establishing a connection for communication
Use with TCP and ISO on TCP
Both communication partners call FB 65 "TCON" to establish the connection. In your
connection configuration, you define which communication partner activates the
connection, and which communication partner responds to the request with a passive
connection. To determine the number of possible connections, refer to your CPU's
technical specifications.
The CPU automatically monitors and holds the active connection.
If the connection is broken, for example by line interruption or by the remote
communication partner, the active partner tries to reestablish the connection. You do not
have to call FB 65 "TCON" again.
FB 66 "TDISCON" disconnects the CPU from a communication partner, as does STOP
mode. To reestablish the connection to have to call FB65 "TCON" again.
Use with UDP
Both communication partners call FB 65 "TCON" to set up their local communication
access point. This establishes a connection between the user program and operating
system's communication level No connection is established to the remote partner.
The local access point is used to send and receive UDP telegrams.
Disconnecting
Use with TCP and ISO on TCP
FB 66 "TDISCON" disconnects the communication connection between CPU and
communication partner.
Use with UDP
FB 66 "TDISCON" disconnects the local communication access point, i.e., the connection
between user program and communication level of operating system is interrupted.
Options for interrupting the communication connection
Events causing interruptions of communication:
You program the cancellation of connections at FB 66 "TDISCON."
The CPU goes from RUN to STOP.
At POWER OFF / POWER ON
Reference
For detailed information on the blocks described earlier, refer to the STEP 7 Online Help.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
3-30 Manual, 12/2006 , A5E00105475-07
3.2.10.4 SNMP Communication Service
Availability
The SNMP communication service is available for CPUs with integrated PROFINET
interface and Firmware 2.3.0 or higher.
Properties
SNMP (Simple Network Management Protocol) is a standard protocol for TCP/IP networks.
Reference
For further information on the SNMP communication service and diagnostics with SNMP,
refer to the PROFINET Operating Instructions and to the S7-300 CPU 31xC and CPU 31x,
Hardware Installation Manual.
3.3 Web Server
Introduction
The web server allows you to monitor your CPU on the Internet or on the Intranet of your
company. This functionality supports remote analysis and diagnostics.
Messages and status information are visualized on HTML pages.
Web browser
You need a web browser to access the HTML pages of the CPU.
Web browsers which are suitable for communication with the CPU:
Internet Explorer (version 6.0 and higher)
Mozilla Firefox (V1.5 and higher)
Opera (version 9.0 and higher)
Netscape Navigator (version 8.1 and higher)
Reading information via the web server
The web server can be used to read the following information from the CPU:
Start page with general CPU information
Identification information
Content of the diagnostic buffer
Messages (without acknowledgment option)
Information on PROFINET
Variable status
Variable tables
The next pages describe the HTML pages and corresponding declarations in detail.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-31
Display languages
You can select two out of five languages for the visualization of messages and diagnostics
information. See also the chapter "Language settings".
German
English
French
Spanish
Italian
Web access to the CPU by way of PG/PC
Proceed as follows to access the web server:
1. Connect the client (PG/PC) to the CPU via the PROFINET interface.
2. Open the web browser (for example, Internet Explorer).
Enter the IP address of the CPU in the "Address" field of the web browser in the format
http://a.b.c.d (example: http://192.168.3.141).
The start page of the CPU opens. From the start page you can navigate to further
information.
Web access to the CPU by way of HMI devices and PDA
The web server supports the Windows Terminal Service. In addition to operations with PGs
and PCs, this functionality also supports the integration of thin client solutions for mobile
devices (PDA, MOBIC T8, for example) and of rugged local stations (SIMATIC MP370 with
ThinClient/MP option, for example) on a Windows CE platform.
Proceed as follows to access the web server:
1. Interconnect the client (HMI, PDA) with the CPU via PROFINET interface.
2. Open the web browser (for example, Internet Explorer).
Enter the IP address of the CPU in the "Address" field of the web browser in the format
http://a.b.c.d/basic (example: http://192.168.3.141/basic).
The start page of the CPU opens. From the start page you can navigate to further
information.
HMIs operating with Windows CE operating system V 5.x or earlier process CPU information
in a browser specially developed for Windows CE. This browser visualizes information in a
less complex form. However, this simple form is not covered in detail in the pictures shown
below.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
3-32 Manual, 12/2006 , A5E00105475-07
Activating the Web Server
The web server deactivated in the basic configuration in HW Config. Activate the web server
by selecting "CPU -> Object Properties -> Web" in HW Config. See also the chapter
"Language settings".

Note
You can also use the web server without SIMATIC Micro Memory Card. The CPU must have
been assigned an IP address for server operation. The web server visualizes the message
buffer contents in hexadecimal code. The start page, the identification and PROFINET
information as well as the status of variables are output in plain text.

Security
The web server by itself does not provide any security. Protect your web-compliant CPUs
against unauthorized access by means of a firewall.
Refresh status and printing of screen contents
The web server outputs static information to its screen. Update the screen contents as usual
with Internet pages.
Data output to the printer, however, always return the actual CPU information. The
information output to the printer may therefore be more up to date than the screen contents.
Filter settings do not influence the print data. The program always outputs the entire content
of the message buffer to the printer.
3.3.1 Language settings
Introduction
The web server returns information in the following languages:
German (Germany)
English (United States)
French (France)
Italian (Italy)
Spanish (traditional)
Requirements for multilingual output of text
Language settings to be made in STEP 7 in order to ensure proper output of data in the
selected language:
Set the regional language for the display devices in SIMATIC Manager
Set the regional web language in the properties dialog of the CPU
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-33
Set the regional language for the display devices in SIMATIC Manager
Select the regional language for the display devices in SIMATIC Manager:
Options > Language for display devices

Figure 3-2 Example of the selection of a language for display devices
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
3-34 Manual, 12/2006 , A5E00105475-07
Set the regional web language
Select up to two web languages from the languages installed for the display devices.
Open the CPU properties dialog box:
Activate the "Activate web server on this module" check box
Select up to two web languages.

Figure 3-3 Example of the web server language selection



Note
The program displays messages and diagnostics information in hexadecimal code if you
activate a web server without selecting a language.

Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-35
3.3.2 Web pages
3.3.2.1 Start page with general CPU information
Going online to the web server
You log on to the web server by entering the IP address of the configured CPU in the
address bar of the web browser (example: http: //192.168.1.158). The connection opens with
the "Intro" page.
Introduction
The screenshot below shows the first page (Intro) called by the web server.

Figure 3-4 Intro
Click the ENTER link to go to the web server pages.

Note
Skipping the Intro web page
Set the "Skip Intro" check box in order to skip the Intro. The web server will now directly
open its start page. You can undo the "Skip intro" setting by clicking the "Intro" link on the
start page.

Communication
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CPU 31xC and CPU 31x, Technical Specifications
3-36 Manual, 12/2006 , A5E00105475-07
Start page
The start page returns information as shown in the picture below.
2
1

Figure 3-5 General Information
The CPU image with LEDs returns the actual CPU status at the time of data request.
"General"
This group returns information about the CPU running the web server to which you are
currently logged on.
"Status"
This info field returns CPU status information which is valid when requested.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-37
3.3.2.2 Identification
Technical data
The identification web page returns technical data of the CPU.
1
2
3

Figure 3-6 Identification
"Identification"
The "Identification" info field contains the plant and location ID, and the serial number.
"Order number"
The "Order number" info field returns the order numbers of hardware and software.
"Version"
This field returns the hardware, firmware and bootloader versions.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
3-38 Manual, 12/2006 , A5E00105475-07
3.3.2.3 Diagnostics buffer
Diagnostics buffer
The browser returns the content of the diagnostics buffer on the diagnostics buffer web
page.
1
2
3

Figure 3-7 Diagnostics buffer
Requirements
The web server is activated, languages are set, and the project is compiled and downloaded
in STEP 7.
"Diagnostics buffer entries 1 to 100"
The diagnostics buffer can save up to 500 messages. Select an buffer input interval from the
list box. Each interval comprises 100 entries.
The program only displays the last 10 buffer entries in RUN for reasons of performance.
"Events"
The "Events" info fields returns the diagnostics event and the corresponding date and time
stamp.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-39
"Details"
This field outputs detailed information about a selected event.
Select the corresponding event from the "Events" info field.
Configuration
Configuration procedure:
1. Select the "Object properties" dialog box from the shortcut menu of the corresponding
CPU.
2. Select the "Web" tab, and then activate the "Activate web server on this module" check
box.
3. Select up to two languages you want to use to display plain text messages.
4. Save and compile the project and download the configuration data to the CPU.
Special features when changing languages
You can change the language, for example, from German to English, by clicking the object in
the upper right corner. If you select a language you have not configured the program returns
a hexadecimal code instead of plain text information.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
3-40 Manual, 12/2006 , A5E00105475-07
3.3.2.4 Alarms
Alarms
The browser returns the content of the message buffer on the Alarms web page.
The alarms cannot be acknowledged on the web server.
1
3
2
lnfo: cooler temperature is at 80C
Raw material tank 3 low limit reached
The cooler temperature has reached 80C
Cooling water tank level HH reached
Sensor KK 143 faulty

Figure 3-8 Alarms
Requirements
The message texts were configured in the user-specific languages. For information about the
configuration of message texts, refer to STEP 7 and to the Internet address
http://support.automation.siemens.com/WW/view/en/23872245
"Filter"
This functionality allows you to select specific information from this page.
Use the list box to view only the entries of the selected parameter. Enter the value of the
selected parameter in the input box and then click "Filter".
To view all alarms with "incoming" status, for example:
1. Select the "Status" parameter from the list box.
2. Enter the "incoming" text in the input box.
3. Click "Filter".
The filter criteria are also retained when you update a page.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-41
"Alarms"
Alarms of the CPU are displayed in the info field in chronological order, including the date
and time.
The message text parameter is an entry which contains the message texts configured for the
corresponding fault definitions.
Sorting
You can also view the parameters in ascending or descending order. Click in the column
header of one of the parameters.
Message number
Date
Time
Message Text
State
Acknowledgment
The messages are returned in chronological order when you click the "Date" entry. Incoming
and outgoing events are output at the Status parameter.
"Message number details"
You can view detailed message information in this info field. Select the corresponding
message from the info field .
Special features when changing languages
You can change the language, for example, from German to English, by clicking the object in
the upper right corner. If you select a language or corresponding message texts you have
not configured the program returns a hexadecimal code instead of plain text information.
Communication
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CPU 31xC and CPU 31x, Technical Specifications
3-42 Manual, 12/2006 , A5E00105475-07
3.3.2.5 PROFINET
PROFINET
The"Parameters" tab of this web page contain a summary of information about the
integrated PROFINET interface of the CPU.
2
3
4
1

Figure 3-9 Parameters of the integrated PROFINET interface
"Network connection"
This page returns information for the identification of the integrated PROFINET interface of
the corresponding CPU.
"IP parameters"
Information about the configured IP address and number of the subnet in which the
corresponding CPU is networked.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-43
"Physical properties"
Information available in the "Physical properties" info field:
Port number
Link status
Settings
Mode



Note
Updating data
The data you see in the browser are not updated automatically. You can view the actual
data by updating the view in the HTML browser at regular intervals (Update button).

Information about the quality of data transfers is available in the "Statistics" tab.
2
3
4
1

Figure 3-10 Data transfer identifiers
"Data packets since"
Returns the time at which the first data packet was sent or received.
"Sent data packets"
You can evaluate the quality of data transmission on the send line based on the identifiers
returned in this info field.
Communication
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CPU 31xC and CPU 31x, Technical Specifications
3-44 Manual, 12/2006 , A5E00105475-07
"Data packets received"
You can evaluate the quality of data transmission on the receiving line based on the
identifiers returned in this info field.
3.3.2.6 Variable status
Variable status
The browser outputs the variable status on the web page of the same name. You can
monitor the status of up to 50 variables.
1 2 3

Figure 3-11 Variable status
"Address"
Enter the address of the operand of which you want to monitor the response in the "Address"
text box. Invalid addresses entered are displayed in red font.
"Display format"
Select the display format of a variable using the drop-down list. The program indicates the
variable in hex code if it does not support the selected display format.
"Value"
Outputs the value of the corresponding operand in the selected format.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-45
Special features when changing languages
You can change the language, for example, from German to English, by clicking the object in
the upper right corner. The German mnemonics differ compared to other languages. The
syntax of operands you enter may be invalid for this reason when you change languages.
For example, ABxy instead of QBxy. The browser outputs a faulty syntax in red font.
3.3.2.7 Variable tables
Variable tables
The browser returns the content of the variable tables on the web page of the same name.
You can monitor up to 200 variables in each variable table.
1
2 3 4 5

Figure 3-12 Variable tables
Selection
Select one of the configured variable tables from this drop-down list box.
"Name" and "Address"
This info field returns the operand's name and address.
"Format"
Select the display format of the corresponding operand using the drop-down list boxes. The
drop-down list box outputs a selection of all valid display formats.
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CPU 31xC and CPU 31x, Technical Specifications
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"Value"
This column shows the values in the corresponding display format.
"Comment"
The program outputs the comment you configured in order to highlight the meaning of an
operand.
Configuring variable tables for the web server
The web server lets you monitor up to 50 variable tables with maximum 200 variables. As
CPU memory is shared by messages and variables, the actually available number of
variable tables may be reduced.
Example: There is sufficient memory space for 400 configured messages and 50 variable
tables with 100 variables (including the symbol names, however, without symbol comment).
The web browser only outputs partial variable tables if memory capacity is exceeded due to
the number of configured messages and variables. You counteract this negative effect by
reducing memory requirements for your messages and system comments. You should also
use only one language to display information.
You should also minimize the number of variables in the variable tables as the web server is
more likely to return the full tables, and in order to accelerate updates.
Communication
3.3 Web Server
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-47
Creating a variable table for the web server
1. Generate a variable table in STEP 7.
2. Open the properties dialog box of the variable table, and then enter the "VATtoWEB"
identifier into the "family" field.


3. Save and compile the project and download the configuration data to the CPU.
Communication
3.4 S7 connections
CPU 31xC and CPU 31x, Technical Specifications
3-48 Manual, 12/2006 , A5E00105475-07
3.4 S7 connections
3.4.1 S7 connection as communication path
An S7 connection is established when S7 modules communicate with one another. This S7
connection is the communication path.

Note
S7 connections are not required for global data communication, point-to-point connection,
communication by way of PROFIBUS DP, PROFINET CBA, PROFINET IO, TCP/IP, ISO on
TCP, UDP, SNMP and web server.

Every communication link requires S7 connection resources on the CPU for the entire
duration of this connection.
Each S7 CPU provides a specific number of S7 connection resources which are used by
various communication services such as PG/OP communication, S7 communication or S7
basic communication.
Connection points
An S7 connection between modules with communication capability is established between
connection points. The S7 connection always has two connection points: The active and
passive connection points:
The active connection point is assigned to the module that establishes the S7 connection.
The passive connection point is assigned to the module that accepts the S7 connection.
Any module that is capable of communication can thus act as an S7 connection point. The
active communication always occupies one S7 connection at the the connection point on the
relevant module.
Transition point
If you use the routing functionality, the S7 connection between two modules capable of
communication is established across a number of subnets. These subnets are
interconnected via a network transition. The module that implements this network transition
is known as a router. The router is thus the point through which an S7 connection passes.
Any CPU with a DP or PN interface can be the router for an S7 connection. You can
establish a certain maximum number of routing connections. This does not limit the quantity
framework of S7 connections.
See also
Connection resources for routing (Page 3-52)
Communication
3.4 S7 connections
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-49
3.4.2 Assignment of S7 connections
There are several ways to allocate S7 connections on a communication-capable module:
Reservation during configuration
Assigning connections in the program
Allocating connections during commissioning, testing and diagnostics routines
Allocating connection resources to HMI services
Reservation during configuration
One connection resource each is automatically reserved on the CPU for PG and OP
communication. Whenever you need more connection resources (for example, when
connecting several OPs), configure this increase in the CPU properties dialog box in
STEP 7.
Connections must also be configured (using NetPro) for the use of S7 communication. For
this purpose, connection resources have to be available, which are not allocated to PG/OP
or other connections. The required S7 connections are then permanently allocated for S7
communication when the configuration is uploaded to the CPU.
Assigning connections in the program
In S7 basic communication, and in open Industrial Ethernet communication with TCP/IP, the
user program establishes the connection. The CPU operating system initiates the
connection. S7 basic communication uses the corresponding S7 connections. The open IE
communication does not use any S7 connections. The maximum number of eight
connections also applies to this type of communication.
Using connections for commissioning, testing and diagnostics
An active online function on the engineering station (PG/PC with STEP 7) occupies S7
connections for PG communication:
An S7 connection resource for PG communication which was reserved in your CPU
hardware configuration is assigned to the engineering station, that is, it only needs to be
allocated.
If all reserved S7 connection resources for PG communication are allocated, the
operating system automatically assigns a free S7 connection resource which has not yet
been reserved. If no more connection resources are available, the engineering station
cannot go online to the CPU.
Allocating connection resources to HMI services
An online function on the HMI station (OP/TP/... with WinCC) is used for assigning S7
connection resources for the OP communication:
An S7 connection resource for OP communication you have reserved in your CPU
hardware configuration is therefore assigned to the OCM station engineering station, that
is, it only needs to be allocated.
If all reserved S7 connection resources for OP communication are allocated, the
operating system automatically assigns a free S7 connection resource which has not yet
been reserved. If no more connection resources are available, the OCM station cannot go
online to the CPU.
Communication
3.4 S7 connections
CPU 31xC and CPU 31x, Technical Specifications
3-50 Manual, 12/2006 , A5E00105475-07
Time sequence for allocation of S7 connection resources
When you program your project in STEP 7, the system generates parameter assignment
blocks which are read by the modules in the startup phase. This allows the module's
operating system to reserve or allocate the relevant S7 connection resources. That is, for
instance, OPs cannot access a reserved S7 connection resource for PG communication.
The CPU's S7 connection resources which were not reserved can be used freely. These S7
connection resources are allocated in the order they are requested.
Example
If there is only one free S7 connection left on the CPU, you can still connect a PG to the bus.
The PG can then communicate with the CPU. The S7 connection is only used, however,
when the PG is communicating with the CPU. If you connect an OP to the bus while the PG
is not communicating, the OP can establish a connection to the CPU. Since an OP maintains
its communication link at all times, in contrast to the PG, you cannot subsequently establish
another connection via the PG.
See also
Open communication via Industrial Ethernet (Page 3-27)
3.4.3 Distribution and availability of S7 connection resources
Distribution of connection resources
Table 3-9 Distribution of connections
Communication service Distribution
PG communication
OP communication
S7 basic communication
In order to avoid allocation of connection resources being dependent only on
the chronological sequence in which various communication services are
requested, connection resources can be reserved for these services.
For PG and OP communication respectively, at least one connection
resource is reserved by default.
In the table below, and in the technical data of the CPUs, you can find the
configurable S7 connection resources and the default configuration for each
CPU. You "redistribute connection resources by setting the relevant CPU
parameters in STEP 7.
S7 communication
Other communication resources (e.g. via
CP 343-1, with a data length of
> 240 bytes)
Available connection resources that are not specially reserved for a service
(PG/OP communication ,
S7 basis communication) are used for this.
Routing PG functions
(only for CPUs with DP/PN interface)
The CPUs provide a certain number of connection resources for routing.
These connections are available in addition to the connection resources.
The subsection below shows the number of connection resources.
Global data communication
Point-to-point connection
This communication service requires no S7 connection resources.
PROFIBUS DP This communication service requires no S7 connection resources.
Communication
3.4 S7 connections
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-51
Communication service Distribution
PROFINET CBA This communication service requires no S7 connection resources.
PROFINET IO This communication service requires no S7 connection resources.
Web server This communication service rewires no S7 connection resources.
Open communication by means of TCP/IP
Open communication by means of ISO on
TCP
Open communication by means of UDP
This communication service requires no S7 connection resources.
Independently of the S7 connections, a total of 8 own resources are available
for connections or local access points (UDP) for TCP/IP, ISO on TCP, UDP.
SNMP This communication service requires no S7 connection resources.
Availability of connection resources
Table 3-10 Availability of connection resources
Reserved for CPU Total number
connection
resources
PG
communication
OP communication S7 basic
communication
Free
S7 connections
312C 6 1 to 5, default 1 1 to 5, default 1 0 to 2, default 0
313C
313C-2 PtP
313C-2 DP
8 1 to 7, default 1 1 to 7, default 1 0 to 4, default 0
314C-2 PtP
314C-2 DP
12 1 to 11, default
1
1 to 11, default 1 0 to 8, default 0
312 6 1 to 5, default 1 1 to 5, default 1 0 to 2, default 0
314 12 1 to 11, default
1
1 to 11, default 1 0 to 8, default 0
315-2 DP
315-2 PN/DP
16 1 to 15, default
1
1 to 15, default 1 0 to 12, default 0
317-2 DP
317-2 PN/DP
32 1 to 31, default
1
1 to 31, default 1 0 to 30, default 0
319-3 PN/DP 32 1 to 31, default
1
1 to 31, default 1 0 to 30, default 0
Displays all non-
reserved S7
connection resources
as free connection
resources.


Note
When using a CPU 315-2 PN/DP, you can configure up to 14 connection resources for S7
communication in NetPro: These connections are then reserved. For CPU 317-2 PN/DP and
CPU 319-3 PN/DP, you can configure a maximum of 16 connection resources for S7
communication in NetPro.


Communication
3.4 S7 connections
CPU 31xC and CPU 31x, Technical Specifications
3-52 Manual, 12/2006 , A5E00105475-07
3.4.4 Connection resources for routing
Number of connection resources for routing
The CPUs with DP interface provide a different number of connection resources for the
routing function:
Table 3-11 Number of routing connection resources (for DP/PN CPUs)
CPU As of firmware version Number of connections for routing
31xC, CPU 31x 2.0.0 Max. 4
317-2 DP 2.1.0 Max. 8
31x-2 PN/DP 2.2.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24
DP slave (active): Max. 14

Interface X2 configured as:
PROFINET: Max. 24
319-3 PN/DP 2.4.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24
DP slave (active): Max. 14

Interface X2 configured as:
DP master Max. 24
DP slave (active): Max. 14

Interface X3 configured as:
PROFINET: Max. 48
Example of a CPU 314C-2 DP
The CPU 314C-2 DP provides 12 connection resources (refer to Table 4-11):
Reserve two connection resources for PG communication.
Reserve three connection resources for OP communication.
Reserve one connection resource for S7-based communication.
This leaves six connection resources available for other communication service, e.g. S7
communication, OP communication, etc.
In addition 4 routing connections via the CPU are possible.
Communication
3.5 DPV1
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-53
Example for a CPU 317-2 PN/DP / CPU 319-3 PN/DP
The CPU 317-2 PN/DP and CPU 319-3 PN/DP provide you with 32 connection resources
(refer to Table 3-11):
Reserve four connection resources for PG communication.
Reserve six connection resources for OP communication.
Reserve two connection resources for S7-based communication.
In NetPro you configure eight S7 connection resources for S7 communication via the
integrated PROFINET interface
This leaves 12 S7 connections available for arbitrary communication services, e.g., S7
communication, OP communication, etc.
However, only a maximum of 16 connection ressources for S7 communication at the
integrated PN interface can be configured in NetPro.
In addition, there are another 24 routing connections available for the CPU 317-2 PN/DP,
and another 48 routing connections for the CPU 319-3 PN/DP, which do not affect the
aforementioned S7 connections.
However, take the interface-specific maximum numbers into account (refer to Table 3-12).
3.5 DPV1
New automation and process engineering tasks require the range of functions performed by
the existing DP protocol to be extended. In addition to cyclical communication functions,
acyclical access to non-S7 field devices is another important requirement of our customers,
and was implemented in the standard EN 50170. In the past, acyclical access was only
possible with S7 slaves. The distributed I/O standard EN 50170 has been further developed.
All the changes concerning new DPV1 functions are included in IEC 61158/ EN 50170,
volume 2, PROFIBUS.
Definition DPV1
The term DPV1 is defined as a functional extension of the acyclical services (to include new
interrupts, for example) provided by the DP protocol.
Availability
All CPUs with DP interface(s) and serving as DP masters feature the enhanced DPV1
functionality.

Note
If you want to use the CPU as an intelligent slave, remember that it does not have DPV1
functionality.

Communication
3.5 DPV1
CPU 31xC and CPU 31x, Technical Specifications
3-54 Manual, 12/2006 , A5E00105475-07
Requirement for using the DPV1 functionality with DP slaves
For DPV1 slaves from other vendors, you will need a GSD file conforming to EN 50170,
revision 3 or later.
Extended functions of DPV1
Use of any DPV1 slaves from external vendors (in addition to the existing DPV0 and S7
slaves, of course).
Selective handling of DPV1-specific interrupt events by new interrupt blocks.
Reading/writing SFBs that conform to standards to the data record (although this can only
be used for centralized modules).
User-friendly SFB for reading diagnostics.
Interrupt blocks with DPV1 functionality
Table 3-12 Interrupt blocks with DPV1 functionality
OB Functionality
OB 40 Process interrupt
OB 55 Status interrupt
OB 56 Update interrupt
OB 57 Vendor-specific interrupt
OB 82 Diagnostic interrupt


Note
You can now also use organizational blocks OB40 and OB82 for DPV1 interrupts.

Communication
3.5 DPV1
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 3-55
System blocks with DPV1 functionality
Table 3-13 System function blocks with DPV1 functionality
SFB Functionality
SFB 52 Read data record from DP slave/IO device or centralized module
SFB 53 Write data record to DP slave/IO device or centralized module
SFB 54 Read additional alarm information from a DP slave/IO device or a centralized
module in the relevant OB
SFB 75 Send alarm to the DP master


Note
You can also use SFB 52 to SFB 54 for centralized I/O modules. SFB 52 to SFB 54 can also
be used for PROFINET IO.

Reference
For further information on the blocks mentioned earlier, refer to the reference manual
System Software for S7-300/400: System and Standard Software, or directly to the STEP
7Online Help.
See also
PROFIBUS DP (Page 3-3)
Communication
3.5 DPV1
CPU 31xC and CPU 31x, Technical Specifications
3-56 Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-1
Memory concept
4
4.1 Memory areas and retentivity
4.1.1 CPU memory areas
The three memory areas of your CPU:
CPU
Load memory
(located on SlMATlC Micro
Memory Card)
System memory
Work memory
C
a
r
d
M
e
m
o
r
y
M
i
c
r
o
S
l
M
A
T
l
C
S
l
E
M
E
N
S


Load memory
The load memory is located on the SIMATIC Micro Memory Card. The size of the load
memory corresponds exactly to the size of the SIMATIC Micro Memory Card. It is used to
store code blocks, data blocks and system data (configuration, connections, module
parameters, etc.). Blocks that are not identified as process-relevant. You can also store all
the configuration data for your project on the SIMATIC Micro Memory Card.

Note
You must have inserted a SIMATIC Micro Memory Card into the CPU to enable the
download of user programs and operation of the CPU.

Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
4-2 Manual, 12/2006 , A5E00105475-07
System memory
The RAM system memory is integrated in the CPU and cannot be expanded.
It contains
the address areas for address area memory bits, timers and counters
the process image of the I/Os
local data
Work memory
The work memory is integrated in the CPU and cannot be extended. It is used to run the
code and process user program data. Programs only run in the work memory and system
memory.
4.1.2 Retentivity of load memory, system memory and RAM
Your CPU is equipped with a service-free retentive memory, i.e., its operation does not
require a buffer battery. Data is kept in retentive memory across POWER OFF and
restart (warm start).
Retentive data in load memory
Your program in load memory is always retentive: It is stored on the SIMATIC Micro Memory
Card, where it is protected against power failure or CPU memory restart
Retentive data in system memory
In your configuration (Properties of CPU, Retentivity tab), specify which part of memory bits,
timers and counters should be kept retentive and which of them are to be initialized with "0"
on restart (warm restart).
The diagnostics buffer, MPI address (and transmission rate) and operating hour counter data
are generally written to the retentive memory area on the CPU. Retentivity of the MPI
address and baud rate ensures that your CPU can continue to communicate, even after a
power loss, memory reset or loss of communication parameters (e.g. due to removal of the
SIMATIC Micro Memory Card or deletion of communication parameters).
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-3
Retentive data in work memory
Therefore, the contents of retentive DBs are always retentive at restart and POWER
ON/OFF. Retentive data blocks can be uploaded to the work memory in accordance with the
maximum limit allowed by the work memory.
In the case of CPU versions V2.0.12 and higher, non-retentive DBs are also supported. Non-
retentive DBs are initialized from the load memory with their initial values whenever a restart
is performed or when the power is switched off and then on again. Non-retentive data blocks
and code blocks can be loaded in accordance with the maximum work memory limit.
Table 4-1 Retentivity of the work memory
CPUs Length of the non-volatile work memory for retentive data blocks
CPU 312 32 KB
CPU 313, 314 64 KB
CPU 315 128 KB
CPU 317 256 KB
CPU 319 700 KB
See also
Properties of the SIMATIC Micro Memory Card (Page 4-9)
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
4-4 Manual, 12/2006 , A5E00105475-07
4.1.3 Retentivity of memory objects
Retentive behavior of memory objects
The table below shows the retentive behavior of memory objects during specific operating
state transitions.
Table 4-2 Retentivity behavior of memory objects (applies to all CPUs with DP/MPI-SS)
Memory object Operating state transition
POWER ON /
POWER OFF
STOP RUN CPU memory
reset
User program/data (load memory) X X X
Retentive behavior of DBs for CPUs with
firmware < V2.0.12

X

X


Retentive behavior of DBs for CPUs with
firmware >= V2.0.12
Can be set in the properties of the
DBs in STEP 7 V5.2 + SP1 or
higher.

Flag bits, timers and counters configured as
retentive data
X X
Diagnostics buffers, operating hour counters X
1
X X
MPI address, transmission rate
(or also DP address, transmission rate of the
MPI/DP interface of CPU 315-2 PN/DP and
CPU 317 and CPU 319, if these are configured
as DP nodes).
X X X
x = retentive; = not retentive
1
Only the last 100 entries are retained in the diagnostics buffer after POWER OFF / POWER
ON.
Retentive behavior of a DB for CPUs with firmware < V2.0.12
For these CPUs, the contents of the DBs are always retentive at POWER ON/OFF or STOP-
RUN.
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-5
Retentive behavior of a DB for CPUs with firmware >= V2.0.12
These CPUs support the generation of data blocks with "NON-Retain" (not retentive)
property.
Data blocks assigned the "NON-Retain" property are initialized with their start values when
power is cycled off and on and and when the CPU goes from STOP to RUN.
You have two options of assigning the "NON-Retain" property to a DB:
STEP 7, V5.2 + SP1 or higher: Activate the NON-Retain function in the DB properties
SFC 82 " Crea_DBL" (generation of a DB in load memory): Set bit 2 = "1" at the ATTRIB
parameter
Table 4-3 Retentive behavior of DBs for CPUs with firmware >= V2.0.12
At POWER ON/OFF or restart (warm start) of the CPU, the DB should
receive the initial values
(non-retentive DB)
retain the actual values (retentive DB)
Reason:
At POWER ON/OFF and restart (STOP-RUN) of
the CPU, the actual values of the DB are non-
retentive. The DB receives the start values from
load memory.
Reason:
At POWER OFF/ON and restart (STOP-RUN) of
the CPU, the actual values of the DB are retained.
Requirement in STEP 7:
The "Non-Retain" check box is activated in
the DB properties.
or
a non-retentive DB was generated using
SFC 82 "CREA_DBL" and the
corresponding block attribute (ATTRIB ->
NON_RETAIN bit).
Requirement in STEP 7:
The "Non-Retain" check box is deactivated in
the DB properties.
or
a retentive DB was generated using SFC 82
"CREA_DBL".
Retentivity of the work memory

CPUs Length of the non-volatile work memory for retentive data blocks
CPU 312 32 KB
CPU 313, 314 64 KB
315 128 KB
317 256 KB
319 700 KB
The remainder of work memory is available for code blocks or for non-retentive DBs.
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
4-6 Manual, 12/2006 , A5E00105475-07
4.1.4 Address areas of system memory
The system memory of the S7 CPUs is organized in address areas (refer to the table below).
In a corresponding operation of your user program, you address data directly in the relevant
address area.
Address areas of system memory
Table 4-4 Address areas of system memory
Address areas Description
Process image of inputs At every start of an OB1 cycle, the CPU reads the values at the
input of the input modules and saves them the process image of
inputs.
Process image of outputs During its cycle, the program calculates the values for the outputs
and writes these to the process image of outputs. At the end of
the OB1 cycle, the CPU writes the calculated output values to the
output modules.
Bit memory This area provides memory for saving the intermediate results of
a program calculation.
Timers Timers are available in this area.
Counters Counters are available in this area.
Local data Temporary data in a code block (OB, FB, FC) is saved to this
memory area while the block is being edited.
Data blocks See Recipes and measurement value logs
Reference
The address areas of your CPU are listed in the Instruction list for CPUs 31xC and 31x.
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-7
I/O process image
When the user program addresses the input (I) and output (O) address areas, it does not
query the signal states of digital signal modules. Instead, it rather accesses a memory area
in CPU system memory. This particular memory area is the process image.
The process image is organized in two sections: The process image of inputs, and the
process image of outputs.
Advantages of the process image
Process image access, compared to direct I/O access, offers the advantage that a consistent
image of process signals is made available to the CPU during cyclic program execution.
When the signal status at an input module changes during program execution, the signal
status in the process image is maintained until the image is updated in the next cycle.
Moreover, since the process image is stored in CPU system memory, access is significantly
faster than direct access to the signal modules.
Process image update
The operating system updates the process image periodically. The figure below shows the
sequence of this operation within a cycle.
Startup program
User program
Startup
C
y
c
l
e

t
i
m
e
Write the process image of outputs
to the modules.
Read inputs from the modules and
update data in the process image of
inputs.
User program execution
(OB1 and all blocks called therein).
ZKP (BeSy)
PAE
PAA


Configurable process image of the CPUs
STEP 7 lets you define a user-specific size of the I/O process image between 0 to 2048 for
the following CPUs:

CPU Firmware
CPU 315-2 PN/DP V2.5 or higher
CPU 317-2 DP V2.5 or higher
CPU 317-2 PN/DP V2.3 or higher
CPU 319-3 PN/DP V2.4 or higher
Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
4-8 Manual, 12/2006 , A5E00105475-07
Note the information below:

Note
Currently, the dynamic setting of the process image only affects its update at the scan cycle
control point. That is, the process image of inputs is only updated up to the set PII size with
the corresponding values of the peripheral input modules existing within this address area, or
the values of the process image of outputs up to the set PIO size are written to the peripheral
output modules existing within this address area.
This set size of the process image is ignored with respect to STEP 7 commands used to
access the process image (for example U I100.0, L EW200, = Q20.0, T AD150, or
corresponding indirect addressing commands also). However, up to the maximum size of the
process image (that is, up to I/O byte 2047), these commands do not return any
synchronous access errors, but rather access the permanently available internal memory
area of the process image.
The same applies to the use of actual parameters of block calls from the I/O area (area of
the process image).
Particularly if these process image limits were changed, you should check to which extent
your user program accesses the process image in the area between the set and the
maximum process image size. If access to this area continues the user program may not
detect changes at the inputs of the I/O module, or actually fails to write output data to the
output module and does not generate an error message.
You should also note that certain CPs may only be addressed outside of the process image.

Local data
Local data store:
the temporary variables of code blocks
the start information of the OBs
transfer parameters
intermediate results
Temporary Variables
When you create blocks, you can declare temporary variables (TEMP) which are only
available during block execution and then overwritten again. These local data have fixed
length in each OB. Local data must be initialized prior to the first read access. Each OB also
requires 20 bytes of local data for its start information. Local data access is faster compared
to access to data in DBs.
The CPU is equipped with memory for storing temporary variables (local data) of currently
executed blocks. The size of this memory area depends on the CPU. It is distributed in
partitions of equal size to the priority classes. Each priority class has its own local data area.

Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-9

Caution
All temporary variables (TEMP) of an OB and its nested blocks are stored in local data.
When using complex nesting levels for block processing, you may cause an overflow in the
local data area.
The CPUs will change to STOP mode if you exceed the permissible length of local data for a
priority class.
Make allowances for local data space required for synchronous error OBs. This is assigned
to the respective triggering priority class.

See also
Retentivity of load memory, system memory and RAM (Page 4-2)
4.1.5 Properties of the SIMATIC Micro Memory Card
The SIMATIC Micro Memory Card as memory module for the CPU
The memory module used on your CPU is a SIMATIC Micro Memory Card. You can use
MMCs as load memory or as portable data volume.

Note
The CPU requires the SIMATIC Micro Memory Card for operation.

What is stored on the SIMATIC Micro Memory Card
The following data can be stored on the SIMATIC Micro Memory Card:
User program, i.e., all blocks (OBs, FCs, FCs, DBs) and system data
Archives and recipes
Configuration data (STEP 7 projects)
Data for operating system update and backup



Note
You can either store user and configuration data or the operating system on the SIMATIC
Micro Memory Card.

Memory concept
4.1 Memory areas and retentivity
CPU 31xC and CPU 31x, Technical Specifications
4-10 Manual, 12/2006 , A5E00105475-07
Properties of a SIMATIC Micro Memory Card
The SIMATIC Micro Memory Card ensures maintenance-free and retentive operation of
these CPUs.


Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it is
being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card on your PG, or format the card in the CPU. Never remove a SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU is
in STOP state, and when the PG is not writing to the card. When the CPU is in STOP mode
and you cannot not determine whether or not a PG is writing to the card (e.g., load/delete
block), disconnect the communication lines.

SIMATIC Micro Memory Card copy protection
Your SIMATIC Micro Memory Card has an internal serial number that implements an MMC
copy protection. You can read this serial number from the SSL partial list 011CH index 8
using SFC 51 "RDSYSST." If the reference and actual serial number of your SIMATIC Micro
Memory Card are not the same, program a STOP command in a know-how-protected
module, for example.
Useful life of a SIMATIC Micro Memory Card
The life of an SIMATIC Micro Memory Card depends mainly on the following factors:
1. The number of delete or programming operations,
2. External influences such as ambient temperature.
At ambient temperatures up to 60 C, a maximum of 100,000 delete/write operations can be
performed on a SIMATIC Micro Memory Card.


Caution
To prevent data losses, do not exceed this maximum of delete/write operations.

Reference
Additional information:
on the SSL parts list, refer to the CPU 31xC and CPU 31x Instruction List, or to the
S7-300/400 System Software, System and Standard Functions Reference Manual.
on resetting the CPU, refer to the Operating Instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-11
See also
Operating and display elements: CPU 31xC (Page 2-1)
Operating and display elements: CPU 312, 314, 315-2 DP: (Page 2-5)
Operating and display elements: CPU 317-2 DP (Page 2-7)
Operating and display elements: CPU 31x-2 PN/DP (Page 2-9)
Operating and display elements: CPU 319-3 PN/DP (Page 2-11)
4.2 Memory functions
4.2.1 General: Memory functions
Memory functions
Memory functions are used to generate, modify or delete entire user programs or specific
blocks. You can also ensure that your project data are retained by archiving these. If you
created a new user program, use a PG/PC to download the complete program to the
SIMATIC Micro Memory Card.
Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
4-12 Manual, 12/2006 , A5E00105475-07
4.2.2 Load user program from SIMATIC Micro Memory Card to the CPU
User program download
The entire user program data are downloaded from your PG/PC to the CPU by means of the
SIMATIC Micro Memory Card. The previous content of the Micro Memory Card is deleted in
the process. Blocks use the load memory area as specified under "Load memory
requirements" in "General block properties".
The figure shows the load and work memory of the CPU
C
a
r
d

M
e
m
o
r
y

M
i
c
r
o

Process-relevant
parts of logic and
data blocks 1
plus configurati-
on data
Programming device
Stored on the hard
disk drive
Logic blocks
Data blocks
System data blocks System data blocks
Logic blocks
Data blocks
Comments
lcons
Load memory Work memory
S
l
M
A
T
l
C
S
l
E
M
E
N
S


1
: If not all of the work memory area is retentive, the retentive area is indicated in STEP 7
module status as retentive memory. You cannot run the program until all the blocks are
downloaded.

Note
This function is only permitted when the CPU is in STOP mode. Load memory is cleared if
the load operation could not be completed due to power loss or illegal block data.

Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-13
4.2.3 Handling with modules
4.2.3.1 Download of new blocks or delta downloads
There are two ways to download additional user blocks or download deltas:
Download of blocks: You already created a user program and downloaded it to the CPU
via the SIMATIC Micro Memory Card. You then want to add new blocks to the user
program. In this case you do not need to reload the entire user program to the MCC.
Instead you only need to download the new blocks to the SIMATIC Micro Memory Card
(this reduces the download times for highly complex programs.)
Delta download: In this case, you only download the deltas in the blocks of your user
program. In the next step, perform a delta download of the user program, or only of the
changed blocks to the SIMATIC Micro Memory Card, using the PG/PC.



Warning
The delta down of block / user programs overwrites all data stored under the same name
on the SIMATIC Micro Memory Card.

The data of dynamic blocks are transferred to RAM and activated after the block is
downloaded.
4.2.3.2 Uploading blocks
Uploading blocks
Unlike download operations, an upload operation is the transfer of specific blocks or a
complete user program from the CPU to the PG/PC. The block content is here identical with
that of the last download to the CPU. Dynamic DBs form the exception, because their actual
values are transferred. An upload of blocks or of the user program from the CPU in STEP 7
does not influence CPU memory.
4.2.3.3 Deleting blocks
Deleting blocks
When you delete a block, it is deleted from load memory. In STEP 7, you can also delete
blocks with the user program (DBs also with SFC 23 "DEL_DB"). RAM used by this block is
released.
Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
4-14 Manual, 12/2006 , A5E00105475-07
4.2.3.4 Compressing blocks
Compressing blocks
When data are compressed, gaps which have developed between memory objects in load
memory/RAM as a result of load/delete operations will be eliminated. This releases free
memory in a continuous block. Data compression is possible when the CPU is in RUN or in
STOP.
4.2.3.5 Promming (RAM to ROM)
Promming (RAM to ROM)
When writing the RAM content to ROM, the actual values of the DBs are transferred from
RAM to load memory to form the start values for the DBs.

Note
This function is only permitted when the CPU is in STOP mode. Load memory is cleared if
the function could not be completed due to power loss.
4.2.4 CPU memory reset and restart
CPU memory reset
After the insertion/removal of a Micro Memory Card, a CPU memory reset restores defined
conditions for CPU restart (warm start). A CPU memory reset rebuilds the CPU's memory
management. Blocks in load memory are retained. All dynamic runtime blocks are
transferred once again from load memory to work memory, in particular to initialize the data
blocks in work memory (restore initial values).
Restart (warm start)
All retentive DBs retain their actual value (non-retentive DBs are also supported by CPUs
with firmware >= V2.0.12. Non-retentive DBs receive their initial values).
The values of all retentive M, C, T are retained.
All non-retentive user data are initialized:
M, C, T, I, O with "0"
All run levels are initialized.
The process images are deleted.
Reference
Also refer to CPU memory reset by means mode selector switch in the section
Commissioning in the CPU 31xC and CPU 31x Operating Instructions.
Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-15
4.2.5 Recipes
Introduction
A recipe represents a collection of user data. You can implement a simple recipe concept
using static DBs. In this case, the recipes should have the same structure (length). One DB
should exist per recipe.
Processing sequence
Recipe is written to load memory:
The various data records of recipes are created as static DBs in STEP 7 and then
downloaded to the CPU. Therefore, recipes only use load memory, rather than work
memory.
Working with recipe data:
SFC83 "READ_DBL" is called in the user program to copy the data record of a current
recipe from the DB in load memory to a static DB that is located in work memory. As a
result, the work memory only has to accommodate the data of one record. The user
program can now access data of the current recipe. The figure below shows how to
handle recipe data:
:
(CPU)
SFC 83 READ_DBL
SFC 84 WRlT_DBL
Work memory
Load memory
Recipe 1
Recipe n
Recipe 2
actual
recipe
(SlMATlC Micro Memory Card)


Saving a modified recipe:
The data of new or modified recipe data records generated during program execution can
be written to load memory. To do this, call SFC 84 "WRIT_DBL" in the user program. The
data written to load memory are portable and retentive on CPU memory reset. You can
backup modified records (recipes) by uploading and saving these in a single block to the
PG/PC.



Note
Active system functions SFC82 to 84 (active access to the SIMATIC Micro Memory Card)
have a distinct influence on PG functions (for example, block status, variable status,
download block, upload, open.) This typically reduces performance (compared to passive
system functions) by the factor 10.

Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
4-16 Manual, 12/2006 , A5E00105475-07


Note
To prevent data losses, do not exceed this maximum of delete/write operations. Also
refer to the SIMATIC Micro Memory Card (MMC) section in the "Structure and
Communication Connections of a CPU" chapter.



Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it
is being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card on your PG, or format the card in the CPU. Never remove a SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU
is in STOP state, and when the PG is not writing to the card. When the CPU is in STOP
mode and you cannot not determine whether or not a PG is writing to the card (e.g.,
load/delete block), disconnect the communication lines.
4.2.6 Measured value log files
Introduction
Measured values are generated when the CPU executes the user program. These values
are to be logged and analyzed.
Processing sequence
Acquisition of measured values:
The CPU writes all measured values to a DB (for alternating backup mode in several
DBs) which is located in work memory.
Measured value logging:
Before the data volume can exceed work memory capacity, you should call
SFC 84 "WRIT_DBL" in the user program to swap measured values from the DB to load
memory. The figure below shows how to handle measured value log files:
Work memory
(CPU)
(SlMATlC Micro Memory Card)
:
SFC82 CREA_DBL
Load memory
Measured value 1
Measured value 2
Measured
value n
actual
measured values
SFC84 WRlT_DBL


You can call SFC 82 "CREA_DBL" in the user program to generate new (additional) static
DBs in load memory which do not require work memory space.
Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 4-17
Reference
For detailed information on SFC 82, refer to the System Software for S7-300/400, System
and Standard Functions Reference Manual, or directly to the STEP 7 Online Help.

Note
SFC 82 is terminated and an error message is generated if a DB already exists under the
same number in load memory and/or work memory.

The data written to load memory are portable and retentive on CPU memory reset.
Evaluation of measured values:
Measured value DBs saved to load memory can be uploaded and evaluated by other
communication partners (PG, PC, for example).



Note
Active system functions SFC82 to 84 (active access to the SIMATIC Micro Memory Card)
have a distinct influence on PG functions (for example, block status, variable status,
download block, upload, open.) This typically reduces performance (compared to passive
system functions) by the factor 10.



Note
For CPUs with firmware V2.0.12 or higher, you can also generate non-retentive DBs
using SFC 82 (parameter ATTRIB -> NON_RETAIN bit.)



Note
To prevent data losses, do not exceed this maximum of delete/write operations. For
further information, refer to the Technical Data of the SIMATIC Micro Memory in the
General Technical Data of your CPU.



Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it
is being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card on your PG, or format the card in the CPU. Never remove a SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU
is in STOP state, and when the PG is not writing to the card. When the CPU is in STOP
mode and you cannot not determine whether or not a PG is writing to the card (e.g.,
load/delete block), disconnect the communication lines.

Memory concept
4.2 Memory functions
CPU 31xC and CPU 31x, Technical Specifications
4-18 Manual, 12/2006 , A5E00105475-07
4.2.7 Backup of project data to SIMATIC Micro Memory Card
Function principles
Using the Save project to Memory Card and Fetch project from Memory Card functions, you
can save all project data to a SIMATIC Micro Memory Card, and retrieve these at a later
time. For this operation, the SIMATIC Micro Memory Card can be located in a CPU or in the
MMC adapter of a PG or PC.
Project data is compressed before it is saved to a SIMATIC Micro Memory Card, and
uncompressed on retrieval.

Note
In addition to project data, you may also have to store your user data on the MMC. You
should therefore first verify SIMATIC Micro Memory Card memory space.
A message warns you of insufficient memory capacity on your SIMATIC Micro Memory Card.

The volume of project data to be saved corresponds with the size of the project's archive file.

Note
For technical reasons, you can only transfer the entire contents (user program and project
data) using the Save project to memory card action.


CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-1
Cycle and reaction times
5
5.1 Overview
Overview
This section contains detailed information about the following topics:
Cycle time
Reaction time
Interrupt response time
Sample calculations
Reference: Cycle time
You can view the cycle time of your user program on the PG. For further information, refer to
the STEP 7 Online Help, or to the Configuring Hardware and Connections in STEP 7 Manual
Reference: Execution time
can be found in the S7-300 Instruction List for CPUs 31xC and 31x. This tabular list contains
the execution times for all
STEP 7 instructions the relevant CPU can execute,
the SFCs / SFBs integrated in the CPUs,
the IEC functions which can be called in STEP 7.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-2 Manual, 12/2006 , A5E00105475-07
5.2 Cycle time
5.2.1 Overview
Introduction
This section explains what we mean by the term "cycle time", what it consists of, and how
you can calculate it.
Meaning of the term cycle time
The cycle time represents the time that an operating system needs to execute a program,
that is, one OB 1 cycle, including all program sections and system activities interrupting this
cycle. This time is monitored.
Time slice model
Cyclic program processing, and therefore user program execution, is based on time shares.
To clarify these processes, let us assume that every time share has a length of precisely
1 ms.
Process image
During cyclic program processing, the CPU requires a consistent image of the process
signals. To ensure this, the process signals are read/written prior to program execution.
Subsequently, the CPU does not address input (I) and output (O) address areas directly at
the signal modules, but rather accesses the system memory area containing the I/O process
image.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-3
Sequence of cyclic program processing
The table and figure below show the phases in cyclic program processing.
Table 5-1 Cyclic program processing
Step Sequence
1 The operating system initiates cycle time monitoring.
2 The CPU copies the values of the process image of outputs to the output modules.
3 The CPU reads the status at the inputs of the input modules and then updates the
process image of inputs.
4 The CPU processes the user program in time shares and executes program instructions.
5 At the end of a cycle, the operating system executes queued tasks, for example, loading
and deleting blocks.
6 The CPU then returns to the start of the cycle, and restarts cycle time monitoring.
1
6
2
3
4
5
PlO: Process lmage of Outputs
Pll: Process lmage of lnputs
SCC: Scan cycle check point
OpSys: Operating system
Operating system
User program
Communication
Time slices (each 1 ms)
Time slices (each 1 ms)
Process image of outputs
(PlO)
Process image of inputs
(Pll)
User program
Scan cycle check point (CCP)
Operating system (OpSys)
C
y
c
l
e

t
i
m
e


In contrast to S7-400 CPUs, the S7-300 CPUs data only allow data access from an OP / TP
(monitor and modify functions) at the scan cycle check point (Data consistency, see the
Technical Data). Processing of the user program is not interrupted by the monitor and modify
functions.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-4 Manual, 12/2006 , A5E00105475-07
Extending the cycle time
Always make allowances for the extension of the cycle time of a user program due to:
Time-based interrupt processing
Process interrupt processing
Diagnostics and error processing
Communication with PGs, Operator Panels (OPs) and connected CPs (for example,
Ethernet, PROFIBUS DP)
Testing and commissioning such as status/controlling of variables or block status
functions.
Transfer and deletion of blocks, compressing user program memory
Write/read access to the Micro Memory Card, using SFC 82 to 84 in the user program
S7 communication via integrated PROFINET interface
PROFINET CBA communication by means of the PROFINET interface (system load,
SFC call, updating on the cycle control point)
PROFINET IO communication via PROFINET interface (system load)
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-5
5.2.2 Calculating the cycle time
Introduction
The cycle time is derived from the sum of the following influencing factors.
Process image update
The table below shows the time a CPU requires to update the process image (process
image transfer time). The times specified might be prolonged as a result of interrupts or CPU
communication. The process image transfer time is calculated as follows:
Table 5-2 Formula for calculating the process image (PI) transfer time
The transfer time of the process image is calculated as follows:
Base load K + number of bytes in PI in module rack 0 x (A)
+ number of bytes in PI in module rack 1 to 3 x (B)
+ number of words in PI via DP x (D)
+ number of words in PI via PROFINET x (P)
= Transfer time for the process image

Table 5-3 CPU 31xC: Data for calculating the process image (PI) transfer time
Const. Compo-
nents
CPU 312C CPU 313C CPU 313C-2 DP CPU 313C-2 PtP CPU 314C-2 DP CPU 314C-2 PtP
C Base load 150 s 100 s 100 s 100 s
A Per byte
in the
rack 0
37 s 35 s 37 s 37 s
B per byte
in module
racks 1 to
3 *
- 43 s 47 s 47 s
D
(DP
only)
Per word
in the DP
area for
the
integrated
DP
interface
- - 1 s - 1 s -
* + 60 s per rack
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-6 Manual, 12/2006 , A5E00105475-07
Table 5-4 CPU 31x: Data for calculating the process image (PI) transfer time
Const. Components CPU 312 CPU 314 CPU 315 CPU 317 CPU 319
K Base load 150 s 100 s 100 s 50 s 2 s
A Per byte in Rack 0 37 s 35 s 37 s 15 s 15 s
B Per byte in module
Racks 1 to 3
- 43 s* 47 s* 25 s* 22 s**
D
(DP only)
Per word in the DP
area for the
integrated DP
interface
- - 2.5 s 2.5 s 2.5 s
P
(PROFIN
ET only)
per WORD in the
PROFINET area
for the integrated
PROFINET
interface
- - 46 s 46 s 2.5 s
* + 60 s per rack
** + 21 s per rack
Extending the user program processing time
In addition to actually working through the user program, your CPU's operating system also
runs a number of processes in parallel
(such as timer management for the core operating system). These processes extend the
processing time of the user program. The table below lists the multiplication factors required
to calculate your user program processing time.
Table 5-5 Extending the user program processing time
CPU Factor
312C 1.06
313C 1.10
313C-2DP 1.10
313C-PtP 1.06
314C-2DP 1.10
314C-2PtP 1.09
312 1.06
314 1.10
315 1.10
317 1.07
319 1.05
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-7
Operating system processing time at the scan cycle check point
The table below shows the operating system processing time at the scan cycle checkpoint of
the CPUs. These times are calculated without taking into consideration times for:
Testing and commissioning routines, e.g. status/controlling of variables or block status
functions
Transfer and deletion of blocks, compressing user program memory
Communication
Writing, reading of the SIMATIC Micro Memory Card with SFC 82 to 84
Table 5-6 Operating system processing time at the scan cycle check point
CPU Cycle control at the scan cycle check point (CCP)
312C 500 s
313C 500 s
313C-2 500 s
314C-2 500 s
312 500 s
314 500 s
315 500 s
317 150 s
319 77 s

Extension of the cycle time as a result of nested interrupts
Enabled interrupts also extend cycle time. Details are found in the table below.
Table 5-7 Extended cycle time due to nested interrupts
Interrupt type Process
interrupt
Diagnostic
Interrupt
Time-of-day
interrupt
Delay interrupt Watchdog
interrupt
312C 700 s 700 s 600 s 400 s 250 s
313C 500 s 600 s 400 s 300 s 150 s
313C-2 500 s 600 s 400 s 300 s 150 s
314C-2 500 s 600 s 400 s 300 s 150 s
312 700 s 700 s 600 s 400 s 250 s
314 500 s 600 s 400 s 300 s 150 s
315 500 s 600 s 400 s 300 s 150 s
317 190 s 240 s 200 s 150 s 90 s
319 72 s 87 s 39 s 26 s 10 s
The program runtime at interrupt level must be added to this time extension.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-8 Manual, 12/2006 , A5E00105475-07
Extension of the cycle time due to error
Table 5-8 Cycle time extension as a result of errors
Type of error Programming errors I/O access errors
312C 600 s 600 s
313C 400 s 400 s
313C2 400 s 400 s
314C-2 400 s 400 s
312 600 s 600 s
314 400 s 400 s
315 400 s 400 s
317 100 s 100 s
319 19 s 23 s
The interrupt OB processing time must be added to this extended time. The times required
for multiple nested interrupt/error OBs are added accordingly.
5.2.3 Different cycle times
Overview
The cycle time (Tcyc) length is not the same in every cycle. The figure below shows different
cycle times Tcyc1 and Tcyc2. Tcyc2 is longer than Tcyc1, because the cyclically executed OB1 is
interrupted by a time-of-day interrupt OB (here: OB 10).
OB1 CCP
CCP OB1
OB10
OB1
Tcyc 2 Tcyc 1
Current cycle
Upda-
ting
PlO
Upda-
ting
PlO
Upda-
ting
PlO
Upda-
ting
Pll
Upda-
ting
Pll
Upda-
ting
Pll
Next cycle Cycle after next

Block processing times may fluctuate
Fluctuation of the block processing time (e.g. OB 1) may also be a factor causing cycle time
fluctuation, due to:
conditional instructions,
conditional block calls,
different program paths,
loops etc.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-9
Maximum cycle time
In STEP 7 you can modify the default maximum cycle time. OB80 is called on when this time
expires. In this block you can specify the CPUs response to this timeout error. The CPU
switches to STOP mode if OB80 does not exist in its memory.
5.2.4 Communication load
Configured communication load for PG/OP communication, S7 communication and PROFINET CBA
The CPU operating system continuously provides a specified percentage of total CPU
processing performance (time-sharing technology) for communication tasks. Processing
performance not required for communication is made available to other processes. In HW
Config, you can specify a communication load value between 5% and 50%. Default value is
20%.
You can use the following formula for calculating the cycle time extension factor:

100 / (100 configured communication load in %)

Time slice (1 ms)
Operating system
User program
Communications
Share can be configured
between 5% and 50%
lnterruption
of user program


Example: 20 % communication load
In your hardware configuration, you have specified a communication load of 20 %. The
calculated cycle time is 10 ms. Using the above formula, the cycle time is extended by the
factor 1.25.
Example: 50 % communication load
In your hardware configuration, you have specified a communication load of 50%. The
calculated cycle time is 10 ms. Using the above formula, the cycle time is extended by the
factor 2.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-10 Manual, 12/2006 , A5E00105475-07
Physical cycle time depending on communication load
The figure below describes the non-linear dependency of the physical cycle time on
communication load. In our sample we have chosen a cycle time of 10 ms.
30 ms
25 ms
20 ms
15 ms
10 ms
5 ms
10 % 20 % 30 % 40 %
50 %
5 %
60 %
0 %
Cycle time
Communication load
The communication load can
be defined in this area


Influence on the physical cycle time
From the statistical viewpoint, asynchronous eventssuch as interruptsoccur more
frequently within the OB1 cycle when the cycle time is extended as a result of
communication load. This further extends the OB1 cycle. This extension depends on the
number of events that occur per OB1 cycle and the time required to process these events.

Note
Change the value of the "communication load" parameter to check the effects on the cycle
time at system runtime. You must consider the communication load when you set the
maximum cycle time, otherwise timing errors may occur.

Tips
Use the default setting wherever possible.
Increase this value only if the CPU is used primarily for communications and if the user
program is not time critical.
In all other situations you should only reduce this value.
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-11
5.2.5 Cycle time extension as a result of testing and commissioning functions
Runtimes
The runtimes of the testing and commissioning functions are operating system runtimes, so
they are the same for every CPU. Initially, there is no difference between process mode and
testing mode. How the cycle time is extended as a result of active testing and commissioning
functions is shown in the table below.
Table 5-9 Cycle time extension as a result of testing and commissioning functions
Function CPU 31xC/ CPU 31x
Status variable 50 s for each variable
Control variable 50 s for each variable
Block status 200 s for each monitored line
Configuration during parameter assignment
For process operation, the maximum permissible cycle load by communication is not
specified in "Cycle load by communication", but rather in "Maximum permitted increase of
cycle time as a result of testing functions during process operation". Thus, the configured
time is monitored absolutely in process mode and data acquisition is stopped if a timeout
occurs. This is how STEP 7 stops data requests in loops before a loop ends, for example.
When running in Testing mode, the complete loop is executed in every cycle. This can
significantly increase cycle time.
5.2.6 Cycle extension through Component Based Automation (CBA)
By default, the operating system of your CPU updates the PROFINET interface as well as
the DP interconnections at the cycle control point. However, if you deactivated these
automatic updates during configuration (e.g. to obtain improved capabilities of influencing the
time behavior of the CPU), you must perform the update manually. This is done by calling
SFCs 112 to 114 at the appropriate times.
Reference
Information about SFC 112 to 114 is available in the STEP 7 Online Help.
Extending the OB1 cycle time
The OB1 cycle is extended by
Increasing the number of PROFINET interconnections,
Increasing the number of remote partners,
Increasing the data volume and
Incrasing the transfer frequency

Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
5-12 Manual, 12/2006 , A5E00105475-07


Note
The use of CBA with cyclical PROFINET interconnections requires the use of switches to
maintain the performance data. 100-Mbit full-duplex operation is mandatory with cyclical
PROFINET interconnections.

The following graphic shows the configuration that was used for the measurements.
lndustrial Ethernet
PROFlBUS
HMl/OPC
...
...
PROFlBUS device 16
(as DP slave)
PROFlNET
remote
node 32
PROFlBUS device 1
(as DP slave)
PROFlNET
remote
node 1
Number of observed
interconnections
in SlMATlC iMAP
or OPC: 200
PROFlNET device with
proxy functionality
(CPU 31x PN/DP)
Quantity: 16
Quantity: 32



The upper graphic displays
Incoming/outgoing remote connections
Quantity for CPU 315 and CPU 317 Quantity for CPU 319
Cyclical interconnection via Ethernet 200, scan cycle rate: Intervals of 10
ms
300, scan cycle rate: Intervals of 10
ms
Acyclic interconnection via Ethernet 100, scan cycle rate: Intervals of
500 ms
100, scan cycle rate: Intervals of 200
ms
Interconnections from the PROFINET device
with proxy functionality to the PROFIBUS
devices
16 x 4 16 x 4
Interconnections of PROFIBUS devices
among each other
16 x 6 16 x 6
Cycle and reaction times
5.2 Cycle time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-13
Additional marginal conditions
The maximum cycle load through communication in the measurement is 20 %.
The lower graphic shows that the OB1 cycle is influenced by increasing the cyclical
PROFINET interconnections to remote partners at PROFINET:
0 40 80 120 160 200
0
1000
2000
3000
4000
5000
6000
7000
8000
CPU 315: OB1 cycle with 5 remote PROFlNET partners
Dependency of the OB1 cycle on the umber of interconnections
Cycle time in s
Number of cyclical CBA interconnections
CPU 319: OB1 cycle with 32 remote PROFlNET partners
CPU 315: OB1 cycle with 32 remote PROFlNET partners
CPU 317: OB1 cycle with 32 remote PROFlNET partners
CPU 317: OB1 cycle with 5 remote PROFlNET partners
CPU 319: OB1 cycle with 5 remote PROFlNET partners


Base load through PROFIBUS devices
The 16 PROFIBUS devices with their interconnections among each other generate an
additional base load of up to 1.0 ms.
Tips and notes
The upper graphic already includes the use of uniform values for the transfer frequency of all
interconnections to a partner.
The performance can drop by up to 50 % if the values are distributed to different
frequency levels.
The use of data structures and arrays in an interconnection instead of many single
interconnections with simple data structures increases the performance.
Cycle and reaction times
5.3 Response time
CPU 31xC and CPU 31x, Technical Specifications
5-14 Manual, 12/2006 , A5E00105475-07
5.3 Response time
5.3.1 Overview
Definition of response time
The response time is the time between the detection of an input signal and the change of a
linked output signal.
Fluctuation width
The physical response time lies between the shortest and the longest response time. You
must always reckon with the longest response time when configuring your system.
The shortest and longest response times are shown below, to give you an idea of the
fluctuation width of the response time.
Factors
The response time depends on the cycle time and following factors:
Delay of the inputs and outputs of signal modules or integrated I/O.
Additional update times for PROFINET IO
additional DP cycle times on PROFIBUS DP
Execution in the user program
Reference
The delay times are located in the technical data of the signal modules (Module data
Manual).
Update times for PROFINET IO
If you configured your PROFINET IO system in STEP 7, STEP 7 calculates the update time
for PROFINET IO. You can then view the PROFINET IO update times on your PG.
Cycle and reaction times
5.3 Response time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-15
DP cycle times in the PROFIBUS DP network
If you have configured your PROFIBUS DP master system in STEP 7, STEP 7 calculates the
typical DP cycle time to be expected. You can then view the DP cycle time of your
configuration on the PG.
The figure below gives you an overview of the DP cycle time. In this example, let us assume
that the data of each DP slave has an average length of 4 bytes.
17 ms
7 ms
6 ms
5 ms
4 ms
3 ms
2 ms
1 ms
1 2 4 8 16 32 64
Bus cycle time
min.
slave interval
Number of DP slaves;
max. number depending on CPU
Baud rate: 12 Mbps
Baud rate 1.5 Mbps


With multi-master operation on a PROFIBUS DP network, you must make allowances for the
DP cycle time at each master. That is, you will have to calculate the times for each master
separately and then add up the results.
Cycle and reaction times
5.3 Response time
CPU 31xC and CPU 31x, Technical Specifications
5-16 Manual, 12/2006 , A5E00105475-07
5.3.2 Shortest response time
Conditions for the shortest response time
The figure below shows the conditions under which the shortest response time is reached.
Delay of inputs
lmmediately before reading in the Pll, the status of
the monitored input changes. This change of the input
signal is still included in the Pll.
The change of the input signal is processed by
the application program.
The response of the user program to the change
of the input signal is issued to the outputs.
Delay of outputs
R
e
s
p
o
n
s
e

t
i
m
e
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO


Calculation
The (shortest) response time is the sum of:
Table 5-10 Formula: Shortest response time
1 x process image transfer time for the inputs
+ 1 x process image transfer time for the outputs
+ 1 x program processing time
+ 1 operating system processing time at the SCC
+ I/O delay
= Shortest response time
The result is equivalent to the sum of the cycle time plus the I/O delay times.
See also
Overview (Page 5-14)
Cycle and reaction times
5.3 Response time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-17
5.3.3 Longest response time
Conditions for the longest response time
The figure below shows the conditions under which the longest response time is reached.
R
e
s
p
o
n
s
e

t
i
m
e
While reading in the Pll, the status of the monitored
input changes. This change of the input signal is not
included in the Pll any longer.
The change of the input signal is included in the Pll.
The change of the input signal is processed by the
application program.
The response of the user program to the change
of the input signal is issued to the outputs.
Delay of inputs +
Twice the update time for PROFlNET lO, or
twice the DP cycle time on the PROFlBUS DP
(depending on whether PROFlNET lO or
PROFlBUS DP is being used).
Delay of inputs +
Twice the update time for PROFlNET lO, or
twice the DP cycle time on the PROFlBUS DP
(depending on whether PROFlNET lO or
PROFlBUS DP is being used).
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO


Cycle and reaction times
5.3 Response time
CPU 31xC and CPU 31x, Technical Specifications
5-18 Manual, 12/2006 , A5E00105475-07
Calculation
The (longest) response time is the sum of:
Table 5-11 Formula: Longest response time
2 x process image transfer time for the inputs
+ 2 x process image transfer time for the outputs
+ 2 x program processing time
+ 2 operating system processing time
+ 4 x PROFINET IO update time (only if PROFINET IO is used.)
+ 4 x DP cycle time on PROFIBUS DP (only if PROFIBUS DP is used.)
+ I/O delay
= Longest response time
Equivalent to the sum of 2 x the cycle time + I/O delay time + 4 x times the PROFINET IO
update time or 4 x times the DP cycle time on PROFIBUS DP
See also
Overview (Page 5-14)
5.3.4 Reducing the response time with direct I/O access
Reducing the response time
You can reach faster response times with direct access to the I/O in your user program, e.g.
with
L PIB or
T PQW
you can partially avoid the response times described above.

Note
You can also achieve fast response times by using process interrupts.

See also
Shortest response time (Page 5-16)
Longest response time (Page 5-17)
Cycle and reaction times
5.4 Calculating method for calculating the cycle/response time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-19
5.4 Calculating method for calculating the cycle/response time
Introduction
This section gives you an overview of how to calculate the cycle/response time.
Cycle time
1. Determine the user program runtime with the help of the Instruction list.
2. Multiply the calculated value by the CPU-specific factor from the table Extension of user
program processing time.
3. Calculate and add the process image transfer time. Corresponding guide values are
found in table Data for calculating process image transfer time.
4. Add the processing time at the scan cycle checkpoint. Corresponding guide values are
found in the table Operating system processing time at the scan cycle checkpoint.
5. Include the extensions as a result of testing and commissioning functions as well as
cyclical PROFINET interconnections in your calculation. These values are found in the
table Cycle time extension due to testing and commissioning functions.
The final result is the cycle time.
Extension of the cycle time as a result of interrupts and communication load
1. Multiply the cycle time by the following factor:
100 / (100 configured communication load in %)
2. Calculate the runtime of interrupt processing program sections with the help of the
instruction list. Add the corresponding value from the table below.
3. Multiply both values by the CPU-specific extension factor of the user program processing
time.
4. Add the value of the interrupt-processing program sequences to the theoretical cycle
time, multiplied by the number of triggering (or expected) interrupt events within the cycle
time.
The result is an approximation of the physical cycle time. Note down the result.
See also
Cycle extension through Component Based Automation (CBA) (Page 5-11)
Cycle and reaction times
5.4 Calculating method for calculating the cycle/response time
CPU 31xC and CPU 31x, Technical Specifications
5-20 Manual, 12/2006 , A5E00105475-07
Response time
Table 5-12 Calculating the response time
Shortest response time Longest response time
- Multiply the physical cycle time by factor 2.
Now add I/O delay. Now add the I/O delay plus the DP cycle times on
PROFIBUS-DP or the PROFINET IO update
times.
The result is the shortest response time. The result is the longest response time.
See also
Longest response time (Page 5-17)
Shortest response time (Page 5-16)
Calculating the cycle time (Page 5-5)
Cycle extension through Component Based Automation (CBA) (Page 5-11)
Cycle and reaction times
5.5 Interrupt response time
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-21
5.5 Interrupt response time
5.5.1 Overview
Definition of interrupt response time
The interrupt response time is the time that expires between the first occurrence of an
interrupt signal and the call of the first interrupt OB instruction. Generally valid: Higher-
priority interrupts take priority. This means that the interrupt response time is increased by
the program processing time of the higher-priority interrupt OBs and the interrupt OBs of
equal priority which have not yet been executed (queued).
Process/diagnostic interrupt response times of the CPUs
Table 5-13 Process and diagnostic interrupt response times
Process interrupt response times Diagnostic interrupt response
times
CPU External
min.
External
max.
Integrated I/O
max.
Min. Max.
CPU 312 0.5 ms 0.8 ms - 0.5 ms 1.0 ms
CPU 312C 0.5 ms 0.8 ms 0.6 ms 0.5 ms 1,0 ms
CPU 313C 0.4 ms 0.6 ms 0.5 ms 0.4 ms 1.0 ms
CPU 313C-2 0.4 ms 0,7 ms 0.5 ms 0.4 ms 1.0 ms
CPU 314 0.4 ms 0.7 ms - 0.4 ms 1.0 ms
CPU 314C-2 0.4 ms 0.7 ms 0.5 ms 0.4 ms 1.0 ms
CPU 315-2 DP
CPU 315-2 PN/DP
0.4 ms 0.7 ms - 0.4 ms 1.0 ms
CPU 317-2 DP
CPU 317-2 PN/DP
0.2 ms 0.3 ms - 0.2 ms 0.3 ms
CPU 319-3 PN/DP 0.06 ms 0.10 ms - 0.09 ms 0.12 ms
Cycle and reaction times
5.5 Interrupt response time
CPU 31xC and CPU 31x, Technical Specifications
5-22 Manual, 12/2006 , A5E00105475-07
Calculation
The formula below show how you can calculate the minimum and maximum interrupt
response times.
Table 5-14 Process and diagnostic interrupt response times
Calculation of the minimum and maximum interrupt reaction time
Minimum interrupt reaction time of the CPU
+ Minimum interrupt reaction time of the
signal modules
+ PROFINET IO update time (only if
PROFINET IO is used.)
+ DP cycle time on PROFIBUS DP (only if
PROFIBUS DP is used.)
= Quickest interrupt reaction time
Maximum interrupt reaction time of the CPU
+ Maximum interrupt reaction time of the signal
modules
+ 2 x PROFINET IO update time (only if PROFINET
IO is used.)
+ 2 x DP cycle time on PROFIBUS DP (only if
PROFIBUS DP is used.)
The maximum interrupt reaction time is longer when
the communication functions are active. The extra
time is calculated using the following formula:
tv: 200 s + 1000 s x n%
n = Setting of the cycle load as a result of
communication
Signal modules
The process interrupt response time of signal modules is determined by the following factors:
Digital input modules
Process interrupt response time = internal interrupt preparation time + input delay
You will find these times in the data sheet for the respective digital input module.
Analog input modules
Process interrupt response time = internal interrupt preparation time + input delay
The internal interrupt preparation time for analog input modules can be neglected. The
conversion times can be found in the data sheet for the individual analog input modules.
The diagnostic interrupt response time of signal modules is equivalent to the period that
expires between the time a signal module detects a diagnostic event and the time this signal
module triggers the diagnostic interrupt. This short time can be neglected.
Process interrupt processing
Process interrupt processing begins after process interrupt OB40 is called. Higher-priority
interrupts stop process interrupt processing. Direct I/O access is executed during runtime of
the instruction. After process interrupt processing has terminated, cyclic program execution
continues or further interrupt OBs of equal or lower priority are called and processed.
See also
Overview (Page 5-1)
Cycle and reaction times
5.6 Sample calculations
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-23
5.5.2 Reproducibility of Time-Delay and Watchdog Interrupts
Definition of "Reproducibility"
Delay interrupt:
The period that expires between the call of the first instruction in the interrupt OB and the
programmed time of interrupt.
Watchdog interrupt:
The fluctuation width of the interval between two successive calls, measured between the
respective initial instructions of the interrupt OBs.
Reproducibility
The following times apply for the CPUs described in this manual, with the exception of CPU
319
Delay interrupt: +/- 200 s
Watchdog interrupt: +/- 200 s
The following times apply in the case of CPU 319:
Delay interrupt: +/- 140 s
Watchdog interrupt: +/- 88 s
These times only apply if the interrupt can actually be executed at this time and if not
interrupted, for example, by higher-priority interrupts or queued interrupts of equal priority.
5.6 Sample calculations
5.6.1 Example of cycle time calculation
Design
You have configured an S7300 and equipped it with following modules in rack "0":
a CPU 314C-2
2 digital input modules SM 321; DI 32 x 24 VDC (4 bytes each in the PI)
2 digital output modules SM 322; DO 32 x 24 VDC/0.5 A (4 bytes each in the PI)
User Program
According to the Instruction List, the user program runtime is 5 ms. There is no active
communication.
Cycle and reaction times
5.6 Sample calculations
CPU 31xC and CPU 31x, Technical Specifications
5-24 Manual, 12/2006 , A5E00105475-07
Calculating the cycle time
The cycle time for the example results from the following times:
User program execution time:
approx. 5 ms x CPU-specific factor 1.10 = approx. 5.5 ms
Process image transfer time
Process image of inputs: 100 s + 8 Byte x 37 s = approx. 0.4 ms
Process image of outputs: 100 s + 8 Byte x 37 s = approx. 0.4 ms
Operating system runtime at scan cycle checkpoint:
Approx. 0.5 ms
Cycle time = 5.5 ms + 0.4 ms + 0.4 ms + 0.5 ms = 6.8 ms.
Calculation of the actual cycle time
There is no active communication.
There is no interrupt handling.
Hence, the physical cycle time is 6 ms.
Calculating the longest response time
Longest response time:
6.8 ms x 2 = 13.6 ms.
I/O delay can be neglected.
Neither PROFIBUS DP, nor PROFINET IO are being used, so you do not have to make
allowances for any DP cycle times on PROFIBUS DP or for PROFINET IO update times.
There is no interrupt handling.
5.6.2 Sample of response time calculation
Design
You have configured an S7300 and equipped it with the following modules in two racks:
a CPU 314C-2
Configuring the cycle load as a result of communication: 40 %
4 digital input modules SM 321; DI 32 x 24 VDC (4 bytes each in the PI)
3 digital output modules SM 322; DO 16 x 24 VDC/0.5 A (2 bytes each in the PI)
2 analog input modules SM 331; AI 8 x 12-bit (not in the PI)
2 analog output modules SM 332; AO 4 x 12 bit (not in the PI)
Cycle and reaction times
5.6 Sample calculations
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 5-25
User Program
According to the instruction list, the user program runtime is 10.0 ms.
Calculating the cycle time
The cycle time for the example results from the following times:
User program execution time:
approx. 10 ms x CPU-specific factor 1.10 = approx. 11 ms
Process image transfer time
Process image of inputs: 100 s + 16 bytes x 37 s = approx. 0.7 ms
Process image of outputs: 100 s + 6 bytes x 37 s = approx. 0.3 ms
Operating system runtime at scan cycle checkpoint:
Approx. 0.5 ms
The sum of the listed times is equivalent to the cycle time:
Cycle time = 11.0 ms + 0.7 ms + 0.3 ms + 0.5 ms = 12.5 ms.
Calculation of the actual cycle time
Under consideration of communication load:
12.5 ms x 100 / (100-40) = 20.8 ms.
Thus, under consideration of time-sharing factors, the actual cycle time is 21 ms.
Calculation of the longest response time
Longest response time = 21 ms x 2 = 42 ms.
I/O delay
The maximum delay of the input digital module SM 321; DI 32 x 24 VDC is 4.8 ms per
channel.
The output delay of the digital output module SM 322; DO 16 x 24 VDC/0.5 A can be
neglected.
The analog input module SM 331; AI 8 x 12 bit was configured for an interference
suppression at 50 Hz. The result is a conversion time of 22 ms per channel. With the
eight active channels, the result is a cycle time of 176 ms for the analog input module.
The analog output module SM 332; AO 4 x 12-bit was programmed for the measuring
range of 0 ... 10 V. This gives a conversion time of 0.8 ms per channel. Since 4
channels are active, the result is a cycle time of 3.2 ms. A settling time of 0.1 ms for a
resistive load must be added to this value. The result is a response time of 3.3 ms for
an analog output.
Neither PROFIBUS DP, nor PROFINET IO are being used, so you do not have to make
allowances for any DP cycle times on PROFIBUS DP or for PROFINET IO update times.
Response times plus I/O delay:
Case 1: An output channel of the digital output module is set when a signal is received
at the digital input. The result is a response time of:
Response time = 42 ms + 4.8 ms = 46.8 ms.
Case 2: An analog value is fetched, and an analog value is output. The result is a
response time of:
Longest response time = 42 ms + 176 ms + 3.3 ms = 221.3 ms.
Cycle and reaction times
5.6 Sample calculations
CPU 31xC and CPU 31x, Technical Specifications
5-26 Manual, 12/2006 , A5E00105475-07
5.6.3 Example of interrupt response time calculation
Design
You have assembled an S7-300, consisting of one CPU 314C-2 and four digital modules in
the CPU rack. One of the digital input modules is an SM 321; DI 16 x 24 VDC; with
process/diagnostic interrupt function.
You have enabled only the process interrupt in your CPU and SM parameter configuration.
You decided not to use time-controlled processing, diagnostics or error handling. You have
configured a 20% communication load on the cycle.
You have configured a delay of 0.5 ms for the inputs of the DI module.
No activities are required at the scan cycle checkpoint.
Calculation
In this example, the process interrupt response time is based on following time factors:
Process interrupt response time of CPU 314C-2: Approx. 0.7 ms
Extension by communication according to the formula:
200 s + 1000 s x 20 % = 400 s = 0.4 ms
Process interrupt response time of SM 321; DI 16 x 24 VDC:
Internal interrupt preparation time: 0.25 ms
Input delay: 0.5 ms
Neither PROFIBUS DP, nor PROFINET IO are being used, so you do not have to make
allowances for any DP cycle times on PROFIBUS DP or for PROFINET IO update times.
The process interrupt response time is equivalent to the sum of the listed time factors:
Process interrupt response time = 0.7 ms + 0.4 ms + 0.25 ms + 0.5 ms = approx. 1.85 ms.
This calculated process interrupt response time expires between the time a signal is
received at the digital input and the call of the first instruction in OB40.

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 6-1
General technical data
6
6.1 Standards and approvals
Introduction
Contents of general technical data:
standards and test values satisfied by modules of the S7-300 automation system
test criteria of S7-300 modules.
CE Label


The S7-300 automation system satisfies requirements and safety-related objectives
according to EC Directives listed below, and conforms with the harmonized European
standards (EN) for programmable controllers announced in the Official Journals of the
European Community:
73/23/EEC "Electrical Equipment Designed for Use within Certain Voltage Limits" (Low-
Voltage Directive)
89/336/EEC "Electromagnetic Compatibility" (EMC Directive)
94/9/EC "Equipment and protective systems intended for use in potentially explosive
atmospheres" (Explosion Protection Directive)
The EC declaration of conformity is held on file available to competent authorities at:
Siemens Aktiengesellschaft
Automation & Drives
A&D AS RD ST PLC
PO Box 1963
D-92209 Amberg
General technical data
6.1 Standards and approvals
CPU 31xC and CPU 31x, Technical Specifications
6-2 Manual, 12/2006 , A5E00105475-07
UL approval


Underwriters Laboratories Inc. complying with
UL 508 (Industrial Control Equipment)
CSA approval


Canadian Standards Association to
C22.2 No. 142 (Process Control Equipment)
or


Underwriters Laboratories Inc. complying with
UL 508 (Industrial Control Equipment)
CSA C22.2 No. 142 (Process Control Equipment)
or
HAZ. LOC.

Underwriters Laboratories Inc. complying with
UL 508 (Industrial Control Equipment)
CSA C22.2 No. 142 (Process Control Equipment)
UL 1604 (Hazardous Location)
CSA-213 (Hazardous Location)
APPROVED for use in
Class I, Division 2, Group A, B, C, D Tx;
Class I, Zone 2, Group IIC Tx
General technical data
6.1 Standards and approvals
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 6-3
Note
Currently valid approvals can be found on the rating plate of the relevant module.

FM approval


Factory Mutual Research (FM) to
Approval Standard Class Number 3611, 3600, 3810
APPROVED for use in Class I, Division 2, Group A, B, C, D Tx;
Class I, Zone 2, Group IIC Tx


to EN 60079-15:2003 (Electrical apparatus for potentially explosive atmospheres; Type of
protection "n")
II 3 G EEx nA II Parts 4..6
Tick-mark for Australia


The S7-300 automation system satisfies requirements of standards to
AS/NZS 2064 (Class A).
IEC 61131
The S7-300 automation system satisfies requirements and criteria to
IEC 61131-2 (Programmable Controllers, Part 2: Equipment requirements and tests).
General technical data
6.1 Standards and approvals
CPU 31xC and CPU 31x, Technical Specifications
6-4 Manual, 12/2006 , A5E00105475-07
Marine approval
Classification societies:
ABS (American Bureau of Shipping)
BV (Bureau Veritas)
DNV (Det Norske Veritas)
GL (Germanischer Lloyd)
LRS (Lloyds Register of Shipping)
Class NK (Nippon Kaiji Kyokai)
Use in industrial environments
SIMATIC products are designed for industrial applications.
Table 6-1 Use in industrial environments
Field of
application
Noise emission requirements Noise immunity requirements
Industry EN 61000-6-4: 2001 EN 61000-6-2: 2001
Use in residential areas
To operate an S7-300 in a residential area, it's RF emission must comply with Limit Value
Class B to EN 55011.
The following measures are recommended to ensure the interference complies with limit
value class B:
S7-300 installation in grounded switch cabinets / cubicles
Use of noise filters in the supply lines



Warning
Personal injury and damage to property may occur.
In potentially explosive environments, there is a risk of injury or damage if you disconnect
any connectors while the S7-300 is in operation.
Always isolate the S7-300 operated in such areas before you disconnect and connectors.

General technical data
6.2 Electromagnetic compatibility
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 6-5
6.2 Electromagnetic compatibility
Definition
Electromagnetic compatibility (EMC) is the ability of an electrical installation to function
satisfactorily in its electromagnetic environment without interfering with that environment.
The S7-300 modules also satisfy requirements of EMC legislation for the European domestic
market. Compliance of the S7-300 system with specifications and directives on electric
design is prerequisite.
Pulseshaped disturbance
The table below shows the EMC compatibility of S7 modules in areas subject to pulse-
shaped disturbance.

Pulse-shaped disturbance Test voltage corresponds with degree
of severity
Electrostatic discharge
to IEC 61000-4-2
Air discharge: 8 kV
Contact discharge 4 kV
3
2
Burst pulses (high-speed
transient disturbance)
to IEC 61000-4-4.
2 kV (power supply lines)
2 kV (signal lines > 3 m)
1 kV (signal lines < 3 m)
3
3
High-energy single pulse (surge) to IEC 61000-4-5
External protective circuit required
(refer to S7-300 Automation System, Hardware and Installation, Chapter
"Lightning and overvoltage protection")
asymmetric coupling 2 kV (power supply lines)
DC with protective elements
2 kV (signal/ data line only > 3 m),
with protective elements as required
symmetric coupling 1 kV (power supply lines) DC with
protective elements
1 kV (signal/ data line only > 3 m),
with protective elements as required




3
Additional measures
When connecting an S7-300 system to the public network, always ensure compliance with
Limit Value Class B to EN 55022.
General technical data
6.2 Electromagnetic compatibility
CPU 31xC and CPU 31x, Technical Specifications
6-6 Manual, 12/2006 , A5E00105475-07
Sinusoidal disturbance
The table below shows the EMC compatibility of S7-300 modules in areas subject to
sinusoidal disturbance.

Sinusoidal disturbance Test values corresponds with
degree of severity
RF radiation
(electromagnetic fields)
to IEC 61000-4-3
10 V/m, with 80% amplitude modulation of
1 kHz in the 80 MHz to 1000 MHz range
10 V/m, with 50% pulse modulation at
900 MHz

3
RF conductance on cables
and cable shielding
to IEC 61000-4-6
Test voltage 10 V, with 80% amplitude
modulation of 1 kHz in the 9 MHz to 80 MHz
range

3
Emission of radio interference
Electromagnetic interference to EN 55011: Limit Class A, Group 1 (measured at a distance
of 10 m.)

Frequency Noise emission
30 MHz to 230 MHz < 40 dB (V/m)Q
230 MHz to 1000 MHz < 47 dB (V/m)Q

Noise emission via AC mains to EN 55011: Limit value class A, Group 1.

Frequency Noise emission
0.15 MHz to 0.5 MHz < 79 dB (V/m)Q
< 66 dB (V/m)M
0.5 MHz to 5 MHz < 73 dB (V/m)Q
< 60 dB (V/m)M
5 MHz to 30 MHz < 73 dB (V/m)Q
< 60 dB (V/m)M
General technical data
6.3 Transportation and storage conditions for modules
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 6-7
6.3 Transportation and storage conditions for modules
Introduction
The shipping and storage conditions of S7-300 modules surpass requirements to IEC 61131-
2. The data below apply to modules shipped or put on shelf in their original packing.
The modules are compliant with climatic conditions to IEC 60721-3-3, Class 3K7 (storage),
and with IEC 60721-3-2, Class 2K4 (shipping.)
Mechanical conditions are compliant with IEC 60721-3-2, Class 2M2.
Shipping and storage conditions for modules

Type of condition Permissible range
Free fall (in shipping package) 1 m
Temperature - 40 C to + 70 C
Barometric pressure 1080 hPa to 660 hPa (corresponds with an altitude
of -1000 m to 3500 m)
Relative humidity 10% to 95%, no condensation
Sinusoidal oscillation to
IEC 60068-2-6
5 Hz to 9 Hz: 3.5 mm
9 Hz to 150 Hz: 9.8 m/s
2

Shock to IEC 60068-2-29 250 m/s
2
, 6 ms, 1000 shocks
6.4 Mechanical and climatic environmental conditions for S7-300 operation
Operating conditions
S7-300 systems are designed for stationary use in weather-proof locations. The operating
conditions surpass requirements to DIN IEC 60721-3-3.
Class 3M3 (mechanical requirements)
Class 3K3 (climatic requirements)
Use with additional measures
The S7-300 may not be used under the conditions outlined below without taking additional
measures:
at locations with a high degree of ionizing radiation
in aggressive environments caused, for example, by
the development of dust
corrosive vapors or gases
strong electric or magnetic fields
in installations requiring special monitoring, for example
elevators
electrical plants in potentially hazardous areas
An additional measure could be an installation of the S7-300 in a cabinet or housing.
General technical data
6.4 Mechanical and climatic environmental conditions for S7-300 operation
CPU 31xC and CPU 31x, Technical Specifications
6-8 Manual, 12/2006 , A5E00105475-07
Mechanical environmental conditions
The table below shows the mechanical environmental conditions in the form of sinusoidal
oscillations.

Frequency band Continuous Infrequently
10 Hz f 58 Hz 0.0375 mm amplitude 0.75 mm amplitude
58 Hz f 150 Hz 0.5 g constant acceleration 1 g constant acceleration

Reducing vibrations
If your S7-300 modules are exposed to severe shock or vibration, take appropriate measures
to reduce acceleration or the amplitude.
We recommend the installation of the S7-300 on damping materials (for example, rubber-
bonded-to-metal mounting.)
Test of mechanical environmental conditions
The table below provides important information with respect to the type and scope of the test
of ambient mechanical conditions.

Condition tested Test Standard Comment
Vibration Vibration test to IEC
60068-2-6 (sinusoidal)
Type of oscillation: Frequency sweeps with a rate of change of 1
octave/minute.
10 Hz f 58 Hz, constant amplitude 0.075 mm
58 Hz f 150 Hz, constant acceleration 1 g
Duration of oscillation: 10 frequency sweeps per axis at each of three
vertically aligned axes
Shock Shock, tested to
IEC 60068-2-27
Type of shock: half-sine
Severity of shock: 15 g peak value, 11 ms duration
Direction of shock: 3 shocks in each direction (+/-) at each of three
vertically aligned axes
Continuous shock Shock, tested to
IEC 60068-2-29
Type of shock: half-sine
Severity of shock: 25 g peak value, 6 ms duration
Shock direction: 1000 shocks in each direction (+/-) at each of three
vertically aligned axes
General technical data
6.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage of S7-300
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 6-9
Climatic environmental conditions
The S7-300 may be operated on following environmental conditions:

Environmental conditions Permissible range Comments
Temperature:
horizontal mounting position:
vertical mounting position:

0C to 60C
0C to 40C

Relative humidity 10 % to 95 % No condensation, corresponds to relative
humidity (RH) Class 2 to IEC 61131, Part 2
Barometric pressure 1080 hPa to 795 hPa Corresponds with an altitude of -1000 m to
2000 m
Concentration of pollutants SO2: < 0.5 ppm;
RH < 60 %, no condensation
H2S: < 0.1 ppm;
RH < 60 %, no condensation
Test: 10 ppm; 4 days

Test: 1 ppm; 4 days
6.5 Specification of dielectric tests, protection class, degree of protection,
and rated voltage of S7-300
Test voltage
Proof of dielectric strength must be provided in the type test at a test voltage to IEC 61131-2:

Circuits with rated voltage Ve to other circuits
or ground.
Test voltage
< 50 V 500 VDC
< 150 V 2500 VDC
< 250 V 4000 VDC
Protection class
Protection class I to IEC 60536, i.e., a protective conductor must be connected to the
mounting rail!
Protection against the ingress of foreign matter and water
Degree of protection IP 20 to IEC 60529, i.e., protection against contact with standard
probes.
No protection against the ingress of water.
General technical data
6.6 Rated voltages of S7-300
CPU 31xC and CPU 31x, Technical Specifications
6-10 Manual, 12/2006 , A5E00105475-07
6.6 Rated voltages of S7-300
Rated operating voltages
The S7-300 modules operate at different rated voltages. The table shows the rated voltages
and corresponding tolerances.

Rated voltages Tolerance
24 VDC 20.4 VDC to 28.8 VDC
120 VAC 93 VAC to 132 VAC
230 VAC 187 VAC to 264 VAC


CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-1
Technical data of CPU 31xC
7
7.1 General technical data
7.1.1 Dimensions of CPU 31xC
Each CPU features the same height and depth, only the width dimensions differ.
Height: 125 mm
Depth: 115 mm, or 180 mm with opened front cover.
Width of CPU

CPU Width
CPU 312C 80 mm
CPU 313C 120 mm
CPU 313C-2 PtP 120 mm
CPU 313C-2 DP 120 mm
CPU 314C-2 PtP 120 mm
CPU 314C-2 DP 120 mm
Technical data of CPU 31xC
7.1 General technical data
CPU 31xC and CPU 31x, Technical Specifications
7-2 Manual, 12/2006 , A5E00105475-07
7.1.2 Technical data of the Micro Memory Card
Plug-in SIMATIC Micro Memory Cards
The following memory modules are available:
Table 7-1 Available SIMATIC Micro Memory Cards
Type Order number Required for a firmware update via
SIMATIC Micro Memory Card
Micro Memory Card 64 KB 6ES7 953-8LFxx-0AA0
Micro Memory Card 128 KB 6ES7 953-8LGxx-0AA0
Micro Memory Card 512 KB 6ES7 953-8LJxx-0AA0
Micro Memory Card 2 MB 6ES7 953-8LLxx-0AA0 Minimum requirement for CPUs without DP
interface
Micro Memory Card 4 MB 6ES7 953-8LMxx-0AA0 Minimum requirement for CPUs without DP
interface (except CPU 319)
Micro Memory Card 8 MB
1)
6ES7 953-8LPxx-0AA0 Minimum requirements for the CPU 319
1
If you plug in the CPU 312C or CPU 312, you cannot use this SIMATIC Micro Memory
Card.
Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Number of blocks that can be stored on the SIMATIC Micro Memory Card depends on the
capacity of the SIMATIC Micro Memory Card being used The maximum number of blocks
that can be loaded is therefore limited by the capacity of your SIMATIC Micro Memory Card
(including blocks generated with the "CREATE DB" SFC)
Table 7-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Size of SIMATIC Micro Memory Card Maximum number of blocks that can be loaded
64 KB 768
128 KB 1024
512 KB
2 MB
4 MB
8 MB
Here the maximum number of blocks that can be loaded for the
specific CPU is less than the number of blocks that can be stored on
the SIMATIC Micro Memory Card.
Refer to the corresponding specifications of a specific CPU to
determine the maximum number of blocks that can be loaded.

Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-3
7.2 CPU 312C
Technical data
Table 7-3 Technical data of CPU 312C
Technical data
CPU and version
Order no. [MLFB] 6ES7 312-5BE03-0AB0
Hardware version 01
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7 V 5.1 + SP
3 or later)
Memory
Work memory
Integrated 32 KB
Expandable No
Load memory Pluggable by means of Micro Memory Card
(max. 4 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.2 s
Word instructions Min. 0.4 s
Fixed-point arithmetic Min. 5 s
Floating-point arithmetic Min. 6 s
Timers/counters and their retentive address areas
S7 counters 128
Retentivity Configurable
Default From C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number Unlimited (limited only by work memory size)
S7 timers 128
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number Unlimited (limited only by work memory size)
Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
7-4 Manual, 12/2006 , A5E00105475-07
Technical data
Data areas and their retentive address areas
Bit memory 128 bytes
Retentivity Configurable
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks Max. 511
(in the 1 to 511 range of numbers)
Size Max. 16 KB
Non-retain support (configurable retentivity) Yes
Local data per priority class Max. 256 bytes
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size Max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
FCs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
Address areas (I/O)
Total I/O address area
Inputs 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing)
I/O process image
Inputs 128 bytes
Outputs 128 bytes
Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-5
Technical data
Digital channels
Integrated channels (DI) 10
Integrated channels (DO) 6
Inputs 266
Outputs 262
Inputs, central 266
Outputs, central 262
Analog channels
Integrated channels (AI) None
Integrated channels (AO) None
Inputs 64
Outputs 64
Inputs, central 64
Outputs, central 64
Removal
Racks Max. 1
Modules per rack Max. 8
Number of DP masters
Integrated None
Via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 4
Time
Clock Yes (SW clock)
Buffered No
Accuracy Deviation per day < 15 s
Behavior of the realtime clock after POWER
ON
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Operating hours counter 1
Number 0
Value range 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
7-6 Manual, 12/2006 , A5E00105475-07
Technical data
S7 message functions
Number of stations that can be logged on for
signaling functions
Max. 6
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks Max. 20
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Communication functions
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
User data per job
Consistent data
Max. 180 bytes (with PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 6
Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-7
Technical data
Can be used for

PG communication
Reserved (default)
Configurable
Max. 5
1
From 1 to 5
OP communication
Reserved (default)
Configurable
Max. 5
1
From 1 to 5
S7-based communication
Reserved (default)
Configurable
Max. 2
0
From 0 to 2
Routing No
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
MPI
Services
PG/OP communication Yes
Routing No
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No
Transmission rates Max. 187.5 kbps
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Integrated I/O
Default addresses of the integrated
Digital inputs
Digital outputs

124.0 to 125.1
124.0 to 124.5
Technical data of CPU 31xC
7.2 CPU 312C
CPU 31xC and CPU 31x, Technical Specifications
7-8 Manual, 12/2006 , A5E00105475-07
Technical data
Integrated functions
Counters 2 channels (see the Manual Technological
Functions)
Frequency counters 2 channels, max. 10 kHz (see the Manual
Technological Functions)
Cycle duration measurement 2 channels (see the Manual Technological
Functions)
Pulse outputs 2 channels for pulse width modulation, max. 2.5
kHz (see the Manual Technological Functions)
Controlled positioning No
Integrated "Controlling" SFB No
Dimensions
Mounting dimensions W x H x D (mm) 80 x 125 x 130
Weight 409 g
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 60 mA
Inrush current Typically 11 A
Power consumption (nominal value) 500 mA
I
2
t 0.7 A
2
s
External fusing of power supply lines
(recommended)
LS switch Type C min. 2 A,
LS switch Type B min. 4 A
Power loss Typically 6 W
Reference
In Chapter Specifications of the integrated I/O you can find
Under Digital inputs of CPUs 31xC and Digital outputs of CPUs 31xC the technical data
of integrated I/Os.
the block diagrams of the integrated I/Os under Arrangement and usage of integrated
I/Os.
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-9
7.3 CPU 313C
Technical data
Table 7-4 Technical data of CPU 313C
Technical data
CPU and version
Order no. [MLFB] 6ES7 313-5BF03-0AB0
Hardware version 01
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7 V 5.1 + SP
3 or later)
Memory
Work memory
Integrated 64 KB
Expandable No
Load memory Pluggable by means of Micro Memory Card (max.
8 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.1 s
Word instructions Min. 0.2 s
Fixed-point arithmetic Min. 2 s
Floating-point arithmetic Min. 3 s
Timers/counters and their retentive address areas
S7 counters 256
Retentivity Configurable
Default From C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number Unlimited (limited only by work memory size)
S7 timers 256
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
7-10 Manual, 12/2006 , A5E00105475-07
Technical data
IEC timers
Yes
Type SFB
Number Unlimited (limited only by work memory size)
Data areas and their retentive address areas
Bit memory 256 bytes
Retentivity Configurable
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks Max. 511
(in the 1 to 511 range of numbers)
Size Max. 16 KB
Non-retain support (configurable retentivity) Yes
Local data per priority class Max. 510 bytes
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size Max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
FCs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
Address areas (I/O)
Total I/O address area
Inputs 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing)
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-11
Technical data
I/O process image
Inputs 128 bytes
Outputs 128 bytes
Digital channels
Integrated channels (DI) 24
Integrated channels (DO) 16
Inputs 1016
Outputs 1008
Inputs, central 1016
Outputs, central 1008
Analog channels
Integrated channels (AI) 4+1
Integrated channels (AO) 2
Inputs 253
Outputs 250
Inputs, central 253
Outputs, central 250
Removal
Racks Max. 4
Modules per rack Max. 8; max. 7 in rack 3
Number of DP masters
Integrated None
Via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 6
Time
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40 C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Accuracy Deviation per day < 10 s
Operating hours counter 1
Number 0
Range of values 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
7-12 Manual, 12/2006 , A5E00105475-07
Technical data
Time synchronization Yes
In the AS Master
On MPI Master/slave
S7 message functions
Number of stations that can be logged on for
signaling functions
Max. 8
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks Max. 20
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
of those as status variable
of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Communication functions
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
Max. 180 bytes (with PUT/GET)
64 bytes
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-13
Technical data
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 8
Can be used for
PG communication
Reserved (default)
Configurable
Max. 7
1
From 1 to 7
OP communication
Reserved (default)
Configurable
Max. 7
1
From 1 to 7
S7 basic communication
Reserved (default)
Configurable
Max. 4
0
From 0 to 4
Routing No
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
PtP communication No
MPI
Services
PG/OP communication Yes
Routing No
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No (but with CP and loadable FB)
Transmission rates Max. 187.5 kbps
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Technical data of CPU 31xC
7.3 CPU 313C
CPU 31xC and CPU 31x, Technical Specifications
7-14 Manual, 12/2006 , A5E00105475-07
Technical data
Integrated I/O
Default addresses of the integrated
Digital inputs
Digital outputs
Analog inputs
Analog outputs

124.0 to 126.7
124.0 to 125.7
752 to 761
752 to 755
Integrated functions
Counters 3 channels (see the Manual Technological
Functions)
Frequency counters 3 channels up to max. 30 kHz (see the
Technological Functions manual)
Cycle duration measurement 3 channels (see the Manual Technological
Functions)
Pulse outputs 3 channels pulse-width modulation up to max.
2.5 kHz (see Technological Functions manual)
Controlled positioning No
Integrated "Controlling" SFB PID controller (see the manual Technological
Functions)
Dimensions
Mounting dimensions W x H x D (mm) 120 x 125 x 130
Weight 660 g
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 150 mA
Inrush current Typically 11 A
Power consumption (nominal value) 700 mA
I
2
t 0.7 A
2
s
External fusing of power supply lines
(recommended)
LS switch Type C min. 2 A,
LS switch Type B min. 4 A,
Power loss Typically 14 W
Reference
In Chapter Specifications of the integrated I/O you can find
The specifications of integrated I/O under Digital inputs of CPUs 31xC, Digital outputs of
CPUs 31xC, Analog inputs of CPUs 31xC and Analog outputs of CPUs 31xC.
the block diagrams of the integrated I/Os under Arrangement and usage of integrated
I/Os.
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-15
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
Technical data
Table 7-5 Technical data for CPU 313C-2 PtP/ CPU 313C-2 DP
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
CPU and version CPU 313C-2 PtP CPU 313C-2 DP
Order no. [MLFB] 6ES7 313-6BF03-0AB0 6ES7 313-6CF03-0AB0
Hardware version 01 01
Firmware version V2.6 V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or
higher
(please use previous CPU for STEP
7 V 5.1 + SP 3 or later)
STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7
V 5.1 + SP 3 or later)
Memory CPU 313C-2 PtP CPU 313C-2 DP
Work memory
Integrated 64 Kbytes
Expandable No
Load memory Pluggable by means of Micro Memory Card (max. 8 MB)
Data storage life on the
Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card (maintenance-free)
Execution times CPU 313C-2 PtP CPU 313C-2 DP
Processing times of
Bit operations min. 0.1 s
Word instructions min. 0.2 s
Fixed-point arithmetic min. 2 s
Floating-point arithmetic min. 3 s
Timers/counters and their retentive
address areas
CPU 313C-2 PtP CPU 313C-2 DP
S7 counters 256
Retentivity Configurable
Default From C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 256
Retentivity Configurable
default Not retentive
Timer range 10 ms to 9990 s
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-16 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
IEC timers Yes
Type SFB
Number unlimited (limited only by work memory size)
Data areas and their retentive address
areas
CPU 313C-2 PtP CPU 313C-2 DP
Bit memory 256 bytes
Retentivity Configurable
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks Max. 511
(in the 1 to 511 range of numbers)
Size max. 16 KB
Non-retain support (configurable
retentive address areas)
Yes
Local data per priority class max. 510 bytes
Blocks CPU 313C-2 PtP CPU 313C-2 DP
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be loaded may be reduced if you
are using another Micro Memory Card.
OBs see the Instruction List
Size max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs - 3 (OB 55, 56, 57)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87) 5 (OB 80, 82, 85, 86, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size max. 16 KB
FCs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size max. 16 KB
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-17
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
Address areas (I/O)
CPU 313C-2 PtP CPU 313C-2 DP
Total I/O address area
Inputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Distributed
Inputs
Outputs

none
none

1006 bytes
1006 bytes
I/O process image
Inputs 128 bytes 128 bytes
Outputs 128 bytes 128 bytes
Digital channels
Integrated channels (DI) 16 16
Integrated channels (DO) 16 16
Inputs 1008 8064
Outputs 1008 8064
Inputs, central 1008 1008
Outputs, central 1008 1008
Analog channels
Integrated channels None None
Integrated channels None None
Inputs 248 503
Outputs 248 503
Inputs, central 248 248
Outputs, central 248 248
Removal CPU 313C-2 PtP CPU 313C-2 DP
Racks Max. 4
Modules per rack max. 8; max. 7 in rack 3
Number of DP masters
Integrated No 1
Via CP 4 4
Operable function modules and
communication processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 6
Time CPU 313C-2 PtP CPU 313C-2 DP
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of 40 C)
Behavior of the clock on expiration of
the buffered period
The clock keeps running, continuing at the time-of-day it had when power was
switched off.
Accuracy Deviation per day < 10 s
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-18 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
Operating hours counter 1
Number 0
Range of values 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
On DP - Master/slave
(only time slave if DP slave)
S7 message functions CPU 313C-2 PtP CPU 313C-2 DP
Number of stations that can log in for
signaling functions (e.g. OS)
Max. 8
(depends on the number of connections configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S
blocks
Max. 20
Test and startup functions CPU 313C-2 PtP CPU 313C-2 DP
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers, counters
Number of variables
Of those as status variable
Of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Communication functions CPU 313C-2 PtP CPU 313C-2 DP
PG/OP communication Yes
Global Data Communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
max. 22 bytes
22 bytes
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-19
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
S7 basic communication
Yes (server)
User data per job
Consistent data
max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
max. 180 bytes (with PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 8
can be used for
PG communication
Reserved (default)
Configurable
Max. 7
1
from 1 to 7
OP communication
Reserved (default)
Configurable
max. 7
1
from 1 to 7
S7-based communication
Reserved (default)
Configurable
Max. 4
0
From 0 to 4
Routing No Max. 4
Interfaces CPU 313C-2 PtP CPU 313C-2 DP
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
electrically isolated No
Interface power supply (15 to 30 VDC) Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
MPI
Services
PG/OP communication Yes
Routing No Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No (but via CP and loadable FBs)
Transmission rates Max. 187.5 kbps
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-20 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
2nd interface
Type of interface Integrated RS422/RS485 interface Integrated RS485 interface
Physics RS 422/485 RS 485
Electrically isolated Yes Yes
Interface power supply (15 to 30 VDC) No Max. 200 mA
Number of connections None 8
Functionality
MPI No No
PROFIBUS DP No Yes
Point-to-point connection Yes No
DP master
Number of connections 8
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time No
Isochronous mode No
SYNC/FREEZE Yes
Enable/disable DP slaves Yes
DPV1 Yes
Transmission rates Up to 12 Mbaud
Number of DP slaves per station Max. 32
Address area Max. 1 KB I / 1 KB O
User data per DP slave max. 244 bytes I / 244 bytes O
DP slave
Number of connections 8
Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
DPV1 No
Technical data of CPU 31xC
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-21
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
GSD file The latest GSD file is available at:
http://automation.siemens.com/csi/gsd
Point-to-point connection
Transmission rates 38.4 Kbaud half duplex
19.2 Kbaud full duplex

Cable length Max. 1200 m
User program can control the interface Yes
The interface can trigger a break or an
interrupt in the user program
Yes (message with break ID)
Protocol driver 3964(R); ASCII
Programming CPU 313C-2 PtP CPU 313C-2 DP
Programming language LAD/FBD/STL
Instruction set see the Instruction List
Nesting levels 8
System functions (SFC) see the Instruction List
System function blocks (SFB) see the Instruction List
User program protection Yes
Integrated I/O CPU 313C-2 PtP CPU 313C-2 DP
Default addresses of the integrated
Digital inputs
Digital outputs

124.0 to 125.7
124.0 to 125.7
Integrated functions
Counters 3 channels (see the Technological Functions manual)
Frequency counters 3 channels up to max. 30 kHz (see the Technological Functions manual)
Cycle duration measurement 3 channels (see the Manual Technological Functions)
Pulse outputs 3 channels pulse-width modulation up to max. 2.5 kHz (see the manual
Technological Functions)
Controlled positioning No
Integrated "Controlling" SFB PID controller (see the manual Technological Functions)
Dimensions CPU 313C-2 PtP CPU 313C-2 DP
Mounting dimensions W x H x D (mm) 120 x 125 x 130
Weight approx. 566 g
Voltages and currents CPU 313C-2 PtP CPU 313C-2 DP
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 100 mA
Inrush current Typically. 11 A
Power consumption (nominal value) 700 mA 900 mA
I
2
t 0.7 A
2
s
External fusing of power supply lines
(recommended)
LS switch type B: min. 4 A, type C: min. 2 A
Power loss Typically 10 W
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-22 Manual, 12/2006 , A5E00105475-07
Reference
In Chapter Specifications of the integrated I/O you can find
under Digital inputs of CPUs 31xC and Digital outputs of CPUs 31xC the technical data of
integrated I/Os.
the block diagrams of the integrated I/Os under Arrangement and usage of integrated
I/Os.

7.5 CPU 314C-2 PtP and CPU 314C-2 DP
Technical Data
Table 7-6 Technical data of CPU 314C-2 PtP and CPU 314C-2 DP
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
CPU and version CPU 314C-2 PtP CPU 314C-2 DP
Order no. [MLFB] 6ES7 314-6BG03-0AB0 6ES7 314-6CG03-0AB0
Hardware version 01 01
Firmware version V2.6 V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7
V 5.1 + SP 3 or later)
STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7
V 5.1 + SP 3 or later)
Memory CPU 314C-2 PtP CPU 314C-2 DP
Work memory
Integrated 96 KB
Expandable No
Capacity of retentive memory for
retentive data blocks
64 KB
Load memory Pluggable by means of SIMATIC Micro Memory Card (max. 8 Mbytes)
Data storage life on the MMC
(following final programming)
At least 10 years
Buffering Guaranteed by SIMATIC MMC (maintenance-free)
Execution times CPU 314C-2 PtP CPU 314C-2 DP
Processing times of
Bit operations Min. 0.1 s
Word instructions Min. 0.2 s
Fixed-point arithmetic Min. 2 s
Floating-point arithmetic Min. 3 s
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-23
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Timers/counters and their retentive
address areas
CPU 314C-2 PtP CPU 314C-2 DP
S7 counters 256
Retentivity Configurable
Default from C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 256
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number unlimited (limited only by work memory size)
Data areas and their retentive address
areas
CPU 314C-2 PtP CPU 314C-2 DP
Bit memory 256 bytes
Retentivity Configurable
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks Max. 511
(in the 1 to 511 range of numbers)
Size max. 16 KB
Non-retain support (configurable
retentive address areas)
Yes
Local data per priority class max. 510 bytes
Blocks CPU 314C-2 PtP CPU 314C-2 DP
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be loaded may be reduced if you are
using another MMC.
OBs See the Instruction List
Size max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt
OBs
1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs - 3 (OB 55, 56, 57)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87) 5 (OB 80, 82, 85, 86, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-24 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size max. 16 KB
FCs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size max. 16 KB
Address areas (I/O) CPU 314C-2 PtP CPU 314C-2 DP
Total I/O address area
Inputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Distributed
Inputs
Outputs

none
none

979 bytes
986 bytes
I/O process image
Inputs 128 bytes 128 bytes
Outputs 128 bytes 128 bytes
Digital channels
Integrated channels (DI) 24 24
Integrated channels (DO) 16 16
Inputs 1016 7856
Outputs 1008 7904
Inputs, central 1016 1008
Outputs, central 1008 1008
Analog channels
Integrated channels (AI) 4 + 1 4 + 1
Integrated channels (AO) 2 2
Inputs 253 494
Outputs 250 495
Inputs, central 253 253
Outputs, central 250 250
Removal CPU 314C-2 PtP CPU 314C-2 DP
Racks Max. 4
Modules per rack max. 8; max. 7 in rack 3
Number of DP masters
Integrated No 1
Via CP 4 4
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-25
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Operable function modules and
communication processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
Time CPU 314C-2 PtP CPU 314C-2 DP
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of 40 C)
Behavior of the clock on expiration
of the buffered period
The clock keeps running, continuing at the time-of-day it had when power was
switched off.
Accuracy Deviation per day < 10 s
Operating hours counter 1
Number 0
Value range 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
On DP - Master/slave
(only time slave if DP slave)
S7 message functions CPU 314C-2 PtP CPU 314C-2 DP
Number of stations that can log in for
signaling functions (e.g. OS)
Max. 12
(depends on the number of connections configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S
blocks
Max. 40
Test and startup functions CPU 314C-2 PtP CPU 314C-2 DP
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers, counters
Number of variables
of those as status variable
of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-26 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Diagnostics buffer
Yes
Number of entries (not configurable) Max. 100
Communication functions CPU 314C-2 PtP CPU 314C-2 DP
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
max. 180 bytes (with PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 12
can be used for
PG communication
Reserved (default)
Configurable
Max. 11
1
from 1 to 11
OP communication
Reserved (default)
Configurable
Max. 11
1
from 1 to 11
S7-based communication
Reserved (default)
Configurable
Max. 8
0
from 0 to 8
Routing No Max. 4
Interfaces CPU 314C-2 PtP CPU 314C-2 DP
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
electrically isolated No
Interface power supply (15 to 30 VDC) Max. 200 mA
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-27
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Functionality

MPI Yes
PROFIBUS DP No
Point-to-point connection No
MPI
Number of connections 12
Services
PG/OP communication Yes
Routing No Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No (but via CP and loadable FBs)
Transmission rates max. 187.5 kbps
2nd interface CPU 314C-2 PtP CPU 314C-2 DP
Type of interface Integrated RS422/RS485 interface Integrated RS485 interface
Physics RS 422/485 RS 485
electrically isolated Yes Yes
Interface power supply (15 to 30 VDC) No Max. 200 mA
Number of connections None 12
Functionality
MPI No No
PROFIBUS DP No Yes
Point-to-point connection Yes No
DP master
Number of connections 12
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode No
SYNC/FREEZE Yes
Enable/disable DP slaves Yes
DPV1 Yes
Transmission rates Up to 12 Mbaud
Number of DP slaves per station Max. 32
Address area Max. 1 KB I / 1 KB O
User data per DP slave max. 244 bytes I / 244 bytes O
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
7-28 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
DP slave

Number of connections 12
Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Intermediate memory 244 bytes I / 244 bytes O
Automatic baud rate search Yes (only if interface is passive)
Address areas Max. 32, with max. 32 bytes each
DPV1 No
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi
/gsd
Point-to-point connection
Transmission rates 38.4 Kbaud half duplex
19.2 Kbaud full duplex

Cable length Max. 1200 m
User program can control the
interface
Yes
The interface can trigger a break or
an interrupt in the user program
Yes (message with break ID)
Protocol driver 3964 (R); ASCII and RK512
Programming CPU 314C-2 PtP CPU 314C-2 DP
Programming language LAD/FBD/STL
Instruction set see the Instruction List
Nesting levels 8
System functions (SFC) see the Instruction List
System function blocks (SFB) see the Instruction List
User program protection Yes
Integrated I/O CPU 314C-2 PtP CPU 314C-2 DP
Default addresses of the integrated
Digital inputs
Digital outputs
Analog inputs
Analog outputs

124.0 to 126.7
124.0 to 125.7
752 to 761
752 to 755
Technical data of CPU 31xC
7.5 CPU 314C-2 PtP and CPU 314C-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-29
Technical data
CPU 314C-2 PtP CPU 314C-2 DP
Integrated functions

Counters 4 channels (see the Manual Technological Functions)
Frequency counters 4 channels, max. 60 kHz (see the Manual Technological Functions)
Cycle duration measurement 4 channels (see the Manual Technological Functions)
Pulse outputs 4 channels for pulse width modulation, max. 2.5 kHz (see the Manual
Technological Functions)
Controlled positioning 1 channel (see the Manual Technological Functions)
Integrated "Controlling" SFB PID controller (see the manual Technological Functions)
Dimensions CPU 314C-2 PtP CPU 314C-2 DP
Mounting dimensions W x H x D (mm) 120 x 125 x 130
Weight approx. 676 g
Voltages and currents CPU 314C-2 PtP CPU 314C-2 DP
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load
operation)
Typically 150 mA
Inrush current Typically 11 A
Power consumption (nominal value) 800 mA 1000 mA
I
2
t 0.7 A
2
s
External fusing of power supply lines
(recommended)
LS switch type C min. 2 A,
LS switch type B min. 4 A
Power loss Typically 14 W
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-30 Manual, 12/2006 , A5E00105475-07
7.6 Technical data of the integrated I/O
7.6.1 Arrangement and usage of integrated I/Os
Introduction
Integrated I/Os of CPUs 31xC can be used for technological functions or as standard I/O.
The figures below illustrate possible usage of I/Os integrated in the CPUs.
Reference
Further information on integrated I/O is found in the Manual Technical Functions.
CPU 312C: Pin-out of the integrated DI/DO (connector X11)
Cn Counter n
A, B Sensor signals
Vn Comparator n
X Pin can be used, provided it is not in use by technological functions
HW gate Gate control
Latch Save counter value
Standard
lnterrupt
input
Counting
1
2
3
4
5
6
8
7
9
10
11
12
13
14
16
15
17
18
20
19
X11
DI
DI
DI
DI+0.1
DI+0.2
DI+0.3
DI+0.4
DI+0.5
DI+0.6
DI+0.7
X
X
X
X
X
X
X
X
Z0 (A)
Z0 (B)
Z0 (HW-Tor)
Z1 (A)
Z1 (B)
Z1 (HW-Tor)
Latch 0
Latch 1
V0
V1
DI+0.0
DI+1.1
DO+0.0
DO+0.1
DO+0.2
DO+0.3
DO+0.4
DO+0.5
DI+1. 0
DI
DI
DI
DI
DI
DI
DI
X
X
DO
DO
DO
DO
DO
DO
2 M
1L+
1 M


Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-31
Block diagram of the integrated digital I/O
6
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
1L+
1M
2M
20
19
18
17
16
15
14
13
12
11
10
9
8
7
5
4
3
2
1


Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-32 Manual, 12/2006 , A5E00105475-07
CPU 313C, CPU 313C-2 DP/PtP, CPU 314C-2 DP/PtP: DI/DO (connectors X11 and X12)
10
11
12
13
14
16
15
17
18
20
19
1) Standard
Dl
Standard
DO
lnterrupt
input
Positio-
ning
X11 of CPU 313C-2 PtP/DP
X12 of CPU 314C-2 PtP/DP
digital analog
Counting Counting
Cn Counter n
A, B Sensor signals
HW gate Gate control
Latch Save counter value
Vn Comparator n
Probe 0 Probe 0
Bero 0 Reference point switch 0
R+, R- Direction signal
Rapid Rapid speed
Creep Creep speed
CONV_EN Power unit enable
CONV_DlR Direction signal (only with control mode "voltage
or current from 0 mA to 10 mA and direction signal")
X Pin can be used, provided it is not in use by technological functions
1) only CPU 314C-2
Positioning
1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
V0
V1
V2
V3 1)
Z0 (A)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Z0 (B)
Z0 (HW-Tor)
Z1 (A)
Z1(B)
Z1 (HW-Tor)
Z2 (A)
Z2 (B)
Z2 (HW-Tor)
Z3 (A)
Z3 (B)
Z3 (HW-Tor)
Z0 (Latch)
Z1 (Latch)
Z2 (Latch)
Z3 (Latch)
A 0
B 0
N 0
Tast 0
Bero 0
1)
1)
1
2
3
4
5
6
8
7
9
DI+0.1
DI+0.2
DI+0.3
DI+0.4
DI+0.5
DI+0.6
DI+0.7
DI+0.0
DO+0.1
DO+0.2
DO+0.3
DO+0.4
DO+0.5
DO+0.6
DO+0.7
DO+0.0
1L+ 2L+ 21
22
23
24
25
26
28
27
29
30
31
32
33
34
36
35
37
38
40
39
CONV_EN
R+
Eil
R-
Schleich
DI+1.1
DI+1.2
DI+1.3
DI+1.4
DI+1.5
DI+1.6
DI+1.7
DI+1. 0
DO+1.1
DO+1.2
DO+1.3
DO+1.4
DO+1.
DO+1.6
DO+1.7
DO+1. 0
2M
3L+
1M 3M
CONV_DIR
5


Reference
Details are found in the Manual Technical Functions under Counting, Frequency
Measurement and Pulse Width Modulation
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-33
Block diagram of integrated digital I/O of CPUs 313C/313C-2/314C-2
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
3L+
2M
1M
1L+
3M
2L+
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21



Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-34 Manual, 12/2006 , A5E00105475-07
CPU 313C/314C-2: Pin-out of the integrated AI/AO and DI (connector X11)
Manipulated
value 0
Standard Positioning Standard Dl lnterrupt input
1) only CPU 314C-2
19
20
18
17
15
16
14
13
12
11
10
9
7
8
6
5
4
3
2
1
39
40
38
37
35
36
34
33
32
31
30
22
21
24
23
26
25
28
27
29
AO (Ch1)
AO (Ch0)
PT 100 (Ch4)
Al (Ch3)
Al (Ch2)
Al (Ch1)
Al (Ch0)
V
l
C
V
l
C
V
l
C
V
l
C
V
V
A
A
PEWx+0
PEWx+2
PEWx+4
PEWx+6
PEWx+8
PAWx+0
PAWx+2
M
Dl+2.3
Dl+2.4
Dl+2.5
Dl+2.0
Dl+2.1
Dl+2.2
Dl+2.6
Dl+2.7
4M
ANA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1)
X11


Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-35
Block diagram of integrated digital/analog I/O of CPUs 313C/314C-2
4M
0
1
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
Controller
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Al0
Al
Al/A0 8D l
Al
Al
Al
A0
A0
Al
CH0
CH1
CH2
CH3
CH0
CH1
PT100
U
U
l
l
Al2
Al1
A
V
A
V
A
V
Al3
A
V
Al4
R
AO
AO
M
ANA
V
A
V
A



Simultaneous usage of technological functions and standard I/O
Technological functions and standard I/O can be used simultaneously with appropriate
hardware. For example, you can use all digital inputs not used for counting functions as
standard DI.
Read access to inputs used by technological functions is possible. Write access to outputs
used by technological functions is not possible.
See also
CPU 312C (Page 7-3)
CPU 313C (Page 7-9)
CPU 313C-2 PtP and CPU 313C-2 DP (Page 7-15)
CPU 314C-2 PtP and CPU 314C-2 DP (Page 7-22)
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-36 Manual, 12/2006 , A5E00105475-07
7.6.2 Analog I/O
Abbreviations used in the figures below

M Ground connection
Mx+ Measuring line "+" (positive), for channel x
Mx- Measuring line "-" (negative), for channel x
MANA Analog-measuring-circuit reference potential
AIXU Voltage input "+" for channel x
AIXI Current input "+" for channel x
AIXC Common current and voltage input "-" for channel x
AIX Analog input channel x
Wiring of the current/voltage inputs
The figure below shows the wiring diagram of the current/voltage inputs operated with 2-/4-
wire measuring transducers.
M2-
M2+
-
+
+24V
20
ANA M M
10
9
8
c
l
u
2 Al
2 Al
2 Al
Al
0
:

Al
1
:

Al
2
:

Al
3
:
We recommend that you use a jumper to interconnect AlxC with MANA.
2-wire
transducer
Pin 2 to 4
Pin 5 to 7
Pin 8 to 10
Pin 11 to 13

Figure 7-1 Connection of a 2-wire measuring transducer to an analog current/voltage input of
CPU 313C/314C-2

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-37
4-wire
transducer
Short-circuit unused input channels
and interconnect AlxC with MANA.
lf using a 4-wire transducer, we recommend that you
interconnect AlxC with MANA.
:Pin 2 to 4
:Pin 5 to 7
:Pin 8 to 10
:Pin 11 to 13
Al 2
Al 2
Al 2
Al 3
Al 3
Al 3
u
l
c
u
l
c
L+
8
9
10
11
12
13
M
ANA
20
M
M2+
M2-
M+
M-
M
Al
Al
Al
Al
0
1
2
3

Figure 7-2 Connection of a 4-wire measuring transducer to an analog current/voltage input of
CPU 313C/314C-2
Measurement principle
31xC CPUs use the measurement principle of actual value encoding. Here, they operate
with a sampling rate of 1 kHz. That is, a new value is available at the peripheral input word
register once every millisecond. This value can then be read via user program (e.g., L PEW).
The "previous" value is read again if access times are shorter than 1 ms.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-38 Manual, 12/2006 , A5E00105475-07
Integrated hardware low-pass filter
An integrated low-pass filter attenuates analog input signals of channel 0 to 3. They are
attenuated according to the trend in the figure below.

<10 %
<1%
Attenuation
Attenuation
High-level
Attenuation
lnput frequency
lnternal
signal level
lnvalid
input frequency
50 Hz 200 Hz
63 %
400 Hz
100 %

Figure 7-3 Low-pass characteristics of the integrated filter

Note
The maximum frequency of the input signal is 400 Hz.

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-39
Input filters (software filter)
The current / voltage inputs have a software filter for the input signals which can be
programmed with STEP 7. It filters the configured interference frequency (50/60 Hz) and
multiples thereof.
The selected interference suppression also determines the integration time.
At an interference suppression of 50 Hz the software filter forms the average based on the
last 20 measurements and saves the result as a measurement value.
You can suppress interference frequencies (50 Hz or 60 Hz) according to the parameters set
in STEP 7. A setting of 400 Hz will not suppress interference.
An integrated low-pass filter attenuates analog input signals of channel 0 to 3.
Selection in STEP 7:
(software filter)
50-Hz parameterization
(mean value filter)
60-Hz parameterization
(mean value filter)
Analog-to-
digital converter
400-Hz parameterization
Hardware low-pass filter
(RC element)
Al
x

Figure 7-4 Principle of interference suppression with STEP 7

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-40 Manual, 12/2006 , A5E00105475-07
In the two graphics below we illustrate how the 50 Hz and 60 Hz interference suppression
work

1 averaged measured value
1 averaged measured value
Example of 50 Hz interference frequency suppression (integration time corresponds to 20 ms)
2ndCycle
1stCycle
Value Value Value Value Value
Value Value Value Value Value
ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms
20 19
...
3 2 1
20 19
...
3 2 1
1,05 ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms 1,05 ms

Figure 7-5 50 Hz interference suppression

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-41
1 averaged measured value
1 averaged measured value
Example of 60 Hz interference frequency suppression (integration time corresponds to 16,7 ms)
2nd Cycle
1stCycle
Value Value Value Value Value
Value Value Value Value Value
1,05 ms 1,05 ms 1,05 ms 1,05 ms
17 16
...
3 2 1
17 16
...
3 2 1
1,05 ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms 1,05 ms

Figure 7-6 60 Hz interference suppression


Note
If the interference frequency is not 50/60 Hz or a multiple thereof, the input signal must be
filtered externally,
In this case, 400 Hz frequency suppression must be configured for the respective input. This
is equivalent to a "Deactivation" of the software filter.

Inputs not connected
The three inputs of a current/voltage analog output channel that is not connected should be
bypasses and connected to MANA (pin 20 of the front connector). This ensures maximum
interference resistance for these analog inputs.
Outputs not connected
In order to disconnect unused analog outputs from power, you must disable and leave them
open during parameter assignment with STEP 7.
Reference
For further information (visualization and processing of analog values, for example), refer to
Chapter 4 of the Module Data Manual.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-42 Manual, 12/2006 , A5E00105475-07
7.6.3 Parameterization
Introduction
You configure the integrated I/O of CPU 31xC with STEP 7. Always make these settings
when the CPU is in STOP. The generated parameters are downloaded from the PG to the
S7-300 and written to CPU memory .
You can also choose to change the parameters at SFC 55 in the user program (see the
Reference Manual System and Standard Functions). Refer to the structure of record 1 for
the respective parameters.
Parameters of standard DI
The table below gives you an overview of the parameters for standard digital inputs.
Table 7-7 Parameters of standard DI
Parameters Value range Default Range of efficiency
Input delay (ms) 0.1/0.5/3/15 3 Channel group
The table below gives you an overview of the parameters when using digital inputs as
interrupt inputs.
Table 7-8 Parameters of the interrupt inputs
Parameters Range of values Default setting Efficiency range
Interrupt input Disabled /
positive edge
De-activated digital input
Interrupt input Disabled/
negative edge
Deactivated Digital input
lnterrupt input Dl +0.1
lnterrupt input Dl +0.0
lnterrupt input Dl +0.7
Byte 1
Byte 2
Byte 3 reserved
Byte 0
lnterrupt input Dl +1.1
lnterrupt input Dl +1.7
lnterrupt input Dl +2.1
lnterrupt input Dl +2.0
lnterrupt input Dl +2.7
Bit No.
Bit No.
Bit No.
lnterrupt input Dl +1.0
0: Deactivated
1: Rising edge
Default setting: 0


Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-43
lnterrupt input Dl +0.1
lnterrupt input Dl +0.0
lnterrupt input Dl +0.7
Byte 5
Byte 6
Byte 7 reserved
Byte 4
lnterrupt input Dl +1.1
lnterrupt input Dl +1.7
lnterrupt input Dl +2.1
lnterrupt input Dl +2.0
lnterrupt input Dl +2.7
Bit No.
Bit No.
Bit No.
lnterrupt input Dl +1.0
0: Deactivated
1: Falling edge
Default setting: 0
0
7 0
0 7
7


Byte 8
Byte 9
7 0
7 0
lnput delay Dl +0.0 to Dl +0.3
lnput delay Dl +0.4 to Dl +0.7
lnput delay Dl +1.0 to Dl +1.3
lnput delay Dl +1.4 to Dl +1.7
lnput delay Dl +2.0 to Dl +2.3
lnput delay Dl +2.4 to Dl +2.7
reserved
Bit-Nr.
Bit-Nr.
00
B
: 3,0 ms
01
B
: 0,1 ms
10
B
: 0,5 ms
11
B
: 15,0 ms
Default setting: 00B

Figure 7-7 Structure of record 1 for standard DI and interrupt inputs (length of 10 bytes)
Parameters of standard DO
There are no parameters for standard digital outputs.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-44 Manual, 12/2006 , A5E00105475-07
Parameters of standard AI
The table below gives you an overview of the parameters for standard analog inputs.
Table 7-9 Parameters of standard AI
Parameters Range of values Default setting Efficiency range
Integration time (ms)
Interference suppression
(Hz)
(channel 0 to 3)
2.5/16.6/20
400/60/50
20
50
Channel
Channel
Measurement range
(channel 0 to 3)
deactivated/
+/- 20 mA/
0 ... 20 mA/
4 ... 20 mA/
+/- 10 V/
0 ... 10 V
+/- 10 V Channel
Type of measurement
(channel 0 to 3)
deactivated/
U voltage/
I current
U voltage Channel
Unit of measurement
(channel 4)
Celsius/Fahrenheit/
Kelvin
Celsius Channel
Measurement range
(Pt 100 input; channel 4)
deactivated/
Pt 100/600
600 Channel
Type of measurement
(Pt 100 input; channel 4)
deactivated/
Resistance/
Thermal resistance
Resistance Channel
Reference
See also Chapter 4.3 in the Module Data Reference Manual.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-45
Parameters of standard AO
The table below gives you an overview of standard analog output parameters (see also
Chapter 4.3 in the Module Data Reference Manual).
Table 7-10 Parameters of standard AO
Parameters Range of values Default setting Efficiency range
Output range
(channel 0 to 1)
Deactivated/
+/- 20 mA/
0 ... 20 mA/
4 ... 20 mA/
+/- 10 V/
0 ... 10 V
+/- 10 V Channel
Type of output
(channel 0 to 1)
Deactivated/
U voltage/
I current
U voltage Channel

0
0 7
7
0 7
0 7
Bit
Bit
Bit
Parasitic frequency suppression integration time of channel Al 3
Parasitic frequency suppression integration time of channel Al 2
Parasitic frequency suppression integration time of channel Al 1
Measurement type of channel Al 0 (settings see byte 6)
Measuring range of channel Al 0 (settings see byte 6)
Parasitic frequency suppression integration time of channel Al 0
reserved
Unit of measure
reserved
00
B
: Celsius
01
B
: Fahrenheit
10
B
: Kelvin
Default setting: 00
B
00
B
: 2,5 ms, 400 Hz
01
B
: 16,6 ms, 60 Hz
10
B
: 20,0 ms, 50 Hz
Default setting: 10
B
reserved
Measurement type of channel Al 1 (settings see byte 6)
Measuring range of channel Al 1 (settings see byte 6)
Bit
Byte 4
Byte 3
Byte 2:
Byte 1
Byte 0


Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-46 Manual, 12/2006 , A5E00105475-07
Byte 5
Byte 6
Byte 7
Bytes 8 to 10:
Range of measurement channel Al 2 (see byte 6 for settings)
Type of measurement channel Al 2 (see byte 6 for settings)
Range of measurement channel Al 3
0H: deactivated
2H: 0 ... 20 mA
3H: 4 ... 20 mA
4H: +/- 20 mA
8H: 0 ... 10 V
9H: +/- 10 V
Default setting: 9H
0H: deactivated
1H: Voltage V
2H: Current l
3H: Current l
Default setting: 1H
Type of measurement channel Al 3
Range of measurement channel Al 4
Type of measurement channel Al 4
0H: deactivated
2H: 600 Ohm
6H: Pt 100
Default setting: 2H
0H: deactivated
6H: Resistance
15H: Thermoresistor
Default setting: 6H
reserved
7
7
7
0
0
0


7
7
0
0
Bit.-Nr.
Bit.-Nr.
Output range of channel AO 0
(setting see byte 12)
Output range of channel AO 0
(setting see byte 12)
Output range of channel AO 1
Output range of channel AO 1
0
H
: deactivated
1
H
: V voltage
3
H
: l current
Default setting: 1
H
0
H
: deactivated
2
H
: 0 ... 20 mA
3
H
: 4 ... 20 mA
4
H
: +/- 20 mA
8
H
: 0 ... 10 V
9
H
: +/- 10 V
Default setting: 9
H
Byte 11
Byte 12

Figure 7-8 Structure of record 1 for standard AI/AO (length of 13 bytes)
Parameter for technological functions
The parameters for the respective function are found in the Manual Technological Functions.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-47
7.6.4 Interrupts
Interrupt inputs
All digital inputs of the on-board I/O of CPUs 31xC can be used as interrupt inputs.
You can specify interrupt behavior for each individual input in your parameter declaration.
Options are:
no interrupt
Interrupt at the positive edge
Interrupt at the negative edge
Interrupt at the positive and negative edge



Note
Every channel will hold one event if the rate of incoming interrupts exceeds the handling
capacity of OB40. Further events (interrupts) will be lost, without diagnostics or explicit
message.

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-48 Manual, 12/2006 , A5E00105475-07
Start information for OB40
The table below shows the relevant temporary variables (TEMP) of OB40 for the interrupt
inputs of 31xC CPUs. A description of process interrupt OB 40 is found in the Reference
Manual System and Standard Functions.
Table 7-11 Start information for OB40, relating to the interrupt inputs of the integrated I/O
Byte Variables Data type Description
6/7 OB40_MDL_ADDR WORD B#16#7C Address of the interrupt-
triggering module (here: default
addresses of the digital inputs)
8 on OB40_POINT_ADDR DWORD see the figure
below
Displaying the interrupt-
triggering integrated inputs


Reserved
PRAL from l124.0
PRAL from l124.7
PRAL from l125.0
PRAL from l125.7
PRAL from l126.0
PRAL from l126.7
Bit No.
23 31

30 29 28 27 26 25 24 15 16 8 7 6 5 4 3 2 1

Figure 7-9 Displaying the statuses of CPU 31xC interrupt inputs
PRAL: process interrupt
The inputs are assigned default addresses.
7.6.5 Diagnostics
Standard I/O
Diagnostic data is not available for integrated I/O which is operated as standard I/O (see also
the Reference Manual Module Data).
Technological functions
Diagnostics options for the respective technological function are found in the Manual
Technological Functions.
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-49
7.6.6 Digital inputs
Introduction
This section provides the specifications for the digital inputs of CPUs 31xC.
The table includes the following CPUs:
under CPU 313C-2, the CPU 313C-2 DP and CPU 313C-2 PtP
under CPU 314C-2, the CPU 314C-2 DP and CPU 314C-2 PtP
Technical data
Table 7-12 Technical data of digital inputs
Technical data
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Module-specific data CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Number of inputs 10 24 16 24
Number of these inputs which can be used
for technological functions
8 12 12 16
Cable length
Unshielded For standard DI: Max. 600 m
For technological functions: No
For standard DI: Max. 1.000 m
For technological function at max. counting frequency
Shielded
100 m 100 m 100 m 50 m
Voltage, currents, potentials CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Rated load voltage L+ 24 VDC
Polarity reversal protection Yes
Number of inputs which can be controlled
simultaneously

Horizontal assembly
Up to 40 C
Up to 60 C

10
5

24
12

16
8

24
12
Vertical assembly
Up to 40C

5

12

8

12
Electrical isolation
Between channels and the backplane bus Yes
Between the channels No
Permitted potential difference
Between different circuits 75 VDC / 60 VAC
Insulation test voltage 600 VDC
Current consumption
On load voltage L+ (no-load) Max. 70 mA Max. 70 mA Max. 70 mA
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-50 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Status, interrupts, diagnostics
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Status display green LED per channel
Interrupts Yes, if the corresponding channel is configured as interrupt input
For using technological functions, please refer to the Technological
Functions Manual.
Diagnostics functions no diagnostics when operated as standard I/O
For using technological functions, please refer to the Technological
Functions Manual.
Data for the selection of an encoder for
standard DI
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Input voltage
Rated value 24 VDC
For signal "1" 15 V to 30 V
For signal "0" -3 V to 5 V
Input current
For signal "1" Typically 9 mA
Delay of standard inputs
Configurable Yes (0.1 / 0.5 / 3 / 15 ms)

You can reconfigure the input delay of the standard inputs during program
runtime. Please note that your newly set filter time may only take effect
after the previously set filter time has expired.
Rated value 3 ms
For using technological functions:
"Minimum pulse width/ minimum pause
between pulses at maximum counting
frequency"
48 s 16 s 16 s 8 s
Input characteristics curve to IEC 1131, type 1
Connection of 2wire BEROs Supported
Permitted quiescent current Max. 1.5 mA

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-51
7.6.7 Digital outputs
Introduction
This chapter contains the specifications for the digital outputs of CPUs 31xC.
The table includes the following CPUs:
under CPU 313C-2, the CPU 313C-2 DP and CPU 313C-2 PtP
under CPU 314C-2, the CPU 314C-2 DP and CPU 314C-2 PtP
Fast digital outputs
Technological functions use fast digital outputs.
Technical data
Table 7-13 Technical data of digital outputs
Technical data
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Module-specific data CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Number of outputs 6 16 16 16
2 4 4 4 Of those are fast outputs
Caution:
You cannot connect the high-speed outputs of your CPU in parallel.
Cable length
Unshielded Max. 600 m
Shielded Max. 1,000 m
Voltage, currents, potentials CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Rated load voltage L+ 24 VDC
Polarity reversal protection No
Total current of outputs (per group)

Max. 2.0 A Max. 3.0 A Max. 3.0 A Max. 3.0 A
Horizontal assembly
Up to 40C
Up to 60 C
Max. 1.5 A Max. 2.0 A Max. 2.0 A Max. 2.0 A
Vertical assembly
Up to 40C
Max. 1.5 A Max. 2.0 A Max. 2.0 A Max. 2.0 A
Electrical isolation
Between channels and the backplane bus Yes
No Yes Yes Yes Between the channels
In groups of
8 8 8
Permitted potential difference
Between different circuits 75 VDC / 60 VAC
Insulation test voltage 600 V DC
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-52 Manual, 12/2006 , A5E00105475-07
Technical data
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Current consumption
with load voltage L+ Max. 50 mA Max. 100 mA Max. 100 mA Max. 100 mA
Status, interrupts, diagnostics CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Status display green LED per channel
Interrupts no interrupts when operated as standard I/O
For using technological functions, please refer to the Technological
Functions Manual.
Diagnostics functions no diagnostics when operated as standard I/O
For using technological functions, please refer to the Technological
Functions Manual.
Data for the selection of an actuator for
standard DI
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Output voltage
For signal "1" Min. L+ (-0.8 V)
Output current
For signal "1"
Rated value
Permissible range
0.5 A
5 mA to 0.6 A
For signal "0" (residual current) Max. 0.5 mA
Load impedance range 48 to 4 k
Lamp load Max. 5 W
Parallel connection of 2 outputs
for redundant load control Supported
for performance increase Not possible
Controlling of digital inputs Supported
Switching frequency
under resistive load Max. 100 Hz
For inductive load to IEC 947-5, DC13 Max. 0.5 Hz
under lamp load Max. 100 Hz
fast outputs under resistive load Max. 2.5 kHz
Inductive breaking voltage limited internally to Typically (L+) - 48 V
Short-circuit protection of the output Yes, electronic
Response threshold Typically 1 A

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-53
7.6.8 Analog inputs
Introduction
This chapter contains the specifications for analog outputs of CPUs 31xC.
The table includes the following CPUs:
CPU 313C
CPU 314C-2 DP
CPU 314C-2 PtP
Technical data
Table 7-14 Technical data of analog inputs
Technical data
Module-specific data
Number of inputs 4 channels with current/voltage input
1 channel with resistance input
Cable length
Shielded Max. 100 m
Voltage, currents, potentials
Resistance input
No-load voltage Typically 2.5 V
Measurement current Typically 1.8 mA to 3.3 mA
Electrical isolation
Between channels and the backplane bus Yes
Between the channels No
Permitted potential difference
Between inputs (AIC) and MANA (UCM) 8.0 VDC
between MANA and Minternal (UISO) 75 VDC / 60 VAC
Insulation test voltage 600 V DC
Generation of analog values
Measurement principle Actual value encoding (successive
approximation)
Integration time/conversion time/resolution (per channel)
Configurable Yes
Integration time in ms 2.5 / 16.6 / 20
Permitted input frequency Max. 400 Hz
Resolution (including overshoot range) 11 bits + signed bit
Suppression of interference frequency f1 400 / 60 / 50 Hz
Time constant of the input filter 0:38 ms
Basic processing time 1 ms
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-54 Manual, 12/2006 , A5E00105475-07
Technical data
Noise suppression, error limits
Interference voltage suppression for f = nx (f1 1 %), (f1 = interference
frequency), n = 1.2

Commonmode interference (UCM < 1.0 V) > 40 dB
Feedback interference (peak value of the interference < rated value of
the input range)
> 30 dB
Crosstalk between the inputs > 60 dB
Operational error limits (across the temperature range, in relation to input
range)

Voltage/current < 1%
Resistance < 5%
Basic error limit (operational limit at 25 C, in relation to input range)
Voltage / current
Linearity error during measurement of current and voltage
(related to input range)
< 0.7%
0.06%
Resistance
Linearity error during resistance measurement
(related to input range)
< 3%
0.2%
Temperature error (in relation to input range) 0.006 %/K
Repeat accuracy (in transient state at 25 C, in relation to input range) 0.06 %
Status, interrupts, diagnostics
Interrupts no interrupts when operated as standard
I/O
Diagnostics functions no diagnostics when operated as
standard I/O
For using technological functions, please
refer to the Technological Functions
Manual.
Encoder selection data
Input ranges (rated value)/input resistance
Voltage 10 V/100 k
0 V to 10 V/100 k
Current 20 mA/50
0 mA to 20 mA/50
4 mA to 20 mA/50
Resistance 0 to 600 /10 M
Resistance thermometer Pt 100/10 M
Permitted continuous input voltage (destruction limit)
For voltage inputs Max. 30 V
For current inputs Max. 2.5 V
Permitted continuous input current (destruction limit)
For voltage inputs Max. 0.5 mA;
For current inputs Max. 50 mA, continuous
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-55
Technical data
Connection of signal generators

For voltage measurement supported
For current measurement
as 2-wire measuring transducer
as 4-wire measuring transducer

Possible, with external power supply
supported
for measuring resistance
with 2-conductor terminal

with 3-wire connection
with 4-wire connection

Possible, without compensation of
cable resistance
Not possible
Not possible
Linearization of the characteristics trend By software
For resistance thermometers Pt 100
Temperature compensation No
Technical unit for temperature measurement Degrees Celsius/Fahrenheit/Kelvin
7.6.9 Analog outputs
Introduction
This chapter contains the specifications for digital outputs of CPUs 31xC.
The table includes the following CPUs:
CPU 313C
CPU 314C-2 DP
CPU 314C-2 PtP
Technical data
Table 7-15 Technical data of analog outputs
Technical data
Module-specific data
Number of outputs 2
Cable length
shielded Max. 200 m
Voltage, currents, potentials
Rated load voltage L+ 24 VDC
Polarity reversal protection Yes
Electrical isolation
between channels and the backplane bus Yes
between the channels No
Permissible potential difference
between MANA and Minternal (UISO) 75 VDC / 60 VAC
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-56 Manual, 12/2006 , A5E00105475-07
Technical data
Isolation test voltage 600 VDC
Generation of analog values
Resolution (including overshoot range) 11 bits + signed bit
Conversion time (per channel) 1 ms
Settling time
with resistive load 0.6 ms
With capacitive load 1.0 ms
With inductive load 0.5 ms
Noise suppression, error limits
Crosstalk between the outputs > 60 dB
Operational error limits (across the temperature range, in relation to output
range)

Voltage / current 1%
Basic error limit (operational limit at 25 C, in relation to output range)
Voltage / current 0.7%
Temperature error (in relation to output range) 0.01 %/K
Linearity error (in relation to output range) 0.15%
Repeat accuracy (in transient state at 25 C, in relation to output range) 0.06%
Output ripple; bandwidth 0 to 50 kHz (in relation to output range) 0.1%
Status, interrupts, diagnostics
Interrupts no interrupts when operated as standard
I/O
For using technological functions, please
refer to the Technological Functions
Manual.
Diagnostics functions no diagnostics when operated as
standard I/O
For using technological functions, please
refer to the Technological Functions
Manual.
Actuator selection data
Output range (rated values)
Voltage 10 V
0 V to 10 V
Current 20 mA
0 mA to 20 mA
4 mA to 20 mA
Load resistance (within output rating)
For voltage outputs
Capacitive load
min. 1 k
Max. 0.1 F
For current outputs
Inductive load
Max. 300
0.1 mH
Voltage output
Short-circuit protection Yes
Short-circuit current Typically 55 mA
Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 7-57
Technical data
Current output
No-load voltage Typically 17 V
Destruction limit for externally applied voltages/currents
Voltage measured between the outputs and MANA Max. 16 V
Current Max. 50 mA, continuous
Connection of actuators
For voltage outputs
2-wire connection

4-wire connection (measuring line)

Possible, without compensation of
cable resistance
Not possible
For current outputs
2-wire connection

supported

Technical data of CPU 31xC
7.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Specifications
7-58 Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-1
Technical data of CPU 31x
8
8.1 General technical data
8.1.1 Dimensions of CPU 31x

Each CPU features the same height and depth, only the width dimensions differ.
Height: 125 mm
Depth: 115 mm, or 180 mm with opened front cover.
x
1
2
5
65 115

Figure 8-1 Dimensions of CPU 31x
Technical data of CPU 31x
8.1 General technical data
CPU 31xC and CPU 31x, Technical Specifications
8-2 Manual, 12/2006 , A5E00105475-07
Width of CPU

CPU Width (x)
CPU 312 40 mm
CPU 314 40 mm
CPU 315-2 DP 40 mm
CPU 315-2 PN/DP 80 mm
CPU 317-2 DP 80 mm
CPU 317-2 PN/DP 80 mm
CPU 319 120 mm
8.1.2 Technical data of the SIMATIC Micro Memory Card
Plug-in SIMATIC Micro Memory Cards
The following memory modules are available:
Table 8-1 Available SIMATIC Micro Memory Cards
Type Order number Required for a firmware update via
SIMATIC Micro Memory Card
Micro Memory Card 64 KB 6ES7 953-8LFxx-0AA0
Micro Memory Card 128 KB 6ES7 953-8LGxx-0AA0
Micro Memory Card 512 KB 6ES7 953-8LJxx-0AA0
Micro Memory Card 2 MB 6ES7 953-8LLxx-0AA0 Minimum requirement for CPUs without DP
interface
Micro Memory Card 4 MB 6ES7 953-8LMxx-0AA0 Minimum requirement for CPUs without DP
interface (except CPU 319)
Micro Memory Card 8 MB
1)
6ES7 953-8LPxx-0AA0 Minimum requirements for the CPU 319
1
If you plug in the CPU 312C or CPU 312, you cannot use this SIMATIC Micro Memory
Card.
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-3
Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Number of blocks that can be stored on the SIMATIC Micro Memory Card depends on the
capacity of the SIMATIC Micro Memory Card being used The maximum number of blocks
that can be loaded is therefore limited by the capacity of your SIMATIC Micro Memory Card
(including blocks generated with the "CREATE DB" SFC)
Table 8-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Size of SIMATIC Micro Memory Card Maximum number of blocks that can be loaded
64 KB 768
128 KB 1024
512 KB
2 MB
4 MB
8 MB
Here the maximum number of blocks that can be loaded for the
specific CPU is less than the number of blocks that can be stored on
the SIMATIC Micro Memory Card.
Refer to the corresponding specifications of a specific CPU to
determine the maximum number of blocks that can be loaded.
8.2 CPU 312
Technical data
Table 8-3 Technical data for the CPU 312
Technical data
CPU and version
Order no. [MLFB] 6ES7312-1AE13-0AB0
Hardware version 01
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
Memory
Work memory
Integrated 32 KB
Expandable No
Load memory Pluggable by means of Micro Memory Card
(max. 4 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.2 s
Word instructions Min. 0.4 s
Fixed-point arithmetic Min. 5 s
Floating-point arithmetic Min. 6 s
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
8-4 Manual, 12/2006 , A5E00105475-07
Technical data
Timers/counters and their retentive address areas
S7 counters 128
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 128
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number unlimited (limited only by work memory size)
Data areas and their retentive address areas
Bit memory 128 bytes
Retentivity Yes
Preset retentive address areas MB 0 to MB 15
Clock flag bits 8 (1 memory byte)
Data blocks 511
(in the 1 to 511 range of numbers)
Size 16 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data per priority class Max. 256 bytes
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size Max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-5
Technical data
Nesting depth

Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
FCs
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size Max. 16 KB
Address areas (I/O)
Total I/O address area
Inputs 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing)
I/O process image
Inputs 128 bytes
Outputs 128 bytes
Digital channels
Inputs Max. 256
Outputs Max. 256
Inputs, central Max. 256
Outputs, central Max. 256
Analog channels
Inputs Max. 64
Outputs Max. 64
Inputs, central Max. 64
Outputs, central Max. 64
Removal
Racks Max. 1
Modules per rack Max. 8
Number of DP masters
Integrated None
Via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 4
Time
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
8-6 Manual, 12/2006 , A5E00105475-07
Technical data
Clock
Yes (SW clock)
Buffered No
Accuracy Deviation per day < 15 s
Behavior of the realtime clock after POWER
ON
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Operating hours counter 1
Number 0
Range of values 2
31

(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
S7 message functions
Number of stations that can be logged on for
signaling functions
6
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks Max. 20
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
30
14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-7
Technical data
Communication functions
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
User data per job
Consistent data
Max. 180 bytes (with PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 6
can be used for
PG communication
Reserved (default)
Configurable
Max. 5
1
from 1 to 5
OP communication
Reserved (default)
Configurable
Max. 5
1
from 1 to 5
S7-based communication
Reserved (default)
Configurable
Max. 2
0
from 0 to 2
Routing No
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
Technical data of CPU 31x
8.2 CPU 312
CPU 31xC and CPU 31x, Technical Specifications
8-8 Manual, 12/2006 , A5E00105475-07
Technical data
MPI

Services
PG/OP communication Yes
Routing No
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No
Transmission rates 187.5 kbps
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 40 x 125 x 130
Weight 270 g
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 60 mA
Inrush current Typically 2.5 A
Power consumption (nominal value) 0.6 A
I
2
t 0.5 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 2.5 W

Technical data of CPU 31x
8.3 CPU 314
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-9
8.3 CPU 314
Technical data for the CPU 314
Table 8-4 Technical data for the CPU 314
Technical data
CPU and version
Order no. [MLFB] 6ES7314-1AG13-0AB0
Hardware version 01
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
Memory
Work memory
Integrated 96 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
64 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.1 s
Word instructions Min. 0.2 s
Fixed-point arithmetic Min. 2.0 s
Floating-point arithmetic Min. 3 s
Timers/counters and their retentive address areas
S7 counters 256
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 256
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number unlimited (limited only by work memory size)
Technical data of CPU 31x
8.3 CPU 314
CPU 31xC and CPU 31x, Technical Specifications
8-10 Manual, 12/2006 , A5E00105475-07
Technical data
Data areas and their retentive address areas
Bit memory 256 bytes
Retentivity Yes
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks
Number 511
(in the 1 to 511 range of numbers)
Size 16 KB
Non-retentive Yes
Local data per priority class Max. 510
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs See the Instruction List
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
FCs See the Instruction List
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
Address areas (I/O)
Total I/O address area
Inputs 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing)
Technical data of CPU 31x
8.3 CPU 314
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-11
Technical data
I/O process image

Inputs 128 bytes
Outputs 128 bytes
Digital channels
Inputs Max. 1024
Outputs Max. 1024
Inputs, central Max. 1024
Outputs, central Max. 1024
Analog channels
Inputs Max. 256
Outputs Max. 256
Inputs, central Max. 256
Outputs, central Max. 256
Removal
Racks Max. 4
Modules per rack 8
Number of DP masters
Integrated None
via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
Time
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Accuracy Deviation per day: < 10 s
Operating hours counter 1
Number 0
Range of values 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
Technical data of CPU 31x
8.3 CPU 314
CPU 31xC and CPU 31x, Technical Specifications
8-12 Manual, 12/2006 , A5E00105475-07
Technical data
S7 message functions
Number of stations that can log in for signaling
functions (e.g. OS)
12
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks Max. 40
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
30
14
Force Yes
Variable Inputs/outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Communication functions
PG/OP communication Yes
Global Data Communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication Yes
As server Yes
as client Yes (via CP and loadable FBs)
User data per job
Consistent data
Max. 180 (for PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections 12
Technical data of CPU 31x
8.3 CPU 314
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-13
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 11
1
1 to 11
OP communication
Reserved (default)
Configurable
Max. 11
1
1 to 11
S7-based communication
Reserved (default)
Configurable
Max. 8
0
0 to 8
Routing No
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
MPI
Services
PG/OP communication Yes
Routing No
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client
Yes
Yes
No (but via CP and loadable FBs)
Transmission rates 187.5 kbps
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 40 x 125 x 130
Weight 280 g
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-14 Manual, 12/2006 , A5E00105475-07
Technical data
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 60 mA
Inrush current Typically 2.5 A
Power consumption (nominal value) 0.6 A
I
2
t 0.5 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 2.5 W
8.4 CPU 315-2 DP
Technical data
Table 8-5 Technical data for the CPU 315-2 DP
Technical data
CPU and version
Order no. [MLFB] 6ES7315-2AG10-0AB0
Hardware version 05
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
Memory
Work memory
Integrated 128 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
128 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.1 s
Word instructions Min. 0.2 s
Fixed-point arithmetic Min. 2.0 s
Floating-point arithmetic Min. 3 s
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-15
Technical data
Timers/counters and their retentive address areas
S7 counters 256
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 256
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number unlimited (limited only by work memory size)
Data areas and their retentive address areas
Bit memory 2048 bytes
Retentivity Yes
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks
Number 1023
(in the 1 to 1023 range of numbers)
Size 16 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data capacity Max. 1024 bytes per execution level/510 bytes
per block
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs 3 (OB 55, 56, 57)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 5 (OB 80, 82, 85, 86, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-16 Manual, 12/2006 , A5E00105475-07
Technical data
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs See the instruction list
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
FCs See the instruction list
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
Address areas (I/O)
Total I/O address area
Inputs 2048 bytes (user-specific addressing)
Outputs 2048 bytes (user-specific addressing)
Distributed
Inputs
Outputs

2048 bytes
2048 bytes
Process image
Inputs 128
Outputs 128
Digital channels
Inputs Max. 16384
Outputs Max. 16384
Inputs, central Max. 1024
Outputs, central Max. 1024
Analog channels
Inputs Max. 1024
Outputs Max. 1024
Inputs, central Max. 256
Outputs, central Max. 256
Removal
Racks Max. 4
Modules per rack 8
Number of DP masters
Integrated 1
Via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-17
Technical data
Time
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Accuracy Deviation per day: < 10 s
Operating hours counter 1
Number 0
Value range 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
On DP Master/slave
(only time slave if DP slave)
S7 message functions
Number of stations that can log in for signaling
functions (e.g. OS)
16
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks 40
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
30
14
Force
Variable Inputs/outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-18 Manual, 12/2006 , A5E00105475-07
Technical data
Communication functions
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 8
Number of GD packets
Sending stations
Receiving stations
Max. 8
Max. 8
Max. 8
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication Yes
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
Max. 180 bytes (with PUT/GET)
64 byte (as the server)
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections 16
can be used for
PG communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
OP communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
S7-based communication
Reserved (default)
Configurable
Max. 12
0
0 to 12
Routing Yes (max. 4)
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-19
Technical data
MPI

Services
PG/OP communication Yes
Routing Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client
Yes
Yes
No (but via CP and loadable FBs)
Transmission rates 187.5 kbps
2nd interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Type of interface Integrated RS485 interface
Interface power supply (15 to 30 VDC) Max. 200 mA
Functionality
MPI No
PROFIBUS DP Yes
Point-to-point connection No
DP master
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode No
SYNC/FREEZE Yes
DPV1 Yes
Enable/disable DP slave Yes
Transmission speed Up to 12 Mbaud
Number of DP slaves per station 124
Address area Max. 2 KB I / max. 2 KB 0
User data per DP slave Max. 244 byte I / Max. 244 byte 0
Technical data of CPU 31x
8.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-20 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave

Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
DPV1 No
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
Programming
Programming language LAD/FBD/STL
Instruction set See the instruction list
Nesting levels 8
System functions (SFC) See the instruction list
System function blocks (SFB) See the instruction list
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 40 x 125 x 130
Weight 290 g
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 60 mA
Inrush current Typically 2.5 A
Power consumption (nominal value) 0.8 A
I
2
t 0.5 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 2.5 W

Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-21
8.5 CPU 315-2 PN/DP
Technical data
Table 8-6 Technical data for the CPU 315-2 PN/DP
Technical data
CPU and version
Order no. [MLFB] 6ES7315-2EH13-0AB0
Hardware version 01
Firmware version V 2.5
Associated programming package STEP 7 V 5.4 + SP 1 + HSP or higher
Memory
Work memory
Work memory 256 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
128 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Execution times
Processing times of
Bit operations 0.1 s
Word instructions 0.2 s
Fixed-point arithmetic 2 s
Floating-point arithmetic 3 s
Timers/counters and their retentive address areas
S7 counters 256
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC counters Yes
Type SFB
Number Unlimited
(limited only by work memory)
S7 timers 256
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-22 Manual, 12/2006 , A5E00105475-07
Technical data
IEC timers
Yes
Type SFB
Number Unlimited
(limited only by work memory)
Data areas and their retentive address areas
Bit memory 2048 bytes
Retentivity Configurable
Preset retentive address areas From MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks
Number 1023
(in the 1 to 1023 range of numbers)
Size 16 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data per priority class Max. 1024 bytes per execution level/510 bytes
per block
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs 3 (OB 55, 56, 57)
Number of process interrupt OBs 1 (OB61)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 6 (OB 80, 82, 83, 85, 86, 87)
(OB 83 for PROFINET IO)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs See the instruction list
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-23
Technical data
FCs
See the Instruction List
Number, max. 1024
(in the 0 to 2047 range of numbers)
Size 16 KB
Address areas (I/O)
Total I/O address area
Inputs 2048 bytes (user-specific addressing)
Outputs 2048 bytes (user-specific addressing)
Distributed
Inputs
Outputs

2048 bytes (user-specific addressing)
2048 bytes (user-specific addressing)
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

128 bytes
128 bytes
Number of process image partitions 1
Digital channels
Inputs max. 16384
Outputs max. 16384
Inputs, central max. 1024
Outputs, central max. 1024
Analog channels
Inputs max. 1024
Outputs max. 1024
Inputs, central max. 256
Outputs, central max. 256
Removal
Racks max. 4
Modules per rack 8
Number of DP masters
Integrated 1
Via CP 4
Operable function modules and communication processors
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-24 Manual, 12/2006 , A5E00105475-07
Technical data
Time
Clock Yes (hardware clock)
Factory setting DT#1994-01-01-00:00:00
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40 C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Behavior of the realtime clock after POWER
ON
The clock continues running after POWER OFF.
Precision Deviation per day: < 10 s
Operating hours counter 1
Number 0
Range of values 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be restarted after every restart
Time synchronization Yes
In the AS Master/slave
On MPI Master/slave
On DP Master/slave
(only time slave if DP slave)
On Ethernet over NTP Yes (as client)
S7 message functions
Number of stations that can be logged on for
signaling functions
16
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks 40
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
Max. 30
Max. 14
Force
Variable Inputs/outputs
Number of variables max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-25
Technical data
Diagnostics buffer
Yes
Number of entries (not configurable) max. 500
POWER OFF / POWER ON The last 100 entries are retentive
Communication functions
Open IE communication
Number of connections / access points, total 8
TCP/IP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length for connection type 01H, max. 1460 bytes
Data length for connection type 11H, max. 8192 bytes
ISO on TCP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 8192 bytes
UDP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 1472 bytes
PG/OP communication Yes
Global Data Communication Yes
Number of GD circuits 8
Number of GD packets
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Length of GD packets
Consistent data
max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
max. 76 bytes
76 bytes
S7 communication Yes
As server Yes
As client Yes (via integrated PN interface and loadable
FBs, or even via CP and loadable FBs)
User data per job
Consistent data
See the STEP 7 Online Help, Common
parameters of SFBs/FBs and SFC/FC of the S7
communication)
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections 16
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-26 Manual, 12/2006 , A5E00105475-07
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
OP communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
S7-based communication
Reserved (default)
Configurable
Max. 14
0
0 to 14
Routing
Interface X1 configured as
MPI
DP master
DP slave (active)
Interface X2 configured as PROFINET
Yes

Max. 10
Max. 24
Max. 14
Max. 24
CBA
Reference setting for CPU communication 50%
Number of remote interconnecting partners 32
Number of master/slave functions 30
Total of all master/slave connections 1000
Data length of all incoming
master/slave connections, max.
4000 bytes
Data length of all outgoing
master/slave connections, max.
4000 bytes
Number of device-internal and PROFIBUS
interconnections
500
Data length of the device-internal and PROFIBUS
interconnections, max.
4000 bytes
Data length per connection, max. 1400 bytes
Remote interconnections with acyclical
transmission

Scan rate: Scan interval, min. 500 ms
Number of incoming interconnections 100
Number of outgoing interconnections 100
Data length of all incoming interconnections,
max.
2000 bytes
Data length of all outgoing interconnections,
max.
2000 bytes
Data length per connection, (acyclic
interconnections), max.
1400 bytes
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-27
Technical data
Remote interconnections with cyclical
transmission

Transmission frequency: Minimum
transmission interval
10 ms
Number of incoming interconnections 200
Number of outgoing interconnections 200
Data length of all incoming interconnections,
max.
2000 bytes
Data length of all outgoing interconnections,
max.
2000 bytes
Data length per connection, (acyclic
interconnections), max.
450 bytes
HMI variables via PROFINET (acyclic)
Update HMI variables 500 ms
Number of stations that can be logged on for
HMI variables (PN OPC/iMAP)
2xPN OPC/1x iMAP
Number of HMI variables 200
Data length of all HMI variables, max. 2000 bytes
PROFIBUS proxy functionality
supported Yes
Number of coupled PROFIBUS devices 16
Data length per connection, max. 240 bytes (slave dependent)
interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Interface power supply
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
Point-to-point connection No
PROFINET No
MPI
Services
PG/OP communication Yes
Routing Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client
Yes
Yes
No (but via CP and loadable FBs)
Transmission rates Max. 12 Mbaud
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-28 Manual, 12/2006 , A5E00105475-07
Technical data
DP Master

Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
SYNC/FREEZE Yes
DPV1 Yes
Isochronous mode Yes (OB 61)
Enabling/disabling the DP slave Yes
Transmission speed Up to 12 Mbaud
Number of DP slaves 124
Address area max. 2 KB I / max. 2 KB 0
User data per DP slave max. 244 KB I / max. 244 KB 0
DP slave
Services
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
DPV1 No
2nd interface
Type of interface PROFINET
Physics Ethernet
RJ 45
Electrically isolated Yes
Autosensing (10/100 Mbaud) Yes
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
Point-to-point connection No
Technical data of CPU 31x
8.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-29
Technical data
Services
PG communication Yes
OP communication Yes
S7 communication
Max. configurable interconnections
Maximum number of instances
Yes (with loadable FBs)
14
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
Open IE communication
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
PROFINET IO
Number of integrated PROFINET IO controllers 1
Number of connectable PROFINET IO devices 128
Enabling / disabling PROFINET IO devices Yes
Max. user data consistency with PROFINET IO 256 bytes
Update Time 1 ms to 512 ms
The minimum value is determined by the set
communication portion for PROFINET IO, the
number of IO devices and the amount of
configured user data.
Send clock 1 ms
Routing Yes
S7 protocol functions
PG functions Yes
OP functions Yes
Open IE communication
Over TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the instruction list
System function blocks (SFB) See the instruction list
User program protection Yes
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-30 Manual, 12/2006 , A5E00105475-07
Technical data
Dimensions

Mounting dimensions W x H x D (mm) 80 x 125 x 130
Weight 460 g
Voltages, currents
Power supply (rated value) 24 VDC
Permitted range 20.4 V to 28.8 V
Current consumption (no-load operation), typically 100 mA
Power consumption (nominal value), typically 650 mA
Inrush current Typically 2.5 A
I
2
t Min. 1 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 3.5 W
8.6 CPU 317-2 DP
Table 8-7 Technical data for the CPU 317-2 DP
Technical data
CPU and version
Order no. [MLFB] 6ES7317-2AJ10-0AB0
Hardware version 01
Firmware version V 2.5
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
Memory
Work memory
Integrated 512 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
max. 256 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Execution times
Processing times of
Bit operations 0.05 s
Word instructions 0.2 s
Fixed-point arithmetic 0.2 s
Floating-point arithmetic 1.0 s
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-31
Technical data
Timers/counters and their retentive address areas
S7 counters 512
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC counters Yes
Type SFB
Number Unlimited
(limited only by working memory)
S7 timers 512
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number Unlimited
(limited only by working memory)
Data areas and their retentive address areas
Bit memory 4096 bytes
Retentivity Configurable
Preset retentive address areas From MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks
Number 2047
(in the 1 to 2047 range of numbers)
Size 64 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data per priority class max. 1024 bytes
Blocks
Total 2048 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the instruction list
Size 64 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 2 (OB 20, 21)
Number of watchdog interrupts 4 (OB 32, 33, 34, 35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs 3 (OB 55, 56, 57)
Number of process interrupt OBs 1 (OB 61)
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-32 Manual, 12/2006 , A5E00105475-07
Technical data
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 5 (OB 80, 82, 85, 86, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 16
Additional within an error OB 4
FBs See the instruction list
Number, max. 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
FCs See the instruction list
Number 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
Address areas (I/O)
Total I/O address area
Inputs max. 8192 bytes (user-specific addressing)
Outputs max. 8192 bytes (user-specific addressing)
Distributed
Inputs
Outputs

max. 8192 bytes
max. 8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
Number of process image partitions 1
Digital channels
Inputs max. 65636
Outputs max. 65636
Inputs, central max. 1024
Outputs, central max. 1024
Analog channels
Inputs max. 4096
Outputs max. 4096
Inputs, central max. 256
Outputs, central max. 256
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-33
Technical data
Removal
Racks max. 4
Modules per rack 8
Number of DP masters
Integrated 2
Via CP 4
Operable function modules and communication processors
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
Time
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40 C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Precision Deviation per day: < 10 s
Operating hours counter 4
Number 0 to 3
Range of values 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master/slave
On MPI Master/slave
On DP Master/slave
(only time slave if DP slave)
S7 message functions
Number of stations that can be logged on for
signaling functions
32
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks 60
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
max. 30
max. 14
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-34 Manual, 12/2006 , A5E00105475-07
Technical data
Force
Variable Inputs/outputs
Number of variables max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) max. 100
Communication functions
PG/OP communication Yes
Global Data Communication Yes
Number of GD circuits 8
Number of GD packets
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Length of GD packets
Consistent data
max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
max. 76 bytes
76 bytes (for X_SEND or X_RCV)
76 bytes (for X_PUT or X_GET as the server)
S7 communication Yes
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
max. 180 bytes (with PUT/GET)
160 byte (as the server)
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections 32
Can be used for
PG communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
OP communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
S7-based communication
Reserved (default)
Configurable
Max. 30
0
0 to 30
Routing Yes (max. 8)
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-35
Technical data
interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Interface power supply
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
Point-to-point connection No
MPI
Services
PG/OP communication Yes
Routing Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client

Yes
No (but via CP and loadable FBs)
Transmission rates Max. 12 Mbaud
DP Master
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode No
Enable/disable DP slaves Yes
SYNC/FREEZE Yes
DPV1 Yes
Transmission rate Up to 12 Mbaud
Number of DP slaves 124
Address area max. 8 KB I / 8 KB O
User data per DP slave max. 244 bytes I / 244 bytes O
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
8-36 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave
(except for DP slave at both interfaces)
Services
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas max. 32, max. 32 bytes each
DPV1 No
2nd interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Type of interface Integrated RS485 interface
Interface power supply (15 to 30 VDC) max. 200 mA
Functionality
MPI No
PROFIBUS DP Yes
Point-to-point connection No
DP Master
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode Yes (OB61)
Enable/disable DP slaves Yes
SYNC/FREEZE Yes
DPV1 Yes
Transmission rate Up to 12 Mbps
Number of DP slaves 124
Address area max. 8 KB I / 8 KB O
User data per DP slave max. 244 bytes I / 244 bytes O
Technical data of CPU 31x
8.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-37
Technical data
DP slave
(except for DP slave at both interfaces)
Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbps
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas max. 32, max. 32 bytes each
DPV1 No
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
Programming
Programming language LAD/FBD/STL
Instruction set See the instruction list
Nesting levels 8
System functions (SFC) See the instruction list
System function blocks (SFB) See the instruction list
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 80 x 125 x 130
Weight 460 g
Voltages, currents
Power supply (rated value) 24 VDC
Permitted range 20.4 V to 28.8 V
Current consumption (no-load operation),
typically
Typically 100 mA
Power consumption (nominal value), typically ???????
Inrush current Typically 2.5 A
I
2
t 1 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 4 W

Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-38 Manual, 12/2006 , A5E00105475-07
8.7 CPU 317-2 PN/DP
Technical data
Table 8-8 Technical data for the CPU 317-2 PN/DP
Technical data
CPU and version
Order no. [MLFB] 6ES7317-2EK13-0AB0
Hardware version 01
Firmware version V 2.5
Associated programming package STEP 7 V 5.4 + SP 1 + HSP or higher
Memory
Work memory
Work memory 1024 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
256 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Execution times
Processing times of
Bit operations 0.05 s
Word instructions 0.2 s
Fixed-point arithmetic 0.2 s
Floating-point arithmetic 1.0 s
Timers/counters and their retentive address areas
S7 counters 512
Retentivity Configurable
Default From C0 to C7
Counting range 0 to 999
IEC counters Yes
Type SFB
Number Unlimited
(limited only by working memory)
S7 timers 512
Retentivity Configurable
Default Not retentive
Timer range 10 ms to 9990 s
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-39
Technical data
IEC timers
Yes
Type SFB
Number Unlimited
(limited only by work memory)
Data areas and their retentive address areas
Bit memory 4096 bytes
Retentivity Configurable
Preset retentive address areas From MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks
Number 2047
(in the 1 to 2047 range of numbers)
Size 64 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data per priority class max. 1024 bytes
Blocks
Total 2048 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size 64 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 2 (OB 20, 21)
Number of watchdog interrupts 4 (OB 32, 33, 34, 35)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1 interrupt OBs 3 (OB 55, 56, 57)
Number of process interrupt OBs 1 (OB61)
Number of startup OBs 1 (OB100)
Number of asynchronous error OBs 6 (OB 80, 82, 83, 85, 86, 87)
(OB83 for PROFINET IO)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 16
Additional within an error OB 4
FBs See the instruction list
Number, max. 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-40 Manual, 12/2006 , A5E00105475-07
Technical data
FCs
See the Instruction List
Number, max. 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
Address areas (I/O)
Total I/O address area
Inputs max. 8192 bytes (user-specific addressing)
Outputs max. 8192 bytes (user-specific addressing)
Distributed
Inputs
Outputs

max. 8192 bytes
max. 8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
Number of process image partitions 1
Digital channels
Inputs max. 65536
Outputs max. 65536
Inputs, central max. 1024
Outputs, central max. 1024
Analog channels
Inputs max. 4096
Outputs max. 4096
Inputs, central max. 256
Outputs, central max. 256
Removal
Racks max. 4
Modules per rack 8
Number of DP masters
Integrated 1
Via CP 4
Operable function modules and communication processors
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-41
Technical data
Time
Clock Yes (hardware clock)
Factory setting DT#1994-01-01-00:00:00
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40 C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Behavior of the realtime clock after POWER
ON
The clock continues running after POWER OFF.
Precision Deviation per day: < 10 s
Operating hours counter 4
Number 0 to 3
Value range 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master/slave
On MPI Master/slave
On DP Master/slave
(only time slave if DP slave)
On Ethernet via NTP Yes (as client)
S7 message functions
Number of stations that can be logged on for
signaling functions
32
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks 60
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
30
max. 30
max. 14
Force
Variable Inputs/outputs
Number of variables max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-42 Manual, 12/2006 , A5E00105475-07
Technical data
Diagnostics buffer
Yes
Number of entries (not configurable) max. 500
POWER OFF / POWER ON The last 100 entries are retentive
Communication functions
Open IE communication
Number of connections / access points, total 8
TCP/IP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length for connection type 01H, max. 1460 bytes
Data length for connection type 11H, max. 8192 bytes
ISO on TCP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 8192 bytes
UDP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 1472 bytes
PG/OP communication Yes
Global Data Communication Yes
Number of GD circuits 8
Number of GD packets
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Length of GD packets
Consistent data
max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
max. 76 bytes
76 bytes
S7 communication Yes
As server Yes
As client Yes (via integrated PN interface and loadable
FBs, or even via CP and loadable FBs)
User data per job
Consistent data
See the STEP 7 Online Help, Common
parameters of SFBs/FBs and SFC/FC of the S7
communication)
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections 32
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-43
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
OP communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
S7-based communication
Reserved (default)
Configurable
Max. 30
0
0 to 30
Routing
Interface X1 configured as
MPI
DP master
DP slave (active)
Interface X2 configured as
PROFINET

Yes
Max. 10
Max. 24
Max. 14

Max. 24
CBA
Reference setting for CPU communication 50%
Number of remote interconnecting partners 32
Number of master/slave functions 30
Total of all master/slave connections 1000
Data length of all incoming
master/slave connections, max.
4000 bytes
Data length of all outgoing
master/slave connections, max.
4000 bytes
Number of device-internal and PROFIBUS
interconnections
500
Data length of the device-internal and PROFIBUS
interconnections, max.
4000 bytes
Data length per connection, max. 1400 bytes
Remote interconnections with acyclic
transmission

Scan rate: Scan interval, min. 500 ms
Number of incoming interconnections 100
Number of outgoing interconnections 100
Data length of all incoming interconnections,
max.
2000 bytes
Data length of all outgoing interconnections,
max.
2000 bytes
Data length per connection, (acyclic
interconnections), max.
1400 bytes
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-44 Manual, 12/2006 , A5E00105475-07
Technical data
Remote interconnections with cyclical
transmission

Transmission frequency: Minimum
transmission interval
10 ms
Number of incoming interconnections 200
Number of outgoing interconnections 200
Data length of all incoming interconnections,
max.
2000 bytes
Data length of all outgoing interconnections,
max.
2000 bytes
Data length per connection, (acyclic
interconnections), max.
450 bytes
HMI variables via PROFINET (acyclic)
Update HMI variables 500 ms
Number of stations that can be logged on for
HMI variables (PN OPC/iMAP)
2xPN OPC/1x iMAP
Number of HMI variables 200
Data length of all HMI variables, max. 2000 bytes
PROFIBUS proxy functionality
supported Yes
Number of coupled PROFIBUS devices 16
Data length per connection, max. 240 bytes (slave dependent)
interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Interface power supply
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
Point-to-point connection No
PROFINET No
MPI
Services
PG/OP communication Yes
Routing Yes
Global data communication Yes
S7 basic communication Yes
S7 communication
As server
As client
Yes
Yes
No (but via CP and loadable FBs)
Transmission rates Max. 12 Mbaud
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-45
Technical data
DP Master

Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode Yes (OB61)
Enable/disable DP slave Yes
SYNC/FREEZE Yes
DPV1 Yes
Transmission speed Up to 12 Mbaud
Number of DP slaves 124
Address area max. 8 KB I / 8 KB O
User data per DP slave Max. 244 bytes I / 244 bytes O
DP slave
Services
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
DPV1 No
2nd interface
Type of interface PROFINET
Physics Ethernet
RJ45
Electrically isolated Yes
Autosensing (10/100 Mbaud) Yes
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
Point-to-point connection No
Technical data of CPU 31x
8.7 CPU 317-2 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-46 Manual, 12/2006 , A5E00105475-07
Technical data
Services
PG communication Yes
OP communication Yes
S7 communication
Max. configurable interconnections
Maximum number of instances
Yes (with loadable FBs)
16
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
Open IE communication
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
PROFINET IO
Number of integrated PROFINET IO controllers 1
Number of connectable PROFINET IO devices 128
Enabling / disabling PROFINET IO devices Yes
Max. user data consistency with PROFINET IO 256 bytes
Update Time 1 ms to 512 ms
The minimum value is determined by the set
communication portion for PROFINET IO, the
number of IO devices and the amount of
configured user data.
Send clock 1 ms
S7 protocol functions
PG functions Yes
OP functions Yes
Open IE communication
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the instruction list
System function blocks (SFB) See the instruction list
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 80 x 125 x 130
Weight 460 g
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-47
Technical data
Voltages, currents
Power supply (rated value) 24 VDC
Permitted range 20.4 V to 28.8 V
Current consumption (no-load operation),
typically
100 mA
Power consumption (nominal value), typically 650 mA
Inrush current Typically 2.5 A
I
2
t Min. 1 A
2
s
External fusing of power supply lines
(recommended)
min. 2 A
Power loss Typically 3.5 W
8.8 CPU 319-3 PN/DP
Technical data
Table 8-9 Technical data for the CPU 319-3 PN/DP
Technical data
CPU and version
Order no. [MLFB] 6ES7318-3EL00-0AB0
Hardware version 01
Firmware version V 2.5
Associated programming package STEP 7 V5.4 + SP1 + HSP or higher
Memory / backup
Work memory
Work memory, integrated 1400 KB
Work memory, expandable No
Capacity of the retentive memory for retentive
data blocks
700 KB
Load memory Pluggable by means of Micro Memory Card
(max. 8 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Up to 700 Kbytes (maintenance-free)
Execution times
Processing times of
Bit instructions, min. 0.01 s
Word instructions, min. 0.02 s
Fixed-point arithmetic, min. 0.02 s
Floating-point arithmetic, min. 0.1 s
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-48 Manual, 12/2006 , A5E00105475-07
Technical data
Timers/counters and their retentive address areas
S7 counters
Number 2048
Retentive address areas, configurable Yes
Retentive address areas, preset From C0 to C7
Counting range 0 to 999
IEC Counters
Available Yes
Type SFB
Number Unlimited
(limited only by working memory)
S7 timers
Number 2048
Retentive address areas, configurable Yes
Retentive address areas, preset Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
Number Unlimited
(limited only by work memory)
Data areas and their retentive address areas
Bit memory
Number 8192 bytes
Retentive address areas, configurable MB 0 to MB 8191
Preset retentive address areas MB 0 to MB15
Number of clock memories 8 (1 memory byte)
Data blocks
Number 4095
(in 1 to 4095 range of numbers)
Size 64 KB
Non-retain support (configurable retentive
address areas)
Yes
Local data per priority class, max. 1024 bytes
Blocks
Total number of blocks 4096 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
Size, max. 64 KB
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-49
Technical data
OBs
See the Instruction List
Size, max. 64 KB
Number of free cycle OBs 1 (OB 1)
Number of time-of-day-interrupt OBs 1 (OB 10)
Number of delay interrupt OBs 2 (OB 20, 21)
Number of cyclic interrupt OBs 4 (OB 32, 33, 34, 35)
(OB 35: smallest configurable clock = 500 s)
Number of process interrupt OBs 1 (OB 40)
Number of DPV1-interrupt OBs (only DP-
CPUs)
3 (OB 55, 56, 57)
Number of synchronous cycle interrupt OBs 1 (OB 61)
Number of asynchronous error interrupts 6 (OB 80, 82, 83, 85, 86, 87)
(OB83 only for PROFINET IO)
Number of startup OBs 1 (OB 100)
Number of synchronous error interrupt OBs 2 (OB 121, 122)
Nesting depth
Per priority class 16
Additional within an error OB 4
FBs See the Instruction List
Number, max. 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
FCs See the Instruction List
Number, max. 2048
(in the 0 to 2047 range of numbers)
Size 64 KB
Address areas (I/O)
Total I/O address area
Inputs 8192 bytes
Outputs 8192 bytes
Distributed
Inputs
Outputs

8192 bytes
8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
Number of process image partitions 1
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-50 Manual, 12/2006 , A5E00105475-07
Technical data
Digital channels

Inputs 65536
Outputs 65536
Inputs, central 1024
Outputs, central 1024
Analog channels
Inputs 4096
Outputs 4096
Inputs, central 256
Outputs, central 256
Removal
Racks, max. 4
Modules per rack, max. 8
Number of DP masters
Integrated 2
Via CP 4
Operable function modules and communication
processors

FM 8
CP (PtP) 8
CP (LAN) 10
Time
Clock
Hardware clock Yes
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40C)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Behavior of the realtime clock after POWER
ON
The clock continues running after POWER OFF.
Accuracy Deviation per day: < 10 s
Operating hours counter
Number 4
Number 0 to 3
Value range 0 to 2
31
hours
(using the SFC 101)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-51
Technical data
Time synchronization

supported Yes
In the AS Master/slave
On MPI Master/slave
On DP Master/slave
(only time slave if DP slave)
on Ethernet via NTP Yes (as client)
S7 message functions
Number of stations that can be logged on for
signaling functions
32
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks 60
Test and startup functions
Status/control variables
Status/control variables Yes
Variables Inputs, outputs, memory bits, DBs, timers,
counters
Maximum number of variables 30
Number of variables
status variables, max.

30
Number of variables
control variables, max.

14
Force
Force Yes
Force, variables Inputs/outputs
Force, maximum number of variables 10
Block status Yes
Single-step Yes
Number of breakpoints 2
Diagnostics buffer
Available Yes
Maximum number of entries 500
POWER OFF / POWER ON The last 100 entries are retentive
Communication functions
Open IE communication
Number of connections / access points, total 8
TCP/IP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length for connection type 01H, max. 1460 bytes
Data length for connection type 11H, max. 8192 bytes
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-52 Manual, 12/2006 , A5E00105475-07
Technical data
ISO on TCP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 8192 bytes
UDP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length, max. 1472 bytes
PG/OP communication Yes
Routing Yes
Global data communication Yes
supported Yes
Number of GD circuits, max. 8
Number of GD packets, max. 8
Number of GD packets, sender, max. 8
Number of GD packets, receiver, max. 8
Size of GD packets, max. 22 bytes
Size of GD packets, consistent, max. 22 bytes
S7 basic communication
supported Yes
User data per job, max. 76 bytes
User data per job, consistent, max. 76 bytes (for X_SEND or X_RCV), 64 bytes (for
X_PUT or X_GET as the server)
S7 communication
supported Yes
As server Yes
As client Yes (via integrated PN interface and loadable
FBs, or even via CP and loadable FBs)
User data per job
Consistent data
See the STEP 7 Online Help, Common
parameters of SFBs/FBs and SFC/FC of the S7
communication)
S5compatible communication
supported Yes (via CP and loadable FCs)
Number of connections
Total 32
usable for PG communication 31
PG communication, reserved 1
PG communication, configurable, max. 31
usable for OP communication 31
OP communication, reserved 1
OP communication, configurable, max. 31
usable for S7 basic communication 30
S7 basic communication, reserved 0
S7 basic communication, configurable, max. 30
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-53
Technical data
PROFINET CBA
Reference setting for the CPU communication
load
20%
Number of remote interconnecting partners 32
Number of master/slave functions 50
Total of all master/slave connections 3000
Data length of all incoming master/slave
connections, max.
24,000 bytes
Data length of all outgoing master/slave
connections, max.
24,000 bytes
Number of device-internal and PROFIBUS
interconnections
1000
Data length of the device-internal and PROFIBUS
interconnections, max.
8000 bytes
Data length per connection, max. 1400 bytes
Remote interconnections with acyclical
transmission

Scan rate: Scan interval, min. 200 ms
Number of incoming interconnections 100
Number of outgoing interconnections 100
Data length of all incoming interconnections,
max.
3200 bytes
Data length of all outgoing interconnections,
max.
3200 bytes
Data length per connection, (acyclic
interconnections), max.
1400 bytes
Remote interconnections with cyclical
transmission

Transmission frequency: Minimum
transmission interval
1 ms
Number of incoming interconnections 300
Number of outgoing interconnections 300
Data length of all incoming interconnections,
max.
4800 bytes
Data length of all outgoing interconnections 4800 bytes
Data length per connection, (acyclic
interconnections), max.
250 bytes
HMI variables via PROFINET (acyclic)
Update HMI variables 500 ms
Number of stations that can be logged on for
HMI variables (PN OPC/iMap)
2xPN OPC / 1x iMap
Number of HMI variables 600
Data length of all HMI variables, max. 9600 bytes
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-54 Manual, 12/2006 , A5E00105475-07
Technical data
PROFIBUS proxy functionality

supported Yes
Number of coupled PROFIBUS devices 32
Data length per connection, max. 240 bytes (slave dependent)
interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Interface power supply
(15 to 30 VDC)
Max. 150 mA
Functionality
MPI Yes
DP master Yes
DP slave Yes
Point-to-point connection No
MPI
Services
PG/OP communication Yes
Routing Yes
Global data communication Yes
S7 basic communication Yes
S7 communication, as server Yes
S7 communication, as client No (but via CP and loadable FBs)
Transmission rates Max. 12 Mbits/s
DP master
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time support Yes
Isochronous mode No
Enable/disable DP slaves Yes
SYNC/FREEZE Yes
DPV1 Yes
Transmission speed Max. 12 Mbits/s
Number of DP slaves Max. 124
Address area Max. 8 KB I / 8 KB O
User data per DP slave Max. 244 bytes I / 244 bytes O
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-55
Technical data
DP slave (except for DP slave at both DP interfaces)
Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
DPV1 No
Transmission rates Up to 12 Mbits/s
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory
Inputs 244 bytes
Outputs 244 bytes
Address areas Max. 32, max. 32 bytes each
2nd interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated Yes
Interface power supply (15 to 30 VDC) Max. 200 mA
Functionality
MPI No
DP master Yes
DP slave Yes
Point-to-point connection No
DP master
Services
PG/OP communication Yes
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time Yes
Isochronous mode Yes (OB61)
Enable/disable DP slaves Yes
SYNC/FREEZE Yes
DPV1 Yes
Transmission speed Up to 12 Mbaud
Number of DP slaves 124
Address area Max. 8 KB I / 8 KB O
User data per DP slave Max. 244 bytes I / 244 bytes O
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-56 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave (except for DP slave at both DP interfaces)
Services
PG/OP communication Yes
Routing Yes (only if interface is active)
Global data communication No
S7 basic communication No
S7 communication Yes (only server; configured unilateral
connection)
Direct data exchange Yes
DPV1 No
Transmission rates Up to 12 Mbaud
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
3rd. interface
Type of interface PROFINET
Physics Ethernet
RJ45
Electrically isolated Yes
Autosensing (10/100 Mbaud) Yes
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
Point-to-point connection No
Services
PG/OP communication Yes
S7 communication
Max. configurable interconnections
Maximum number of instances
Yes
16
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
Open IE communication
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 8-57
Technical data
PROFINET IO
Number of integrated PROFINET IO controllers 1
Number of connectable PROFINET IO devices 256
Enabling / disabling PROFINET IO devices Yes
Max. user data consistency with PROFINET IO 256 bytes
Update Time 250 s to 128 ms (at send clock 250 s)
500 s to 256 ms (at send clock 500 s)
1 ms to 512 ms (at send clock 1 ms)
The minimum update time is determined by the
time slice set for PROFINET IO communication,
by the number of IO devices used, and by the
amount of configured user data.
Send clock 250 s, 500 s, 1 ms
PROFINET CBA
Acyclic transfer Yes
Cyclic transfer Yes
GSD file The latest GSD file is available at:
http://www.automation.siemens.com/csi/gsd
CPU/Programming
Programming language STEP 7 as of V5.3
LAD Yes
FBD Yes
STL Yes
SCL Yes
CFC Yes
GRAPH Yes
HiGraph Yes
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Dimensions
Mounting dimensions W x H x D (mm) 120 x 125 x 130
Weight 1250 g
Supply voltage
Power supply (rated value) 24 VDC
Lower limit of admissible range (DC) 20.4 V
Upper limit of admissible range (DC) 28.8 V
Voltages and currents
External fusing of power supply lines
(recommended)
min. 2 A
Current consumption
Making current, typically 4 A
I
2
t 1.2 A
2
s
Current consumption (no-load operation),
typically
0.4 A
Power consumption (nominal value), typically 1.05 A
Power loss, typically 14 W

Technical data of CPU 31x
8.8 CPU 319-3 PN/DP
CPU 31xC and CPU 31x, Technical Specifications
8-58 Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 A-1
Appendix
A
A.1 Information about upgrading to a CPU 31xC or CPU 31x
A.1.1 Scope
Who should read this information?
You are already using a CPU from the SIEMENS S7-300 series and now want to upgrade to
a new device.
Please note that problems may occur while downloading your user program to the "new"
CPU.
If you have used one of the following CPUs in the past ...

as of version CPU Order number
Firmware
CPU 312 IFM 6ES7 312-5AC02-0AB0
6ES7 312-5AC82-0AB0
V1.0.0
CPU 313 6ES7 313-1AD03-0AB0 V1.0.0
CPU 314 6ES7 314-1AE04-0AB0
6ES7 314-1AE84-0AB0
V1.0.0
CPU 314 IFM 6ES7 314-5AE03-0AB0 V1.0.0
CPU 314 IFM 6ES7 314-5AE83-0AB0 V1.0.0
CPU 315 6ES7 315-1AF03-0AB0 V1.0.0
CPU 315-2 DP 6ES7 315-2AF03-0AB0
6ES7 315-2AF83-0AB0
V1.0.0
CPU 316-2 DP 6ES7 316-2AG00-0AB0 V1.0.0
CPU 318-2 DP 6ES7 318-2AJ00-0AB0 V3.0.0
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
A-2 Manual, 12/2006 , A5E00105475-07
... then please note if you upgrade to one of the following CPUs

as of version CPU Order number
Firmware
Hereafter called
312 6ES7312-1AE13-0AB0 V2.6
312C 6ES7312-5BE03-0AB0 V2.6
313C 6ES7313-5BF03-0AB0 V2.6
313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
313C-2 DP 6ES7313-6CF03-0AB0 V2.6
314 6ES7314-1AG13-0AB0 V2.6
314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
314C-2 DP 6ES7314-6CG03-0AB0 V2.6
315-2 DP 6ES7315-2AG10-0AB0 V2.6
315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
317-2 DP 6ES7317-2AJ10-0AB0 V2.5
317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
319-3 PN/DP 6ES7318-3EL00-0AB0 V2.5
CPU 31xC/31x
Reference
If you intend to migrate from PROFIBUS DP to PROFINET, we also recommend the
following manual: Programming manual From PROFIBUS DP to PROFINET IO
See also
DPV1 (Page 3-53)
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 A-3
A.1.2 Changed behavior of certain SFCs
SFC 56, SFC 57 and SFC 13 which work asynchronously
Some of the SFCs that work asynchronously, when used on CPUs 312IFM 318-2 DP, were
always, or under certain conditions, processed after the first call ("quasi-synchronous").
On the 31xC/31x CPUs these SFCs actually run asynchronously. Asynchronous processing
may cover multiple OB1 cycles. As a result, a wait loop may turn into an endless loop within
an OB.
The following SFCs are affected:
SFC 56 "WR_DPARM"; SFC 57 "PARM_MOD"
On CPUs 312 IFM to 318-2 DP, these SFCs always work "quasi-synchronously" during
communication with centralized I/O modules and always work synchronously during
communication with distributed I/O modules.



Note
If you are using SFC 56 "WR_DPARM" or SFC 57 "PARM_MOD", you should always
evaluate the SFC's BUSY bit.


SFC 13 "DPNRM_DG"
On CPUs 312 IFM to 318-2 DP, this SFC always works "quasi synchronously" when it is
called in OB82. On CPUs 31xC/31x it generally works asynchronously.



Note
In the user program, the job should merely be started in OB 82. The data should be
evaluated in the cyclical program, taking account of the BUSY bits and the value returned
in RET_VAL.


Hint
If you are using a CPU 31xC/31x, we recommend that you use SFB 54, rather than SFC
13 "DPNRM_DG".
SFC 20 "BLKMOV"
In the past, this SFC could be used with CPUs 312 IFM to 318-2 DP to copy data from a non
runtime-related DB.
SFC 20 no longer has this functionality with CPUs 31xC/31x. SFC83 "READ_DBL" is now
used instead.
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
A-4 Manual, 12/2006 , A5E00105475-07
SFC 54 "RD_DPARM"
This SFC is no longer available on CPUs 31xC/31x. Use SFC 102 "RD_DPARA" instead,
which works asynchronously.
SFCs that may return other results
You can ignore the following points if you only use logical addressing in your user program.
When using address conversion in your user program (SFC 5 "GADR_LGC",
SFC 49 "LGC_GADR"), you must check the assignment of the slot and logical start address
for your DP slaves.
In the past, the diagnostic address of a DP slave was assigned to the slave's virtual slot
2. Since DPV1 was standardized, this diagnostic address has been assigned to virtual
slot 0 (station proxy) for CPUs 31xC/31x.
If the slave has modeled a separate slot for the interface module (e.g. CPU31x-2 DP as
an intelligent slave or IM 153), then its address is assigned to slot 2.
Activating / deactivating DP slaves via SFC 12
With CPUs 31xC/31x, slaves that were deactivated via SFC 12 are no longer automatically
activated at the RUN to STOP transition. Now they are not activated until they are restarted
(STOP to RUN transition).
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP
Interrupt events from distributed I/Os while the CPU status is in STOP
With the new DPV1 functionality (IEC 61158/ EN 50170, volume 2, PROFIBUS), the
handling of incoming interrupt events from the distributed I/Os while the CPU status is in
STOP has also changed.
Previous response by the CPU with STOP status
With CPUs 312IFM 318-2 DP, initially an interrupt event was noticed while the CPU was in
STOP mode. When the CPU status subsequently returned to RUN, the interrupt was then
fetched by an appropriate OB (e.g. OB 82).
New response by the CPU
With CPUs 31xC/31x, an interrupt event (process or diagnostic interrupt, new DPV1
interrupts) is acknowledged by the distributed I/O while the CPU is still in STOP status, and
is entered in the diagnostic buffer if necessary (diagnostic interrupts only). When the CPU
status subsequently returns to RUN, the interrupt is no longer fetched by the OB. Possible
slave faults can be read using suitable SSL queries (e.g. read SSL 0x692 via SFC51).
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 A-5
A.1.4 Runtimes that change while the program is running
Runtimes that change while the program is running
If you have created a user program that has been fine-tuned in relation to certain processing
times, please note the following points if you are using a CPU 31xC/31x:
the program will run much faster on the CPU 31xC/31x.
Functions that require MMC access (e.g. system start-up time, program download in
RUN, return of DP station, etc), may sometimes run slower on the CPU 31xC/31x.
A.1.5 Converting the diagnostic addresses of DP slaves
Converting the diagnostic addresses of DP slaves
If you are using a CPU 31xC/31x with DP interface as the master, please note that you may
have to reassign the diagnostic addresses for the slaves since the changes to the DPV1
standard sometimes require two diagnostic addresses per slave.
The virtual slot 0 has its own address (diagnostic address of the station proxy). The
module status data for this slot (read SSL 0xD91 with SFC 51 "RDSYSST") contains IDs
that relate to the entire slave/station, e.g., the station error ID. Failure and restoration of
the station are also signaled in OB86 on the master via the diagnostic address of the
virtual slot 0.
At some of the slaves the interface module is also modeled as a separate virtual slot (for
example, CPU as an intelligent slave or IM153), and a suitable separate address is
assigned to virtual slot 2.
The change of operating status is signaled in the master's diagnostic interrupt OB 82 via
this address for CPU 31xC-2DP acting as an intelligent slave.


Note
Reading diagnostics data with SFC 13 "DPNRM_DG":
The originally assigned diagnostics address still works. Internally, STEP 7 assigns this
address to slot 0.

When using SFC51 "RDSYSST", for example, to read module status information or module
rack/station status information, you must also consider the change in slot significance as well
as the additional slot 0.
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
A-6 Manual, 12/2006 , A5E00105475-07
A.1.6 Reusing existing hardware configurations
Reusing existing hardware configurations
If you reuse the configuration of a CPU 312 IFM to 318-2 DP for a CPU 31xC/31x, the CPU
31xC/31x may not run correctly.
If this is the case, you will have to replace the CPU in the STEP 7 hardware configuration
editor. When you replace the CPU, STEP 7 will automatically accept all the settings (if
appropriate and possible).
A.1.7 Replacing a CPU 31xC/31x
Replacing a CPU 31xC/31x
When supplied, the CPU 31xC/31x adds a connecting plug to the power supply connector.
You no longer need to disconnect the cables of the CPU when you replace a 31xC / 31x
CPU. Insert a screwdriver with 3.5 mm blade into the right side of the connector to open the
interlock mechanism, then unplug it from the CPU. Once you have replaced the CPU, simply
plug the connecting plug back into the power supply connector.
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 A-7
A.1.8 Using consistent data areas in the process image of a DP slave system
Consistent data
The table below illustrates the points to consider with respect to communication in a DP
master system if you want to transfer I/O areas with "Total length" consistency. You can
transfer a maximum of 128 bytes of consistent data.
Table A-1 Consistent data
CPU 315-2 DP
(as of firmware 2.0.0),
CPU 317, CPU 319
CPU 31xC
CPU 315-2 DP
(as of firmware 1.0.0),
CPU 316-2 DP,
CPU 318-2 DP (firmware < 3.0)
CPU 318-2 DP
(firmware >= 3.0)
The address area of consistent
data in the process image is
automatically updated.
Even if they exist in the process
image, consistent data is not
automatically updated.
You can choose whether or not
to update the address area of
consistent data in the process
image.
In order to read and write
consistent data
you can also use the SFCs 14
and 15
If the address area of consistent
data is outside the process
image,
you have to use the SFCs 14
and 15 to read and write
consistent data.
Direct access to consistent
areas is also possible (e.g.
L PEW or T PAW).
To read and write consistent data,
you must use SFC14 and 15.
To read and write consistent
data, you can also use SFC 14
and SFC 15.
If the address area of
consistent data is not in the
process image, you must use
SFC 14 and SFC 15 to read
and write consistent data.
Direct access to consistent
areas is also possible (for
example, L PEW or T PAW).
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
A-8 Manual, 12/2006 , A5E00105475-07
A.1.9 Load memory concept for the CPU 31xC/31x
Load memory concept for the CPU 31xC/31x
On CPUs 312 IFM to 318-2 DP, the load memory is integrated into the CPU and may be
extended with a memory card,
The load memory of the CPU 31xC/31x is located on the micro memory card (MMC), and is
retentive. When blocks are downloaded to the CPU, they are stored on the MMC and cannot
be lost even in the event of a power failure or memory reset.
Reference
See also the Memory concept chapter in the CPU Data 31xC and 31x manual.


Note
User programs can only be downloaded and thus the CPU can only be used if the MMC is
inserted.

A.1.10 PG/OP functions
PG/OP functions
With CPUs 315-2 DP (6ES7315-2AFx3-0AB0), 316-2DP and 318-2 DP, PG/OP functions at
the DP interface were only possible if the interface was set to active. With CPUs 31xC/31x,
these functions are possible at both active and passive interfaces. The performance of the
passive interface is considerably lower, however.
A.1.11 Routing for the CPU 31xC/31x as an intelligent slave
Routing for the CPU 31xC/31x as an intelligent slave
If you use the CPU 31xC/31x as an intelligent slave, the routing function can only be used
with an actively-configured DP interface.
In the properties of the DP interface in STEP 7, select the "Test, Commissioning, Routing"
check box of the "DP-Slave" option.
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 A-9
A.1.12 Changed retentive behavior of CPUs with firmware V2.0.12 or higher
Changed retentive behavior for CPUs with firmware >= V 2.0.12
For data blocks for these CPUs
you can set the retentive response in the block properties of the DB.
Using SFC 82 "CREA_DBL" -> Parameter ATTRIB, NON_RETAIN bit, you can specify if
the actual values of a DB should be maintained at POWER OFF/ON or STOP-RUN
(retentive DB) or if the start values should be read from the load memory (non-retentive
DB).
A.1.13 FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP, a
CPU 317 or a CPU 319-3 PN/DP
FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP / CPU 317 /
CPU 319-3 PN/DP

All CPUs except CPU 315-2 PN/DP, CPU 317,
CPU 318-2 DP and CPU 319-3 PN/DP
CPU 315-2 PN/DP, CPU 317 ,CPU 318-2 DP and
CPU 319-3 PN/DP
If there are FM/CPs with their own MPI address in
the central rack of an S7-300, then they are in the
exact same CPU subnet as the CPU MPI station.
If there are FM/CPs with their own MPI address
in the central rack of an S7-300, then the CPU
forms its own communication bus via the
backplane bus with these FM/CPs, which are
separated from the other subnets.
The MPI address of such an FM/CP is no longer
relevant for the stations on other subnets. The
communication to the FM/CP is made via the MPI
address of the CPU.
When exchanging your existing CPU with a CPU 315-2 PN/DP / CPU 317 / CPU 319-3
PN/DP, you therefore need to
replace the CPU in your STEP 7 project with the CPU 315-2 PN/DP / CPU 317 /
CPU 319-3 PN/DP
Reconfigure the OPs. The control and the destination address must be reassigned (= the
MPI address of the CPU 315-2 PN/DP / CPU 317
CPU 319-3 PN/DP and the slot of the respective FM)
Reconfigure the project data for FM/CP to be loaded to the CPU.
This is required for the FM/CP in this rack to remain "available" to the OP/PG.
Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Specifications
A-10 Manual, 12/2006 , A5E00105475-07
A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET
interface
If you have already used S7 communication via CP with loadable FBs (FB 8, FB 9, FB 12
FB 15 and FC 62 with version V1.0) from the SIMATIC_NET_CP STEP 7 library (these
blocks all feature the family type CP300 PBK) and now want to use the integrated
PROFINET interface for S7 communication, you must use the corresponding blocks from the
Standard Library\Communication Blocks STEP 7 library in your program (the corresponding
blocks FB 8, FB 9, FB 12 FB 15 and FC 62 have at least version V1.1 and family type
CPU_300).
Procedure
1. Download and overwrite the old FBs/FCs in your program container with the
corresponding blocks from the standard library.
2. Update the corresponding block calls, including updating the instance DBs, in your user
program.

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-1
Glossary
Accumulator
Accumulators represent CPU register and are used as buffer memory for download, transfer,
comparison, calculation and conversion operations.
Address
An address is the identifier of a specific address or address area. Examples: Input I 12.1;
Flag Word MW 25; Data Block DB 3.
Analog module
Analog modules convert process values (e.g. temperature) into digital values which can be
processing in the CPU, or they convert digital values into analog manipulated variables.
Application
An application is a program that runs directly on the MS-DOS / Windows operating system.
Applications on the PG include the STEP 5 basic package, GRAPH 5 and others.
User program
ASIC
ASIC is the acronym for Application Specific Integrated Circuits.
PROFINET ASICs are components with a wide range of functions for the development of
your own devices. They implement the requirements of the PROFINET standard in a circuit
and allow extremely high packing densities and performance.
Because PROFINET is an open standard, SIMATIC NET offers PROFINET ASICs for the
development of your old devices under the name ERTEC .
Backplane bus
The backplane bus is a serial data bus. It supplies power to the modules and is also used by
the modules to communicate with each other. Bus connectors interconnect the modules.
Backup memory
Backup memory ensures buffering of the memory areas of a CPU without backup battery. It
backs up a configurable number of timers, counters, flag bits, data bytes and retentive
timers, counters, flag bits and data bytes).
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-2 Manual, 12/2006 , A5E00105475-07
Bit memory
Flag bits are part of the CPU's system memory. They store intermediate results of
calculations. They can be accessed in bit, word or dword operations.
Bus
A bus is a communication medium connecting several nodes. Data can be transferred via
serial or parallel circuits, that is, via electrical conductors or fiber optic.
Bus segment
A bus segment is a self-contained section of a serial bus system. Bus segments are
interconnected by way of repeaters, for example, in PROFIBUS DP.
Central module
CPU
Clock flag bits
flag bit which can be used to generate clock pulses in the user program (1 byte per flag bit).

Note
When operating with S7-300 CPUs, make sure that the byte of the clock memory bit is not
overwritten in the user program!


Code block
A SIMATIC S7 code block contains part of the STEP 7 user program. (in contrast to a DB:
this contains only data.)
Component-based automation
PROFINET CBA
Compress
The PG online function "Compress" is used to rearrange all valid blocks in CPU RAM in a
contiguous area of load memory, starting at the lowest address. This eliminates
fragmentation which occurs when blocks are deleted or edited.
Configuration
Assignment of modules to module racks/slots and (e.g. for signal modules) addresses.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-3
Consistent data
Data which belongs together in terms of content and must not be separated is known as
consistent data.
For example, the values of analog modules must always be handled as a whole, i.e. the
value of an analog module must not be corrupted as a result of read access at two different
times.
Counters
Counters are part of CPU system memory. The content of "Counter cells" can be modified by
STEP 7 instructions (for example, up/down count.)
CPU
Central processing unit = CPU of the S7 automation system with a control and arithmetic
unit, memory, operating system, and interface for programming device.
Cycle time
The cycle time represents the time a CPU requires for one execution of the user program.
Cyclic interrupt
Interrupt, cyclic interrupt
Data block
Data blocks (DB) are data areas in the user program which contain user data. There are
global data blocks which can be accessed by all code blocks, and instance data blocks
which are assigned to a specific FB call.
Data, static
Static data can only be used within a function block. These data are saved in an instance
data block that belongs to a function block. Data stored in an instance data block are
retained until the next function block call.
Data, temporary
Temporary data represent local data of a block. They are stored in the L-stack when the
block is executed. After the block has been processed, these data are no longer available.
Default router
The default router is the router that is used when data must be forwarded to a partner
located within the same subnet.
In STEP 7, the default router is named Router. STEP 7 assigns the local IP address to the
default router.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-4 Manual, 12/2006 , A5E00105475-07
Determinism
Real Time
Device
Within the context of PROFINET, "device" is the generic term for:
Automation systems,
Field devices (for example, PLC, PC),
Active network components (for example, distributed I/O, valve blocks, drives),
hydraulic devices and
pneumatic devices.
The main characteristic of a device is its integration in PROFINET communication over
Ethernet or PROFIBUS.
The following device types are distinguished based on their attachment to the bus:
PROFINET devices
PROFIBUS devices
PROFIBUS device
PROFINET device
Device Name
Before an IO device can be addressed by an IO controller, it must have a device name. In
PROFINET, this method was selected because it is simpler to work with names than with
complex IP addresses.
The assignment of a device name for a concrete IO device can be compared with setting the
PROFIBUS address of a DP slave.
When it ships, an IO device does not have a device name. An IO device can only be
addressed by an IO controller, for example for the transfer of project engineering data
(including the IP address) during startup or for user data exchange in cyclic operation, after it
has been assigned a device name with the PG/PC .
Diagnostic interrupt
Modules capable of diagnostics operations report detected system errors to the CPU by
means of diagnostic interrupts.
Diagnostics
System diagnostics
Diagnostics buffer
The diagnostics buffer represents a buffered memory area in the CPU. It stores diagnostic
events in the order of their occurrence.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-5
DP master
A master which behaves in accordance with EN 50170, Part 3 is known as a DP master.
DP slave
A slave operated on PROFIBUS with PROFIBUS DP protocol and in accordance with EN
50170, Part 3 is referred to as DP slave.
DPV1
The designation DPV1 means extension of the functionality of the acyclical services (to
include new interrupts, for example) provided by the DP protocol. The DPV1 functionality has
been incorporated into IEC 61158/EN 50170, volume 2, PROFIBUS.
Electrically isolated
The reference potential of the control and on-load power circuits of isolated I/O modules is
electrically isolated; for example, by optocouplers, relay contact or transformer. I/O circuits
can be interconnected with a root circuit.
Equipotential bonding
Electrical connection (equipotential bonding conductor) which eliminates potential difference
between electrical equipment and external conductive bodies by drawing potential to the
same or near the same level, in order to prevent disturbing or dangerous voltages between
these bodies.
Error display
One of the possible reactions of the operating system to a runtime error is to output an error
message. Further reactions: Error reaction in the user program, CPU in STOP.
Error handling via OB
After the operating system has detected a specific error (e.g. access error with STEP 7), it
calls a dedicated block (Error OB) that determines further CPU actions.
Error response
Reaction to a runtime error. Reactions of the operating system: It sets the automation
system to STOP, indicates the error, or calls an OB in which the user can program a
reaction.
ERTEC
ASIC
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-6 Manual, 12/2006 , A5E00105475-07
Fast Ethernet
Fast Ethernet describes the standard with which data is transmitted at 100 Mbps. Fast
Ethernet uses the 100 Base-T standard.
FB
Function block
FC
Function
Flash EPROM
FEPROMs can retain data in the event of power loss, same as electrically erasable
EEPROMs. However, they can be erased within a considerably shorter time (FEPROM =
Flash Erasable Programmable Read Only Memory). They are used on Memory Cards.
Force
The Force function can be used to assign the variables of a user program or CPU (also:
inputs and outputs) constant values.
In this context, please note the limitations listed in the Overview of the test functions section
in the chapter entitled Test functions, Diagnostics and Troubleshooting in the S7-300
Installation manual.
Function
According to IEC 1131-3, a function (FC) is a code block without static data. A function
allows parameters to be passed in the user program. Functions are therefore suitable for
programming frequently occurring complex functions, for example calculations.
Function block
According to IEC 1131-3, a function block (FB) is a code block with static data. A function
block allows parameters to be transferred to the user program. Function blocks are therefore
suitable for programming frequently occurring complex functions, for example controls, mode
selections.
Functional ground
Grounding which has the sole purpose of safeguarding the intended function of electrical
equipment. With functional grounding you short-circuit interference voltage which would
otherwise have an unacceptable impact on equipment.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-7
GD circuit
A GD circuit comprises a number of CPUs sharing data by means of global data
communication, and is used as follows:
A CPU broadcasts a GD packet to the other CPUs.
A CPU sends and receives a GD packet from another CPU.
A GD circuit is identified by a GD circuit number.
GD element
A GD element is generated by assigning shared global data. It is identified by a unique
global data ID in the global data table.
GD packet
A GD packet can consist of one or several GD elements transmitted in a single message
frame.
Global data
Global data can be addressed from any code block (FC, FB, OB). In particular, this refers to
flag bits M, inputs I, outputs Q, timers, counters and data blocks DB. Global data can be
accessed via absolute or symbolic addressing.
Global data communication
Global data communication is a method of transferring global data between CPUs (without
CFBs).
Ground
The conductive earth whose electrical potential can be set equal to zero at any point.
Ground potential can be different from zero in the area of grounding electrodes. The term
reference ground is frequently used to describe this situation.
Grounding means, to connect an electrically conductive component via an equipotential
grounding system to a grounding electrode (one or more conductive components with highly
conductive contact to earth).
Chassis ground is the totality of all the interconnected passive parts of a piece of equipment
on which dangerous fault-voltage cannot occur.
GSD file
The properties of a PROFINET device are described in a GSD file (General Station
Description) that contains all the information required for configuration.
As with PROFIBUS, you can incorporate a PROFINET device into STEP 7 via a GSD file.
In PROFINET IO, the GSD file is in XML format. The structure of the GSD file conforms to
ISO 15734, which is the world-wide standard for device descriptions.
In PROFIBUS, the GSD file is in ASCII format.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-8 Manual, 12/2006 , A5E00105475-07
HART
English: Highway Adressable Remote Transducer
Industrial Ethernet
Industrial Ethernet (formerly SINEC H1) is a technology that allows data to be transmitted
free of interference in an industrial environment.
Due to the openness of PROFINET, you can use standard Ethernet components. We
recommend, however, that you install PROFINET as Industrial Ethernet.
Fast Ethernet
Instance data block
The STEP 7 user program assigns an automatically generated DB to every call of a function
block. The instance data block stores the values of inputs / outputs and in/out parameters, as
well as local block data.
Interrupt
The CPU's operating system distinguishes between different priority classes for user
program execution. These priority classes include interrupts, e.g. process interrupts. When
an interrupt is triggered, the operating system automatically calls an assigned OB. In this OB
the user can program the desired response (e.g. in an FB).
Interrupt, cyclic interrupt
A cyclic interrupt is generated periodically by the CPU in a configurable time pattern. A
corresponding OB will be processed.
Interrupt, delay
The delay interrupt belongs to one of the priority classes in SIMATIC S7 program
processing. It is generated on expiration of a time started in the user program. A
corresponding OB will be processed.
Interrupt, delay
Interrupt, diagnostic
Diagnostic interrupt
Interrupt, process
Process interrupt
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CPU 31xC and CPU 31x, Technical Specifications
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Interrupt, status
A status interrupt can be generated by a DPV1 slave and causes OB 55 to be called on the
DPV1 master. For detailed information on OB 55, see the Reference Manual System
software for S7-300/400: System and Standard Functions.
Interrupt, time-of-day
The time-of-day interrupt belongs to one of the priority classes in
SIMATIC S7 program processing. It is generated at a specific date (or daily) and time-of-day
(e.g. 9:50 or hourly, or every minute). A corresponding OB will be processed.
Interrupt, update
An update interrupt can be generated by a DPV1 slave and causes OB56 to be called on the
DPV1 master. For detailed information on OB56, see the Reference Manual System
software for S7-300/400: System and Standard Functions.
Interrupt, vendor-specific
A vendor-specific interrupt can be generated by a DPV1 slave. It causes OB57 to be called
on the DPV1 master.
For detailed information on OB 57, see the Reference Manual System Software for
S7-300/400: System and Standard Functions.
IO controller
PROFINET IO controller
PROFINET IO device
PROFINET IO Supervisor
PROFINET IO system
IO device
PROFINET IO controller
PROFINET IO device
PROFINET IO Supervisor
PROFINET IO system
IO supervisor
PROFINET IO controller
PROFINET IO device
PROFINET IO Supervisor
PROFINET IO system
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-10 Manual, 12/2006 , A5E00105475-07
IO system
PROFINET IO system
IP address
To allow a PROFINET device to be addressed as a node on Industrial Ethernet, this device
also requires an IP address that is unique within the network. The IP address is made up of
4 decimal numbers with a range of values from 0 through 255. The decimal numbers are
separated by a period.
The IP address is made up of
The address of the (subnet) network and
The address of the node (generally called the host or network node).
Load memory
This memory contains objects generated by the programming device. Load memory is
implemented by means of a plug-in Micro Memory Card of different memory capacities. The
SIMATIC Micro Memory Card must be inserted to allow CPU operation.
Load power supply
Power supply to the signal / function modules and the process I/O connected to them.
Local data
Data, temporary
MAC address
Each PROFINET device is assigned a worldwide unique device identifier in the factory. This
6-byte long device identifier is the MAC address.
The MAC address is divided up as follows:
3 bytes vendor identifier and
3 bytes device identifier (consecutive number).
The MAC address is normally printed on the front of the device.
Example: 08-00-06-6B-80-C0
Master
When a master has the token, it can send data to other nodes and request data from other
nodes (= active node).
Slave
Glossary

CPU 31xC and CPU 31x, Technical Specifications
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Memory Card (MC)
Memory Cards are memory media for CPUs and CPs. They are implemented in the form of
RAM or FEPROM. An MC differs from a Micro Memory Card only in its dimensions (MC is
approximately the size of a credit card).
Micro Memory Card (MMC)
Micro Memory Cards are memory media for CPUs and CPs. Their only difference to the
Memory Card is the smaller size.
Module parameters
Module parameters are values which can be used to configure module behavior. A
distinction is made between static and dynamic module parameters.
NCM PC
SIMATIC NCM PC
Nesting depth
A block can be called from another by means of a block call. Nesting depth is referred to as
the number of simultaneously called code blocks.
Network
A network is a larger communication system that allows data exchange between a large
number of nodes.
All the subnets together form a network.
Non-isolated
The reference potential of the control and on-load power circuits of non-isolated I/O modules
is electrically interconnected.
OB
Organization blocks
OB priority
The CPU operating system distinguishes between different priority classes, for example,
cyclic program execution, process interrupt controlled program processing. Each priority
class is assigned organization blocks (OBs) in which the S7 user can program a response.
The OBs are assigned different default priority classes. These determine the order in which
OBs are executed or interrupt each other when they appear simultaneously.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-12 Manual, 12/2006 , A5E00105475-07
Operating state
SIMATIC S7 automation systems know the following operating states: STOP, START, RUN.
Operating system
The CPU operating system organizes all the CPU functions and processes which are not
associated with a specific control task.
CPU
Organization blocks
Organization blocks (OBs) form the interface between the CPU operating system and the
user program. The order in which the user program is run is defined in the organization
blocks.
Parameters
1. Variable of a STEP 7 code block
2. Variable for declaring module response (one or several per module). All modules have a
suitable basic factory setting which can be customized in STEP 7.
There are static and dynamic parameters.
Parameters, dynamic
Unlike static parameters, you can change dynamic module parameters during runtime by
calling an SFC in the user program, e.g. limit values of an analog signal input module.
Parameters, static
Unlike dynamic parameters, static parameters of modules cannot be changed by the user
program. You can only modify these parameters by editing your configuration in STEP 7, for
example, modification of the input delay parameters of a digital signal input module.
PC station
SIMATIC PC station
PG
Programming device
PLC
A PLC in the context of SIMATIC S7 --> is a programmable logic controller.
Programmable logic controller
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-13
PNO
Technical committee that defines and further develops the PROFIBUS and PROFINET
standards.
Website: http://www.profinet.com
Priority class
The S7 CPU operating system provides up to 26 priority classes (or "Program execution
levels"). Specific OBs are assigned to these classes. The priority classes determine which
OBs interrupt other OBs. Multiple OBs of the same priority class do not interrupt each other.
In this case, they are executed sequentially.
Process image
The process image is part of CPU system memory. At the start of cyclic program execution,
the signal states at the input modules are written to the process image of the inputs. At the
end of cyclic program execution, the signal status of the process image of the outputs is
transferred to the output modules.
Process interrupt
A process interrupt is triggered by interrupt-triggering modules as a result of a specific event
in the process. The process interrupt is reported to the CPU. The assigned organization
block will be processed according to interrupt priority.
Process-Related Function
PROFINET components
Product version
The product version identifies differences between products which have the same order
number. The product version is incremented when forward-compatible functions are
enhanced, after production-related modifications (use of new parts/components) and for bug
fixes.
PROFIBUS
Process Field Bus - European field bus standard.
PROFIBUS DP
PNO
PROFIBUS device
A PROFIBUS node has at least one or more PROFIBUS ports.
A PROFIBUS device cannot take part directly in PROFINET communication but must be
included over a PROFIBUS master with a PROFINET port or an Industrial
Ethernet/PROFIBUS link (IE/PB Link) with proxy functionality.
Device
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-14 Manual, 12/2006 , A5E00105475-07
PROFIBUS DP
A PROFIBUS with the DP protocol that complies with EN 50170. DP stands for distributed
peripheral (IO) = fast, real-time, cyclic data exchange. From the perspective of the user
program, the distributed IOs are addressed in exactly the same way as the central IOs.
PROFIBUS
PNO
PROFINET
Within the framework of Totally Integrated Automation (TIA), PROFINET represents a
consequent enhancement of:
PROFIBUS DP, the established fieldbus and
Industrial Ethernet, the communication bus for the cell level
Experience gained from both systems was and is being integrated into PROFINET.
PROFINET is an Ethernet-based automation standard of PROFIBUS International
(previously PROFIBUS Users Organization e.V.), and defines a multi-vendor communication,
automation, and engineering model.
PNO
PROFINET ASIC
ASIC
PROFINET CBA
Within the framework of PROFINET, PROFINET CBA is an automation concept for the
implementation of applications with distributed intelligence.
PROFINET CBA lets you create distributed automation solutions, based on default
components and partial solutions.
Component Based Automation allows you to use complete technological modules as
standardized components in large systems.
The components are also created in an engineering tool which may differ from vendor to
vendor. Components of SIMATIC devices are created, for example, with STEP 7.
PROFINET components
A PROFINET component includes the entire data of the hardware configuration, the
parameters of the modules, and the corresponding user program. The PROFINET
component is made up as follows:
Technological Function
The (optional) technological (software) function includes the interface to other PROFINET
components in the form of interconnectable inputs and outputs.
Device
The device is the representation of the physical programmable controller or field device
including the I/O, sensors and actuators, mechanical parts, and the device firmware.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Glossary-15
PROFINET device
A PROFINET device always has at least one Industrial Ethernet port. A PROFINET device
can also have a PROFIBUS port as a master with proxy functionality.
Device
PROFINET IO
Within the framework of PROFINET, PROFINET IO is a communication concept for the
implementation of modular, distributed applications.
PROFINET IO allows you to create automation solutions, which are familiar to you from
PROFIBUS.
That is, you have the same application view in STEP 7, regardless of whether you configure
PROFINET or PROFIBUS devices.
PROFINET IO controller
Device used to address the connected IO devices. This means that the IO controller
exchanges input and output signals with assigned field devices. The IO controller is often the
controller on which the automation program runs.
PROFINET IO device
PROFINET IO Supervisor
PROFINET IO controller
PROFINET IO system
PROFINET IO device
Distributed field device assigned to one of the IO controllers (for example, remote IO, valve
terminals, frequency converters, switches)
PROFINET IO controller
PROFINET IO Supervisor
PROFINET IO system
PROFINET IO Supervisor
PROFINET IO controller
PROFINET IO Supervisor
PG/PC or HMI device for commissioning and diagnostics.
PROFINET IO device
PROFINET IO system
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-16 Manual, 12/2006 , A5E00105475-07
PROFINET IO system
PROFINET IO controller with assigned PROFINET IO devices.
PROFINET IO controller
PROFINET IO device
Programmable logic controller
Programmable controllers (PLCs) are electronic controllers whose function is stored as a
program in the control unit. The structure and wiring of the device does not therefore depend
on the controller's function. A programmable logic controller is structured like a computer; it
consists of a CPU with memory, input/output modules and an internal bus system. The IOs
and the programming language are oriented to control engineering needs.
CPU
Programming device
Programming devices are essentially compact and portable PCs which are suitable for
industrial applications. They are identified by a special hardware and software for
programmable logic controllers.
Proxy
The PROFINET device with proxy functionality is the substitute for a PROFIBUS device on
Ethernet. The proxy functionality allows a PROFIBUS device to communicate not only with
its master but also with all nodes on PROFINET.
You can integrate existing PROFIBUS systems into PROFINET communication, for example
with the help of an IE/PB Link or a CPU 31x PN/DP. The IE/PB Link then handles
communication over PROFINET as a substitute for the PROFIBUS components.
PROFINET device
RAM
RAM (Random Access Memory) is a semiconductor read/write memory.
Real Time
Real time means that a system processes external events within a defined time.
Determinism means that a system reacts in a predictable (deterministic) manner.
In industrial networks, both these requirements are important. PROFINET meets these
requirements. PROFINET is implemented as a deterministic real-time network as follows:
The transfer of time-critical data between different stations over a network within a
defined interval is guaranteed.
To achieve this, PROFINET provides an optimized communication channel for real-time
communication : Real Time (RT).
An exact prediction of the time at which the data transfer takes place is possible.
It is guaranteed that problem-free communication using other standard protocols, for
example industrial communication for PG/PC can take place within the same network.
Real Time
Glossary

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Reduction factor
The reduction rate determines the send/receive frequency for GD packets on the basis of the
CPU cycle.
Reference ground
Ground
Reference potential
Voltages of participating circuits are referenced to this potential when they are viewed and/or
measured.
Restart
On CPU start-up (e.g. after is switched from STOP to RUN mode via selector switch or with
POWER ON), OB100 (restart) is initially executed, prior to cyclic program execution (OB1).
On restart, the input process image is read in and the STEP 7 user program is executed,
starting at the first instruction in OB1.
Retentive memory
A memory area is considered retentive if its contents are retained even after a power loss
and transitions from STOP to RUN. The non-retentive area of memory flag bits, timers and
counters is reset following a power failure and a transition from the STOP mode to the RUN
mode.
Retentive can be the:
Bit memory
S7 timers
S7 counters
Data areas
Router
Default router
Switch
RT
Real Time
Runtime error
Errors occurred in the PLC (that is, not in the process itself) during user program execution.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-18 Manual, 12/2006 , A5E00105475-07
Segment
Bus segment
SFB
System function block
SFC
System function
Signal module
Signal modules (SM) form the interface between the process and the PLC. There are digital
input and output modules (input/output module, digital) and analog input and output modules
(input/output module, analog).
SIMATIC
The term denotes Siemens AG products and systems for industrial automation.
SIMATIC NCM PC
SIMATIC NCM PC is a version of STEP 7 tailored to PC configuration. For PC stations, it
offers the full range of functions of STEP 7.
SIMATIC NCM PC is the central tool with which you configure the communication services
for your PC station. The configuration data generated with this tool must be downloaded to
the PC station or exported. This makes the PC station ready for communication.
SIMATIC PC station
A "PC station" is a PC with communication modules and software components within a
SIMATIC automation solution.
Slave
A slave can only exchange data after being requested to do so by the master.
Master
SNMP
SNMP (Simple Network Management Protocol) makes use of the wireless UDP transport
protocol. Consists of two network components, similar to the client/server model. The SNMP
Manager monitors the network nodes, and the SNMP agents collect the various network-
specific information in the individual network nodes and places it in a structured form in the
MIB (Management Information Base). This information allows a network management
system to run detailed network diagnostics.
Glossary

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STARTUP
A START-UP routine is executed at the transition from STOP to RUN mode. Can be
triggered by means of the mode selector switch, or after power on, or by an operator action
on the programming device. An S7-300 performs a restart.
STEP 7
Engineering system. Contains programming languages for creating user programs for
SIMATIC S7 controllers.
Subnet mask
The bits set in the subnet mask decides the part of the IP address that contains the address
of the subnet/network.
In general:
The network address is obtained by an AND operation on the IP address and subnet
mask.
The node address is obtained by an AND NOT operation on the IP address and subnet
mask.
Subnetwork
All the devices interconnected by switches are nodes of the same network or subnet. All the
devices in a subnet can communicate directly with each other.
All devices in the same subnet have the same subnet mask.
A subnet is physically restricted by a router.
Substitute
Proxy
Substitute value
Substitute values are configurable values which output modules transfer to the process when
the CPU switches to STOP mode.
In the event of an I/O access error, a substitute value can be written to the accumulator
instead of the input value which could not be read (SFC 44).
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-20 Manual, 12/2006 , A5E00105475-07
Switch
PROFIBUS is based on a bus topology. Communication nodes are connected by a passive
cable - the bus.
In contrast, Industrial Ethernet is made up of point-to-point links: Each communication node
is connected directly to one other communication node.
Multiple communication nodes are interconnected at the port of an active network
component, that is, at the switch. Other communications nodes (including switches) can then
be connected to the other ports of the switch. The connection between a communication
node and the switch remains a point-to-point link.
The task of a switch is therefore to regenerate and distribute received signals. The switch
"learns" the Ethernet address(es) of a connected PROFINET device or other switches and
forwards only the signals intended for the connected PROFINET device or connected switch.
A switch has a certain number of ports. At each port, connect a maximum of one PROFINET
device or a further switch.
System diagnostics
System diagnostics refers to the detection, evaluation, and signaling of errors that occur
within the PLC, for example programming errors or module failures. System errors can be
indicated by LEDs or in STEP 7.
System function
A system function (SFC) is a function integrated into the operating system of the CPU that
can be called when necessary in the STEP 7 user program.
System function block
System function blocks (SFB) are integrated in the CPU operating system and can be called
in the STEP 7 user program.
System memory
System memory is an integrated RAM memory in the CPU. System memory contains the
address areas (e.g. timers, counters, flag bits) and data areas that are required internally by
the operating system (for example, communication buffers).
System status list
The system status list contains data that describes the current status of an S7-300 or S7-
400. You can always use this list to obtain an overview of:
the configuration of the S7-300
the current CPU parameter settings and the programmable signal modules
the current status and processes in the CPU and in the programmable signal modules.
Glossary

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Manual, 12/2006 , A5E00105475-07 Glossary-21
Terminating resistor
The terminating resistor is used to avoid reflections on data links.
Timer
Timers
Timers
Timers are part of CPU system memory. The content of timer cells is automatically updated
by the operating system, asynchronously to the user program. STEP 7 instructions are used
to define the precise function of the timer cell (for example, on-delay) and to initiate their
execution (for example, start).
TOD interrupt
Interrupt, time-of-day
Transmission rate
Data transfer rate (in bps)
Ungrounded
Having no direct electrical connection to ground
User program
In SIMATIC, we distinguish between the operating systems of the CPU and user programs.
The user program contains all instructions, declarations and data for signal processing
required to control a plant or a process. It is assigned to a programmable module (for
example CPU or FM) and can be structured in smaller units (blocks).
Operating system
STEP 7
Varistor
Voltage-dependent resistor
Work memory
The working memory is integrated in the CPU and cannot be extended. It is used to run the
code and process user program data. Programs only run in the working memory and system
memory.
Glossary

CPU 31xC and CPU 31x, Technical Specifications
Glossary-22 Manual, 12/2006 , A5E00105475-07

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Index-1
Index
(
(Simple Network Management Protocol), 3-30
A
Aim of this Documentation, iii
Analog inputs
Configuration, 7-44
Not connected, 7-41
Technical data, 7-53
Analog outputs
Not connected, 7-41
Technical data, 7-55
Application
in industrial environments, 6-4
in residential areas, 6-4
Application View, 3-21
Approval
CE, 6-1
CSA, 6-2
FM, 6-3
Marine, 6-4
UL, 6-2
Approvals
Standards, 6-1
Automation concept, 3-21
B
Blocks, 3-25
Compatibility, 3-25
Download, 4-11
Upload, 4-13
Burst pulses, 6-5
C
CE
Approval, 6-1
Communication
Communication protocols, 3-27
CPU services, 3-9
Data consistency, 3-19
Global data communication, 3-13
Open IE communication, 3-27
S7 basic communication, 3-11
S7 communication, 3-12
Communication load
configured, 5-9
Dependency of physical cycle time, 5-10
Influence on the physical cycle time, 5-10
Communications concept, 3-21
Component Based Automation, 3-20, 3-21
Compression, 4-14
Configuration
Interrupt inputs, 7-42
Standard AI, 7-44
Standard DI, 7-42
Standard DO, 7-43
Technological functions, 7-46
Consistent data, A-7
Continuous shock, 6-8
CPU 312
Technical data, 8-3
CPU 312C
Technical data, 7-11
Technical Data, 7-3
Usage of integrated I/Os, 7-30
CPU 313C
Technical data, 7-9
Usage of integrated I/Os, 7-32
CPU 313C-2 DP
Technical data, 7-15
Usage of integrated I/Os, 7-32
CPU 313C-2 PtP
Technical data, 7-15
Usage of integrated I/Os, 7-32
CPU 314
Technical data, 8-9
CPU 314C-2 DP
Technical data, 7-22
Usage of integrated I/Os, 7-32
Index

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Index-2 Manual, 12/2006 , A5E00105475-07
CPU 314C-2 PtP
Technical data, 8-9
Technical Data, 7-22
Usage of integrated I/Os, 7-32
CPU 315-2 DP
Technical data, 8-14
CPU 315-2 PN/DP
Technical data, 8-21
CPU 317-2 DP
Technical data, 8-30
CPU 317-2 PN/DP
Technical Data, 8-38
CPU 319-3 PN/DP
Technical data, 8-47
CPU memory reset, 4-14
CPUs 31xC
Differences, 2-3
CSA
Approval, 6-2
Cycle time
Calculation, 5-5
Definition, 5-2
Extension, 5-4
Maximum cycle time, 5-9
Process image, 5-2
Sample calculation, 5-24
Sequence of cyclic program processing, 5-3
Time slice model, 5-2
D
Data consistency, 3-19
Definition
Electromagnetic Compatibility, 6-5
Degree of protection IP 20, 6-9
Diagnostics
Standard I/O, 7-48
Technological functions, 7-48
Differences between the CPUs, 2-3
Digital inputs
Configuration, 7-42
Technical data, 7-49
Digital outputs
Configuration, 7-43
Fast, 7-51
Technical data, 7-51
Display languages
of the web server, 3-31
Download
of blocks, 4-11
DPV1, 3-53
E
Electromagnetic Compatibility, 6-5
Electrostatic discharge, 6-5
EMC, 6-5
Emission of radio interference, 6-6
Error displays, 2-13
F
Firewall, 3-32
FM
Approval, 6-3
G
General technical data, 6-1
Global data communication, 3-13
I
I/O process image, 4-7
Identification code for Australia, 6-3
IEC 61131, 6-3
Industrial Ethernet, 3-20
Information about migration to another CPU, A-1
Insulation test, 6-9
Integrated I/Os
Usage, 7-30, 7-35
interfaces
PROFINET interface:Addressing ports, 3-6
PROFINET interface:Send clock, 3-7
PROFINET interface:Time synchronization, 3-5
PROFINET interface:Update time, 3-7
Interfaces
MPI interface, 3-1
MPI interface:Connectable devices, 3-2
PN interface, 3-5
PROFIBUS DP interface, 3-3
PROFIBUS DP interface:Operating modes with two
DP interfaces, 3-3
PtP interface, 3-8
Interfaces PROFIBUS DP interface
Connectable devices, 3-4
Interrupt inputs, 7-47
Configuration, 7-42
Index

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Index-3
Interrupt response time
Calculation, 5-22
Definition, 5-21
of signal modules, 5-22
of the CPUs, 5-21
Process interrupt processing, 5-22
Sample calculation, 5-26
Interrupt, delay, 5-23
L
Load memory, 4-1
Local data, 4-8
Longest response time
Calculation, 5-18
Conditions, 5-17
M
Marine
Approval, 6-4
Maximum cycle time, 5-9
Mechanical environmental conditions, 6-8
Memory
Compression, 4-14
Memory areas
Load memory, 4-1
System memory, 4-2
Work memory, 4-2
Memory functions
Compression, 4-14
CPU memory reset, 4-14
Download of blocks, 4-11
Promming, 4-14
RAM to ROM, 4-14
Restart, 4-14
Uploading blocks, 4-13
Warm start, 4-14
Micro Memory Card
Micro Memory Card, 4-9
Micro Memory Card - Useful life, 4-10
Mode selector switch, 2-3, 2-6, 2-8, 2-10, 2-12
MPI, 3-1
MPI interface
Time synchronization, 3-2
N
Network node, 3-14
O
OB83, 3-26
OB86, 3-26
Organization blocks, 3-26
P
PN interface, 3-5
Power supply
Connection, 2-3, 2-6, 2-8, 2-10, 2-12
Process interrupt processing, 5-22
PROFIBUS, 3-20
PROFIBUS DP Interface, 3-3
PROFIBUS DP Interface
Time synchronization, 3-4
PROFIBUS International, 3-20
PROFINET, 3-6, 3-20
Implementation, 3-20
interface, 3-5
Objectives, 3-20
PROFINET CBA, 3-20, 3-21
PROFINET IO, 3-20
Protection class, 6-9
PtP interface, 3-8
Pulseshaped disturbance, 6-5
R
RAM to ROM, 4-14
Required basic knowledge, iii
Response time
Calculating the longest, 5-18
Calculating the shortest, 5-16
Conditions for the longest, 5-17
Conditions for the shortest, 5-16
Definition, 5-14
DP cycle times, 5-14, 5-15
Factors, 5-14
Fluctuation width, 5-14
Reduction with direct I/O access, 5-18
Sample calculation, 5-25
Restart, 4-14
Retentive memory, 4-2
Load memory, 4-2
Retentive behavior of memory objects, 4-4
Retentive behavior of the memory objects, 5-7
System memory, 4-2
Index

CPU 31xC and CPU 31x, Technical Specifications
Index-4 Manual, 12/2006 , A5E00105475-07
Routing
Access to stations on other subnets, 3-14
Example of an application, 3-17
Network node, 3-14
Requirements, 3-16
S
S7 basic communication, 3-11
S7 communication, 3-12
S7 connections
Distribution, 3-50
End point, 3-48
of CPUs 31xC, 3-51
Time sequence for allocation, 3-50
Transition point, 3-48
Sample calculation
of the cycle time, 5-24
Sample calculation
of the response time, 5-25
Sample calculation
of interrupt response time, 5-26
Scope of this documentation, v
Scope of this manual, iii, A-1, A-2
Security
of the web server, 3-32
SFB 52, 3-25
SFB 53, 3-25
SFB 54, 3-25
SFB81, 3-25
SFC102, 3-25
SFC12, 3-25
SFC13, 3-25
SFC49, 3-25
SFC5, 3-25
SFC58, 3-25
SFC70, 3-25
SFC71, 3-25
Shipping conditions, 6-7
Shock, 6-8
Shortest response time
Calculation, 5-16
Conditions, 5-16
SIMATIC Micro Memory Card
Compatible Micro Memory Cards, 7-2, 8-2
Properties, 4-10
Slot, 2-2, 2-5, 2-7, 2-10, 2-12
Sinusoidal disturbance, 6-6
SNMP, 3-30
Standards and approvals, 6-1
Status displays, 2-13
Storage conditions, 6-7
System and standard functions, 3-25, 3-26
System memory, 4-2, 4-6
I/O process image, 4-7
Local data, 4-8
T
Technical data
Analog inputs, 7-53
Analog outputs, 7-55
CPU 312, 8-3
CPU 312C, 7-3
CPU 313C, 7-9
CPU 313C-2 DP, 7-15, 7-23
CPU 313C-2 PtP, 7-15
CPU 314, 8-9
CPU 314C-2 DP, 7-22
CPU 314C-2 PtP, 7-22
CPU 315-2 DP, 8-14
CPU 315-2 PN/DP, 8-21
CPU 317-2 DP, 8-30
CPU 319-3 PN/DP, 8-47
Digital inputs, 7-49
Digital outputs, 7-51
Electromagnetic Compatibility, 6-5
Shipping and storage conditions, 6-7
Technical Data
CPU 317-2 PN/DP, 8-38
Temperature, 6-7
Test voltage, 6-9
Time synchronization
MPI interface, 3-2
PROFIBUS DP Interface, 3-4
U
UL
Approval, 6-2
Upload, 4-13
Useful life of a Micro Memory Card, 4-10
User program
Upload, 4-13
V
Vibration, 6-8
Index

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 Index-5
W
Warm start, 4-14
Watchdog interrupt, 5-23
Web Access on the CPU, 3-31
Web Server
Activating, 3-32
Display languages, 3-31
Display Refresh Status, 3-32
Security, 3-32
Web Server, 3-30
Work memory, 4-2

Index

CPU 31xC and CPU 31x, Technical Specifications
Index-6 Manual, 12/2006 , A5E00105475-07

SIMATIC S7-300 S7-300, CPU 31xC and CPU 31x: Installation
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________


Preface


Guide to the S7-300
documentation

1
Installation Order

2
S7-300 components

3
Configuring

4
Installing

5
Wiring

6
Addressing

7
Commissioning

8
Maintenance

9
Debugging functions,
diagnostics and
troubleshooting

10
General technical data

11
Appendix

A
SIMATIC
S7-300
S7-300, CPU 31xC and CPU 31x:
Installation
Operating Instructions
12/2006
A5E00105492-07
This manual is part of the documentation package
with the order number: 6ES7398-8FA10-8BA0
The following supplement is part of this documentation:




No.
Product Information Drawing number
Edition
1 for Fast Connect Connector A5E01163594-01 06/2007



Safety Guidelines
This manual contains notices you have to observe in order to ensure your personal safety, as well as to prevent
damage to property. The notices referring to your personal safety are highlighted in the manual by a safety alert
symbol, notices referring only to property damage have no safety alert symbol. These notices shown below are
graded according to the degree of danger.

Danger
indicates that death or severe personal injury will result if proper precautions are not taken.

Warning
indicates that death or severe personal injury may result if proper precautions are not taken.

Caution
with a safety alert symbol, indicates that minor personal injury can result if proper precautions are not taken.
Caution
without a safety alert symbol, indicates that property damage can result if proper precautions are not taken.
Notice
indicates that an unintended result or situation can occur if the corresponding information is not taken into
account.
If more than one degree of danger is present, the warning notice representing the highest degree of danger will
be used. A notice warning of injury to persons with a safety alert symbol may also include a warning relating to
property damage.
Qualified Personnel
The device/system may only be set up and used in conjunction with this documentation. Commissioning and
operation of a device/system may only be performed by qualified personnel. Within the context of the safety notes
in this documentation qualified persons are defined as persons who are authorized to commission, ground and
label devices, systems and circuits in accordance with established safety practices and standards.
Prescribed Usage
Note the following:

Warning
This device may only be used for the applications described in the catalog or the technical description and only in
connection with devices or components from other manufacturers which have been approved or recommended by
Siemens. Correct, reliable operation of the product requires proper transport, storage, positioning and assembly
as well as careful operation and maintenance.
Trademarks
All names identified by are registered trademarks of the Siemens AG. The remaining trademarks in this
publication may be trademarks whose use by third parties for their own purposes could violate the rights of the
owner.
Disclaimer of Liability
We have reviewed the contents of this publication to ensure consistency with the hardware and software
described. Since variance cannot be precluded entirely, we cannot guarantee full consistency. However, the
information in this publication is reviewed regularly and any necessary corrections are included in subsequent
editions.

Siemens AG
Automation and Drives
Postfach 48 48
90437 NRNBERG
GERMANY
Order No.: A5E00105492-07
01/2007
Copyright Siemens AG 2006.
Technical data subject to change

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 iii
Preface
Purpose of this manual
This manual contains essential information about:
the configuration,
the installation
the wiring
the addressing
and commissioning
In addition, you will become familiar with the tools you can use to diagnose and eliminate
errors in hardware and software.
Basic knowledge
To understand this manual, you require a general knowledge of automation engineering.
You should also be accustomed to working with STEP 7 basic software.
For further information, refer to the Programming with STEP 7 manual.
Scope
Table 1 Scope of this manual
as of version CPU Convention:
CPU designations:
Order No.
Firmware
CPU 312C 6ES7312-5BE03-0AB0 V2.6
CPU 313C 6ES7313-5BF03-0AB0 V2.6
CPU 313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
CPU 313C-2 DP 6ES7313-6CF03-0AB0 V2.6
CPU 314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
CPU 314C-2 DP
CPU 31xC
6ES7314-6CG03-0AB0 V2.6
CPU 312 6ES7312-1AE13-0AB0 V2.6
CPU 314 6ES7314-1AG13-0AB0 V2.6
CPU 315-2 DP 6ES7315-2AG10-0AB0 V2.6
CPU 315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
CPU 317-2 DP 6ES7317-2AJ10-0AB0 V2.5
CPU 317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
CPU 319-3 PN/DP
CPU 31x
6ES7318-3EL00-0AB0 V2.5
Preface

S7-300, CPU 31xC and CPU 31x: Installation
iv Operating Instructions, 12/2006, A5E00105492-07

Note
The special features of the F-CPUs of the S7 spectrum can be found as product information
on the Internet under
http://support.automation.siemens.com/WW/view/en/11669702/133300.

Note
For new modules, or modules of a more recent version, we reserve the right to include a
Product Information containing latest information.

Changes compared to the previous version
Changes compared to the previous version of this operating instructions CPU31xC and
CPU31x: Installation, with footer number The following changes have been made to
A5E00105491-06, Release 01/2006:
Isochronous mode on PROFIBUS DP for CPU315-2 PN/DP, CPU317-2 DP, CPU317-2
PN/DP and CPU319-3 PN/DP
Firmware update on the networks
Configurable process image for CPU 315-2 PN/DP, CPU 317-2 DP and
CPU 319-3 PN/DP
Watchdog interrupt time setting for CPU 319-3 PN/DP starting at 500 s (for OB35)
Reset of the CPU to delivery state
Extended diagnostics for PROFINET CPUs
Measuring proximity switch for diagnostic repeater, for DP CPUs (SFC 103)
Enhancement of block-specific messages for all CPUs (SFC105 to SFC108)
Time synchronization over DP
Time synchronization over NTP at PROFINET CPUs
I&M data of the CPU (plant and location ID)
Minimum update time of 250 s at PROFINET IO Devices with CPU319
Activating/deactivating PROFINET IO devices on PROFINET CPUs (enhanced SFC12)
Support of maintenance events on PROFINET CPUs
Web server functionality of PROFINET CPUs
Increase of the maximum number of entries in the diagnostics buffer to 500 on
PROFINET CPUs
OUC expansion (UDP and ISO on TCP) for all PROFINET CPUs
Approvals
See chapter Technical Specifications > Standards and Approvals.
Preface

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 v
CE approval
See chapter Technical Specifications > Standards and Approvals.
Identification for Australia (C-Tick mark)
See chapter Technical Specifications > Standards and Approvals.
Standards
See chapter Technical Specifications > Standards and Approvals.
Documentation classification
The following documentation is part of the S7-300 documentation package.
It is also available on the Internet at: http://support.automation.siemens.com/WW/view/en/
and the corresponding entry ID

Name of the manual Description
YOU ARE READING the Manual
31xC and 31x CPUs, technical data
Entry ID: 12996906

Control and display elements, communication,
memory concept, cycle and response times,
technical data
Operating instructions
S7-300, CPU 31xC and CPU 31x: Installation
Entry ID: 12996906

Configuration, installation, wiring, addressing,
commissioning, maintenance and the test
functions, diagnostics and troubleshooting.
System Manual
PROFINET System Overview
Entry ID: 19292127

Basic knowledge of PROFINET:
Network components, data exchange and
communication, PROFINET IO, Component
Based Automation, sample application
PROFINET IO and Component Based
Automation
Programming Manual
From PROFIBUS DP to PROFINET I/O
Entry ID: 19289930

Guideline for the migration from PROFIBUS DP
to PROFINET I/O.
Manual
CPU 31xC: Technological functions
Entry ID: 12429336
CD with examples

Description of the various technological
functions of positioning and counting. PtP
communication, rules
The CD contains examples of the technological
functions
Manual
S7-300 Automation System: Module data
Entry ID: 8859629

Descriptions of functions and technical
specifications of signal modules, power supply
modules and interface modules
Instruction List
CPU 31xC and CPU 31x
Entry ID: 13206730

List of the operation repertoire of the CPUs and
their execution times. List of executable blocks.
Preface

S7-300, CPU 31xC and CPU 31x: Installation
vi Operating Instructions, 12/2006, A5E00105492-07
Name of the manual Description
Getting Started
The following Getting Started editions are available
as a collective volume:
S7-300 Getting Started Collection
Entry ID: 15390497
PROFINET Getting Started Collection
Entry ID: 19290251

The example used in this Getting Started
guides you through the various steps in
commissioning required to obtain a fully
functional application.
In addition to the S7-300 documentation package you require information from the following
descriptions:

Name of the manual Description
Reference Manual
System software for S7-300/400 system and
standard functions
Entry ID: 1214574

This manual, consisting of Volume 1 and
Volume 2, provides a complete overview of the
OBs, SFCs, SFBs, IEC functions, diagnostics
data, system state list (SSL) as well as the
events contained in the operating systems of
the CPUs of the S7-300 and S7-400. This
manual is part of the STEP 7 Standard Package
reference information. You can also find the
description in the online help for STEP 7.
Manual
Programming with STEP 7
Entry ID: 18652056

This manual provides a comprehensive
overview of STEP 7 programming and is part of
basic knowledge of STEP 7 basic. You can also
find the description in the online help for STEP
7.
Manual
SIMATIC NET: Twisted Pair and Fiber-Optic
Networks
Entry ID: 8763736

Description of Industrial Ethernet networks,
network configuration, components, installation
guidelines for networked automation systems in
buildings, etc.
Configuration Manual
Component Based Automation: Configure
SIMATIC iMap plants
Entry ID: 22762190

Description of the SIMATIC iMap configuring
software
Configuration Manual
Component Based Automation: SIMATIC iMap
STEP 7 Add-On, create PROFINET components
Entry ID: 22762278

Descriptions and instructions for creating
PROFINET components with STEP 7 and for
using SIMATIC devices in Component Based
Automation
Manual
Isochronous mode
Entry ID: 15218045

Description of the system characteristics
"Isochronous mode"
Manual
SIMATIC communication
Entry ID: 1254686

Basics, services, networks, communication
functions, connecting PGs/OPs, engineering
and configuring in STEP 7.
Preface

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 vii
Recycling and Disposal
The devices described in this manual can be recycled, because their components contain a
minimum of harmful substances. For environment-friendly recycling and disposal of your old
equipment, contact a certified disposal facility for electronic scrap.
Contacts
See product informationTechnical Support, Contacts and Training.
You will find the product information on the Internet at:
http://www.siemens.com/automation/service
Search for the entry with the number 19293011.
Training
See product informationTechnical Support, Contacts and Training.
SIMATIC Technical Support
See product informationTechnical Support, Contacts and Training.
Service & Support on the Internet
See product informationTechnical Support, Contacts and Training.
Preface

S7-300, CPU 31xC and CPU 31x: Installation
viii Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 ix
Table of contents
Preface...................................................................................................................................................... iii
1 Guide to the S7-300 documentation ....................................................................................................... 1-1
2 Installation Order .................................................................................................................................... 2-1
3 S7-300 components................................................................................................................................ 3-1
3.1 Example of an S7-300 configuration.......................................................................................... 3-1
3.2 Overview of the vital modules of an S7-300 .............................................................................. 3-2
4 Configuring ............................................................................................................................................. 4-1
4.1 Overview.................................................................................................................................... 4-1
4.2 Basic engineering principles ...................................................................................................... 4-2
4.3 Component dimensions ............................................................................................................. 4-4
4.4 Specified clearances.................................................................................................................. 4-6
4.5 Arrangement of modules on a single rack ................................................................................. 4-7
4.6 Distribution of modules to several racks.................................................................................... 4-8
4.7 Selection and installation of cabinets....................................................................................... 4-10
4.8 Example: Selecting a cabinet................................................................................................... 4-12
4.9 Electrical assembly, protective measures and grounding ....................................................... 4-13
4.9.1 Grounding concept and overall structure................................................................................. 4-13
4.9.2 Installing an S7-300 with grounded reference potential .......................................................... 4-14
4.9.3 Installing an S7-300 with ungrounded reference potential (not CPU 31xC)............................ 4-15
4.9.4 Isolated or common potential modules?.................................................................................. 4-17
4.9.5 Grounding measures ............................................................................................................... 4-19
4.9.6 Overview display: Earthing ...................................................................................................... 4-21
4.10 Selection of the load power supply .......................................................................................... 4-23
4.11 Planning subnets ..................................................................................................................... 4-25
4.11.1 Overview.................................................................................................................................. 4-25
4.11.2 Configuring MPI and PROFIBUS subnets............................................................................... 4-27
4.11.2.1 Overview.................................................................................................................................. 4-27
4.11.2.2 Basic principles of MPI and PROFIBUS subnets .................................................................... 4-27
4.11.2.3 Multi-Point Interface (MPI) ....................................................................................................... 4-30
4.11.2.4 PROFIBUS DP interface.......................................................................................................... 4-32
4.11.2.5 Network components of MPI/DP and cable lengths ................................................................ 4-34
4.11.2.6 Cable lengths of MPI and PROFIBUS subnets ....................................................................... 4-38
4.11.3 Configuring PROFINET subnets.............................................................................................. 4-43
4.11.3.1 Overview.................................................................................................................................. 4-43
4.11.3.2 PROFINET devices.................................................................................................................. 4-43
4.11.3.3 Integration of field bus systems in PROFINET ........................................................................ 4-46
4.11.3.4 PROFINET IO and PROFINET CBA ....................................................................................... 4-47
4.11.3.5 PROFINET cable lengths and network expansion .................................................................. 4-52
4.11.3.6 Connectors and other components for Ethernet...................................................................... 4-55
4.11.3.7 Example of a PROFINET Subnet ............................................................................................ 4-55
4.11.3.8 Example of a PROFINET IO system ....................................................................................... 4-57
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
x Operating Instructions, 12/2006, A5E00105492-07
4.11.4 Routed network transitions....................................................................................................... 4-58
4.11.5 Point-to-point (PtP)................................................................................................................... 4-60
4.11.6 Actuator/sensor interface (ASI) ................................................................................................ 4-60
5 Installing ................................................................................................................................................. 5-1
5.1 Installing a S7-300 ..................................................................................................................... 5-1
5.2 Installing the mounting rail ......................................................................................................... 5-3
5.3 Installing modules on the mounting rail...................................................................................... 5-6
5.4 Labeling modules....................................................................................................................... 5-8
6 Wiring ..................................................................................................................................................... 6-1
6.1 Requirements for wiring the S7-300 .......................................................................................... 6-1
6.2 Bonding the Protective Conductor to the Mounting Rail ............................................................ 6-3
6.3 Adjusting the Power Supply Module to Local Mains Voltage..................................................... 6-4
6.4 Wiring the Power Supply Module and the CPU......................................................................... 6-5
6.5 Wiring front connectors .............................................................................................................. 6-7
6.6 Plugging the front connectors into modules............................................................................. 6-10
6.7 Labeling the module I/Os ......................................................................................................... 6-11
6.8 Terminating shielded cables on the shielding contact element ............................................... 6-12
6.9 Wiring the MPI / PROFIBUS connectors ................................................................................. 6-15
6.9.1 Connecting the bus connector ................................................................................................. 6-15
6.9.2 Setting the terminating resistor on the bus connector ............................................................. 6-16
7 Addressing.............................................................................................................................................. 7-1
7.1 Slot-specific addressing of modules .......................................................................................... 7-1
7.2 User-specific addressing of modules......................................................................................... 7-3
7.2.1 User-specific addressing of modules......................................................................................... 7-3
7.2.2 Addressing digital modules ........................................................................................................ 7-4
7.2.3 Addressing analog modules....................................................................................................... 7-5
7.2.4 Addressing the integrated I/Os of CPU 31xC ............................................................................ 7-6
7.3 Addressing on PROFIBUS DP................................................................................................... 7-8
7.4 Addressing on PROFINET......................................................................................................... 7-9
8 Commissioning ....................................................................................................................................... 8-1
8.1 Overview .................................................................................................................................... 8-1
8.2 Commissioning procedure ......................................................................................................... 8-1
8.2.1 Procedure: Commissioning the hardware.................................................................................. 8-1
8.2.2 Procedure: Software commissioning ......................................................................................... 8-3
8.3 Commissioning check list........................................................................................................... 8-5
8.4 Commissioning the Modules...................................................................................................... 8-7
8.4.1 Inserting/Replacing a Micro Memory Card................................................................................. 8-7
8.4.2 Initial turn-on .............................................................................................................................. 8-9
8.4.3 CPU memory reset by means of mode selector switch............................................................. 8-9
8.4.4 Formatting the Micro Memory Card ......................................................................................... 8-13
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 xi
8.4.5 Connecting the programming device (PG) .............................................................................. 8-14
8.4.5.1 Connect PG/PC to the integrated PROFINET interface of the CPU 31x PN/DP .................... 8-14
8.4.5.2 Connecting the PG to a node................................................................................................... 8-15
8.4.5.3 Connecting the PG to several nodes ....................................................................................... 8-16
8.4.5.4 Using the PG for commissioning or maintenance.................................................................... 8-17
8.4.5.5 Connecting a PG to ungrounded MPI nodes (not CPU 31xC) ................................................ 8-19
8.4.6 Starting SIMATIC Manager...................................................................................................... 8-20
8.4.7 Monitoring and modifying I/Os ................................................................................................. 8-21
8.5 Commissioning PROFIBUS DP............................................................................................... 8-25
8.5.1 Commissioning PROFIBUS DP............................................................................................... 8-25
8.5.2 Commissioning the CPU as DP master................................................................................... 8-26
8.5.3 Commissioning the CPU as DP Slave..................................................................................... 8-30
8.5.4 Direct data exchange............................................................................................................... 8-35
8.6 Commissioning PROFINET IO................................................................................................ 8-37
8.6.1 Requirements........................................................................................................................... 8-37
8.6.2 Configuring and commissioning the PROFINET IO system.................................................... 8-37
9 Maintenance........................................................................................................................................... 9-1
9.1 Overview.................................................................................................................................... 9-1
9.2 Backing up firmware on a SIMATIC Micro Memory Card.......................................................... 9-1
9.3 Updating the firmware................................................................................................................ 9-2
9.3.1 Backing up firmware on a SIMATIC Micro Memory Card.......................................................... 9-2
9.3.2 Firmware update using a Micro Memory Card........................................................................... 9-4
9.3.3 Online (via networks) update of CPU FW V2.2.0 or higher. ...................................................... 9-5
9.4 Backup of project data to a Micro Memory Card ....................................................................... 9-6
9.5 Resetting to the Delivery State .................................................................................................. 9-7
9.6 Module installation / removal ..................................................................................................... 9-9
9.7 Digital output module AC 120/230 V: Changing fuses ............................................................ 9-13
10 Debugging functions, diagnostics and troubleshooting......................................................................... 10-1
10.1 Overview.................................................................................................................................. 10-1
10.2 Identification and maintenance data of the CPU ..................................................................... 10-1
10.3 Overview: Test functions.......................................................................................................... 10-4
10.4 Overview: Diagnostics ............................................................................................................. 10-6
10.5 Diagnostics functions available in STEP 7 ............................................................................ 10-10
10.6 Network infrastructure diagnostics (SNMP)........................................................................... 10-11
10.7 Diagnostics using status and error LEDs............................................................................... 10-12
10.7.1 Introduction ............................................................................................................................ 10-12
10.7.2 Status and error displays of all CPUs .................................................................................... 10-13
10.7.3 Evaluating the SF LED in case of software errors................................................................. 10-14
10.7.4 Evaluating the SF LED in case of hardware errors................................................................ 10-16
10.7.5 Status and Error Indicators: CPUs with DP Interface............................................................ 10-17
10.7.6 Status and Error Indicators: CPUs with PROFINET interface for the S7-300....................... 10-18
10.7.7 Status and Error Indicators: PROFINET IO Devices ............................................................. 10-20
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
xii Operating Instructions, 12/2006, A5E00105492-07
10.8 Diagnostics of DP CPUs ........................................................................................................ 10-21
10.8.1 Diagnostics of DP CPUs operating as DP Master ................................................................. 10-21
10.8.2 Reading out slave diagnostic data......................................................................................... 10-24
10.8.3 Interrupts on the DP Master ................................................................................................... 10-30
10.8.4 Structure of the slave diagnostic data when the CPU is operated as intelligent slave.......... 10-31
10.9 Diagnostics of PROFINET CPUs........................................................................................... 10-39
10.9.1 Diagnostics options of PROFINET IO.................................................................................... 10-39
10.9.2 Maintenance........................................................................................................................... 10-41
11 General technical data.......................................................................................................................... 11-1
11.1 Standards and approvals ......................................................................................................... 11-1
11.2 Electromagnetic compatibility .................................................................................................. 11-5
11.3 Transportation and storage conditions for modules................................................................. 11-7
11.4 Mechanical and climatic environmental conditions for S7-300 operation................................ 11-8
11.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage
of S7-300................................................................................................................................ 11-10
11.6 Rated voltages of S7-300....................................................................................................... 11-10
A Appendix................................................................................................................................................. A-1
A.1 General rules and regulations for S7-300 operation.................................................................. A-1
A.2 Protection against electromagnetic interference........................................................................ A-3
A.2.1 Basic Points for EMC-compliant system installations................................................................ A-3
A.2.2 Five basic rules for securing EMC.............................................................................................A-5
A.2.2.1 1. Basic rule for ensuring EMC..................................................................................................A-5
A.2.2.2 2. Basic rule for ensuring EMC..................................................................................................A-5
A.2.2.3 3. Basic rule for ensuring EMC..................................................................................................A-6
A.2.2.4 4. Basic rule for ensuring EMC..................................................................................................A-6
A.2.2.5 5. Basic rule for ensuring EMC..................................................................................................A-7
A.2.3 EMC-compliant installation of automation systems ................................................................... A-7
A.2.4 Examples of an EMC-compliant installation: Cabinet configuration .......................................... A-9
A.2.5 Examples of an EMC-compliant installation: Wall mounting.................................................... A-10
A.2.6 Cable shielding.........................................................................................................................A-12
A.2.7 Equipotential bonding...............................................................................................................A-14
A.2.8 Cable routing inside buildings ..................................................................................................A-16
A.2.9 Outdoor routing of cables.........................................................................................................A-18
A.3 Lightning and surge voltage protection.................................................................................... A-19
A.3.1 Overview .................................................................................................................................. A-19
A.3.2 Lightning protection zone concept ...........................................................................................A-19
A.3.3 Rules for the transition point between lightning protection zones 0 <-> 1............................... A-21
A.3.4 Rules for the transition point between lightning protection zones 1 <-> 2 and higher............. A-23
A.3.5 Example: Surge protection circuit for networked S7-300 PLCs............................................... A-26
A.3.6 How to protect digital output modules against inductive surge voltage................................... A-28
A.4 Safety of electronic control equipment.....................................................................................A-30
Glossary ..................................................................................................................................... Glossary-1
Index................................................................................................................................................ Index-1
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 xiii
Tables
Table 1 Scope of this manual .................................................................................................................... iii
Table 1-1 Ambient influence on the automation system (AS).................................................................... 1-1
Table 1-2 Galvanic isolation....................................................................................................................... 1-1
Table 1-3 Communication between sensors/actuators and the PLC......................................................... 1-2
Table 1-4 The use of local and distributed I/O........................................................................................... 1-2
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs) ................... 1-2
Table 1-6 CPU performance ...................................................................................................................... 1-2
Table 1-7 Communication.......................................................................................................................... 1-3
Table 1-8 Software..................................................................................................................................... 1-3
Table 1-9 Supplementary features............................................................................................................. 1-3
Table 3-1 S7-300 components: .................................................................................................................. 3-2
Table 4-1 Mounting rails - Overview .......................................................................................................... 4-4
Table 4-2 Module width.............................................................................................................................. 4-4
Table 4-3 Shielding terminals - Overview .................................................................................................. 4-5
Table 4-4 Interface modules - Overview.................................................................................................... 4-8
Table 4-5 Cabinet types ........................................................................................................................... 4-11
Table 4-6 Cabinet selection ..................................................................................................................... 4-13
Table 4-7 VDE specifications for the installation of a PLC system.......................................................... 4-14
Table 4-8 Measures for protective grounding .......................................................................................... 4-19
Table 4-9 Connecting the load voltage reference potential ..................................................................... 4-20
Table 4-10 Features of load power supply units ........................................................................................ 4-23
Table 4-11 Subnet nodes........................................................................................................................... 4-28
Table 4-12 MPI/PROFIBUS DP addresses................................................................................................ 4-28
Table 4-13 MPI addresses of CPs/FMs in an S7-300 system................................................................... 4-29
Table 4-14 Operating modes for CPUs with two DP interfaces................................................................. 4-32
Table 4-15 Permissible cable length of a segment on the MPI subnet...................................................... 4-34
Table 4-16 Permissible cable length of a segment on the PROFIBUS subnet.......................................... 4-34
Table 4-17 Lengths of stub cables per segment ........................................................................................ 4-35
Table 4-18 PG connecting cable................................................................................................................ 4-35
Table 4-19 Available bus cables ................................................................................................................ 4-35
Table 4-20 Properties of PROFIBUS bus cables....................................................................................... 4-36
Table 4-21 Marginal conditions for wiring interior bus cables.................................................................... 4-36
Table 4-22 Bus connector .......................................................................................................................... 4-37
Table 4-23 Data for twisted-pair patch cables............................................................................................ 4-53
Table 4-24 Data for user assemblies using patch cables of the Fast Connect product family.................. 4-54
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
xiv Operating Instructions, 12/2006, A5E00105492-07
Table 5-1 Module accessories ................................................................................................................... 5-2
Table 5-2 Installation tools and materials................................................................................................... 5-3
Table 5-3 Mounting holes for rails.............................................................................................................. 5-4
Table 5-4 Slot numbers for S7 modules..................................................................................................... 5-8
Table 6-1 Wiring accessories..................................................................................................................... 6-1
Table 6-2 Tools and material for wiring...................................................................................................... 6-1
Table 6-3 Wiring conditions for PS and CPU............................................................................................. 6-2
Table 6-4 Wiring conditions for front connectors........................................................................................ 6-2
Table 6-5 Assignment of front connectors to modules............................................................................... 6-7
Table 6-6 Wiring front connectors .............................................................................................................. 6-9
Table 6-7 Inserting the front connector .................................................................................................... 6-10
Table 6-8 Assignment of labeling strips to modules................................................................................. 6-11
Table 6-9 Shielding diameter assignment to shielding terminals............................................................. 6-12
Table 7-1 Integrated I/Os of CPU 312C..................................................................................................... 7-6
Table 7-2 Integrated I/Os of CPU 313C..................................................................................................... 7-7
Table 7-3 Integrated I/Os of CPU 313C-2 PtP/DP..................................................................................... 7-7
Table 7-4 Integrated I/Os of CPU 314C-2 PtP/DP..................................................................................... 7-7
Table 8-1 Recommended commissioning procedure: Hardware............................................................... 8-2
Table 8-2 HSP for PROFINET IO devices on CPU 31x PN/DP, V2.5 ....................................................... 8-4
Table 8-3 Recommended commissioning procedure - Part II: Software ................................................... 8-4
Table 8-4 Possible reasons of a CPU request to reset memory................................................................ 8-9
Table 8-5 Procedure for CPU memory reset............................................................................................ 8-10
Table 8-6 Internal CPU events on memory reset..................................................................................... 8-12
Table 8-7 Software requirements............................................................................................................. 8-25
Table 8-8 DP address areas of the CPUs................................................................................................ 8-25
Table 8-9 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP master ..... 8-27
Table 8-10 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP slave........ 8-31
Table 8-11 Configuration example for the address areas of transfer memory........................................... 8-32
Table 8-12 PROFINET IO address areas of the CPUs.............................................................................. 8-37
Table 8-13 CPU startup for operation as IO controller............................................................................... 8-42
Table 8-14 Even recognition of the CPU 31x PN/DP as IO controller ....................................................... 8-42
Table 9-1 Backing up the firmware to the SIMATIC Micro Memory Card.................................................. 9-3
Table 9-2 Firmware update using a SIMATIC Micro Memory Card........................................................... 9-4
Table 9-3 Properties of the CPU in the delivery state................................................................................ 9-7
Table 9-4 Lamp images.............................................................................................................................. 9-8
Table 10-1 SSL partial lists with I&M data ................................................................................................. 10-3
Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 xv
Table 10-2 Differences between forcing and controlling tags.................................................................... 10-6
Table 10-3 Status and error displays ....................................................................................................... 10-13
Table 10-4 Evaluation of the SF LED (Software error) ............................................................................ 10-14
Table 10-5 Evaluation of the SF LED (Hardware error)........................................................................... 10-16
Table 10-6 LEDs BF, BF1 and BF2 ......................................................................................................... 10-17
Table 10-7 BF LED is lit ........................................................................................................................... 10-17
Table 10-8 BF LED flashes ...................................................................................................................... 10-17
Table 10-9 BF2 / BF3 LED is lit................................................................................................................ 10-19
Table 10-10 BF2 / BF3 LED flashes at a PROFINET IO controller ........................................................... 10-19
Table 10-11 BF LED flashes on a PROFINET IO device .......................................................................... 10-20
Table 10-12 Event detection of CPU 31x2 operating as DP master.......................................................... 10-23
Table 10-13 Evaluating RUN to STOP transitions of the DP slave in the DP master................................ 10-23
Table 10-14 Reading out diagnostic data in the master system, using STEP 5 and STEP 7 ................... 10-25
Table 10-15 Event recognition of CPUs 31x-2 operating in DP slave mode ............................................. 10-29
Table 10-16 Evaluating RUNSTOP transitions in the DP Master/DP Slave.............................................. 10-29
Table 10-17 Structure of station status 1 (Byte 0) ..................................................................................... 10-32
Table 10-18 Structure of station status 2 (Byte 1) ..................................................................................... 10-32
Table 10-19 Structure of station status 3 (Byte 2) ..................................................................................... 10-33
Table 10-20 Structure of the Master PROFIBUS address (byte 3)............................................................ 10-33
Table 10-21 Structure of the manufacturer ID (byte 4 and 5) .................................................................... 10-33
Table 11-1 Use in industrial environments................................................................................................. 11-4
Table A-1 System startup after specific events .......................................................................................... A-1
Table A-2 Mains voltage............................................................................................................................. A-2
Table A-3 Protection against external electrical interference..................................................................... A-2
Table A-4 Protection against external electrical interference..................................................................... A-2
Table A-5 Coupling mechanisms................................................................................................................ A-4
Table A-6 Cable routing inside buildings.................................................................................................. A-16
Table A-7 Lightning conductor (Type 1) of cables with the help of surge protection equipment ............. A-22
Table A-8 Surge-protection components for lightning protection zones 1 <-> 2...................................... A-24
Table A-9 Surge-protection components for lightning protection zones 2 <-> 3...................................... A-25
Table A-10 Example of a circuit conforming to lightning protection requirements (legend to previous
figure) ....................................................................................................................................... A-27

Table of contents

S7-300, CPU 31xC and CPU 31x: Installation
xvi Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 1-1
Guide to the S7-300 documentation
1
Overview
There you find a guide leading you through the S7-300 documentation.
Selecting and configuring
Table 1-1 Ambient influence on the automation system (AS)
Information on.. is available in ...
What provisions do I have to make for AS installation
space?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Configuring - Component dimensions
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Mounting - Installing the mounting rail
How do environmental conditions influence the AS? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Appendix

Table 1-2 Galvanic isolation
Information on.. is available in ...
Which modules can I use if electrical isolation is required
between sensors/actuators?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Electrical
assembly, protective measures and grounding
Module Data Manual
Under what conditions do I have to isolate the modules
electrically?
How do I wire that?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Electrical
assembly, protective measures and grounding
CPU 31xC and CPU 31x operating instructions: Installation:
Wiring
Under which conditions do I have to isolate stations
electrically?
How do I wire that?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation Configuring Configuring subnets

Guide to the S7-300 documentation

S7-300, CPU 31xC and CPU 31x: Installation
1-2 Operating Instructions, 12/2006, A5E00105492-07
Table 1-3 Communication between sensors/actuators and the PLC
Information on.. is available in ...
Which module is suitable for my sensor/actuator? For CPU: CPU 31xC and CPU 31x Manual, Technical Data
For signal modules: Reference manual of your signal
module
How many sensors/actuators can I connect to the module? For CPU: CPU 31xC and CPU 31x Manual, technical data
of signal modules: Reference manual of your signal module
To connect my sensors/actuators to the PLC, how do I wire
the front connector ?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Wiring Wiring the front connector
When do I need expansion modules (EM) and how do I
connect them?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Distribution of
modules to several racks
How to mount modules on racks / mounting rails S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Assembly Installing modules on the mounting
rail
Table 1-4 The use of local and distributed I/O
Information on.. is available in ...
Which range of modules do I want to use? For local I/O and expansion devices: Module Data reference
manual
For distributed I/O and PROFIBUS DP: Manual of the
relevant I/O device
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs)
Information on.. is available in ...
Which rack / mounting rail is most suitable for my
application?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring
Which interface modules (IM) do I need to connect the EMs
to the CU?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Distribution of
modules to several racks
What is the right power supply (PS) for my application? S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring
Table 1-6 CPU performance
Information on.. is available in ...
Which memory concept is best suited to my application? CPU 31xC and CPU 31x Manual, Technical Data
How do I insert and remove Micro Memory Cards? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Commissioning Commissioning modules
Removing / inserting a Micro Memory Card (MMC)
Which CPU meets my demands on performance? S7-300 instruction list: CPU 31xC and CPU 31x
Length of the CPU response / execution times CPU 31xC and CPU 31x Manual, Technical Data
Which technological functions are implemented? Technological Functions Manual
How can I use these technological functions? Technological Functions Manual

Guide to the S7-300 documentation

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 1-3
Table 1-7 Communication
Information on.. is available in ...
Which principles do I have to take into account? Communication with SIMATIC Manual
PROFINET System Manual, System Description
Options and resources of the CPU CPU 31xC and CPU 31x Manual, Technical Data
How to use communication processors (CPs) to optimize
communication
CP Manual
Which type of communication network is best suited to my
application?
S7-300, CPU 31xC and CPU 31x operating instructions:
Hardware and Installation: Configuring Configuring
subnets
How to network the various components S7-300, CPU 31xC and CPU 31x Operating Instructions:
Hardware and Installation: Configuring Configuring
subnets
What to take into account when configuring PROFINET
networks
SIMATIC NET Manual, Twisted-Pair and Fiber Optic
Networks (6GK1970-1BA10-0AA0) Network Configuration
PROFINET System Manual, System Description
Installation and Commissioning
Table 1-8 Software
Information on.. is available in ...
Software requirements of my S7-300 system CPU 31xC and CPU 31x Manual, Technical Data
Technical Data
Table 1-9 Supplementary features
Information on.. is available in ...
How to implement monitor and modify functions
(Human Machine Interface)
For text-based displays: The relevant Manual
For Operator Panels: The relevant Manual
For WinCC: The relevant Manual
How to integrate process control modules For PCS7: The relevant Manual
What options are offered by redundant and fail-safe
systems?
S7-400H Manual Redundant Systems
Fail-Safe Systems Manual
Information to be observed when migrating from PROFIBUS
DP to PROFINET IO
Programming Manual: From PROFIBUS DP to PROFINET
IO

Guide to the S7-300 documentation

S7-300, CPU 31xC and CPU 31x: Installation
1-4 Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 2-1
Installation Order
2
We will start by showing you the sequence of steps you have to follow to install your system.
Then we will go on to explain the basic rules that you should follow, and how you can modify
an existing system.
Installation procedure

Configuring
lnstallation
Wiring
Networking
Yes
Should a subnetwork
be installed?
No
Addressing
lnstallation completed,
continue with commissioning


Basic rules for trouble-free operation of the S7 system
In view of the many and versatile applications, we can only provide basic rules for the
electrical and mechanical installation in this section.
You have to at least keep to these basic rules in order to obtain a fully functional SIMATIC-
S7 system.
Installation Order

S7-300, CPU 31xC and CPU 31x: Installation
2-2 Operating Instructions, 12/2006, A5E00105492-07
Modifying the existing S7 system structure
To modify the configuration of an existing system, proceed as described earlier.

Note
When adding a new signal module, always refer to the relevant module information.

Reference
Also refer to the description of the various modules in the manual: SIMATIC S7-300
Automation Systems, Module Data Manual.

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 3-1
S7-300 components
3
3.1 Example of an S7-300 configuration
SF
BUSF
DC5V
FRCE
RUN
STOP
SF
BUSF
DC5V
FRCE
RUN
STOP
5
4
1 2 3



Number Description
Power supply (PS) module
Central processing unit (CPU); the example in the diagram shows a CPU 31xC with
integrated I/O.
Signal module (SM)
PROFIBUS bus cable
Cable for connecting a programming device (PG)
You use a programming device (PG) to program the S7300 PLC. Use the PG cable to
interconnect the PG with the CPU.
To commission or program a CPU with PROFINET interface, you may also use an Ethernet
cable to interconnect the PG with the PROFINET connector of the CPU.
Several S7-300 CPUs communicate with one another and with other SIMATIC S7 PLCs via
the PROFIBUS cable. Several S7-300 are connected via the PROFIBUS bus cable.
S7-300 components
3.2 Overview of the vital modules of an S7-300
S7-300, CPU 31xC and CPU 31x: Installation
3-2 Operating Instructions, 12/2006, A5E00105492-07
3.2 Overview of the vital modules of an S7-300
You can choose from a number of modules for installing and commissioning the S7-300. The
most important modules and their functions are shown below.
Table 3-1 S7-300 components:
Component Function Illustration
Mounting rail
Accessories:
Shielding terminal
S7-300 racks


Power supply (PS) module The PS converts the line voltage
(120/230 VAC) into a 24 VDC operating
voltage, and supplies the S7-300 and
its 24 VDC load circuits.




A CPU 31xC, for example
SlEMENS


A CPU 312, 314, or 315-2 DP, for
example
CPU
Accessories:
Front connectors (CPU 31xC only)
The CPU executes the user program,
supplies 5 V to the S7-300 backplane
bus, and communicates with other
nodes of an MPI network via the MPI
interface.
Additional features of specific CPUs:
DP master or DP slave on a
PROFIBUS subnet
Technological functions
PtP communication
Ethernet communication via
integrated PROFINET interface


A CPU 317, for example
S7-300 components
3.2 Overview of the vital modules of an S7-300
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 3-3
Component Function Illustration
Signal modules (SM)
Digital input modules
Digital output modules
Digital I/O modules,
Analog input modules
Analog output modules
Analog I/O modules

Accessories:
Front connectors
The SM matches different process
signal levels to the S7-300.


Function modules (FM)
Accessories:
Front connectors
The FM performs time-critical and
memory-intensive process signal
processing tasks.
Positioning or controlling, for example


Communication processor (CP)
Accessories: Connecting cable
The CP relieves the CPU of
communication tasks.
Example: CP 342-5 DP for connecting
to PROFIBUS DP


SIMATIC TOP connect
Accessories:
Front connector module with ribbon
cable terminals
Wiring of digital modules


Interface module (IM)
Accessories:
Connecting cable
The IM interconnects the various rows
in an S7-300


PROFIBUS cable with bus connector Interconnect the nodes of an MPI or
PROFIBUS subnet


S7-300 components
3.2 Overview of the vital modules of an S7-300
S7-300, CPU 31xC and CPU 31x: Installation
3-4 Operating Instructions, 12/2006, A5E00105492-07
Component Function Illustration
PG cable Connects a PG/PC to a CPU


RS 485 repeater
RS 485 Diagnostic Repeater
The repeater is used to amplify the
signals and to couple segments of an
MPI or PROFIBUS subnet.


Switch A switch is used to interconnect the
Ethernet nodes.


Twisted-pair cables with RJ45
connectors.
Interconects devices with Ethernet
interface (a switch with a CPU 317-2
PN/DP, for example)


Programming device (PG) or PC with
the STEP 7 software package
You need a PG to configure, set
parameters, program and test your S7-
300




S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-1
Configuring
4
4.1 Overview
There, you can find all the necessary information
for the mechanical configuration of an S7-300,
for the electrical configuration of an S7-300,
that has to be observed in networking.
Reference
For more detailed information, refer to
the Communication with SIMATIC manual or
the SIMATIC NET Twisted-Pair and Fiber-Optic Networks Manual
(6GK1970-1BA10-0AA0)
Configuring
4.2 Basic engineering principles
S7-300, CPU 31xC and CPU 31x: Installation
4-2 Operating Instructions, 12/2006, A5E00105492-07
4.2 Basic engineering principles
Important information for engineering


Warning
Open equipment
S7-300 modules are open equipment. That is, the S7-300 must be installed in a cubicle,
cabinet or electrical control room which can only be accessed using a key or tool. Only
trained or authorized personnel are allowed access to such cubicles, cabinets or electrical
operating rooms.


Caution
Operation of an S7-300 in plants or systems is defined by special set of rules and
regulations, based on the relevant field of application. Observe the safety and accident
prevention regulations for specific applications, for example, the machine protection
directives. This chapter and the appendix General rules and regulations on S7-300 operation
provide an overview of the most important rules you need to observe when integrating an
S7-300 into a plant or a system.

Central Rack (CR) and Expansion Rack (ER)
An S7-300 PLC consists of a central unit (CU) and of one or multiple expansion modules.
The rack containing the CPU is the central unit (CU). Racks equipped with modules and
connected to the CU form the expansion modules (EMs) of the system.
Use of an expansion module (EM)
You can use EMs if the CU runs out of slots for your application.
When using EMs, you might require further power supply modules in addition to the extra
racks and interface modules (IM). When using interface modules you must ensure
compatibility of the partner stations.
Racks
The rack for your S7-300 is a mounting rail. You can use this rail to mount all modules of
your S7-300 system.
Configuring
4.2 Basic engineering principles
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-3
Horizontal and vertical installation
You can mount an S7-300 either vertically or horizontally. The following ambient air
temperatures are permitted:
Vertical assembly: 0 C to 40 C
Horizontal assembly: 0 C to 60 C
Always install the CPU and power supply modules on the left or at the bottom.
DC5 V
FRCE
RUN
ST OP
D
C
5
F
R
C
E
R
U
N
S
T
O
P
SM
SM
SM
SM SM SM SM SM
SM
SM
SM
SM SM SM
SM
SM
CPU
CPU
PS
PS
1
2
3
3



Number Description
the vertical installation of an S7-300
the horizontal installation of an S7-300
The mounting rail

Configuring
4.3 Component dimensions
S7-300, CPU 31xC and CPU 31x: Installation
4-4 Operating Instructions, 12/2006, A5E00105492-07
4.3 Component dimensions
Length of the mounting rails
Table 4-1 Mounting rails - Overview
Mounting rail length Usable length for modules Order No.
160 mm 120 mm 6ES7 390-1AB60-0AA0
482.6 mm 450 mm 6ES7 390-1AE80-0AA0
530 mm 480 mm 6ES7 390-1AF30-0AA0
830 mm 780 mm 6ES7 390-1AJ30-0AA0
2000 mm cut to length as required 6ES7 390-1BC00-0AA0
In contrast to other rails, the 2 m mounting rail is not equipped with any fixing holes. These
must be drilled, allowing optimal adaptation of the 2 m rail to your application.
Installation Dimensions of the Modules
Table 4-2 Module width
Module Width
Power supply module PS 307, 2 A 50 mm
Power supply module PS 307, 5 A 80 mm
Power supply module PS 307, 10 A 200 mm
CPU For information on assembly dimensions,
refer to the Technical Data in CPU 31xC and
CPU 31x Manual, Technical Data.
Analog I/O modules 40 mm
Digital I/O modules 40 mm
Simulator module SM 374 40 mm
Interface modules IM 360 and IM 365 40 mm
Interface module IM 361 80 mm
Module height: 125 mm
Module height with shielding contact element: 185 mm
Maximum assembly depth: 130 mm
Maximum assembly depth of a CPU with an inserted DP connector with angled cable
feed: 140 mm
Maximum assembly depth with open front panel (CPU): 180 mm
Dimensions of other modules such as CPs, FMs etc. are found in the relevant manuals.
Configuring
4.3 Component dimensions
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-5
Shielding contact element
The direct contact between the shielding contact element and the mounting rail makes it
easy for you to connect all shielded cables of your S7 modules to ground.
C
P
U
P
S
1
2



Number Description
Shielding terminals
The bracket.
Mount the bracket (order number. 6ES7 390-5AA0-0AA0) to the rail using the two screw
bolts. If you use a shielding contact element, the specified dimensions are measured from
the base of the element.
Width of the shielding contact element: 80 mm
Mountable terminal elements per shield connecting element max. 4
Table 4-3 Shielding terminals - Overview
Cable with shielding diameter Shielding terminal order no.
Cable with 2 mm to 6 mm shielding diameter 6ES7 390-5AB000AA0
Cable with 3 mm to 8 mm shielding diameter 6ES7 390-5BA000AA0
Cable with 4 mm to 13 mm shielding diameter 6ES7 390-5CA000AA0

Configuring
4.4 Specified clearances
S7-300, CPU 31xC and CPU 31x: Installation
4-6 Operating Instructions, 12/2006, A5E00105492-07
4.4 Specified clearances
You must maintain the clearance shown in the figure in order to provide sufficient space for
installing the modules, and to allow the dissipation of heat generated by the modules.
The S7-300 assembly on multiple racks shown in the figure below shows the clearance
between racks and adjacent components, cable ducts, cabinet walls etc.
For example, when routing your module wiring through cable duct, the minimum clearance
between the bottom of the shield connection element and the cable duct is 40 mm.
40 mm
40 mm
40 mm
40 mm
200 mm + a
a
20 mm 20 mm
SM
SM
SM
SM SM CPU
PS
CPU
2
1



Number Description
Wiring with cable duct
Minimum clearance between the cable duct and the bottom edge of the shielding contact
element is 40 mm

Configuring
4.5 Arrangement of modules on a single rack
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-7
4.5 Arrangement of modules on a single rack
Reasons for using one or multiple racks
The number of racks you need will depend on your application.

Reasons for using a single rack: Reasons for distributing modules between
several racks
Compact, space-saving use of all your
modules
Local use of all modules
Fewer signals to be processed
More signals to be processed
Insufficient number of slots


Note
If you opt for the installation on a single rack, insert a dummy module to the right of the CPU
(order no.: 6ES7 370-0AA01-0AA0). This gives you the option of adding a second rack for
your application, simply by replacing the dummy module with an interface module, and
without having to reinstall and rewire the first rack.

Rules: Layout of modules on a single module rack
The following rules apply to module installations on a single rack:
No more than eight modules (SM, FM, CP) may be installed to the right of the CPU.
The accumulated power consumption of modules mounted on a rack may not exceed 1.2
A on the S7-300 backplane bus.
Reference
Further information is available in the technical data, for example, in the SIMATIC S7-300
Automation Systems Manual, Module data, or in the S7-300 Manual, CPU 31xC and CPU
31x, Technical Data.
Example
The figure below shows a layout with eight signal modules in an S7-300 assembly.
CPU PS SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8


Configuring
4.6 Distribution of modules to several racks
S7-300, CPU 31xC and CPU 31x: Installation
4-8 Operating Instructions, 12/2006, A5E00105492-07
4.6 Distribution of modules to several racks
Exceptions
With CPU 312 and CPU 312C, only a single-row configuration on a rack is possible.
Using interface modules
If you are planning an assembly in multiple racks, then you will need interface modules (IM).
An interface module routes the backplane bus of an S7-300 to the next rack.
The CPU is always located on rack 0.
Table 4-4 Interface modules - Overview
Properties Two or more rows Cost-effective 2-row configuration
Send IM in rack 0 IM 360
order no..: 6ES7 360-3AA01-0AA0
IM 365
order no..: 6ES7 365-0AB00-0AA0
Receiver IM in racks 1 to 3 IM 361
order no..: 6ES7 361-3CA01-0AA0
IM 365 (hard-wired to send IM 365)
Maximum number of expansion
modules
3 1
Length of connecting cables 1 m (6ES7 368-3BB01-0AA0)
2.5 m (6ES7 368-3BC51-0AA0)
5 m (6ES7 368-3BF01-0AA0)
10 m (6ES7 368-3CB01-0AA0)
1 m (hard-wired)
Remarks - Rack 1 can only receive signal modules;
the accumulated current load is limited to
1.2 A, whereby the maximum for rack 1 is
0.8 A
These restrictions do not apply to operation
with interface modules IM 360/IM 361
Rules: Distribution of modules to several racks
Please note the following points if you wish to arrange your modules on multiple racks:
The IM always uses slot 3 (slot 1: power supply module; slot 2: CPU, slot 3: Interface
module)
It is always on the left before the first signal module.
No more than 8 modules (SM, FM, CP) are permitted per rack.
The number of modules (SM, FM, CP) is limited by the permitted current consumption on
the S7-300 backplane bus. The accumulated power consumption may not exceed 1.2 A
per row.



Note
For information on the current consumption of the modules, refer to the SIMATIC
Automation Systems S7-300, Module Specifications Manual.
Configuring
4.6 Distribution of modules to several racks
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-9
Rules: Interference-proof interfacing
Special shielding and grounding measures are not required if you interconnect the CU and
EM using suitable interface modules (Send IM and Receive IM).
However, you must ensure
a low impedance interconnection of all racks,
that the racks of a grounded assembly are grounded in a star pattern,
that the contact springs on the racks are clean and not bent, thus ensuring that
interference currents are properly discharged to ground.
Example: Full assembly using four racks
The figure shows the arrangement of modules in an S7-300 assembly on 4 racks.
CPU PS
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8
PS
PS
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8 lM
lM
lM
lM
1
2
3
4
5
5
5
6


Number Description
Rack 0 (central unit)
Rack 1 (expansion module)
Rack 2 (expansion module)
Rack 3 (expansion module)
The connecting cable 368
Restriction for CPU 31xC. When this CPU is used, do not insert SM 8 into Rack 4.
Configuring
4.7 Selection and installation of cabinets
S7-300, CPU 31xC and CPU 31x: Installation
4-10 Operating Instructions, 12/2006, A5E00105492-07
4.7 Selection and installation of cabinets
Reasons for installing an S7-300 in a cabinet
Your S7-300 should be installed in a cabinet,
if you plan a larger system,
if you are using your S7-300 systems in an environment subject to interference or
contamination, and
to meet UL/CSA requirements for cabinet installation.
Selecting and dimensioning cabinets
Take the following criteria into account:
ambient conditions at the cabinet's place of installation
the specified mounting clearance for racks (mounting rails)
accumulated power loss of all components in the cabinet.
The ambient conditions (temperature, humidity, dust, chemical influence, explosion hazard)
at the cabinet's place of installation determine the degree of protection (IP xx) required for
the cabinet.
Reference for degrees of protection
For further information on the degrees of protection, refer to IEC 529 and DIN 40050.
The power dissipation capability of cabinets
The power dissipation capability of a cabinet depends on its type, ambient temperature and
on the internal arrangement of devices.
Reference for power loss
For detailed information on dissipatable power loss, refer to the Siemens catalogs. You can
find these at: https://mall.automation.siemens.com/de/guest/guiRegionSelector.asp
Specification of cabinet dimensions
Note the following specifications when you determine the dimensions of a cabinet for your
S7-300 installation:
Space required for racks (mounting rails)
Minimum clearance between the racks and cabinet walls
Minimum clearance between the racks
Space required for cable ducts or fan assemblies
Position of the stays



Warning
Modules may get damaged if exposed to excess ambient temperatures.

Configuring
4.7 Selection and installation of cabinets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-11
Reference for ambient temperatures
For information on permitted ambient temperatures, refer to the S7-300 Automation System,
Module Data Manual.
Overview of typical cabinet types
The table below gives you an overview of commonly used cabinet types. It shows you the
applied principle of heat dissipation, the calculated maximum power loss and the degree of
protection.
Table 4-5 Cabinet types
Open cabinets Closed cabinets
Through-ventilation by
natural convection
Increased through-
ventilation
Natural convection Forced convection with
rack fan, improvement
of natural convection
Forced convection with
heat exchanger,
internal and external
auxiliary ventilation










Mainly inherent heat
dissipation, with a
small portion across
the cabinet wall.
Higher heat dissipation
with increased air
movement.
Heat dissipation only
across the cabinet
wall; only low power
losses permitted. In
most cases, the heat
accumulates at the top
of the cabinet interior.
Heat dissipation only
across the cabinet
wall. Forced
convection of the
interior air improves
heat dissipation and
prevents heat
accumulation.
Heat dissipation by
heat exchange
between heated
internal air and cool
external air. The
increased surface of
the pleated profile of
the heat exchanger
wall and forced
convection of internal
and external air
provide good heat
dissipation.
Degree of protection
IP 20
Degree of protection
IP 20
Degree of protection
IP 54
Degree of protection
IP 54
Degree of protection
IP 54
Typical power dissipation under following marginal conditions:
Cabinet size: 600 mm x 600 mm x 2,200 mm
Difference between the outer and inner temperature of the cabinet is 20 C (for other temperature differences refer to
the temperature charts of the cabinet manufacturer)
up to 700 W up to 2,700 W (with
fine filter up to
1,400 W)
up to 260 W up to 360 W up to 1,700 W
Configuring
4.8 Example: Selecting a cabinet
S7-300, CPU 31xC and CPU 31x: Installation
4-12 Operating Instructions, 12/2006, A5E00105492-07
4.8 Example: Selecting a cabinet
Introduction
The sample below clearly shows the maximum permitted ambient temperature at a specific
power loss for different cabinet designs.
Installation
The following device configuration should be installed in a cabinet:
Central unit, 150 W
Expansion modules, each with 150 W
Load power supply under full load, 200 W
This results in an accumulated power loss of 650 W.
Power loss dissipated
The diagram in the figure below shows guide values for the permitted ambient temperature
of a cabinet with the dimensions 600 mm x 600 mm x 2,000 mm, based on the accumulated
power loss. These values only apply if you maintain the specified assembly and clearance
dimensions for racks (rails).

200 400 600 1000 1200 1400
20
30
40
50
60
800
Power loss in W
Ambient temperature in C
1
2
3


Number Description
Closed cabinet with heat exchanger (heat exchanger size 11/6 (920 mm x 460 mm x
111 mm))
Cabinet with through-ventilation by natural convection
Closed cabinet with natural convection and forced convection by equipment fans
Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-13
Result
The figure below shows the resultant ambient temperatures, based on an accumulated
power loss of 650 W:
Table 4-6 Cabinet selection
Cabinet design Maximum permitted ambient
temperature
Closed with natural convection and forced convection (trend
3)
Operation not possible
Open with through-ventilation (trend 2) approx. 38 C
Closed with heat exchanger (trend 1) approx. 45 C
Cabinet types suitable for horizontal installation of the S7-300:
open, with closed ventilation
closed, with heat exchanger
4.9 Electrical assembly, protective measures and grounding
4.9.1 Grounding concept and overall structure
This section contains information about the overall configuration of an S7-300 connected to a
grounded TN-S network:
Circuit-breaking devices, short-circuit and overload protection to VDE 0100 and
VDE 0113
Load power supplies and load circuits
Grounding concept



Note
An S7-300 can be used in many different ways, so we can only describe the basic rules
for the electrical installation in this document. Those basic rules are a must in order to
achieve a fully functional S7-300 system.

Definition: Grounded mains
In a grounded mains network, the neutral conductor is always bonded to ground. A short-
circuit to ground of a live conductor, or of a grounded part of the system, trips the protective
devices.
Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
4-14 Operating Instructions, 12/2006, A5E00105492-07
Specified components and protective measures
A number of components and protective measures are prescribed for plant installations. The
type of components and the degree of compulsion pertaining to the protective measures will
depend on the VDE specification applicable to your particular plant.
The table below shows components and protective measures.
Table 4-7 VDE specifications for the installation of a PLC system
Compare ... 1) VDE 0100 VDE 0113
Disconnect devices for control
systems, signal generators and
final control elements
(1) ...Part 460:
Master switch
... Part 1:
Load disconnect switch
Short-circuit / overload
protection:
In groups for signal generators
and final control elements
(2) ...Part 725:
Single-pole fusing of
circuits
... Part 1:
With grounded secondary
power circuit: single-pole
fusing
Otherwise: fusing of all poles
Load power supply for AC load
circuits with more than five
electromagnetic devices
(3) Galvanic isolation by
transformer
recommended
Electrical isolation by transformer
mandatory
1) This column refers to the indexes of the figure in the chapter "Overview: Grounding".
Reference
For further information on protective measures, refer to the Appendix.
See also
Overview display: Earthing (Page 4-21)
4.9.2 Installing an S7-300 with grounded reference potential
Introduction
When the S7-300 is configured with a grounded reference potential, any interference
currents are discharged to the grounding conductor / ground. A grounding slide contact is
used for this except with CPU 31xC.

Note
Your CPU is supplied with grounded reference potential. Therefore, if you wish to install an
S7-300 with grounded reference potential, you do not need to modify your CPU!

Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-15
Grounded reference potential of the CPU 31x
The figure shows an S7-300 configuration with grounded reference potential (factory state.)
M L+
M
10M <100nF
M
1
2
3



Number Description
Grounding slide contact in grounded state
Ground of the internal CPU circuitry
The mounting rail


Note
Do not pull out the grounding slide contact when you install an S7-300 with grounded
reference potential.

4.9.3 Installing an S7-300 with ungrounded reference potential (not CPU 31xC)
Introduction
When the S7-300 is configured with an ungrounded reference potential, interference currents
are discharged to the ground conductor / to ground via an RC combination integrated in the
CPU.

Note
An S7-300 with a CPU 31xC cannot be configured ungrounded.

Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
4-16 Operating Instructions, 12/2006, A5E00105492-07
Application
In large systems, the S7-300 may require a configuration with grounded reference potential
due to ground-fault monitoring. This is the case, for example, in chemical industry and power
stations.
Ungrounded reference potential of the CPU 31x
The figure shows an S7-300 configuration with floating potential
M L+
M
10M <100 nF
M
2
3
1


Number Description
How to implement an ungrounded reference potential in your CPU: Use a screwdriver with
3.5 mm blade width to push the grounding slide contact forwards in the direction of the
arrow until it snaps into place.
Ground of the internal CPU circuitry
The mounting rail.


Note
You should set up the ungrounded reference potential before you mount the device on the
rail. If you have already installed and wired up the CPU, you may have to disconnect the MPI
interface before you pull out the grounding slide contact.

Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-17
4.9.4 Isolated or common potential modules?
Isolated modules
Isolated modules are installed with galvanic isolation between the reference potentials of the
control circuit (Minternal) and load circuit (Mexternal.)
Field of application
Use isolated modules for:
All AC load circuits
DC load circuits with separate reference potential
Examples:
DC load circuits containing sensors which are connected to different reference
potentials (for example, if grounded sensors are located at a considerable distance
from the control system and equipotential bonding is not possible)
DC load circuits with grounded positive pole (L+) (battery circuits.)
Isolated modules and grounding concept
You can always use isolated modules, irrespective of the grounding state of the control
system's reference potential.
Example: Assembly with CPU 31xC and isolated modules
The figure below shows an example of such a configuration: A CPU 31xC with isolated
modules. The CPU 31xC (1) is automatically grounded.
PS Dl DO S7-300 CPU
U
L1 L+
L+
P
N
L1
L1
N
N
PE
Data
intern
M
intern
M
M
extern
AC 230 V load current
supply
24 VDC load current supply
Grounding busbar in
cabinet
1


Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
4-18 Operating Instructions, 12/2006, A5E00105492-07
Common potential modules
In a configuration containing modules with common potential, the reference potentials of the
control circuit (Minternal) and analog circuit (Manalog) are not galvanically isolated.
Example: Installing an S7-300 with common potential modules
When using an SM 334 AI 4/AO 2 analog I/O module, connect one of the grounding
terminals Manalog to the CPU's chassis ground.
The figure below shows an example of such a configuration: An S7-300 with common
potential modules
PS S7-300 CPU
1 mm
2
U
Data
V
A
A A
D D
P
intern
M
intern
M
M
M
L+
L+
L1
L1
N
N
PE
extern
M
analog
+ +
Grounding busbar in
cabinet
24 VDC load current supply

Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-19
4.9.5 Grounding measures
Bonding to ground
Low-impedance connections to ground reduce the risk of electric shock as a result of a
short-circuit or system fault. Low-impedance connections (large surface, large-surface
contact) reduce the effects of interference on the system or the emission of interference
signals. An effective shielding of cables and devices is also a significant contribution.


Warning
All protection class 1 devices, and all larger metal parts, must be bonded to protective
ground. That is the only way to safely protect operators from electrical shock. This also
discharges any interference transmitted from external power supply cables, signal cables or
cables to the I/O devices.

Measures for protective grounding
The table below shows an overview of the most important measures for protective
grounding.
Table 4-8 Measures for protective grounding
Device Measures
Cabinet / mounting frame Connection to central ground (equipotential busbar, for example)
using cables with protective conductor quality
Rack / mounting rail Connection to central ground, using cables with a minimum cross-
section of 10 mm
2
, if the rails are not installed in the cabinet and not
interconnected with larger metallic parts.
Module None
I/O Device Grounding via grounding-type plug
Sensors and final control
elements
Grounding in accordance with regulations applying to the system
Rule: Connect the cable shielding to ground
You should always connect both ends of the cable shielding to ground / system ground. This
is the only way to achieve an effective interference suppression in the higher frequency
range.
Attenuation is restricted to the lower frequency range if you connect only one end of the
shielding (that is, at the start or end of the cable) to ground. One-sided shielding connections
could be more favorable in situations
not allowing the installation of an equipotential bonding conductor,
where analog signals (some mA or A) are transferred,
or if foil shielding is used (static shielding).
Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
4-20 Operating Instructions, 12/2006, A5E00105492-07


Note
Potential differences between two grounding points might cause an equipotential current
flow across shielding connected at both ends. In this case, you should install an
additional equipotential bonding conductor.



Caution
Always avoid the flow of operating current to ground.

Rule: Load circuit grounding
You should always ground the load circuits. This common reference potential (ground)
ensures proper functioning.

Note
(not valid for CPU 31xC):
If you want to locate a fault to ground, provide your load power supply (terminal L or M) or
the isolating transformer with a removable connection to the protective conductor (see
Overview: Grounding section 4).

Connecting the load voltage reference potential
A complex system containing many output modules requires an additional load voltage for
switching the final control elements.
The table below shows how to connect the load voltage reference potential Mexternal for the
various configurations.
Table 4-9 Connecting the load voltage reference potential
Installation

common potential modules isolated modules Note
grounded Connect Mexternal with M on
the CPU
Connect or do not connect
Mexternal to the grounding
busbar
-
ungrounded Connect Mexternal with M on
the CPU
Connect or do not connect
Mexternal to the grounding
busbar
Ungrounded installation
with CPU 31xC is not
possible

Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-21
4.9.6 Overview display: Earthing
CPU 31xC
The figure below shows you the complete assembly of an S7-300 with CPU 31xC with a
power supply from TN-S mains. Apart from powering the CPU, the PS 307 also supplies the
load current for the 24 VDC modules. Remark: The layout of the power connections does not
correspond with their physical arrangement; it was merely selected to give you a clear
overview.
L1
L2
L3
N
PE
SM CPU PS
AC
AC
AC
AC
DC
DC
L1
L +
M
P
N
Low-voltage distribution
TN-S system (3 x 400 V), for example
Cabinet
Signal modules
Mounting rail
Grounding busbar in cabinet
Load voltage circuit
24 VAC to 230 VAC for AC modules
Load voltage circuit
5 VDC to 60 VDC for non-isolated DC modules
Load voltage circuit
5 VDC to 60 VDC for isolated DC modules
1
3
4
2
2
2

Figure 4-1 Connecting the load voltage reference potential
Number Description
The main switch
The short-circuit / overload protection
The load current supply (galvanic isolation)
This connection is made automatically for the CPU 31xC
Configuring
4.9 Electrical assembly, protective measures and grounding
S7-300, CPU 31xC and CPU 31x: Installation
4-22 Operating Instructions, 12/2006, A5E00105492-07
All CPUs except CPU 31xC
The figure below shows you the complete assembly of an S7-300 with TN-S mains supply
(does not apply to CPU 31xC). Apart from powering the CPU, the PS 307 also supplies the
load current for the 24 VDC modules.
Remark: The layout of the power connections does not correspond with their physical
arrangement; it was merely selected to give you a clear overview.
AC
AC
AC
AC
DC
DC
PS
CPU SM
L1
N
L +
Mb
P
L1
Mb
L2
L3
N
PE
Cabinet
Mounting rail
Signal modules
Load circuit
24 VAC to 230 VAC for AC modules
Load circuit
5 VDC to 60 VDC for non-isolated DC modules
Load circuit
5 VDC to 60 VDC for optically isolated DC modules
Low-voltage distribution
e.g. TN S system (3 x 400 V)
Ground bus in cabinet
1
3
4
2
2
2
5

Figure 4-2 Connecting the load voltage reference potential
Number Description
The main switch
The short-circuit / overload protection
The load current supply (galvanic isolation)
The removable connection to the grounding conductor, for ground fault localization
The grounding slide contact of the CPU (not CPU 31xC)
Configuring
4.10 Selection of the load power supply
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-23
4.10 Selection of the load power supply
Task of the load power supply
The load power supply feeds the input and output circuits (load circuits), and the sensors
and actuators.
Features of load power supply units
You will have to adapt the load power supply unit to your specific application. The table
below shows a comparison of the various load power supply units and their features to help
you make your choice:
Table 4-10 Features of load power supply units
Necessary for ... Feature of the load power
supply
Remarks
Modules requiring voltage
supplies 60 VDC or 25 VAC.
24 VDC load circuits
Safety isolation This is a common feature of the
Siemens power supply series
PS 307 and SITOP power
series 6EP1.


24 VDC load circuits
48 VDC load circuits
60 VDC load circuits
Output voltage tolerances:
20.4 V to 28.8 V
40.8 V to 57.6 V
51 V to 72 V
-
Load power supply requirements
Only an extra-low voltage of 60 VDC which is safely isolated from mains may be used as
load voltage. Safe isolation from mains can be achieved, for example, in accordance with
VDE 0100 Part 410 / HD 384-4-41 / IEC 364-4-41 (as functional extra-low voltage with safe
isolation) or VDE 0805 / EN 60950 / IEC 950 (as safety extra-low voltage SELV) or VDE
0106 Part 101.
Load current determination
The required load current is determined by the accumulated load current of all sensors and
actuators connected to the outputs.
A short-circuit induces a surge current at the DC outputs which is 2 to 3 times higher than
the rated output current, until the clocked electronic short-circuit protection comes into effect.
Make allowances for this increased short-circuit current when selecting your load power
supply unit. Uncontrolled load power supplies usually provide this excess current. With
controlled load power supplies, and particularly for low output power up to 20 A, always
ensure that the supply can handle this excess current.
Configuring
4.10 Selection of the load power supply
S7-300, CPU 31xC and CPU 31x: Installation
4-24 Operating Instructions, 12/2006, A5E00105492-07
Example: S7-300 with load power supply from PS 307
The figure below shows the overall S7-300 configuration (load power supply unit and
grounding concept), with TN-S mains supply. The PS 307 supplies the CPU and the load
current circuit of the 24 VDC modules.

Note
The layout of the power connections does not correspond with their physical arrangement; it
was merely selected to give you a clear overview.

PS
CPU SM
L1
N
L +
M
P
L1
M
L2
L3
N
PE
Cabinet
Mounting rail
Signal modules
Low-voltage distribution
TN S system (3 x 400 V), for example
Grounding busbar in cabinet
Load circuit 24 V DC for
DC module


Example: S7-300 with load power supply from PS 307
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-25
4.11 Planning subnets
4.11.1 Overview
Subnets
Subnets available in SIMATIC for the various automation levels (process, cell, field and
actuator/sensor level ):
Multi-Point Interface (MPI)
PROFIBUS
PROFINET (Industrial Ethernet)
Point-to-point communication (PtP)
Actuator/Sensor Interface (ASI)
Multi-Point Interface (MPI)
Availability: For all CPUs described in this document.
MPI is a small area subnet containing a small number of nodes at the field/cell level. It is a
multipoint-capable interface in SIMATIC S7/M7 and C7, designed as PG interface, for
networking a small number of CPUs, or for low volume data exchange with PGs.
MPI always retains the last configuration of the transmission rate, node number and highest
MPI address, even after CPU memory reset, power failure or deletion of the CPU parameter
configuration.
It is advisable to use the PROFIBUS DP network components for your MPI network
configuration. The same configuration rules apply. Exception: OWG modules are not allowed
in the MPI network.
PROFIBUS
Availability: CPUs with the "DP" name suffix are equipped with a PROFIBUS interface (CPU
315-2 DP, for example).
PROFIBUS represents the network at the cell and field level in the SIMATIC open,
multivendor communication system.
PROFIBUS is available in two versions:
1. PROFIBUS DP field bus for high-speed cyclic data exchange, and PROFIBUS-PA for
intrinsically safe applications (requires DP/PA coupler).
2. The cell level as PROFIBUS (FDL or PROFIBUS FMS) for high-speed data exchange
with communication partners at the same authorization level (can only be implemented
via CP).
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-26 Operating Instructions, 12/2006, A5E00105492-07
PROFINET (Industrial Ethernet)
Availability: CPUs with the "PN" name suffix are equipped with a PROFINET interface (CPU
317-2 PN/DP or CPU 319-3 PN/DP for example). A PROFINET interface, or communication
processors, can be used to implement Industrial Ethernet in an S7-300 CPU system.
Industrial Ethernet, in an open multivendor communication system, represents the SIMATIC
network at the process and cell level. PROFINET CPUs, however, also support real-time
communication at the field level. This structure also supports S7 communication. Industrial
Ethernet is suitable for high-speed and high-volume data exchange, and for remote network
operations via gateway.
PROFINET is available in two versions:
PROFINET IO and
PROFINET CBA.
PROFINET IO is a communication concept for the implementation of modular, distributed
applications. PROFINET IO allows you to create automation solutions you are familiar with
from PROFIBUS.
PROFINET CBA (Component based Automation) is an automation concept for the
implementation of applications with distributed intelligence. PROFINET CBA lets you create
distributed automation solutions, based on default components and partial solutions. This
concept satisfies demands for a higher degree of modularity in the field of mechanical and
systems engineering by extensive distribution of intelligent processes.
Component-Based Automation allows you to use complete technological modules as
standardized components in complex systems.
Point-to-point communication (PtP)
Availability: CPUs with "PtP" name suffix are equipped with a second interface, namely the
PtP interface (CPU 314C-2 PtP, for example)
PtP does not represent a subnet in the common sense, because it is used to interconnect
only two stations.
If a PtP interface is not available, you require PtP Communication Processors (CP).
Actuator/Sensor Interface (ASI)
Implementation by means of communication processors (CP).
The ASI, or actuator/sensor interface, represents a subnet system on the lowest process
level for automation systems. It is designed especially for networking digital sensors and
actuators. The maximum data volume is 4 bits per slave station.
S7-300 CPUs require communication processor for the ASI connection.
Reference
For further information on communication, refer to the Communication with SIMATIC
manual.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-27
4.11.2 Configuring MPI and PROFIBUS subnets
4.11.2.1 Overview
The next section contains all the information you require to configure MPI, PtP and
PROFIBUS subnets:
Contents
MPI, PtP and PROFIBUS subnets
Multi-Point Interface
PROFIBUS DP
MPI and PROFIBUS network components
Example of networks - MPI
4.11.2.2 Basic principles of MPI and PROFIBUS subnets
Convention: device = node
All devices you interconnect on the MPI or PROFIBUS network are referred to as nodes.
Segment
A segment is a bus line between two terminating resistors. A segment may contain up to 32
nodes. It is also limited with respect to the permitted line length, which is determined by the
transmission rate.
Baud rate
Maximum transmission rates:
MPI:
CPU 315-2 PN/DP, CPU 317 and CPU 319-3 DP/DP 12 Mbps
All other CPUs: 187.5 kbps
PROFIBUS DP: 12 Mbps
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-28 Operating Instructions, 12/2006, A5E00105492-07
Number of nodes
Maximum number of nodes per subnet:
Table 4-11 Subnet nodes
Parameters MPI PROFIBUS DP
Number 127 126
1)

Addresses 0 to 126 0 to 125
Remark Default: 32 addresses
Reserved addresses:
Address 0 for PG
Address 1 for OP
of those:
1 master (reserved)
1 PG connection (address 0 reserved)
124 slaves or other masters
1
Note the CPU-specific maximum specifications in the relevant CPU manual.
MPI/PROFIBUS DP addresses
You need to assign an address to all nodes in order to enable intercommunication:
On the MPI network: an "MPI address"
On the PROFIBUS DP network: "a PROFIBUS DP address"
You can use the PG to set the MPI/PROFIBUS addresses for each one of the nodes (some
of the PROFIBUS DP slaves are equipped with a selector switch for this purpose).
Default MPI/PROFIBUS DP addresses
The table below shows you the default setting of the MPI/PROFIBUS DP addresses, and the
factory setting of the highest MPI/PROFIBUS DP addresses for the nodes.
Table 4-12 MPI/PROFIBUS DP addresses
Node (device) Default
MPI/PROFIBUS DP
address
Default highest MPI
address
Default highest PROFIBUS DP
address
PG 0 32 126
OP 1 32 126
CPU 2 32 126
Rules: Assignment of MPI/PROFIBUS DP addresses
Note the following rules before assigning MPI/PROFIBUS addresses:
All MPI/PROFIBUS subnet addresses must be unique.
Highest MPI/PROFIBUS address physical MPI/PROFIBUS address, and must be
identical for each node. (Exception: connecting a PG to multiple nodes; refer to the next
chapter).
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-29
Differences in the MPI addresses of CPs/FMs in an S7300 system
Table 4-13 MPI addresses of CPs/FMs in an S7-300 system
Options Example
CPU CP CP SM


Example:
A system containing an S7-300 CPU and 2
CPs.
You have two options of assigning MPI
addresses to CPs/FMs installed in a system:
CPU CP CP
1st option: The CPU accepts the MPI addresses
you set for the CPs in STEP 7.
MPI addr. MPI
addr.+x
MPI
add.+y

2nd option: The CPU automatically assigns MPI
addresses to the CPs in its system, based on
the following syntax: MPI addr. CPU; MPI
addr.+1; MPI addr.+2.
(Default)
MPI addr. MPI
addr.+1
MPI
addr.+2

Special feature: CPU 315-2 PN/DP, CPU 317
and CPU 319-3 DP/DP
When the central rack of an S7-300 contains
FM/CPs with their own MPI address, the CPU
forms its own communication bus via the
backplane bus for these FM/CPs and separates it
from the other subnets.
The MPI address of those FM/CPs is thus no
longer relevant for the nodes on other subnets.
The MPI address of the CPU is used to
communicate with these FMs/CPs.
Recommendation for MPI addresses
Reserve MPI address "0" for a service PG, or "1" for a service OP, for temporary
connections of these devices to the subnet. You should therefore assign different MPI
addresses to PGs/OPs operating on the MPI subnet.
Recommended MPI address of the CPU for replacement or service operations:
Reserve MPI address "2" for the CPU. This prevents duplication of MPI addresses after you
connect a CPU with default settings to the MPI subnet (for example, when replacing a CPU).
That is, you should assign an MPI address greater than "2" to CPUs on the MPI subnet.
Recommendation for PROFIBUS addresses
Reserve PROFIBUS address "0" for a service PG that you can subsequently connect briefly
to the PROFIBUS subnet as required. You should therefore assign unique PROFIBUS
addresses to PGs integrated in the PROFIBUS subnet.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-30 Operating Instructions, 12/2006, A5E00105492-07
PROFIBUS DP: Electrical cables or fiber-optic cables?
Use fiber optic cables on a field bus with greater length, rather than copper conductors, in
order to be independent on the transmission rate, and to exclude external interference.
Equipotential bonding
For information on what to take into account with respect to equipotential bonding in your
network configuration, refer to the corresponding chapter in the appendix.
Reference
For further information, refer to the Communication section in CPU 31xC and CPU 31x
Manual, Technical Data.
4.11.2.3 Multi-Point Interface (MPI)
Availability
All the CPUs described here are equipped with an MPI interface
A CPU equipped with an MPI/DP interface is configured and supplied as
MPI interface.
Properties
The MPI (Multi-Point Interface) represents the CPU interface for PG/OP connections, or for
communication on an MPI subnet.
The default transmission rate of all CPUs is 187.5 kbps. You can also set 19.2 kbps for
communication with an S7-200. The
315-2 PN/DP, 317-2 and 319-3 PN/DP CPUs support transmission rates to 12 Mbps.
The CPU automatically broadcasts its bus configuration via the MPI interface (the
transmission rate, for example). A PG, for example, can thus receive the correct parameters
and automatically connect to a MPI subnet.

Note
You may only connect PGs to an MPI subnet which is in RUN.
Other stations (for example, OP, TP, ...) should not be connected to the MPI subnet while
the system is in RUN. Otherwise, transferred data might be corrupted as a result of
interference, or global data packages may be lost.

Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-31
Time synchronization
The CPU's MPI interface supports time synchronization. The CPU can be programmed for
operation as time master (with default synchronization intervals) or time slave.
Default setting: No time synchronization
The synchronization mode is set in the "Clock" tab of the CPU or interface properties dialog
box in HW Config.
When operated as time slave, the CPU receives a synchronization message frame from one
time master and sets its internal time accordingly.
When operated as time master, the CPU broadcasts time synchronization message frames
at programmed synchronization intervals at the MPI interface to other node stations of the
MPI subnet. Time synchronization is initiated immediately when you set the CPU time by
way of PG or SFC.
Time synchronization at the MPI interface is also available at:
At the DP Interface
At the PROFINET Interface
In the AS of the central configuration



Note
The CPU may only be operated as time slave at one of these interfaces.

Example 1
A CPU operating as time slave on the DP interface can only operate as time master on the
MPI interface and/or within the AS.
Example 2
The CPU time is synchronized by a time server by way of PROFINET interface; this CPU
can only be operated as time master at the DP / MPI
interface or within the AS.
Devices capable of MPI communication
PG/PC
OP/TP
S7-300 / S7-400 with MPI interface
S7-200 (only at 19.2 kbps)
Configuring
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4-32 Operating Instructions, 12/2006, A5E00105492-07
4.11.2.4 PROFIBUS DP interface
Availability
CPUs with the "DP" have at least one DP interface.
The 315-2 PN/DP and 317-2 PN/DP CPUs feature an integrated MPI/DP interface.
The 317-2 DP and 319-3 PN/DP CPUs feature an MPI/DP interface plus an additional DP
interface. The factory setting of the CPU's MPI/DP interface is MPI mode. You need to set
DP mode in STEP 7 if you want to use the DP interface.
Operating modes for CPUs with two DP interfaces
Table 4-14 Operating modes for CPUs with two DP interfaces
MPI/DP interface PROFIBUS DP interface
MPI
DP master
DP slave
1)

not configured
DP master
DP slave
1)

1)
simultaneous operation of the DP slave on both interfaces is excluded
Properties
The PROFIBUS DP interface is mainly used to connect distributed I/O. PROFIBUS DP
allows you to create large subnets, for example.
The PROFIBUS DP interface can be set for operation in master or slave mode, and supports
transmission rates up to 12 Mbps.
The CPU broadcasts its bus parameters (transmission rate, for example) via the PROFIBUS
DP interface when master mode is set. This functionality automatically provides the correct
parameters for online operation of a programming device, for example. In your configuration
you can specify to disable bus parameter broadcasting.

Note
(for DP interface in slave mode only)
When you disable the "Test, Commissioning, Routing" check box in the DP interface
properties dialog box in STEP 7, the transmission rate settings of the master automatically
override corresponding user-specific settings. This disables the routing function at this
interface.

Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-33
Time synchronization
The CPU's DP interface supports time synchronization. The CPU can be programmed for
operation as time master (at corresponding synchronization intervals) or time slave.
Default setting: No time synchronization
The synchronization mode is set in the "Clock" tab of the interface properties dialog box in
HW Config.
When operated as time slave, the CPU receives a synchronization message frame from one
time master and sets its internal time accordingly.
When operated as time master on the DP interface, the CPU broadcasts time
synchronization message frames at programmed synchronization intervals to other node
stations of the PROFIBUS DP subnet. Time synchronization is initiated immediately when
you set the CPU time by way of PG or SFC.
Time synchronization at the DP interface is also available at:
At the MPI Interface
At the PROFINET Interface
In the AS of the central configuration



Note
The CPU may only be operated as time slave at one of these interfaces.

Example 1
A CPU operating as time slave on the DP interface can only operate as time master on the
MPI interface and/or within the AS.
Example 2
The CPU time is synchronized by a time server by way of PROFINET interface; this CPU
can only be operated as time master at the DP / MPI
interface or within the AS.
Devices capable of PROFIBUS DP communication
PG/PC
OP/TP
DP slaves
DP master
Actuators/Sensors
S7-300/S7-400 with PROFIBUS DP interface
Reference
Further information on PROFIBUS: http://www.profibus.com
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-34 Operating Instructions, 12/2006, A5E00105492-07
4.11.2.5 Network components of MPI/DP and cable lengths
MPI subnet segment
You can install cables with a length of up to 50 m in an MPI subnet segment. This length of
50 m is the distance between the first and the last node of the segment.
Table 4-15 Permissible cable length of a segment on the MPI subnet
Baud rate S7-300 CPUs (non-isolated
MPI interface)
without CPU 315-2 PN/DP /
CPU 317 / CPU 319
CPU 315-2 PN/DP / CPU 317 /
CPU 319
19.2 kbps
187.5 kbps
50 m 1000 m
1.5 Mbps 200 m
3.0 Mbps
6.0 Mbps
12.0 Mbps
-
100 m
Segment on the PROFIBUS subnet
The maximum cable length of a a segment on the PROFIBUS subnet is determined by the
set transmission rate.
Table 4-16 Permissible cable length of a segment on the PROFIBUS subnet
Baud rate Maximum cable length of a segment
9.6 kbps to 187.5 kbps 1000 m
500 kbps 400 m
1.5 Mbps 200 m
3 Mbps to 12 Mbps 100 m
Longer cable lengths via RS 485 Repeater / RS 485-Diagnostics Repeater
You need to install RS485 repeaters for segments requiring cable lengths longer than the
allowed length. For further information about the RS485 Repeater refer to the Module
Specifications Manual.
Stub cables
Make allowances for the maximum stub cable length when you connect bus nodes to a
segment by means of stub cables, for example, a PG via standard PG cable.
For transmission rates up to 3 Mbps, you can use a PROFIBUS bus cable with bus
connector as stub cable. For transmission rates higher than 3 Mbps, use the patch cord to
connect the PG or PC. You can connect several PG patch cords to the the bus (for order
numbers see table 4-20). Other types of stub cables are not permitted.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-35
Length of stub cables
The table below shows the maximum permitted lengths of stub cables per segment:
Table 4-17 Lengths of stub cables per segment
Number of nodes with stub cable length of ... Baud rate Max. length of stub
cables per segment
1.5 m or 1.6 m 3 m
9.6 kbps to 93.75 kbps 96 m 32 32
187.5 kbps 75 m 32 25
500 kbps 30 m 20 10
1.5 Mbps 10 m 6 3
3 Mbps to 12 Mbps
1)

1)

1)

1)
To connect PGs or PCs when operating at rates higher than 3 Mbps, use PG connecting
cables with the order number 6ES7 901-4BD00-0XA0. In your bus configuration, you can
use multiple PG patch cords with this order number. Other types of stub cables are not
permitted.
PG connecting cable
Table 4-18 PG connecting cable
Type Order No.
PG connecting cable 6ES7 901-4BD00-0XA0
PROFIBUS cables
For PROFIBUS DP or MPI networking we offer you the following bus cables for diverse fields
of application:
Table 4-19 Available bus cables
Bus cable Order No.
PROFIBUS cable 6XV1 830-0AH10
PROFIBUS cable, halogen-free 6XV1 830-0LH10
PROFIBUS underground cable 6XV1 830-3AH10
PROFIBUS trailing cable 6XV1 830-3BH10
PROFIBUS cable with PUR sheath for
environments subject to chemical and
mechanical stress
6XV1 830-0DH10
PROFIBUS cable with PE sheath for the food and
beverages industry
6XV1 830-0BH10
PROFIBUS cable for festooning 6XV1 830-3CH10
Properties of PROFIBUS cables
The PROFIBUS bus cable is a 2-wire, shielded twisted-pair cable with copper conductors. It
is used for hardwired transmission in accordance with US Standard EIA RS485.
Configuring
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S7-300, CPU 31xC and CPU 31x: Installation
4-36 Operating Instructions, 12/2006, A5E00105492-07
The table below lists the characteristics of these bus cables.
Table 4-20 Properties of PROFIBUS bus cables
Properties Values
Wave impedance approx. 135 to 160 (f = 3 MHz to 20 MHz)
Loop resistance 115 /km
Effective capacitance 30 nF/km
Attenuation 0.9 dB/100 m (f = 200 kHz)
Permitted conductor cross-sections 0.3 mm
2
to 0.5 mm
2

Permitted cable diameter 8 mm 0.5 mm
Installation of bus cables
When you install PROFIBUS bus cables, you must not
twist,
stretch
or compress them.
When wiring indoor bus cables, also maintain the following marginal conditions (dA = outer
cable diameter):
Table 4-21 Marginal conditions for wiring interior bus cables
Characteristics Condition
Bending radius (one-off) 80 mm (10 x dA)
Bending radius (multiple times) 160 mm (20 x dA)
Permitted temperature range during installation 5 C to +50 C
Shelf and static operating temperature range 30 C to +65 C (22 F to +149 F)
Reference
For information on the use of fiber-optic cables for PROFIBUS, refer to the SIMATIC NET,
PROFIBUS Networks Manual.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-37
Bus connector RS 485
Table 4-22 Bus connector
Type Order No.
Bus connector RS 485 up to 12 Mbaud
with 90 cable exit
without programming device interface
with programming device interface


6ES7 972-0BA11-0XA0
6ES7 972-0BB11-0XA0
Fast connect bus connector RS 485 up to 12 Mbaud
with 90 cable exit in insulation displacement technique
without programming device interface
with programming device interface


6ES7 972-0BA50-0XA0
6ES7 972-0BB50-0XA0
Bus connector RS 485 up to 12 Mbaud
with 35 cable exit (not for CPU 31xC, 312, 314 and 315-2 DP)
with programming device interface
with programming device interface


6ES7 972-0BA40-0XA0
6ES7 972-0BB40-0XA0
Field of application
You need bus connectors to connect the PROFIBUS bus cable to an MPI or PROFIBUS-DP
interface
You do not require a bus connector for:
DP slaves with degree of protection IP 65 (ET 200X, for example)
RS 485 repeater.
RS485 Repeater 485

Type Order No.
RS 485 repeater 6ES7 972-0AA01-0XA0
RS 485 Diagnostic Repeater 6ES7 972-0AB01-0XA0


Note
SFC 103 "DP_TOPOL" can be used to initiate identification of the bus topology of a DP
master system by way of the interconnected diagnostic repeaters.

Purpose
RS485 repeaters are used to amplify data signals on bus lines and to couple bus segments.
You require this RS 485 Repeater in the following situations:
more than 32 network nodes
when interconnecting a grounded with an ungrounded segment
when exceeding the maximum line length in a segment
Configuring
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S7-300, CPU 31xC and CPU 31x: Installation
4-38 Operating Instructions, 12/2006, A5E00105492-07
Longer cable lengths
If you want to implement cable lengths above those permitted in a segment, you must use
RS485 repeaters. The maximum cable length between two RS 485 repeaters corresponds to
the maximum cable length of a segment. Please note that these maximum cable lengths
only apply if there is no further node interconnected between the two RS 485 repeaters. You
can connect up to nine RS 485 repeaters in series. Please note that you have to add the RS
485 repeater when you determine the number of nodes in your subnet, even if it is not
assigned its own MPI/PROFIBUS address.
Reference
For further information about the RS485 Repeater, refer to the Module Specifications
Manual.
4.11.2.6 Cable lengths of MPI and PROFIBUS subnets
Example: Installation of an MPI subnet
The figure below shows you the block diagram of a MPI subnet.
PROFlBUS
4
3
1
5
PS CPU PS CPU
S7-300 S7-300
PG
CPU PS
S7-300
CP
OP 27
S7-300
1
2
2
3
CPU PS
S7-300
CP
OP 27
CPU PS CPU PS
S7-300
OP 27
PG
OP 27
MPl addr. 2 MPl addr. 1 MPl addr. 5 MPl addr. 3 MPl addr. 4 MPl addr. 7 MPl addr. 6
MPl addr. 10 MPl addr. 11 MPl addr. 13
MPl addr. 0
MPl addr. 9 MPl addr. 8 MPl addr. 12

Number Identifier
Terminating resistor enabled.
S7-300 and OP 27 have subsequently been connected to the MPI subnet using their default MPI address.
CPU 31xC, 312, 314, 315-2 DP:
You can also assign user-specific MPI addresses to the CPs/FMs at these CPUs.
CPU 317-2 DP, 315-2 PN/DP, 317-2 PN/DP, 319-3 PN/DP:
CPs and FMs do not have their own MPI address on this CPU.
In addition to the MPI address, the CP also has a PROFIBUS address (7 in this case).
Connected via stub cable using the default MPI address only for commissioning/maintenance.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-39
Example: Maximum distances in the MPI subnet
The figure below shows you:
a possible MPI subnet configuration
maximum distances possible in an MPI subnet
the principle of "Line extension" using RS 485 repeaters
3
3
3
RS 485
repeater
RS 485
repeater
MPl addr. 3 MPl addr. 5 MPl addr. 6
MPl addr. 10
MPl addr. 4
MPl addr. 11 MPl addr. 9 MPl addr. 8
MPl addr. 7
MPl addr. 0
Max. 50 m
M
a
x
.

1
0
0
0

m
Max. 50 m
1
PG
OP 27 OP 27
1
1
1
1
1
2
CPU PS
S7-300
CPU PS
S7-300
OP 27
PG
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300



Number Identifier
Terminating resistor enabled.
PG connected by means of a stub cable for maintenance purposes
Configuring
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S7-300, CPU 31xC and CPU 31x: Installation
4-40 Operating Instructions, 12/2006, A5E00105492-07
Example: Terminating resistor in the MPI subnet
The figure below shows you an example of an MPI subnet and where to enable the
terminating resistor.
The figure below illustrates where the terminating resistors must be enabled in an MPI
subnet. In this example, the programming device is connected via a stub cable only for the
duration of commissioning or maintenance.
PG
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300
OP 27 OP 27
RS 485
repeater
PG
1
1
1
1
2



Digit Identifier
Terminating resistor enabled.
PG connected by means of a stub cable for maintenance purposes



Warning
Disturbance of data traffic might occur on the bus. A bus segment must always be
terminated at both ends with the terminating resistor. This, for example, is not the case if the
last slave with bus connector is off power. The bus connector draws its power from the
station, and the terminating resistor is thus disabled. Please make sure that power is always
supplied to stations on which the terminating resistor is active. Alternatively, the PROFIBUS
terminator can also be used as active bus termination.

Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-41
Example: Installation of a PROFIBUS subnet
The figure below shows you the basic principles of a PROFIBUS subnet installation.

S5-95U
PG
1
3 S7-300
CPU PS
CPU
31x-2 DP
MASTER
MPI addr. 0
MPI addr. 3 PROFIBUS
Addr. 2
PROFIBUS
Addr. 3
PROFIBUS
Addr. 4
PROFIBUS
Addr. 5
PROFIBUS
Addr. 6
PROFIBUS
Addr. 7
3
CPU PS ET 200M
CPU PS ET 200M
CPU PS ET 200 M
3 S7-300
CPU PS DP-CPU CPU PS ET 200M CPU PS ET 200M
CPU ET 200B ET 200B CPU ET 200B CPU ET 200B
PROFIBUS
Addr. 12
PROFIBUS
Addr. 11
PROFIBUS
Addr. 10
PROFIBUS
Addr. 9
PROFIBUS
Addr. 8
1
1
2



Number Identifier
Terminating resistor enabled.
PG connected by means of stub cable for maintenance purposes
Configuring
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S7-300, CPU 31xC and CPU 31x: Installation
4-42 Operating Instructions, 12/2006, A5E00105492-07
Example: CPU 314C-2 DP as MPI and PROFIBUS node.
The figure below shows you an assembly with a CPU 314C-2 DP integrated in an MPI
subnet and also operated as DP master in a PROFIBUS subnet.
S7-300
CPU
PS CPU
S7-300
CPU
PS CPU
PG
9
PROFIBUS subnet MPI subnet
S7-300 CPU:
with DP interface
in DP Master mode
RS 485-
Repeater
MPI addr. 2
MPI addr. 3
MPI addr. 4
MPI addr. 6
MPI addr. 5
OP 27
MPI addr. 7 MPI addr. 8
MPI addr. 0
S7-300
CPU
PS CPU
S7-300
PS CPU
OP 27
CPU
PS DP-CPU
ET200M ET200M
ET200M ET200M ET200M ET200M
ET200B ET200B
S5-95U
S5-95U
S5-95U
DP addr. 3 DP addr. 4
DP addr. 9 DP addr. 8
DP addr. 10 DP addr. 11
DP addr. 5
DP addr. 6
DP addr. 7
2
1
1
1
1
1
1
DP addr. 2



Number Identifier
Terminating resistor enabled.
PG connected via a stub cable for maintenance or commissioning purposes

Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-43
4.11.3 Configuring PROFINET subnets
4.11.3.1 Overview
The next section contains all the information you require to configure PROFINET subnets:
Contents
PROFINET nodes
Integration of field bus system into PROFINET
PROFINET IO and PROFINET CBA (Component-Based Automation)
PROFINET cable lengths
Ethernet bus cable and connector
Example of a PROFINET subnet
Example of a PROFINET IO system
4.11.3.2 PROFINET devices
Definition: Devices in the PROFINET environment
Within the context of PROFINET, "device" is the generic term for:
Automation systems (e.g. PLC, PC)
Field devices (for example, PLC, PC, hydraulic devices, pneumatic devices)
Active network components (e.g. switches, gateways, routers)
PROFIBUS or other fieldbus systems
The main characteristics of a device is its integration into PROFINET communication by
means of Ethernet or PROFIBUS.
The following device types are distinguished based on their attachment to the bus:
PROFINET devices
PROFIBUS devices
Definition: PROFINET devices
A PROFINET device always has at least one Industrial Ethernet port. A PROFINET device
can also have a PROFIBUS port, that is, as master with proxy functionality.
Configuring
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4-44 Operating Instructions, 12/2006, A5E00105492-07
Definition: PROFIBUS devices
A PROFIBUS device has at least one PROFIBUS link with an electric interface (RS485) or
an optical interface (polymer optical fiber, POF).
A PROFIBUS device cannot take part directly in PROFINET communication, but must be
implemented by means of PROFIBUS master with PROFINET link or Industrial
Ethernet/PROFIBUS link (IE/PB Link) with proxy functionality.
Comparison of the terminology in PROFIBUS DP and PROFINET IO
The following schematic shows you the general names of the most important devices in
PROFINET IO and PROFIBUS DP. The table below shows the designation of the various
components in the PROFINET IO and PROFIBUS DP context.
2
3
4
5
6 6
1

Figure 4-3 PROFINET and PROFIBUS devices
Number PROFINET PROFIBUS Remark
IO system DP master
system

IO controller DP master Device used to address the connected IO
devices/DP slaves.
That is: the IO controller/DP master exchanges
input and output signals with field devices.
The IO controller/DP master is often the controller
on which the automation program runs.
IO supervisor PG/PC
Class 2 DP
master
PG/PC/HMI device for commissioning and
diagnostics
Industrial Ethernet PROFIBUS Network infrastructure
HMI (Human
Machine Interface)
HMI Device for operating and monitoring functions.
IO device DP slave Distributed field device assigned to one of the IO
controllers/DP masters, for example, distributed
I/O, valve terminal, frequency converter, and
switches with integrated PROFINET IO
functionality.
Configuring
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Operating Instructions, 12/2006, A5E00105492-07 4-45
Slots and Submodules
A PROFINET IO device is modularly structured - similar to a PROFIBUS DP slave.
In doing so, modules are fitted to slots and submodules to subslots. Channels are located on
the modules / submodules using which process signals can be read in and issued.
The following graphic illustrates the situation.
1 2 2 2
3
3
4
4
4
4
4
4
4
4
2

Figure 4-4 Module, Submodule, Slot, and Channel

Digit Description
Interface module
Module with components
Submodule
Channel
In principle it is possible to divide a slot into additional subslots on which the submodules are
connected.
Configuring
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4-46 Operating Instructions, 12/2006, A5E00105492-07
4.11.3.3 Integration of field bus systems in PROFINET
Field bus Integration
PROFINET allows you use a proxy to integrate existing field bus systems (for example,
PROFIBUS, ASI, etc.) into PROFINET. In this way, you can set up hybrid systems consisting
of field bus and Ethernet-based subsystems. A continuous technological transition to
PROFINET is thus possible.
Interconnecting PROFINET and PROFIBUS
You can interconnect PROFIBUS devices to the local PROFIBUS interface of a PROFINET
device. This allows you to integrate existing PROFIBUS configurations in PROFINET.
The following picture illustrates the network types that are supported for PROFINET:
Industrial Ethernet and
PROFIBUS.
1
2
3
PROFlBUS
lndustrial Ethernet

Figure 4-5 PROFINET devices, PROFIBUS devices, and proxy

Number Description
PROFINET devices
PROFINET device with proxy functionality (see below for more information)
PROFIBUS devices
Configuring
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Operating Instructions, 12/2006, A5E00105492-07 4-47
PROFINET device with proxy functionality = Substitute
The PROFINET device with proxy functionality is the substitute for a PROFIBUS device on
the Ethernet. The proxy functionality allows a PROFIBUS device to communicate not only
with its master but also with all the nodes on the PROFINET.
With PROFINET, existing PROFIBUS systems can be integrated into the PROFINET
communication with the aid of an IE/PB link, for example. The IE/PB link then handles
communication via PROFINET on behalf of the PROFIBUS components.
In this way, you can link both DPV0 and DPV1 slaves to PROFINET.
Further Information
For information on the differences and common features of PROFINET IO and PROFIBUS
DP and information on migrating from PROFIBUS DP to PROFIBUS IO, refer to the From
PROFIBUS DP to PROFINET IO programming manual.
4.11.3.4 PROFINET IO and PROFINET CBA
What is PROFINET IO?
As part of PROFINET, PROFINET IO is a communication concept that is used to implement
modular, distributed applications.
PROFINET IO allows you to create automation solutions of the type with which you are
familiar from PROFIBUS.
PROFINET IO is implemented using the PROFINET standard for programmable controllers.
The STEP 7 engineering tool helps you to structure and configure an automation solution.
In STEP 7 you have the same application view, regardless of whether you are configuring
PROFINET devices or PROFIBUS devices. You will program your user program in the same
way for both PROFINET IO and PROFIBUS DP since you will use the extended blocks and
system status lists for PROFINET IO.
Reference
Information on new and modified blocks and system status lists can be found in the From
PROFIBUS DP to PROFINET IO programming manual.
What is PROFINET CBA?
As part of PROFINET, PROFINET CBA (Component Based Automation) is an automation
concept that focuses on the following:
Implementation of modular applications
Machine - machine communication
PROFINET CBA lets you create distributed automation solutions based on off-the-shelf
components and partial solutions. This concept meets the demand for a greater modularity in
the field of mechanical and systems engineering by extensive distribution of intelligent
processes.
With Component Based Automation you can implement complete technological modules as
standardized components that can be used in large systems.
You create the modular, intelligent components of the PROFINET CBA in an engineering
tool (which may differ according to the device manufacturer). Components that are formed
from SIMATIC devices are created with STEP 7, and are interconnected using the SIMATIC
iMAP tool.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-48 Operating Instructions, 12/2006, A5E00105492-07
Interaction between PROFINET IO and PROFINET CBA
PROFINET CBA is used to integrate PROFINET IO systems into machine-to-machine
communication. A PROFINET component is created from a PROFINET IO system in STEP
7, for example. With SIMATIC iMap, you can configure systems consisting of several such
components. The communication connections between the devices are configured simply as
interconnection lines.
The following graphic illustrates a distributed automation solution with several components
which communicate via PROFINET. The components on the right have IO devices and an IO
controller on PROFINET IO.
iMAP
PROXY
Ethernet
PROFlBUS
PROFlNET lO lntelligent field
device on Ethernet
Component with
distributed lO on
PROFlBUS
Component with
distributed lO on
Ethernet
PROFlNET
Component
PROFlNET
Communication

Figure 4-6 PROFINET CBA - modular concept
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-49
Differentiation between PROFINET IO and PROFINET CBA
PROFINET IO and CBA are two different ways of looking at programmable controllers on
Industrial Ethernet.
lO data view Component view
One cable, lT standards, standard applications
protocols, controller, etc.
- Distributed l/Os
- Usual lO view in STEP 7
(PROFlNET Component Description) (Generic Station Description)
- Distributed intelligence
- Plant-wide engineering
GSD PCD
PROFlNET
PROFlNET CBA PROFlNETlO

Figure 4-7 Differentiation between PROFINET IO and PROFINET CBA
Component Based Automation breaks the overall system down into various functions. These
functions are configured and programmed.
PROFINET IO provides you with a picture of the plant that is very similar to the view
obtained in PROFIBUS. You continue to configure and program the individual programmable
controllers.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-50 Operating Instructions, 12/2006, A5E00105492-07
Controllers in PROFINET IO and PROFINET CBA
You can also use some PROFINET IO controllers for PROFINET CBA.
The following PROFINET devices act as a PROFINET CBA or IO controller:
Programmable logic controllers,
S7-300 CPU 31x-2 PN/DP, firmware version V2.3 or later
S7-300 CPU 319-3 PN/DP, firmware version V2.4.0 or later
CP 343-1 - version 6GK7 343-1EX21-0XE0 and 6GK7 343-1GX21-0XE0 or later
CP 443-1 Advanced with MLFB 6GK7 443-1EX40 version V2.1 and 6GK7 443-1EX41
version V1.0 or later.
The following PROFINET devices can only act as a PROFINET IO controller:
PCs that are linked to a PROFINET IO-compatible CP (CP 1616 for example) or via
SOFTNET PN IO (with CP 1612 for example). With the CP 1616 and SOFTNET PN IO,
the user program runs in the CPU of the PC.
SIMOTION devices for particularly stringent real-time requirements.
Some PROFINET devices can only be used as PROFINET CBA controllers, for example,
PCs with standard Ethernet interfaces and the WinLC software.
CP443-1 EX 40 V2.1 or later or CP443-1 EX41 V 1.0 or later
Proxy in PROFINET IO and PROFINET CBA
The proxies for PROFINET IO and proxies for PROFINET CBA are different.
In PROFINET IO, the proxy for PROFINET IO represents each connected PROFIBUS DP
slave as a PROFINET IO device on the PROFINET.
In PROFINET CBA, the proxy for PROFINET CBA represents every connected PROFIBUS
DP slave as one component, which can participate in PROFINET communication.
There are thus different IE/PB links for PROFINET IO and PROFINET CBA, for example. At
present you can currently only use a CPU 31x PN/DP as a proxy for PROFINET CBA.
Linking PROFIBUS devices via an IE/PB link
Please note that proxy functionality is available in both PROFINET IO and PROFINET CBA.
For the IE/PB link, this means that you must use different devices depending on the system
you are using.
Configuring and Integrating Components and Devices in PROFINET Communication
In Component Based Automation, an interconnection editor is used to incorporate the
components (SIMATIC iMap for example). The components are described in a PCD file.
With PROFINET IO, the devices are incorporated using an engineering system (STEP 7 for
example). The devices are described in a GSD file.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-51
Interaction between PROFINET CBA and PROFINET IO
PROFINET IO integrates field devices (IO devices) into PROFINET. The input and output
data of the IO devices is processed in the user program. The IO devices with their IO
controller can, in turn, be part of a component in a distributed automation structure.
Communication between a CPU as the IO controller and the assigned IO devices as
PROFINET IOs is configured in the same way as for a PROFIBUS DP master system in
STEP 7. The user program is also created in STEP 7. From the entire PN IO system, you
create a component in STEP 7 (see Figure PROFINET CBA).
You then configure communication between the components in user-friendly SIMATIC iMAP.
Update Time
The IO controller (outputs) provides new data to all IO devices in the PROFINET IO system
within the update time. This means that all the IO devices have sent their latest data to the
IO controller (inputs).

Note
Update Times for Cyclical Data Exchange
STEP 7 determines the update time on the basis of the existing hardware configuration and
the resulting cyclical data traffic. During this time, a PROFINET IO device has exchanged its
user data with the associated IO controller.
You can set the update date either for a whole bus segment of an IO controller, or for an
individual IO device.
In STEP 7, the update time can be changed manually.
The smallest possible update time in a PROFINET system depends on the following factors:
Number of PROFINET IO devices
Quantity of configured user data
Volume of PROFINET IO communication traffic (compared to the volume of PROFINET
CBA communication traffic)

Additional cyclical PROFINET services
The update time dialog in STEP 7 / HW Config is used to set an update date for the device
to be reserved for PROFINET IO.
See the STEP 7 Online Help for more information.

Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-52 Operating Instructions, 12/2006, A5E00105492-07
Send clock
Period between two successive intervals for IRT or RT communication. The send clock is the
shortest possible transmit interval for exchanging data. The calculated update times are
multiples of the send clock.
The minimum possible update time thus depends on the minimum send clock of the IO
controller that can be set.
If both the IO controller and the IO device support a send clock of 250s, you can achieve a
minimum update time of 250s.
It is also possible to operate IO devices that only support a send clock of 1 ms on an IO
controller that works with a send clock of 250s. The minimum update time for the IO
devices concerned is then at least 1 ms, however.
Update times of CPU 319-3 PN/DP
Programmable update times when using CPU 319-3 PN/DP:

Send
clock
Update time
250 s 250 s to 128 ms
500 s 500 s to 256 ms
1 ms 1 ms to 512 ms
The minimum update time depends on the number of IO devices used, and on the volume of
configured user data, and on the load in PROFINET IO communication. STEP 7
automatically makes allowances for these dependencies when you configure the system.
Details of the possible uses of the individual products
See also the documentation for the product concerned.
4.11.3.5 PROFINET cable lengths and network expansion
Network expansion options are based on various factors (hardware design used, signal
propagation delay, minimum distance between data packets, etc.)
Twisted-pair patch cables
TP Cords are used to interconnect terminal devices with the Industrial Ethernet FC cabling
system. It is designed for use in environments with low EMC load, for example, in offices or
in control cabinets.
The length of twisted-pair cords between two devices may not exceed 10 m.
Compared to Industrial Ethernet twisted-pair cables, the TP cords are significantly thinner
and more flexible due to the reduced effort for their shielding. The connectors used in
connecting industrial twisted-pair components are standardized RJ45 connectors and sub D
connectors.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-53
Product range
Twisted-pair patch cords available:
Table 4-23 Data for twisted-pair patch cables
Cable designation Application Available
lengths
Order number
TP Cord RJ45/RJ45 TP connecting cable with two
RJ45 connectors
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2GE50
6XV1 850-2GH10
6XV1 850-2GH20
6XV1 850-2GH60
6XV1 850-2GN10
TP XP cord RJ45/RJ45 TP crossover cable with two
RJ45 connectors
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2HE50
6XV1 850-2HH10
6XV1 850-2HH20
6XV1 850-2HH60
6XV1 850-2HN10
TP cord 9/RJ45 TP patch cable with 9-pin
sub-D connector and
RJ45 connector
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2JE50
6XV1 850-2JH10
6XV1 850-2JH20
6XV1 850-2JH60
6XV1 850-2JN10
TP XP cord 9/RJ45 Crossover TP patch cable with
9-pin sub-D connector and RJ45
connector.
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2ME50
6XV1 850-2MH10
6XV1 850-2MH20
6XV1 850-2MH60
6XV1 850-2MN10
TP patch cable
9-45/RJ45
TP patch cable with RJ45 connector
and sub-D connector, 45 cable exit
(only for OSM/ESM)
1.0 m 6XV1 850-2NH10
TP XP patch cable
9-45/RJ45
Cross-over TP patch cable with RJ45
connector and sub-D connector with
45 cable exit (for OSM/ESM only)
1.0 m 6XV1 850-2PH10
TP XP patch cable 9/9 Crossover TP patch cable for direct
interconnection of two industrial
Ethernet network components with
ITP interface, with two 9-pin sub-D
connectors
1.0 m 6XV1 850-2RH10
TP cord RJ45/15 TP patch cable with 15-pin
sub-D connector and
RJ45 connector
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2LE50
6XV1 850-2LH10
6XV1 850-2LH20
6XV1 850-2LH60
6XV1 850-2LNN10
TP XP patch cable
RJ45/15
Crossover TP patch cable with
15-pin sub-D connector and RJ45
connector.
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2SE50
6XV1 850-2SH10
6XV1 850-2SH20
6XV1 850-2SH60
6XV1 850-2SN10
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-54 Operating Instructions, 12/2006, A5E00105492-07
Industrial Ethernet Fast Connect twisted-pair cables
The FastConnect Twisted-Pair cabling system is ideal for structured cabling in the production
hall. FastConnect cables allow for the quick and easy on-site assembly of patch cables. The
RJ45 cabling technology is the existing standard and is also available as an industrial
version which allows structured cabling.
Product range
Industrial Ethernet Fast Connect twisted-pair cables available:
Table 4-24 Data for user assemblies using patch cables of the Fast Connect product family
Cable designation Application Available
lengths
Order number
SIMATIC NET IE
FC RJ 45
PLUG 145
RJ45 connector for Industrial Ethernet
with rugged metal housing and four
integrated insulation displacement
terminals for connecting Industrial
Ethernet FC installation cables; 145
cable outlet.
1 piece
10 items
50 items
6GK1 901-1BB30-0AA0
6GK1 901-1BB30-0AB0
6GK1 901-1BB30-0AE0
SIMATIC NET IE
FC RJ 45
PLUG 180
RJ45 connector for Industrial Ethernet
with rugged metal housing and four
integrated insulation displacement
terminals for connecting Industrial
Ethernet FC installation cables; 180
cable outlet.
1 piece
10 items
50 items
6GK1 901-1BB10-2AA0
6GK1 901-1BB10-2AB0
6GK1 901-1BB10-2AE0
Reference
Detailed information is available in the
SIMATIC NET Manual: Twisted-Pair and Fiber-Optic Networks (6GK1970-1BA10-0AA0)
On the Internet at http://www.siemens.com/automation/service&support.
Catalog IK PI, SIMATIC NET (E86060-K6710-A101-B5)
See also
Connecting the PG to a node (Page 8-15)
Connecting the PG to several nodes (Page 8-16)
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-55
4.11.3.6 Connectors and other components for Ethernet
The selection of the bus cable, bus connector and other components for Ethernet (for
example, switches, etc.) depends on the intended application.
We offer a range of products covering a variety of applications for the installation of an
Ethernet connection.
Reference
SIMATIC NET: Twisted-Pair and Fiber-Optic Networks (6GK1970-1BA10-0AA0)
4.11.3.7 Example of a PROFINET Subnet
Example: Installation of a PROFINET subnet
The graphic illustrates the combination of corporate level and process control level via
industrial Ethernet. PCs in a classical office environment can be used to acquire data of the
process automation system.
Subnet 2
Company network
Subnet 1
Switch 1 Switch 3 Switch 2 Router
CPU
31x PN/DP
CPU
31x PN/DP
CPU
31x PN/DP
(DP master)
ET 200
(DP slave)
PG
P
R
O
F
l
B
U
S
l NDUSTRl AL ETHERNET

Figure 4-8 Example of a PROFINET Subnet
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-56 Operating Instructions, 12/2006, A5E00105492-07
Installation guidelines
PROFINET allows you to set up a high-performance and continuous communication system.
You can further increase performance by using the following installation guidelines.
Interconnect a router between the office network and the PROFINET system. Use the
router to define access privileges for your PROFINET system.
Set up your PROFINET in a star architecture where this is useful (for example: in a switch
cabinet).
Keep the number of switches low. This increases clarity of your PROFINET system
architecture.
Connect your programming device (PG) close to the communication partner (for example:
connect the PG and the communication partner to the same switch).
Modules with PROFINET interfaces may only be operated in LANs where all nodes are
equipped with SELV/PELV power supplies or protection systems of equal quality.
A data transfer device that ensures this safety must be specified for the coupling to the
WAN.
Reference
For detailed information on Industrial Ethernet networks or network components, refer to:
the Internet URL http://www.siemens.com/automation/service&support.
The STEP 7 Online Help. There you can also find further information on IP address
assignment.
The Communication with SIMATIC (EWA 4NEB 710 6075-01) manual
The SIMATIC NET manual: Twisted-Pair and Fiber Optic Networks (6GK1970-1BA10-
0AA0)
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-57
4.11.3.8 Example of a PROFINET IO system
Functions of PROFINET IO
The following graphic shows the new functions in PROFINET IO
PC
PC
PC
PC
PC PG/PC
PC
PC
lE/PB Link
PN lO
P1
P2
P3
P4
P5
P6
P7
CPU 319-3
PN/DP
P1
lM 154-8
CPU
P1
P2
P3
PG
PB
lE
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
2
3
4
5 6
1
7
8
Switch 1 Switch 2
Company network
PROFlBUS
lndustrial Ethernet
lO
Controllers
DP master
lO
Controllers
DP master
PN
PN
ET 200
(DP slave)
ET 200
(DP slave)
lO device lO device
lO device lO device
Router
PN PN
PN PN



The graphic shows Examples of connection paths
The connection of company
network and field level
You can access devices at the field level from PCs in your company network
Example:
PC - Switch 1 - Router - Switch 2 - CPU 319-3 PN/DP .
Connections between the
automation system and field
level
You can, of course, also access other areas on the Industrial Ethernet from a PG at the
field level.
Example:
PG - integrated switch IM 154-8 CPU - Switch 2 - integrated switch IO device ET
200S - on IO device: ET 200S .
The IO controller of the CPU
IM 154-8 CPU directly
controls devices on the
Industrial Ethernet and
PROFIBUS.
At this point, you can see the extended IO feature between the IO controller and IO
device(s) on the Industrial Ethernet:
The IM 154-8 CPU is operated as IO controller for the IO devices ET 200S and
ET 200S
The IM 154-8 CPU is also the IO controller for
ET 200 (DP slave) by way of IE/PB Link.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-58 Operating Instructions, 12/2006, A5E00105492-07
The graphic shows Examples of connection paths
The CPU 319-3 PN/DP can
be operated as IO controller or
DP master
Here you can see that a CPU can be both the IO controller for an IO device and the DP
master for a DP slave:
The 319-3 PN/DP CPU is operated as IO controller for the IO devices
ET 200S and ET 200 S
The CPU 319-3 PN/DP is the DP master for a DP slave . The
DP slave is assigned locally to the CPU and is not visible on the Industrial
Ethernet.
Reference
Further Information
about PROFINET can be found in the programming manual From PROFIBUS DP to
PROFINET IO
This manual also provides a clear overview of the new PROFINET blocks and system
status lists.
4.11.4 Routed network transitions
Example: Programming device access beyond network limits (routing)
A CPU with several interfaces can also serve as a router for intercommunication with
different subnets. With a PG you can access all modules on local and remote networks.
Requirements:
Implement STEP 7 starting with Version 5.0.
Note: For STEP 7 requirements with respect to the CPUs used, refer to the technical
specifications.
Assign the PG/PC to a network in your STEP 7 project (SIMATIC Manager, assigning a
PG/PC).
The various networks are interconnected using modules with routing functions.
After you configured all networks in NETPRO, initiated a new compilation for all stations,
and then download the configuration to all modules with routing function. This also
applies to all changes made in the network.
All routers therefore know all paths to a destination station.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 4-59
Access to remote networks
1
2
3
PG/PC 3
S7-300
PS
S7-300
PS
CPU
31x-2 DP
CPU
MPl
S7-400 S7-400
PS PS
CPU
416
CPU
417
MPl
PG/PC 1
PROFlBUS
ET200
PG/PC 2

Figure 4-9 Access to remote networks
Example 1
To access the CPU 31x-2 DP using PG/PC 1:
PG/PC 1 - MPI network - CPU 417 as router - PROFIBUS network - CPU 31x-2 DP
Example 2
To access the the S7-300 CPU (on the right in the figure) using PG/PC 2:
PG/PC 2 - PROFIBUS network - CPU 31x-2 DP as router - MPI network - S7-300 CPU
Example 3
To access the 416 CPU using PG/PC 3:
PG/PC 3 - MPI network - CPU 31x-2 DP as router - PROFIBUS network - CPU 417 as
router - MPI network - CPU 416

Note
Only for CPUs with DP interface:
If these CPUs are operated as I-slaves and you want to use routing functionality, set the
Commissioning / Debug Mode / Routing check box in the DP Interface for DP Slave dialog
box in STEP 7.

Information on routing can be found ...
CPU Data Reference Manual for your CPU
In the Communication with SIMATIC manual.
Configuring
4.11 Planning subnets
S7-300, CPU 31xC and CPU 31x: Installation
4-60 Operating Instructions, 12/2006, A5E00105492-07
4.11.5 Point-to-point (PtP)
Availability
CPUs with the "PtP" name suffix have at least one PtP interface.
Features
Using the PtP interface of your CPU, you can connect external devices with serial interface.
You can operate such a system at transmission rates up to 19.2 kbps in full duplex mode
(RS 422), and up to 38.4 kbps in half duplex mode (RS 485).
Transmission rate
Half duplex: 38.4 kbps
Full duplex: 19.2 kbps
Drivers
PtP communication drivers installed in those CPUs:
ASCII drivers
3964(R) Protocol
RK 512 (CPU 314C-2 PtP only)
Devices capable of PtP communication
Devices equipped with a serial port, for example, barcode readers, printers, etc.
Reference
CPU 31xC: Technological functions manual
4.11.6 Actuator/sensor interface (ASI)
Actuator/Sensor Interface (ASI)
Implementation using communication processors (CP).
The ASI, or Actuator/Sensor Interface, represents a subnet system on the lowest process
level for automation systems. It is designed especially for networking digital sensors and
actuators. The maximum data volume is 4 bits per slave station.
S7-300 CPUs require communication processor for the ASI connection.

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 5-1
Installing
5
5.1 Installing a S7-300

Here we will explain the steps required for the mechanical assembly of an S7-300.

Note
Note the installation guidelines and notes on safety in this manual when mounting,
commissioning and operating S7-300 systems.

Open components
S7-300 modules are "Open Components" according to IEC 61131-2 and EC directive
73/23/EEC (Low-Voltage directive), and to UL/CSA Approval an "open type".
In order to conform with specifications on safe operation relating to mechanical strength,
inflammability, stability and touch-protection, the following alternative installation modes are
prescribed:
Installation in a suitable cubicle
Installation in a suitable cabinet
Installation in an appropriately equipped and closed operating area
Access to these areas must only be possible with a key or tool. Only trained or authorized
personnel is allowed access to these cubicles, cabinets or electrical operating rooms.
Installing
5.1 Installing a S7-300
S7-300, CPU 31xC and CPU 31x: Installation
5-2 Operating Instructions, 12/2006, A5E00105492-07
Accessories included
Installation accessories are included with the module package. The appendix contains a list
of accessories and spare parts together with the corresponding order numbers.
Table 5-1 Module accessories
Module Accessories included Explanation
1 x Slot number label For assigning slot numbers CPU
Inscription labels for the MPI address and Firmware Version (all
CPUs)
for labeling of integrated inputs and outputs
(CPU 31xC only)
Tip: Templates for labeling strips are available
on the Internet at
http://www.siemens.com/automation/csi_en_ww,
under entry ID 11978022.
1 Bus connector For electrical interconnection of modules Signal module (SM)
Function Module (FM) 1 Labeling strip For labeling module I/O
Tip: Templates for labeling strips are available
on the Internet at
http://www.siemens.com/automation/csi_en_ww,
under entry ID 11978022.
1 Bus connector For electrical interconnection of modules Communication
module (CP)
1 Inscription label
(only CP 342-2)
For labeling the AS interface connector
Tip: Templates for labeling strips are available
on the Internet at
http://www.siemens.com/automation/csi_en_ww,
under entry ID 11978022.
Interface module (IM) 1 x Slot number label
(only IM 361 and IM 365)
For assigning slot numbers on racks 1 to 3
Installing
5.2 Installing the mounting rail
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 5-3
Tools and material required
To install the S7-300, you require the tools and materials listed in the table below.
Table 5-2 Installation tools and materials
You require ... for ...
cutting the 2 m rail to length commonly available tool
scribing and drilling holes on the 2 m rail commonly available tool, 6.5 mm diameter drill bit
screw-mounting the rail wrench or screwdriver, matching the selected
fixing screws
diverse M6 screws (length depends on the place
of installation) with nuts and spring lock washers
screw-fastening the modules on the rail screwdriver with 3.5 mm blade width (cylindrical
design)
pulling out the grounding slide contact to achieve
ungrounded state
screwdriver with 3.5 mm blade width (cylindrical
design)
5.2 Installing the mounting rail
Mounting rail versions available
Ready-to-use, four standard lengths (with 4 holes for fixing screws and 1 ground
conductor bolt)
One meter mounting rail
May be shortened to any special length. Supplied without holes for fixing screws and
without ground conductor bolt.
Requirement
Prepare the 2 m mounting rail for installation.
Preparing the 2 m mounting rail for installation
1. Cut the 2 m mounting rail to the required length.
2. Mark out:
four bores for the fixing screws (for dimensions, refer to "Dimensions for fixing holes")
one hole for the protective conductor bolt.
3. If the length of your rail exceeds 830 mm, you must stabilize it by providing additional
holes for fixing it with more screws.
Mark out these holes along the groove in the middle section of the rail (see the Figure
below). The pitch should be approx. 500 mm.
4. Drill the marked holes, bore diameter = 6.5
+0,2
mm for M6 screws.
Installing
5.2 Installing the mounting rail
S7-300, CPU 31xC and CPU 31x: Installation
5-4 Operating Instructions, 12/2006, A5E00105492-07
5. Mount an M6 bolt for fixing the ground conductor.
2
1
3
4
5



Number Identifier
Hole for the ground conductor bolt
Groove for drilling additional holes for mounting screws
Hole for the mounting screw
Additional hole for mounting screw
Hole for the mounting screw
Dimension of the mounting holes
The mounting hole dimensions for the mounting rail are shown in the table below.
Table 5-3 Mounting holes for rails
"Standard" mounting rail 2 m mounting rail
32,5 mm
57,2 mm
b a


32,5 mm
57,2 mm
15 mm 15 mm
~ 500 mm ~ 500 mm


Length of rail Dimension a Dimension b
160 mm 10 mm 140 mm
482.6 mm 8.3 mm 466 mm
530 mm 15 mm 500 mm
830 mm 15 mm 800 mm

Installing
5.2 Installing the mounting rail
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 5-5
Fixing screws
You can use the following screw types for mounting the rails:

For ... you can use ... Explanation
Cylindrical head screw M6 to
ISO 1207/ISO 1580
(DIN 84/DIN 85)
outer fixing screws
M6 hexagonal head screw to
ISO 4017 (DIN 4017)
Additional fixing screws
(only 2 m mounting rail)
Cylindrical head screw M6 to
ISO 1207/ISO 1580
(DIN 84/DIN 85)
Choose a suitable screw length
for your assembly.
You also need size 6.4 washers
to ISO 7092 (DIN 433)
Installing the mounting rail
1. Install the mounting rails so that sufficient space is available for installing modules and to
allow heat dissipation (clearance of at least 40 mm above and below the modules. See
the figure below).
2. Mark up the mounting holes on the mounting surface. Drill the holes, diameter = 6.5
+0.2
mm.
3. Screw the rail (M6 screws) onto the mounting surface.



Note
Always make sure of a low-impedance contact between the rail and a mounting surface,
if the latter is a grounded metal panel or equipment mounting panel. On varnished or
anodized metals, for instance, use a suitable contacting agent or contact washers.


Installing
5.3 Installing modules on the mounting rail
S7-300, CPU 31xC and CPU 31x: Installation
5-6 Operating Instructions, 12/2006, A5E00105492-07
The figure below shows the clearance required for the installation of an S7-300.
40 mm
40 mm
20
mm
20
mm


5.3 Installing modules on the mounting rail
Requirements for module installation
The configuration of the automation system is completed.
The mounting rail is installed.
Mounting order of the modules
Hang the modules onto the rail, starting at the left and in the following order:
1. Power supply module
2. CPU
3. SMs, FMs, CPs, IMs



Note
Please check before you insert any SM 331 analog input modules whether you have to
reposition the measuring range submodules at the side of the module. For more
information see the "Analog Modules" chapter in the Module Data Manual.


Installing
5.3 Installing modules on the mounting rail
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 5-7


Note
When installing an S7-300 system with ungrounded reference potential, make the
relevant settings on the CPU. You ideally do so before you mount any modules onto the
rail.
Installation steps
The various steps in module installation are explained below.

1. Plug the bus connectors into the CPU and SMs
/ FMs / CPs / IMs.
Except for the CPU, each module is supplied
with a bus connector.
Always start at the CPU when you plug in
the bus connectors. Remove the bus
connector from the "last" module of the
assembly.
Plug the bus connectors into the other
modules.
The "last" module does not receive a bus
connector.

2. Add all modules to the rail in the specified order
, slide them up to the module on the left ,
then swing them down .
2
3
1

3. Screw-tighten the modules.

See also
Installing an S7-300 with ungrounded reference potential (not CPU 31xC) (Page 4-15)
Installing
5.4 Labeling modules
S7-300, CPU 31xC and CPU 31x: Installation
5-8 Operating Instructions, 12/2006, A5E00105492-07
5.4 Labeling modules
Assign slot numbers
You should assign a slot number to each one of the mounted modules, thus making it easier
to assign the modules in the configuration table in STEP 7. The table below shows the slot
number assignment.
Table 5-4 Slot numbers for S7 modules
Slot number Module Remark
1 Power supply (PS) module
2 CPU
3 Interface module (IM) to the right of the CPU
4 1. Signal module (SM) to the right of the CPU or IM
5 2. Signal module (SM)
6 3. Signal module (SM)
7 4. Signal module (SM)
8 5. Signal module (SM)
9 6. Signal module (SM)
10 7. Signal module (SM)
11 8. Signal module (SM)
Installing
5.4 Labeling modules
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 5-9
Attach the slot numbers to the modules.
1. Hold the corresponding slot number in front of the relevant module.
2. Place the tongue in the opening on the module .
3. Press the slot number into the module . The slot number breaks off from the wheel.
The figure below illustrates this procedure. The slot number labels are included with the
CPU.
2
1


Installing
5.4 Labeling modules
S7-300, CPU 31xC and CPU 31x: Installation
5-10 Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-1
Wiring
6
6.1 Requirements for wiring the S7-300
This chapter
Describes the requirements for wiring the PS, CPU and front connectors.
Accessories required
The following accessories are required for wiring the S7-300.
Table 6-1 Wiring accessories
Accessories Description
Front connectors for connecting the sensors / actuators of the
system to the S7-300
Labeling strips for labeling the module I/Os
Shielding contact element, shielding terminals
(matching the shielding diameter)
for connecting cable shielding
Tools and material required
Tools and materials required for wiring the S7-300.
Table 6-2 Tools and material for wiring
To ... you need ...
Connect the protective conductor to the rail Wrench (size 10)
Protective conductor cable (cross-
section 10 mm
2
) with M6 cable lug
M6 nut, washer, spring lock washer
Adjust the power supply module to mains voltage Screwdriver with a blade width of 4.5 mm
Wire the power supply module and the CPU Screwdriver with a 3.5-mm blade, side-cutters,
stripping tool
Flexible cable, for example, sheathed flexible
cable 3 x 1.5 mm
2

Wire end ferrules to DIN 46228
Wire the front connector Screwdriver with a 3.5-mm blade, side-cutters,
stripping tool
Flexible cables, 0.25 mm
2
to 0.75/1.5 mm
2

Shielded cables as required
Wire end ferrules to DIN 46228
Wiring
6.1 Requirements for wiring the S7-300
S7-300, CPU 31xC and CPU 31x: Installation
6-2 Operating Instructions, 12/2006, A5E00105492-07
Wiring conditions for PS and CPU
Table 6-3 Wiring conditions for PS and CPU
Connectable cables to PS and CPU
Solid conductors No
Flexible conductors
without wire end ferrule
With wire end ferrule

0.25 mm
2
to 2.5 mm
2

0.25 mm
2
to 1.5 mm
2

Number of conductors per terminal 1 or 2, up to 1.5 mm
2
(total) in a common wire
end ferrule
Diameter of the conductor insulation max. 3.8 mm
Stripped length 11 mm
Wire end ferrules to DIN 46228
without insulating collar
with insulating collar

Design A, 10 mm to 12 mm length
Design E, up to 12 mm length
Wiring conditions for front connectors
Table 6-4 Wiring conditions for front connectors
Front connectors Connectable cables
20-pole 40-pole
Solid conductors No No
Flexible conductors
without wire end ferrule
with wire end ferrule

0.25 mm
2
to 1.5 mm
2

0.25 mm
2
to 1.5 mm
2


0.25 mm
2
to 0.75 mm
2

0.25 mm
2
to 0.75 mm
2

Mains feed 1.5 mm
2

Number of conductors per
terminal
1 or 2, up to 1.5 mm
2
(total) in a
common wire end ferrule
1 or 2, up to 0.75 mm
2
(total) in a
common wire end ferrule
Diameter of the conductor
insulation
max. 3.1 mm max. 2.0 mm for 40-pole
cables
max. 3.1 mm for 20-pole
cables
Stripped length 6 mm 6 mm
Wire end ferrules to DIN
46228
without insulating collar
with insulating collar


Design A, 5 mm to 7 mm length
Design E, up to 6 mm length


Design A, 5 mm to 7 mm length
Design E, up to 6 mm length

Wiring
6.2 Bonding the Protective Conductor to the Mounting Rail
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-3
6.2 Bonding the Protective Conductor to the Mounting Rail
Requirement
The mounting rail is fixed onto the mounting surface.
Connecting the protective conductor
Connect the mounting rail to the protective conductor.
The mounting rail is provided with a M6 protective conductor screw for this purpose.
Minimum cross-section of the protective conductor: 10 mm
2

The figure below shows how the protective conductor has to be bonded to the rail.



Note
Always make sure of a low-impedance contact between the protective conductor and the rail.
You can achieve this by using a low-impedance cable, keeping it as short as possible and
contacting it to a large surface.
For example, an S7-300 mounted on a hinged frame must be connected to ground using a
flexible grounding strap.

Wiring
6.3 Adjusting the Power Supply Module to Local Mains Voltage
S7-300, CPU 31xC and CPU 31x: Installation
6-4 Operating Instructions, 12/2006, A5E00105492-07
6.3 Adjusting the Power Supply Module to Local Mains Voltage
Introduction
You can operate the S7-300 power supply module on 120 VAC or 230 VAC. The default
setting for the PS 307 is 230 VAC.
Setting the mains voltage selector switch
Verify that the setting of the voltage selector switch matches your local mains voltage.
To set the selector switch:
1. Remove the protective cap with a screwdriver.
2. Set the selector switch to match the local line voltage.
3. Reinsert the protective cap.
2
1
2



Number Identifier
Remove the protective cap with a screwdriver
Set selector switch to mains voltage

Wiring
6.4 Wiring the Power Supply Module and the CPU
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-5
6.4 Wiring the Power Supply Module and the CPU
Requirement
All modules are mounted onto the rail.
Wiring the PS and CPU

Note
The PS 307 power supply module is equipped with two additional 24 VDC terminals L+ and
M for the supply to I/O modules.

Note
The power supply connector of your CPU is a plug-in device and can be removed.


Warning
There is a risk of contact to live wires if the power supply module, or any additional load
power supply units, are connected to the mains.
You should therefore isolate the S7-300 from power before you start wiring it. Always use
crimp ferrules with insulating collars for the conductors. Close all front panels of the modules
when you completed the wiring. This is conditional before you reconnect the S7-300 to
power.

1. Open the PS 307 power supply module and CPU front panels.
2. Open the strain relief on the PS 307.
3. Strip the power cable to a length of 11 mm and connect it to L1, N and to the protective
earth (PE) terminal of the PS 307.
4. Screw-tighten the strain relief again.
5. Next, wire the PS and CPU
The power supply connector of the CPUs is a removable plug-in device.
Strip the connecting cables for the CPU power supply to a length of 11 mm. Wire the
lower terminal M on the PS 307 to the terminal M of the CPU and the lower terminal L+
on the PS 307 to terminal L+ of the CPU.



Warning
Reversing the polarity of the M and L+ terminals trips the internal fuse on your CPU.
Always interconnect the M and L+ terminals of the power supply module and of the CPU.

Wiring
6.4 Wiring the Power Supply Module and the CPU
S7-300, CPU 31xC and CPU 31x: Installation
6-6 Operating Instructions, 12/2006, A5E00105492-07
6. Close the front panels.
The figure below illustrates the procedures described earlier.
l
L+
M
M
M
L+
L+
N
L1
230V/120V
1 2 3



Number Identifier
Strain relief of the power supply cable
Connection cables between the PS and CPU
Removable power supply connector


Note
The PS 307 power supply module is equipped with two additional 24 VDC terminals L+ and
M for the supply to I/O modules.

Wiring
6.5 Wiring front connectors
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-7
6.5 Wiring front connectors
Introduction
The sensors and actuators of your system are connected to the S7-300 AS by means of
front connectors. Wire the sensors and actuators to the relevant front connector and then
plug it into the module.
Front connector versions
Front connectors come in 20-pin and 40-pin versions with screw contacts or spring terminals.
You require 40-pin front connectors for the CPUs 31xC and 32-channel SMs.
Use the following front connectors as required for the module:
Table 6-5 Assignment of front connectors to modules
Module Front connector with screw
terminals, order no.:
Front connector with spring
terminals, order no.:
Signal modules
(not 32-channel),
Function modules,
Communication module
CP 342-2
6ES7 392-1AJ00-0AA0 6ES7 392-1BJ00-0AA0
Signal modules
(32-channel) and
CPU 31xC
6ES7 392-1AM00-0AA0 6ES7 392-1BM01-0AA0
Connecting on spring terminals
It is quite easy to wire a front connector with spring terminals: Simply insert the screwdriver
vertically into the opening with the red opening mechanism, insert the wire into the terminal
and remove the screwdriver.


Warning
You might damage the spring clamp mechanism of the front connector if you turn the
screwdriver sideways or use the wrong size of screwdriver. Always slide a matching
screwdriver vertically into the desired opening until it reaches the mechanical stop. This
ensures that the spring terminal is fully open.

Tip
There is a separate opening for test probes up to 2 mm in diameter to the left of the opening
for the screwdriver.
Wiring
6.5 Wiring front connectors
S7-300, CPU 31xC and CPU 31x: Installation
6-8 Operating Instructions, 12/2006, A5E00105492-07
Requirement
The modules (SM, FM, CP 342-2) are mounted on the rail.
Preparing the front connectors and cables


Warning
There is a risk of contact to live wires if the power supply module, or any additional load
power supply units, are connected to the mains.
You should therefore isolate the S7-300 from power before you start wiring it. Close all front
panels of the modules when you completed the wiring. This is conditional before you
reconnect the S7-300 to power.

1. Switch off the power supply.
2. Open the front door.
3. Place the front connector into wiring position.
Push the front connector into the signal module until it latches. In this position, the front
connector still protrudes from the module.
Advantage of this wiring position: Comfortable wiring.
The front connector pins do not contact the module in this wiring position.
4. Strip the conductors to a length of 6 mm.
5. Crimp the wire end ferrules, for example, to terminate two conductors at one terminal.
1
2
3


Number Identifier
The switched off power supply module (PS)
The opened module
The front connector in wiring position
Wiring
6.5 Wiring front connectors
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-9
Wiring front connectors
Table 6-6 Wiring front connectors
Step 20-pin front connector 40-pin front connector
1. Place the included cable strain relief into the front
connector.

Cable exit at the bottom of the module?
If yes:
Starting at terminal 20, work your way down to
terminal 1.

Start wiring at terminal 40 or 20, and work in alternating
passes from terminals 39, 19, 38, 18 etc. until you have
reached terminals 21 and 1.
2.
If not:
Start wiring at terminal 1, and work your way up to
terminal 20.

Start wiring at terminal 1 or 21, and work in alternating
passes from terminals 2, 22, 3, 23 etc. until you have
reached terminals 20 and 40.
3. Front connectors with screw terminals:
Always screw-tighten the unused terminals.
4. Place the strain relief around the cable harness and the
front connector.
5. Tighten the strain relief for the cable harness. Push in the strain relief to the left to increase cable space.

1
2


2
1
3 4


The work step numbers are shown in the figure above
Insert the strain relief.
Wire the terminals.
to Wire the terminals.
Tighten the strain relief clamp.
Reference
For information on wiring the integrated I/O of 31xC CPUs, refer to the CPU 31xC and
CPU 31x, Technical Data manual.
Wiring
6.6 Plugging the front connectors into modules
S7-300, CPU 31xC and CPU 31x: Installation
6-10 Operating Instructions, 12/2006, A5E00105492-07
6.6 Plugging the front connectors into modules
Requirement
The front connectors are completely wired.
Inserting the front connector
Table 6-7 Inserting the front connector
Step 20pin front connector 40pin front connector
Push in the unlocking mechanism on top of
the module.
Keeping the locking mechanism pressed,
insert the front connector into the module.
Provided the front connector is seated
correctly in the module, the unlocking
mechanism automatically returns to the
initial position when you release it.
Tighten the mounting screw in the center
of the connector.

This pulls the front connector completely
into contact with the module.
1.
Note
When you insert the front connector into the module, an encoding mechanism engages in
the front connector, thus ensuring that the connector can only be inserted into modules of
the same type.
2. Close the front panel. Close the front panel.

1
2
3


1
2


The work step numbers are shown in the figure above
Keep the release mechanism pressed
Insert the front connector
Only then close the front panel
Tighten the mounting screw,
Only then close the front panel

Wiring
6.7 Labeling the module I/Os
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-11
6.7 Labeling the module I/Os
Introduction
The labeling strips are used to document the assignment of module I/Os to the sensors /
actuators of your system.
You have to use the following labeling strips, depending on the module:
Table 6-8 Assignment of labeling strips to modules
Module Labeling strip
Order no.:
SMs (not 32-channel),
Function modules,
Communication module CP 342-2
6ES7 392-2XX00-0AA0
SMs (32-channel) 6ES7 392-2XX10-0AA0
Filling out and inserting labeling strips
1. Label the strips with the addresses of the sensors / actuators.
2. Slide the labeled strips into the front panel.


Tip
Templates for labeling strips are available on the Internet at
http://www.siemens.com/automation/csi_en_WW, under entry ID 11978022.
Wiring
6.8 Terminating shielded cables on the shielding contact element
S7-300, CPU 31xC and CPU 31x: Installation
6-12 Operating Instructions, 12/2006, A5E00105492-07
6.8 Terminating shielded cables on the shielding contact element
Application
The shield connecting element allows easy grounding of all shielded cables of S7 modules,
due to its direct contact to the mounting rail.
Design of the shielding contact element
The shielding contact element consists of:
a bracket with two screw bolts for rail mounting (order no.: 6ES5 390-5AA00-0AA0) and
the shielding terminals.
You must use the following shielding terminals, based on the shielding diameter of your
cables:
Table 6-9 Shielding diameter assignment to shielding terminals
Cable with shielding diameter Shielding terminal order no.:
2 cables, each with shielding diameter of 2 mm to 6 mm 6ES7 390-5AB00-0AA0
1 cable, shielding diameter 3 mm to 8 mm 6ES7 390-5BA00-0AA0
1 cable, shielding diameter 4 mm to 13 mm 6ES7 390-5CA00-0AA0
The shielding contact element width is 80 mm and provides two rows, each with 4 shielding
terminals.
Wiring
6.8 Terminating shielded cables on the shielding contact element
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-13
Installing the shield connecting element underneath two signal modules
1. Push the two screw bolts of the bracket into the guide on the underside of the mounting
rail.
2. Place the bracket underneath the modules whose shielded cables are to be terminated.
3. Screw-tighten the bracket onto the rail.
4. The shielding terminal is equipped with a slotted web underneath. Place the shielding
terminal at this position onto the edge of the bracket (see figure below). Push the
shielding terminal down and pivot it into the desired position.
You can install up to 4 shielding terminals on each of the two rows of the shielding
contact element.
2
1
3



Number Identifier
Bracket of shielding contact element
Edge of the bracket where the shielding terminal(s) has to be placed.
Shielding terminals
Wiring
6.8 Terminating shielded cables on the shielding contact element
S7-300, CPU 31xC and CPU 31x: Installation
6-14 Operating Instructions, 12/2006, A5E00105492-07
Terminating 2-wire cables on shielding contact elements
Only one or two shielded cables may be terminated per shielding terminal (see the figure
below). The cable is clamped down at the stripped cable shielding.
1. Strip the cable shielding to a length of at least 20 mm.
2. Clamp in the stripped cable shielding underneath the shielding terminal.
Push the shielding terminal towards the module and feed the cable through the clamp
opening ..
If you need more than four shielding terminals, start wiring at the rear row of the shielding
contact element.
1
2
2


Number Identifier
Magnified view of the shielding terminal
Wiring of the shielding terminal
Tip
Provide a sufficient cable length between the shielding terminal and the front connector. This
allows you to disconnect the front connector for repairs, without having to disconnect the
shielding terminal also, for example.
See also
Cable shielding (Page A-12)
Wiring
6.9 Wiring the MPI / PROFIBUS connectors
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-15
6.9 Wiring the MPI / PROFIBUS connectors
6.9.1 Connecting the bus connector
Introduction
You need to network all the nodes you integrate into a subnet of your system. Information on
how to wire the bus connector can be found in the article below.
Wiring a bus connector with screw terminals
1. Strip the bus cable.
Details on stripped lengths are found in the product information supplied with the bus
connector.
2. Open the bus connector housing.
3. Insert the green and the red wire into the screw-terminal block.
Always connect the same wires to the same terminal (green wire to terminal A, red wire to
terminal B, for example).
4. Press the cable sheath into the clamp. Make sure that the shielding directly contacts the
shielding contact surfaces.
5. Screw-tighten the wire terminals.
6. Close the bus connector housing.
Wiring a Fast Connect bus connector
1. Strip the bus cable.
Details on stripped lengths are found in the product information supplied with the bus
connector.
2. Open the strain relief of the bus connector.
3. Insert the green and red wire into the open contacting covers.
Always connect the same wires to the same terminal (green wire to terminal A, red wire to
terminal B, for example).
4. Close the contacting cover.
This presses the conductors into the insulation displacement terminals.
5. Screw-tighten the strain relief clamp. Make sure that the shielding directly contacts the
shielding contact surfaces.



Note
Use a bus connector with 90 cable exit.
See also
Network components of MPI/DP and cable lengths (Page 4-34)
Wiring
6.9 Wiring the MPI / PROFIBUS connectors
S7-300, CPU 31xC and CPU 31x: Installation
6-16 Operating Instructions, 12/2006, A5E00105492-07
6.9.2 Setting the terminating resistor on the bus connector
Inserting a bus connector in a module
1. Connect the wired bus connector to the module.
2. Screw the bus connector tightly onto the module.
3. If the bus connector is at the start or end of a segment, you have to switch on the
terminator resistance (Switch position "ON"; see following figure).



Note
6ES7 972-0BA30-0XA0 bus connectors are not equipped with a terminating resistor. You
cannot insert this type of bus connector at the beginning or end of a segment.

Please make sure during startup and normal operation that power is always supplied to
nodes where the terminating resistor is active.
The figure below shows the switch settings of a bus connector:
on
off
on
off
On On
Off Off
Terminating resistor activated Terminating resistor not activated


Removing the fiber-optic cable
You can unplug a bus connector with a looped-through bus cable at any time from the
PROFIBUS DP interface without interrupting data exchange on the bus.
Wiring
6.9 Wiring the MPI / PROFIBUS connectors
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 6-17
Possible data traffic errors


Warning
Data traffic error might occur on the bus!
A bus segment must always be terminated at both ends with the terminating resistor. For
example, this is not the case when the last slave with the bus connector is deactivated.
Because the bus connector takes its voltage from the station, this terminating resistor is
ineffective. Please make sure that power is always supplied to stations on which the
terminating resistor is active.


Wiring
6.9 Wiring the MPI / PROFIBUS connectors
S7-300, CPU 31xC and CPU 31x: Installation
6-18 Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 7-1
Addressing
7
7.1 Slot-specific addressing of modules
Introduction
In slot-specific addressing (default addressing if configuration data was not loaded to the
CPU yet), each slot number is assigned a module start address. This is a digital or analog
address, based on the type of module.
This section shows you which module start address is assigned to which slot number. You
need this information to determine the start addresses of the installed modules.
Maximum assembly and the corresponding module start addresses
The figure below shows you an S7-300 assembly on four racks, and the optional slots with
their modules.Start addresses
The input and output addresses for I/O modules begin at the same module start address.

Note
On a CPU 31xC system you cannot insert any modules into slot 11 of rack 3. The address
area is reserved for the integrated I/O.


Addressing
7.1 Slot-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
7-2 Operating Instructions, 12/2006, A5E00105492-07
The figure below shows the slots of an S7-300 and the corresponding module start
addresses:
SF
BUSF
DC5V
FRCE
RUN
STOP
SM
SM
SM
SM
Slot number
Digital module start address
Analog module start address
3
3
1 2 3
3
lM SM SM SM SM SM SM SM SM
lM SM SM SM SM SM SM SM SM
lM SM SM SM SM SM SM SM SM
lM PS CPU SM SM SM SM SM SM SM SM
4
96
640
4
64
512
8
16
320
9
20
336
10
24
352
11
28
368
7
12
304
6
8
288
5
4
272
4
0
256
11
60
496
10
56
480
9
52
464
8
48
448
7
44
432
6
40
416
5
36
400
4
32
384
11
92
624
10
88
608
9
84
592
8
80
576
7
76
560
6
72
544
5
68
528
5
100
656
6
104
672
7
108
688
9
116
720
10
120
736
11
124
752
8
112
704
Rack 3 (EM)
Not CPU 31xC
Rack 2 (EM)
Rack 1 (EM)
Rack 0 (CU)
Slot number
Digital module start address
Analog module start address
Slot number
Digital module start address
Analog module start address
Slot number
Digital module start address
Digital module start address


Addressing
7.2 User-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 7-3
7.2 User-specific addressing of modules
7.2.1 User-specific addressing of modules
User-specific addressing
User-specific addressing means that you can assign an address of your choice to any
module (SM/FM/CP). The addresses are assigned in STEP 7. There you specify the module
start address that forms the basis for all other addresses of the module.
Advantages in user-specific addressing:
Optimization of available address space as there are no "address gaps" between the
modules.
In your standard software configuration, you can define addresses which are independent
of the relevant S7300 configuration.



Note
You always configure the hardware in HW Config of STEP 7 when using PROFIBUS DP
or PROFINET IO field devices. User-specific addressing is automatically set in this case.
There is no fixed slot addressing for such a configuration.

Addressing
7.2 User-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
7-4 Operating Instructions, 12/2006, A5E00105492-07
7.2.2 Addressing digital modules
This section describes how to assign addresses to digital modules. You need this
information in order to be able to address the channels of the digital module in the user
program.
Addresses of digital modules
The address of an input or output of a digital module consists of a byte address plus a bit
address.

Example: I 1.2

The example consists of:
input I,
byte address 1 and
bit address 2

The byte address is based on the module start address.
The bit address is the number printed on the module.
When the first digital module is located in slot 4, its default start address is 0. The start
address of each further digital module increments by the count of 4.
The figure below shows you how the scheme by which the addresses of the various
channels of a digital module are derived.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Byte address:
Module start address
Byte address:
Module start address + 1
Bit address


Addressing
7.2 User-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 7-5
An example of digital modules
The example in the figure below shows which default addresses are derived when a digital
module is located in slot 4 (that is, when the module start address is 0). Slot number 3 is not
assigned, because the example does not contain an interface module.
PS CPU SM
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
4 1 2
:
:
:
:
:
:
Address 0.0
Address 1.7
Address 1.1
Address 1.0
Address 0.7
Address 0.1
Slot
number


7.2.3 Addressing analog modules
This section describes how to address analog modules. You need this information in order to
be able to address the channels of the analog modules in your user program.
Addresses of analog modules
The analog input or output channel is always assigned a word address. The channel address
is based on the module start address. When the first analog is located in slot 4, its default
start address is 256. The start address of each further analog module increments by the
count of 16.
An analog I/O module has the same start addresses for its input and output channels.
Addressing
7.2 User-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
7-6 Operating Instructions, 12/2006, A5E00105492-07
An example of analog modules
The example in the figure below shows you which default channel addresses are derived for
an analog module located at slot 4. As you can see, the input and output channels of an
analog I/O module are addressed starting at the same address, namely the module start
address.
Slot number 3 is not assigned, because the example does not contain an interface module.
:
:
:
:
lnputs
Outputs
Channel 0: Address 256
Channel 1: Address 258
Channel 0: Address 256
Channel 1: Address 258
Slot
number
PS CPU SM
1 2 4

Figure 7-1 I/O addresses of an analog module at slot 4

7.2.4 Addressing the integrated I/Os of CPU 31xC
CPU 312C
Addresses of the integrated I/Os of this CPU:
Table 7-1 Integrated I/Os of CPU 312C
Inputs / outputs Default addresses Remarks
10 digital inputs 124.0 to 125.1
of which 8 Inputs are for
technological functions:
124.0 to 124.7
6 digital outputs 124.0 to 124.5
of which 2 inputs are for
technological functions:
124.0 to 124.1
All digital inputs can be assigned an
interrupt function.

Optional technological functions:
Counting
Frequency measurement
Pulse width modulation
Addressing
7.2 User-specific addressing of modules
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 7-7
CPU 313C
Addresses of the integrated I/Os of this CPU:
Table 7-2 Integrated I/Os of CPU 313C
Inputs / outputs Default addresses Comments
24 digital inputs 124.0 to 126.7
of which 12 inputs are for
technological functions:
124.0 to 125.0
125.4 to 125.6
16 digital outputs 124.0 to 125.7
of which 3 inputs are for
technological functions:
124.0 to 124.2
4+1 analog inputs 752 to 761
2 analog outputs 752 to 755
All digital inputs can be assigned an
interrupt function.

Optional technological functions:
Counting
Frequency measurement
Pulse width modulation
CPU 313C-2 PtP and CPU 313C-2 DP
Addresses of the integrated I/Os of these CPUs:
Table 7-3 Integrated I/Os of CPU 313C-2 PtP/DP
Inputs / outputs Default addresses Comments
16 digital inputs 124.0 to 125.7
of which 12 inputs are for
technological functions:
124.0 to 125.0
125.4 to 125.6
16 digital outputs 124.0 to 125.7
of which 3 inputs are for
technological functions:
124.0 to 124.2
All digital inputs can be assigned an
interrupt function.

Optional technological functions:
Counting
Frequency measurement
Pulse width modulation
CPU 314C-2 PtP and CPU 314C-2 DP
Addresses of the integrated I/Os of these CPUs:
Table 7-4 Integrated I/Os of CPU 314C-2 PtP/DP
Inputs / outputs Default addresses Comments
24 digital inputs 124.0 to 126.7
of which 16 inputs are for
technological functions:
124.0 to 125.7
16 digital outputs 124.0 to 125.7
of which 4 inputs are for
technological functions:
124.0 to 124.3
4+1 analog inputs 752 to 761
2 analog outputs 752 to 755
All digital inputs can be assigned an
interrupt function.

Optional technological functions:
Counting
Frequency measurement
Pulse width modulation
Positioning
Addressing
7.3 Addressing on PROFIBUS DP
S7-300, CPU 31xC and CPU 31x: Installation
7-8 Operating Instructions, 12/2006, A5E00105492-07
Special features
You cannot influence outputs with transfer instructions if they are assigned to technological
functions.
I/Os not configured for technological functions can be used as standard I/Os.
7.3 Addressing on PROFIBUS DP
Overview
The corresponding DP slaves must be commissioned for operation on PROFIBUS DP in
order to enable addressing of distributed I/O in the user program.
This commissioning includes
the assignment of DP slaves to PROFIBUS addresses
the assignment of slots or address ranges to the I/O modules in order to enable their
addressing in the user program. Slots which do not contain user date are assigned
diagnostics addresses.
This applies likewise when the CPU is operated as DP slave.
Further information about CPU operation in DP master or DP slave mode is available in the
chapter Commissioning PROFIBUS DP.
User-specific addressing of distributed PROFIBUS IO
Distributed PROFIBUS DP IO requires user-specific addressing.
Further information is available in the User-specific addressing of modules chapter.
Addressing consistent user data areas
The table below shows items to be taken into consideration in terms of communication in a
PROFIBUS DP master system when transferring I/O areas with "Total length" consistency.

Rule for 1 byte to 32 bytes data consistency on PROFIBUS DP:
The address area of consistent data in the process image is automatically updated.
You can also use SFC14 "DPRD_DAT" and SFC15 "DPWR_DAT" to read and write consistent data.
SFC14 and SFC15 are required to read and write consistent data of address areas which are not
available in the process image.
The length of areas with "Total length" consistency accessed by the SFC must match the
programmed range.
Direct access to consistent areas is also possible (L PEW or T PAW, for example).
PROFIBUS DP supports the transfer of up to 32 bytes of consistent data.

Addressing
7.4 Addressing on PROFINET
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 7-9
7.4 Addressing on PROFINET
Overview
The corresponding I/O devices must be commissioned for operation on PROFINET in order
to enable addressing of distributed peripherals on PROFINET IO in the user program.
This commissioning includes
the definitions of I/O device numbers and names
the definition of I/O device names in order to enable the assignment of IP addresses and
access to the IO devices by the CPU 31x PN/DP operated as IO controller.
the assignment of slots/subslots or address ranges to the I/O modules in order to enable
their addressing in the user program. Slots which do not contain user date are assigned
diagnostics addresses.
Further information about CPU operation as I/O controller is available in the chapter
Commissioning PROFINET IO.
User-specific addressing of distributed PROFINET IO
Distributed peripherals on PROFINET IO require user-specific addressing.
Further information is available in the User-specific addressing of modules chapter.
Addressing consistent user data areas
The table below shows items to be taken into consideration in terms of communication in a
PROFINET IO system when transferring I/O areas with "Total length" consistency.

Rule for 1 byte to 254 bytes data consistency on PROFINET IO:
The address area of consistent data in the process image is automatically updated.
You can also use SFC14 "DPRD_DAT" and SFC15 "DPWR_DAT" to read and write consistent data.
SFC14 and SFC15 are required to read and write consistent data of address areas which are not
available in the process image.
The length of areas with "Total length" consistency accessed by the SFC must match the
programmed range.
Direct access to consistent areas is also possible (L PEW or T PAW, for example).
PROFINET IO supports the transfer of up to 254 bytes of consistent data.

Addressing
7.4 Addressing on PROFINET
S7-300, CPU 31xC and CPU 31x: Installation
7-10 Operating Instructions, 12/2006, A5E00105492-07

S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 8-1
Commissioning
8
8.1 Overview
This section contains important notes on commissioning which you should strictly observe in
order to avoid injury or damage to machines.

Note
Your commissioning phase is determined primarily by your application, so we can only offer
you general information, without claiming completeness of this topic.

Reference
Note the information about commissioning provided in the descriptions of your system
components and devices.
8.2 Commissioning procedure
8.2.1 Procedure: Commissioning the hardware
Hardware requirements
S7-300 is installed
S7-300 is wired
With networked S7-300, the following applies to the interfaces:
MPI/ PROFIBUS
The MPI/PROFIBUS addresses are configured
The terminating resistors on the segments are enabled.
PROFINET
The integrated PROFINET interface of CPU 31x PN/DP is configured in STEP 7
(IP address and device name are set in HW Config)
The CPU is connected to the subnet.
Commissioning
8.2 Commissioning procedure
S7-300, CPU 31xC and CPU 31x: Installation
8-2 Operating Instructions, 12/2006, A5E00105492-07
Recommended procedure: Hardware
The S7-300 system can be very large and extremely complex due to its modular structure
and versatile expansion options. It is therefore inappropriate to initially start up an S7-300
with multiple racks and all inserted (installed) modules. Rather, we recommend a step-by-
step commissioning procedure.
We recommend the following initial commissioning procedure for an S7-300:
Table 8-1 Recommended commissioning procedure: Hardware
Tasks Remarks Information can be found
An installation and wiring
check according to checklist
- in the chapter: Checklist for
commissioning
Disconnecting drive
aggregates and control
elements
This prevents negative effects on your system as a result
of program errors.

Tip: By redirecting data from your outputs to a data block,
you can always check the status at the outputs
-
Preparing the CPU Connecting the PG in the chapter: Connecting the
programming device (PG).
Commission the CU with inserted power supply module
and CPU.
First, switch on the expansion devices (EMs) which are
equipped with their own power supply module, and then
switch on the power supply module of the CU.
in the chapter: Initial power on Central unit (CU):
commission the CPU and
power supply, check the
LEDs
Check the LED displays on both modules. in the chapter: Debugging
functions, diagnostics and
troubleshooting
Reset CPU memory and
check the LEDs
- in the chapter: CPU memory
reset by means of mode
selector switch
CU:
commission the remaining
modules
Insert further modules into the CU and commission these,
working successively.
in the Module specifications
Manual
Expansion module (EM):
Connecting
Interconnect the CU with EMs as required: Insert only one
send IM into the CU, and insert the matching receive IM
into into the EM.
in the chapter: Installation
EM:
Commissioning
Insert further modules into the EMs and commission
these, working in successively.
See above.



Danger
Proceed step-by-step. Do not go to the next step unless you have completed the previous
one without error / error message.

Commissioning
8.2 Commissioning procedure
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 8-3
Reference
Important notes can also be found in the section Debugging Functions, Diagnostics and
Troubleshooting.
See also
Procedure: Software commissioning (Page 8-3)
8.2.2 Procedure: Software commissioning
Requirements
Your S7-300
is installed and
wired.
Software requirements to be satisfied in order to utilize the full functionality of your CPU:

For the CPUs you require the following versions of STEP
7
31xC, 312, 314, 315-2 DP V5.2 + Servicepack 1 + HSP or higher
317-2 DP V5.2 + Servicepack 1 + HSP 0117 or
higher
315-2 PN/DP V5.4 + Servicepack 1 + HSP 0115 or
higher
317- 2 PN/DP V5.4 + Servicepack 1 + HSP 0115 or
higher
319-3 PN/DP V5.4 + Servicepack 1 + HSP 0114 or
higher
With networked S7-300, the following applies to the interfaces:
MPI/ PROFIBUS
The MPI/PROFIBUS addresses are configured
The terminating resistors on the segments are enabled
PROFINET
The integrated PROFINET interface of CPU 31x PN/DP is configured in STEP 7 (IP
address and device names are set in HW Config)
The CPU is connected to the subnet.



Note
Please observe the procedure for commissioning the hardware.

Commissioning
8.2 Commissioning procedure
S7-300, CPU 31xC and CPU 31x: Installation
8-4 Operating Instructions, 12/2006, A5E00105492-07
Hardware Support Packages (HSP) required
HSPs required in addition to the HSP for CPU 31x PN/DP, V2.5 for error-free operation with
other I/O devices:
Table 8-2 HSP for PROFINET IO devices on CPU 31x PN/DP, V2.5
PROFINET IO Device HSP required
ET 200S with interface module
IM 151-3 PN (6ES7151-3AA10-0AB0) HSP0089, V1.3 or higher
IM 151-3 PN (6ES7151-3AA20-0AB0) HSP0098, V1.3 or higher
IM 151-3 PN High Feature (6ES7151-3BA20-0AB0) HSP0099, V1.3 or higher
ET 200S with interface module
IM 154-4 PN High Feature (6ES7154-4AB00-0AB0) HSP0092, V1.3 or higher
Recommended procedure: Software
Table 8-3 Recommended commissioning procedure - Part II: Software
Tasks Remarks Information can be found ...
Switch on the PG and run
SIMATIC Manager
Download the
configuration and the
program to the CPU
- In the STEP 7 Programming
Manual
Debugging the I/Os Helpful functions are here:
Monitoring and controlling tags
Testing with program status
Forcing
Controlling outputs in STOP mode (PO enable)
Tip: Test the signals at the inputs and outputs using the
simulation module SM 374, for example.
In the STEP 7 Programming
Manual
Chapter: Debugging functions,
diagnostics and
troubleshooting
Commissioning PROFIBUS
DP or Ethernet
- in the chapter: Commissioning
PROFIBUS DP
in the chapter: Configuring
PROFINET interface X2
Commissioning PROFINET
IO
in the PROFINET System
Description System Manual
Connect the outputs Commissioning the outputs successively. -



Danger
Proceed step-by-step. Do not go to the next step unless you have completed the previous
one without error / error message.

Commissioning
8.3 Commissioning check list
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 8-5
Reaction to errors
React to errors as follows:
Check the system with the help of the check list in the chapter below.
Check the LED displays on all modules. For information on their meaning, refer to the
chapters describing the relevant modules.
If required, remove individual components to trace the error.
Reference
Important notes can also be found in the section Debugging Functions, Diagnostics and
Troubleshooting.
See also
Procedure: Commissioning the hardware (Page 8-1)
8.3 Commissioning check list
Introduction
After you mounted and wired your S7-300, we advise you to check all previous steps once
again.
The check list tables below are a guide for your examination of the S7-300. They also
provide cross-references to chapters containing further information on the relevant topic.

Racks


Points to be examined are in the manual S7-300: Installation in chapter
Are the rails mounted firmly to the wall, in the frame or in the
cabinet?
Configuring, Installation
Have you maintained the free space required? Configuring, Installation
Are the cable ducts installed properly? Configuring
Is the air circulation OK? Installing
Commissioning
8.3 Commissioning check list
S7-300, CPU 31xC and CPU 31x: Installation
8-6 Operating Instructions, 12/2006, A5E00105492-07
Concept of grounding and chassis ground


Points to be examined are in the manual S7-300: Installation in chapter
Have you established a low-impedance connection (large
surface, large contact area) to local ground?
Configuring, Appendix
Are all racks (rails) properly connected to reference potential
and local ground (direct electrical connection or ungrounded
operation)?
Configuring, Wiring, Appendix
Are all grounding points of electrically connected modules and
of the load power supply units connected to reference
potential?
Configuring, Appendix
Module installation and wiring


Points to be examined are in the manual S7-300: Installation in chapter
Are all modules properly inserted and screwed in? Installing
Are all front connectors properly wired, plugged, screw-
tightened or latched to the correct module?
Installation, Wiring
Mains voltage


Points to be examined S7-300:
Installation in
chapter
See manual;
Section ...
Is the correct mains voltage set for all components? Wiring Module data
Power supply module


Points to be examined S7-300:
Installation in
chapter
See manual;
Section ...
Is the mains plug wired correctly? Wiring -
Is mains voltage connected? - -

Commissioning
8.4 Commissioning the Modules
S7-300, CPU 31xC and CPU 31x: Installation
Operating Instructions, 12/2006, A5E00105492-07 8-7
8.4 Commissioning the Modules
8.4.1 Inserting/Replacing a Micro Memory Card
SIMATIC Micro Memory Card (MMC) as memory module
The memory module used on your CPU is a SIMATIC Micro Memory Card. You can set up
the SIMATIC Micro Memory Card as a load memory or a portable data medium.

Note
A SIMATIC Micro Memory Card must be inserted for CPU operation.

Note
The CPU goes into STOP and requests a memory reset when you remove the SIMATIC
MMC while the CPU is in RUN state.


Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it is
being accessed by a write operation. You may have to delete the SIMATIC Micro Memory
Card using the PG or format it in the CPU if you remove it from the live system.
DO NOT remove the SIMATIC Micro Memory Card when the system is in RUN state; always
shut down power or set the CPU to STOP state in order to prevent any write access of a
programming device. When the CPU is in STOP mode and you cannot not determine
whether or not a PG is writing to the card (e.g. load/delete block), disconnect the
communication lines.


Warning
Make sure that the SIMATIC Micro Memory Card to be inserted contains a user program
which is suitable for the CPU (system). The wrong user program may have fatal processing
effects.

Commissioning
8.4 Commissioning the Modules
S7-300, CPU 31xC and CPU 31x: Installation
8-8 Operating Instructions, 12/2006, A5E00105492-07
Inserting/replacing the SIMATIC Micro Memory Card
1. Switch the CPU to STOP mode.
2. Is a SIMATIC Micro Memory Card inserted?
If yes, ensure that no write operations are running on the PG (such as loading a block). If
you cannot ensure this state, disconnect all communication lines of the CPU.
Press the ejector and remove the SIMATIC MMC.
The frame of the module slot is equipped with an ejector for removing the SIMATIC MMC
(see CPU 31xC and CPU 31x Manual, Technical Data CPU31x Operator Control and
Display Elements).
You need a small screwdriver or ball-point pen to eject the SIMATIC Micro Memory Card.
3. Insert the ("new") SIMATIC MMC into the card slot with its beveled edge facing the
ejector.
4. Carefully push the SIMATIC MMC into the CPU slot to engage the interlock.
5. Reset CPU memory (see Resetting CPU memory by means of mode selector switch)


Inserting and removing a SIMATIC MMC when CPU power is switched off
After you replaced a SIMATIC MMC in POWER OFF state,
the CPUs
automatically detect a physically identical SIMATIC MMC with changed content
automatically detect a new MMC with contents to the previous SIMATIC MMC
It automatically performs a CPU memory reset after POWER ON.
Reference
Chapter Properties of th