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DATA SHEET
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The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
Philips Semiconductors
Product specication
74HC/HCT4016
4000B series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4016 have four independent analog switches (transmission gates). Each switch has two input/output terminals (Yn, Zn) and an active HIGH enable input (En). When En is connected to VCC, a low bidirectional path between Yn and Zn is established (ON condition). When En is connected to ground (GND), the switch is disabled and a high impedance between Yn and Zn is established (OFF condition). Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC >> (VY, VZ) >> GND. Inputs Yn and Zn are electrically equivalent terminals.
TYPICAL SYMBOL tPZH/ tPZL tPHZ/ tPLZ CI CPD CS Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD VCC2 fi + { (CL + CS) VCC2 fo } where: fi = input frequency in MHz fo = output frequency in MHz {(CL + CS) VCC2 fo} = sum of outputs CL = output load capacitance in pF CS = max. switch capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC 1.5 V ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. PARAMETER turn ON time En to VOS turn OFF time En to VOS input capacitance power dissipation capacitance per switch max. switch capacitance notes 1 and 2 CONDITIONS HC CL = 15 pF; RL = 1 k; VCC = 5 V 16 14 3.5 12 5 HCT 17 20 3.5 12 5 ns ns pF pF pF UNIT
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
(a)
(b)
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
FUNCTION TABLE INPUT En L H Notes 1. H = HIGH voltage level L = LOW voltage level CHANNEL IMPEDANCE high low
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
for VI < 0.5 V or VI > VCC + 0.5 V for VS < 0.5 V or VS > VCC + 0.5 V for 0.5 V < VS < VCC + 0.5 V
for temperature range: 40 to +125 C 74HC/HCT above +70 C: derate linearly with 12 mW/K above +70 C: derate linearly with 8 mW/K
RECOMMENDED OPERATING CONDITIONS 74HC SYMBOL PARAMETER min. typ. max. min. typ. max. VCC VI VS Tamb Tamb DC supply voltage DC input voltage range DC switch voltage range operating ambient temperature range operating ambient temperature range 2.0 GND GND 40 40 5.0 10.0 VCC VCC +85 +125 1000 t r, t f input rise and fall times 6.0 500 400 250 6.0 500 ns 4.5 GND GND 40 40 5.0 5.5 VCC VCC +85 V V V C see DC and AC CHARACTERISTICS VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V 74HCT UNIT CONDITIONS
+125 C
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
TEST CONDITIONS VCC (V) 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 IS (A) 100 1000 1000 1000 100 1000 1000 1000 100 1000 1000 1000 Vis VI
max. min. max. min. max. VCC VIH to or GND VIL GND VIH or VIL VCC VIH or VIL
RON
ON resistance (rail)
RON
ON resistance (rail)
RON
Notes to the DC Characteristics 1. At supply voltages approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.6.
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
Fig.9 Typical RON as a function of input voltage Vis for Vis = 0 to VCC.
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
TEST CONDITIONS VCC (V) 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 6.0 VCC 10.0 or GND 10.0 VIH or VIL 10.0 VIH or VIL 6.0 VCC 10.0 or GND VS = VCC GND (see Fig.7) VS = VCC GND (see Fig.8) Vis = GND or VCC; Vos = VCC or GND VI OTHER
max. min. max. min. 1.5 3.15 4.2 6.3 0.50 1.35 1.80 2.70 1.0 2.0 1.0 1.5 3.15 4.2 6.3
VIL
II
input leakage current analog switch OFF-state current per channel analog switch ON-state current quiescent supply current
IS
IS
0.1
1.0
1.0
ICC
2.0 4.0
20.0 40.0
40.0 80.0
AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER min. tPHL/ tPLH propagation delay Vis to Vos turn ON time En to Vos +25 typ. 17 6 5 4 52 19 15 11 47 17 14 13 40 to +85 max. min. max. 60 12 10 8 190 38 32 28 145 29 25 22 75 15 13 10 240 48 41 35 180 36 31 28 8 40 to +125 min. max. 90 18 15 12 235 57 48 42 220 44 38 33 ns 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 RL = ; CL = 50 pF (see Fig.16) UNIT V CC (V) OTHER TEST CONDITIONS
tPZH/ tPZL
ns
tPHZ/ tPLZ
ns
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
TEST CONDITIONS VCC VI (V) 4.5 to 5.5 4.5 to 5.5 5.5 VCC or GND VIH or VIL VIH or VIL VCC or GND VS = VCC GND (see Fig.7) VS = VCC GND (see Fig.8) Vis = GND or VCC; Vos = VCC or GND OTHER
VIL
1.2
0.8
0.8
0.8
II
0.1
1.0
1.0
IS
0.1
1.0
1.0
5.5
IS
0.1
1.0
1.0
5.5
ICC
2.0
20.0
40.0
ICC
360
450
490
Note 1. The value of additional quiescent supply current (ICC) for a unit load of 1 is given here. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT EN
December 1990
Philips Semiconductors
Product specication
74HC/HCT4016
TEST CONDITIONS VCC OTHER (V) 4.5 4.5 4.5 4.5 RL = ; CL = 50 pF (see Fig.16) RL = 1 k; CL = 50 pF (see Figs 17 and 18) RL = 1 k; CL = 50 pF (see Figs 17 and 18) RL = 1 k; CL = 50 pF (see Figs 17 and 18)
min. typ. max. min. tPHL/ tPLH tPZH tPZL tPHZ/ tPLZ propagation delay Vis to Vos turn ON time En to Vos turn ON time En to Vos turn OFF time En to Vos 6 19 20 23 12 35 35 35
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = 0 V; tr = tf = 6 ns SYMBOL PARAMETER sine-wave distortion f = 1 kHz sine-wave distortion f = 10 kHz switch OFF signal feed-through crosstalk between any two switches V(p-p) crosstalk voltage between enable or address input to any switch (peak-to-peak value) minimum frequency response (3dB) maximum switch capacitance typ. 0.80 0.40 2.40 1.20 50 50 60 60 110 220 UNIT % % % % dB dB dB dB mV mV VCC (V) 4.5 9.0 4.5 9.0 4.5 9.0 4.5 9.0 4.5 9.0 Vis(p-p) (V) 4.0 8.0 4.0 8.0 note 3 note 3 CONDITIONS RL = 10 k; CL = 50 pF (see Fig.14) RL = 10 k; CL = 50 pF (see Fig.14) RL = 600 ; CL = 50 pF; f = 1 MHz (see Figs 10 and 15) RL = 600 ; CL = 50 pF; f = 1 MHz (see Fig.12) RL = 600 ; CL = 50 pF; f = 1 MHz (En, square wave between VCC and GND, tr = tf = 6 ns) (see Fig.13) note 4 RL = 50 ; CL = 10 pF (see Figs 11 and 14)
fmax CS Notes
150 160 5
MHz MHz pF
4.5 9.0
1. Vis is the input voltage at a Yn or Zn terminal, whichever is assigned as an input. 2. Vos is the output voltage at a Yn or Zn terminal, whichever is assigned as an output. 3. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ). 4. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
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10
Philips Semiconductors
Product specication
74HC/HCT4016
December 1990
11
Philips Semiconductors
Product specication
74HC/HCT4016
Fig.12 Test circuit for measuring crosstalk between any two switches. (a) channel ON condition; (b) channel OFF condition.
Fig.13 Test circuit for measuring crosstalk between control and any switch.
Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response.
December 1990
12
Philips Semiconductors
Product specication
74HC/HCT4016
Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays.
December 1990
13
Philips Semiconductors
Product specication
74HC/HCT4016
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint tr, tf with 50% duty factor.
tr; tf FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint tr, tf with 50% duty factor.
tr; tf FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns