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MC3403 MC3303
QUAD DIFFERENTIAL INPUT OPERATIONAL AMPLIFIERS
SEMICONDUCTOR TECHNICAL DATA
Short Circuit Protected Outputs Class AB Output Stage for Minimal Crossover Distortion True Differential Input Stage Single Supply Operation: 3.0 V to 36 V Split Supply Operation: 1.5 V to 18 V Low Input Bias Currents: 500 nA Max Four Amplifiers Per Package Internally Compensated Similar Performance to Popular MC1741C Industry Standard Pinouts ESD Diodes Added for Increased Ruggedness Single Supply
3.0 V to 36 V 1 2 3 4 VEE, Gnd VEE VCC VCC 1 2 3 4 1.5 V to 18 V 2 Inputs 1 3 VCC Symbol VCC VCC, VEE VIDR VICR Tstg TA 40 to +85 0 to +70 TJ 150 C Value 36 18 36 18 55 to +125 Vdc Vdc C C Device MC3303D MC3303P MC3403D MC3403P (Top View) Unit Vdc Inputs 2 6 Out 2 7 4 5 + 2 4 + + 1 3 + 13 Inputs 4 12 11 10 Inputs 3 9 8 Out 3 VEE/Gnd Out 1 1 14 Out 4 1.5 V to 18 V
14 1 14 1
Split Supplies
PIN CONNECTIONS
MAXIMUM RATINGS
Rating Power Supply Voltages Single Supply Split Supplies Input Differential Voltage Range (Note 1) Input Common Mode Voltage Range (Notes 1, 2) Storage Temperature Range Operating Ambient Temperature Range MC3303 MC3403 Junction Temperature
ORDERING INFORMATION
Operating Temperature Range TA = 40 to +85C TA = 0 to +70C Package SO14 Plastic DIP SO14 Plastic DIP
NOTES: 1. Split power supplies. 2. For supply voltages less than 18 V, the absolute maximum input voltage is equal to the supply voltage.
Rev 5
MC3403 MC3303
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = 15 V for MC3403; VCC = +14 V, VEE = Gnd for MC3303
MC3403 Ch Characteristic i i Input Offset Voltage TA = Thigh to Tlow (Note 1) Input Offset Current TA = Thigh to Tlow Large Signal Open Loop Voltage Gain VO = 10 V, RL = 2.0 k TA = Thigh to Tlow Input Bias Current TA = Thigh to Tlow Output Impedance f = 20 Hz Input Impedance f = 20 Hz Output Voltage Range RL = 10 k RL = 2.0 k RL = 2.0 k, TA = Thigh to Tlow Input Common Mode Voltage Range Common Mode Rejection RS 10 k Power Supply Current (VO = 0) RL = Individual Output ShortCircuit Current (Note 2) Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Average Temperature Coefficient of Input Offset Current TA = Thigh to Tlow Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow Power Bandwidth AV = 1, RL = 10 k, VO = 20 V(pp), THD = 5% SmallSignal Bandwidth AV = 1, RL = 10 k, VO = 50 mV Slew Rate AV = 1, Vi = 10 V to +10 V Rise Time AV = 1, RL = 10 k, VO = 50 mV Fall Time AV = 1, RL = 10 k, VO = 50 mV Overshoot AV = 1, RL = 10 k, VO = 50 mV Phase Margin AV = 1, RL = 2.0 k, VO = 200 pF Crossover Distortion (Vin = 30 mVpp,Vout= 2.0 Vpp, f = 10 kHz)
NOTES: 1. Thigh = +70C for MC3403, +85C for MC3303 Tlow = 0C for MC3403, 40C for MC3303 2. Not to exceed maximum package power dissipation.
MC3303 Max 10 12 50 200 500 800 7.0 45 150 150 Min 20 15 0.3 12 10 10 +12 V VEE 70 10 Typ 2.0 30 200 200 75 1.0 12.5 12 +12.5 V VEE 90 2.8 30 30 30 50 Max 8.0 10 75 250 500 1000 7.0 45 150 150 V dB mA mA V/V V/V pA/C nA M V U i Unit mV nA V/mV
Min 20 15
IIB zo zi VO
VIO/T
10
10
V/C
MC3403 MC3303
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25C, unless otherwise noted.)
MC3403 Ch Characteristic i i Input Offset Voltage Input Offset Current Input Bias Current Large Signal Open Loop Voltage Gain RL = 2.0 k Power Supply Rejection Ratio Output Voltage Range (Note 3) RL = 10 k, VCC = 5.0 V RL = 10 k, 5.0 VCC 30 V Power Supply Current Channel Separation f = 1.0 kHz to 20 kHz (Input Referenced) S b l Symbol VIO IIO IIB AVOL PSRR VOR 3.3 VCC2.0 ICC CS 3.5 VCC1.7 2.5 120 7.0 3.3 VCC2.0 3.5 VCC1.7 2.5 120 7.0 mA dB Min 10 Typ 2.0 30 200 200 Max 10 50 500 150 Min 10 MC3303 Typ 200 Max 10 75 500 150 U i Unit mV nA nA V/mV V/V Vpp
Q23 5.0 pF 31k + Q22 Inputs Q2 Q3 Q4 Q21 Q25 Q5 60 k Q6 Q7 Q8 Q10 Q24 Q1 2.0 k Q9 37 k
Q29
Q30 2.4 k
VEE (Gnd)
MC3403 MC3303
CIRCUIT DESCRIPTION
Inverter Pulse Response stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q24 and Q22. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to singleended converter. The second stage consists of a standard current source load amplifier stage. The output stage is unique because it allows the output to swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply operation. This is possible because Class AB operation is utilized. Each amplifier is biased from an internal voltage regulator which has a low temperature coefficient, thus giving each amplifier good temperature characteristics as well as excellent power supply rejection.
5.0 V/DIV
20 s/DIV
The MC3403/3303 is made using four internally compensated, twostage operational amplifiers. The first stage of each consists of differential input device Q24 and Q22 with input buffer transistors Q25 and Q21 and the differential to single ended converter Q3 and Q4. The first
50 mV/DIV *Note Class A B output stage produces distortion less sinewave. 50 s/DIV
1.0
10
100 k
1.0 M
MC3403 MC3303
Figure 3. Power Bandwidth
30 VO, OUTPUT VOLTAGE (Vpp ) 25 20 15 10 5.0 0 5.0 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M TA = 25C +
15 V VO 10 k +15 V
20
10
0 0 2.0 4.0 6.0 8.0 10 12 14 16 18 VCC AND (VEE), POWER SUPPLY VOLTAGES (V) 20
170
200
160
100
75 55
35
15
5.0
25
45
65
85
105 125
150
2.0
4.0
6.0
8.0
10
12
14
16
18
20
T, TEMPERATURE (C)
1/2
MC3403 + 10 k R1
VO
10 k Vref
1/2
MC3403 MC3303
Figure 9. High Impedance Differential Amplifier
e1 1 R C
1/2
MC3403 +
1/2
R1
a R1
1/2
eo
Vin
MC3403 +
e2
R 100 k C 100 k
R2
1/2
MC3403 + Vref
1/2
MC3403 + R3
1/2
C1 Notch Output
For: fo Q TBP TN
= 1.0 kHz = 10 =1 =1
Where:
MC3403 +
R3
1/2
CO VO CO = 10 C 1 Vref = V 2 CC
MC3403
R2 Vref Given:
MC3403 +
fo = center frequency A(fo) = gain at center frequency Q fo C R3 2 A(fo) R1 R5 4Q2 R1 R5 Oo fo < 0.1 BW
if R3 =
R2 R1 R2 +R1
For less than 10% error from operational amplifier where fo and BW are expressed in Hz.
If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters.
MC3403 MC3303
OUTLINE DIMENSIONS
D SUFFIX PLASTIC PACKAGE CASE 751A03 ISSUE F (SO14) A
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
B
1 7
P 7 PL 0.25 (0.010)
M
G C
R X 45 _
T
SEATING PLANE
D 14 PL 0.25 (0.010)
M
K T B
S
M A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
14
B
1 7
A F C N H G D
SEATING PLANE
J K M
MC3403 MC3303
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*MC3403/D*