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TDA7850

4 x 50 W MOSFET quad bridge power amplifier plus HSD


Features

High output power capability: 4 x 50W/4 max. 4 x 30W/4 @ 14.4V, 1KHz, 10% 4 x 80W/2 max. 4 x 55W/2 @ 14.4V, 1KHz, 10% MOSFET output power stage Excellent 2 driving capability Hi-Fi class distortion Low output noise ST-BY function Mute function Automute at min. supply voltage detection Low external component count: Internally fixed gain (26dB) No external compensation No bootstrap capacitors On board 0.35A high side driver

Flexiwatt25 (Vertical)

Flexiwatt25 (Horizontal)

ESD

Protections:

Output short circuit to gnd, to Vs, across the load Very inductive loads Overrating chip temperature with soft thermal limiter Output DC offset detection Load dump voltage Fortuitous open gnd Reversed battery

Description
The TDA7850 is a breakthrough MOSFET technology class AB audio power amplifier in Flexiwatt 25 package designed for high power car radio. The fully complementary P-Channel/NChannel output structure allows a rail to rail output voltage swing which, combined with high output current and minimized saturation losses sets new power references in the car-radio field, with unparalleled distortion performances. The TDA7850 integrates a DC offset detector.

Table 1.

Device summary
Order code TDA7850 TDA7850H Package Flexiwatt25 (Vertical) Flexiwatt25 (Horizontal Packing Tube Tube

October 2007

Rev 3

1/18
www.st.com 1

Contents

TDA7850

Contents
1 Block diagram and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Standard test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 3

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7


3.1 3.2 3.3 3.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 4.2 4.3 4.4 4.5 SVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Stand-by and muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DC offset detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Heatsink definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 6

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

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TDA7850

List of tables

List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

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List of figures

TDA7850

List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Standard test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Components and top copper layer of the Figure 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Bottom copper layer Figure 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Quiescent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage (RL = 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage (RL = 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. output power (RL = 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. output power (RL = 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. frequency (RL = 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. frequency (RL = 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Supply voltage rejection vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output attenuation vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power dissipation & efficiency vs. output power (RL = 4, SINE) . . . . . . . . . . . . . . . . . . . 12 Power dissipation & efficiency vs. output power (RL = 2, SINE) . . . . . . . . . . . . . . . . . . . 12 Power dissipation vs. output power (RL = 4, audio program simulation) . . . . . . . . . . . . . 13 Power dissipation vs. output power (RL = 2, audio program simulation) . . . . . . . . . . . . . 13 ITU R-ARM frequency response, weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 13 Flexiwatt25 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 15 Flexiwatt25 (horizontal) mechanical data and package dimensions. . . . . . . . . . . . . . . . . . 16

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TDA7850

Block diagram and application circuit

1
1.1

Block diagram and application circuit


Block diagram
Figure 1. Block diagram
Vcc1 Vcc2 470F ST-BY 100nF

MUTE

HSD

HSD/VOFF_DET OUT1+ OUT1-

IN1 0.1F

PW-GND OUT2+

IN2 0.1F

OUT2PW-GND OUT3+

IN3 0.1F

OUT3PW-GND OUT4+

IN4 0.1F AC-GND 0.47F SVR 47F TAB S-GND

OUT4PW-GND

D94AU158D

1.2

Standard test and application circuit


Figure 2. Standard test and application circuit
C8 0.1F C7 2200F Vcc1-2 R1 ST-BY 10K R2 MUTE 47K C1 IN1 0.1F IN2 C2 0.1F IN3 C3 0.1F IN4 C4 0.1F S-GND 14 13 16 C5 0.47F SVR C6 47F 10 25 HSD 1 TAB
D95AU335B

Vcc3-4 6 20 9 8 OUT1

4 C9 1F 22 C10 1F 11

5 2 3 OUT2

12

17 18 OUT3

15

19

21 24 23 OUT4

5/18

Pin description

TDA7850

Pin description
Figure 3. Pin connection (top view)
TAB P-GND2 OUT2ST-BY OUT2+ VCC OUT1P-GND1 OUT1+ SVR IN1 IN2 S-GND IN4 IN3 AC-GND OUT3+ P-GND3 OUT3VCC OUT4+ MUTE OUT4P-GND4 HSD 25
D94AU159A

Vertical

TAB P-GND2 OUT2ST-BY OUT2+ VCC OUT1P-GND1 OUT1+ SVR IN1 IN2 S-GND IN4 IN3 AC-GND OUT3+ P-GND3 OUT3VCC OUT4+ MUTE OUT4P-GND4 HSD

Horizontal

25
D06AU1655

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TDA7850

Electrical specifications

3
3.1

Electrical specifications
Absolute maximum ratings
Table 2.
Symbol VS VS (DC) VS (pk) IO Ptot Tj Tstg

Absolute maximum ratings


Parameter Operating supply voltage DC supply voltage Peak supply voltage (for t = 50ms) Output peak current repetitive (duty cycle 10% at f = 10Hz) non repetitive (t = 100s) Power dissipation Tcase = 70C Junction temperature Storage temperature Value 18 28 50 9 10 80 150 -55 to 150 Unit V V V A A W C C

3.2

Thermal data
Table 3.
Symbol Rth j-case

Thermal data
Parameter Thermal resistance junction to case Max. Value 1 Unit C/W

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Electrical specifications

TDA7850

3.3
Table 4.

Electrical characteristics
Electrical characteristics (Refer to the test and application diagram, VS = 14.4V; RL = 4; Rg = 600; f = 1KHz; Tamb = 25C; unless otherwise specified).
Parameter Quiescent current Output offset voltage During mute ON/OFF output offset voltage RL = Play mode / Mute mode ITU R-ARM weighted see Figure 20 -10 -10 25 26 Test Condition Min. 100 Typ. 180 Max. 280 60 +10 +10 27 1 VS = 13.2V; THD = 10% VS = 13.2V; THD = 1% VS = 14.4V; THD = 10% VS = 14.4V; THD = 1% VS = 14.4V; THD = 10%, 2 VS = 14.4V; RL = 4 VS = 14.4V; RL = 2 Po = 4W Po = 15W; RL = 2 "A" Weighted Bw = 20Hz to 20KHz f = 100Hz; Vr = 1Vrms PO = 0.5W 50 100 80 f = 1KHz PO = 4W f = 10KHz PO = 4W VSt-By = 1.5V VSt-By = 0V St-by pin current St-By out threshold voltage St-By in threshold voltage Mute attenuation Mute out threshold voltage Mute in threshold voltage VSt-By = 1.5V to 3.5V (Amp: ON) (Amp: OFF) POref = 4W (Amp: Play) (Amp: Mute) 80 3.5 1.5 90 2.75 1.5 60 23 16 28 20 50 25 19 30 23 55 50 85 0.006 0.015 35 50 75 300 100 70 60 120 20 10 1 A V V dB V V 0.05 0.07 50 70 Unit mA mV mV mV dB dB

Symbol Iq1 VOS

dVOS

During St-By ON/OFF output offset voltage Voltage gain Channel gain unbalance

Gv dGv

Po

Output power

W W % V dB KHz K dB A

Po max. THD eNo SVR fch Ri CT ISB Ipin5 VSB out VSB in AM VM out VM in

Max. output power(1) Distortion Output noise Supply voltage rejection High cut-off frequency Input impedance Cross talk

St-By current consumption

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TDA7850 Table 4.

Electrical specifications Electrical characteristics (continued) (Refer to the test and application diagram, VS = 14.4V; RL = 4; Rg = 600; f = 1KHz; Tamb = 25C; unless otherwise specified).
Parameter Test Condition (Amp: Mute) Att 80dB; POref = 4W (Amp: Play) Att < 0.1dB; PO = 0.5W VMUTE = 1.5V (Sourced Current) VMUTE = 3.5V Min. Typ. Max. Unit

Symbol

VAM in

VS automute threshold

6.5

7 7.5 8 18 18

7 -5

12

A A

Ipin23

Muting pin current

HSD section Vdropout Iprot Dropout voltage Current limits IO = 0.35A; VS = 9 to 16V 400 0.25 0.6 800 V mA

Offset detector (Pin 25) VM_ON VM_OFF VOFF V25_T V25_F Mute voltage for DC offset detection enabled 8 Vstby = 5V 2 0 12 3 6 4 1.5 V V V V V

Detected differential output offset Vstby = 5V; Vmute = 8V Pin 25 voltage for detection = TRUE Pin 25 Voltage for detection = FALSE Vstby = 5V; Vmute = 8V VOFF > 4V Vstby = 5V; Vmute = 8V VOFF > 2V

1. Saturated square wave output.

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Electrical specifications Figure 4. Components and top copper layer of the Figure 2.

TDA7850

Figure 5.

Bottom copper layer Figure 2.

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TDA7850

Electrical specifications

3.4
Figure 6.

Electrical characteristic curves


Quiescent current vs. supply voltage Figure 7. Output power vs. supply voltage (RL = 4)

200 190 180 170 160 150 140 130 120 110 100

Id (mA) Vi = 0 RL =

Po (W) 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 THD= 1% RL= 4 f = 1 KHz Po-max

THD= 10%

10

12 Vs (V)

14

16

18
AC00064

10

11

12

13 Vs (V)

14

15

16

17

18
AC00064

Figure 8.

Output power vs. supply voltage (RL = 2)

Figure 9.

Distortion vs. output power (RL = 4)

Po (W) 130 120 110 100 90 80 70 60 50 40 30 20 10 0 8 9 10 11 12 13 Vs (V) 14 15 16 17 18


AC00066

THD (%) 10

RL= 2 f = 1 KHz

Po-max

VS = 14.4 V RL = 4 1

THD=10%

f = 10 KHz 0.1

THD=1%

0.01

f = 1 KHz

0.001 0.1

1 Po (W)

10

100
AC00067

Figure 10. Distortion vs. output power (RL = 2)


THD (%) 10 VS = 14.4 V RL = 2 1 f = 10 KHz 0.1

Figure 11. Distortion vs. frequency (RL = 4)


THD (%) 10 VS = 14.4 V RL = 4 Po = 4 W

0.1

f = 1 KHz 0.01

0.01

0.001 0.1

0.001
1 Po (W) 10 100
AC00068

10

100

1000 f (Hz)

10000

100000
AC00069

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Electrical specifications

TDA7850

Figure 12. Distortion vs. frequency (RL = 2)


THD (%) 10 VS = 14.4 V RL = 2 Po = 8 W

Figure 13. Crosstalk vs. frequency

CROSSTALK (dB)

-20 -30 -40 -50 RL = 4 Po = 4 W Rg = 600

0.1

-60 -70

0.01

-80 -90

0.001 10 100 1000 f (Hz) 10000 100000


AC00070

-100 10 100 1000


f (Hz)

10000

100000
AC00071

Figure 14. Supply voltage rejection vs. frequency


-20 -30 -40 -50 SVR (dB) Rg = 600 Vripple = 1 Vrms

Figure 15. Output attenuation vs. supply voltage


OUTPUT ATTN (dB) 0 RL = 4 Po = 4 W ref -20

-40
-60 -70 -80

-60

-80
-90 -100 10 100 1000 f (Hz) 10000 100000
AC00072

-100 5 6 7 Vs (V) 8 9 10
AC00073

Figure 16. Power dissipation & efficiency vs. output power (RL = 4, SINE)
90 80 70 60 50 40 Ptot 30 20 10 0 0 2 4 6 8 10 12 14 Po (W) 16 18 20 22 24 26 28 30 30 20 10 0 Ptot (W) VS = 14.4 V RL = 4 x 4 f = 1 KHz SINE (%) 90 80 70 60 50 40

Figure 17. Power dissipation & efficiency vs. output power (RL = 2, SINE)
Ptot (W) 180 160 140 120 100 80 60 40 20 0 0 5 10 15 20 25 Po (W) 30 35 40 45 50 55
AC00075

(%)

90 80 70 60 50

VS = 14.4 V RL = 4 x 2 f = 1 KHz SINE

Ptot

40 30 20 10 0

AC00074

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TDA7850

Electrical specifications

Figure 18. Power dissipation vs. output power Figure 19. Power dissipation vs. output power (RL = 4, audio program simulation) (RL = 2, audio program simulation)
30 Ptot (W) VS = 13.2 V R L = 4 x 4 GAUSSIAN NOISE CLIP START 20 60 55 50 45 40 35 30 15 25 20 10 15 10 5 0 1 2 3 Po (W) 4 5 6
AC00076

Ptot (W) VS = 13.2 V RL = 4 x 2 GAUSSIAN NOISE CLIP START

25

5 0 2 4 Po (W) 6 8 10
AC00077

Figure 20. ITU R-ARM frequency response, weighting filter for transient pop
Output attenuation (dB) 10 0 -10 -20 -30 -40 -50 10 100 1000 Hz 10000 100000
AC00343

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Application hints

TDA7850

Application hints
Ref. to the circuit of Figure 2.

4.1

SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients. To conveniently serve both needs, Its minimum recommended value is 10F.

4.2

Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals ( 8Vpk) without any performance degradation. If the standard value for the input capacitors (0.1F) is adopted, the low frequency cut-off will amount to 16 Hz.

4.3

Stand-by and muting


STAND-BY and MUTING facilities are both CMOS compatible. In absence of true CMOS ports or microprocessors, a direct connection to Vs of these two pins is admissible but a 470k equivalent resistance should be present between the power supply and the muting and stand-by pins. R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises. About the stand-by, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than 2.5V/ms.

4.4

DC offset detector
The TDA7850 integrates a DC offset detector to avoid an anomalous DC offset on the inputs of the amplifier which may be multiplied by the gain, and result in a dangerous large offset on the outputs, which may lead to speaker damage through overheating. The feature is enabled by the MUTE pin and works with the amplifier unmuted and with no signal on the inputs. The DC offset detection is signaled out on the HSD pin.

4.5

Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be deduced from Figure 18, which reports the simulated power dissipation when real music/speech programmes are played out. Noise with gaussian-distributed amplitude was employed for this simulation. Based on that, frequent clipping occurrence (worst-case) will cause Pdiss = 26W. Assuming Tamb = 70C and TCHIP = 150C as boundary conditions, the heatsink's thermal resistance should be approximately 2C/W. This would avoid any thermal shutdown occurrence even after long-term and full-volume operation.

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TDA7850

Package information

Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 23.75 28.90 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 1.05 0.42 0.57 1.20 24.25 29.30 MIN. 0.175 0.070 0.029 0.014 0.031 0.935 1.139 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 0.041 0.016 0.022 0.047 0.955 1.153

OUTLINE AND MECHANICAL DATA

22.07 18.57 15.50 7.70

22.87 19.37 15.90 7.95

0.869 0.731 0.610 0.303

0.904 0.762 0.626 0.313

3.70 3.60

4.30 4.40

0.145 0.142

0.169 0.173

5 (T p.) 3 (Typ.) 20 (Typ.) 45 (Typ.)

Flexiwatt25 (vertical)

(1): dam-bar protusion not included (2): molding protusion included

V C B V V3 H3 H H1 H2 R3 R4 V1 R2 R L L1 A

L4

L2

L3

V1

V2

R2 L5 G G1 F
FLEX25ME

R1 R1 R1 E M M1

Pin 1

7034862

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Package information

TDA7850

Figure 22. Flexiwatt25 (horizontal) mechanical data and package dimensions


DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 L6 M M1 M2 N P R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 mm TYP. 4.50 1.90 1.40 2.00 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.04 10.5 15.70 7.85 5 5.45 1.95 3.00 4.73 5.61 2.20 3.50 1.70 0.50 0.30 1.25 0.50 MAX. 4.65 2.00 MIN. 0.175 0.070 inch TYP. 0.177 0.074 0.055 0.079 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.868 0.413 0.618 0.309 0.197 0.214 0.077 0.118 0.186 0.220 0.086 0.138 0.067 0.02 0.12 0.049 0.02 MAX. 0.183 0.079

OUTLINE AND MECHANICAL DATA

0.37 0.75 23.70 28.90

0.42 0.57 1.25 24.30 29.30

0.014 0.029 0.933 1.139

0.016 0.022 0.049 0.957 1.153

21.64 10.15 15.50 7.70 5.15 1.80 2.75

22.44 10.85 15.90 7.95 5.85 2.10 3.50

0.852 0.40 0.610 0.303 0.203 0.070 0.108

0.883 0.427 0.626 0.313 0.23 0.083 0.138

3.20

3.80

0.126

0.15

5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)

Flexiwatt25 (Horizontal)

(1): dam-bar protusion not included; (2): molding protusion included

7399733 A

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TDA7850

Revision history

Revision history
Table 5.
Date 22-Nov-2006 27-Feb-2007 9-Oct-2007

Document revision history


Revision 1 2 3 Initial release. Added Chapter 3.4: Electrical characteristic curves. Updated the values for the dVOS and Iq1 parameters on the Table 4. Added Figure 20 on page 13. Changes

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TDA7850

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