Application Note

Implementing a Keypad Controller on an IGLOO FPGA

1.0 Introduction
The main objective of this design is to detect a key pressed event. A standard 6-rows-by-3columns scan keypad logic has been designed and implemented.

2.0 General Implementation Overview

The key press will be stored in three 8-bit registers which can be read out/displayed using a Two-Wire Serial Interface provided. The design may be modified for active low key detection or active high key detection as desired.

Timing Generator
Scan Lines SYS CLK Key Scan Data Memory (3 X 6) RST Return Lines

Eighteen Keys 3 Bytes

Keyboard Logic on IGLOO Figure 1. Keypad Driver

Keypad Module External

3.0 Reference Design Implementation

keyscan
6

Drive_keyscan Edge detectors Shift_register

3

KEYSCAN_OUT KEYSCAN_IN

clk_10mhz SYS_CLK RST PLL

kb_clk

keyscan_data[17:0]

clkgen
Serial Interface TxD

RxD

Figure 2. Keypad Driver Logic Block Diagram

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Implementing a Keypad Controller on an IGLOO FPGA

A 3-bit counter is used to generate scan out signals in a one-hot encoded fashion on the rising edge of the kb_clk. The return lines are captured on the falling edge of the kb_clk. The data is latched on the last sequence of the scan refresh cycle. Special serial interface logic is provided to recover the latched data and transmit on the TxD line. This is provided so that the key press event can be polled through a software interface as desired. The serial interface block diagram is depicted below in Figure 3.
RxD baud_clk rst l clk_10mhz rx_data [7:0] r_edge_baud_clk recv_control recv_done

div_by_16

keyscan_rd_data[23:0] data_transfer

tx_clk

transdone load shift

xmit_control TxD

transtrig

tx_data[7:0]

Figure 3. Serial I/F for Keypad Driver

4.0 I/Os
The following table describes the main I/Os in the design:

Signal
KEYSCAN_OUT[5:0] TXD KEYSCAN_IN[2:0] RXD SYS_CLK SYS_RESET_N

Input/Output
Output Output Input Input Input Input

Description
6 Scan Lines Output Transmit Serial Output 3 Return Lines Input Receive Serial Input System Clock 20Mhz. Master Reset Active Low

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Implementing a Keypad Controller on an IGLOO FPGA

5.0 Waveforms
kb_clk
000001 KEYSCAN_OUT[5:0] 000010 000100 001000 010000 100000 000000

Sample Keys on Falling Edge KEYSCAN IN [2:0] and Shift Latch Keyscan Data into Internal Register

The row counter is incremented on the rising edge of the keyboard clock (kb_clk) and the return lines are sampled on the falling edge of the kb_clk, as shown above. The final data is latched into an internal 18-bit register, on the falling edge of the seventh count.

6.0 Conclusion
There are several control functions that an FPGA can perform, enabling the integration of multiple functions on a chip and thus reducing the board space, power requirements, and bill-ofmaterials (BOM) cost. Keyboard control is an essential function of many portable devices in the market. This design can be targeted at any application requiring a keyboard interface in a matrix form. The row-column matrix combination can be easily changed to cater to the designers requirements. The scan method can also be integrated into an interrupt-based logic if interfacing to a processor.

Appendix A Keypad Controller Design Example Design Files Summary

Files
clk_by_2.v clk_gen.v data_transfer.v recv_control.v xmit_control.v serial.v div_by_5.v div_by_16.v keyscan.v keypad_ip.v top_keypad_ip.v top_tb.v

Functionality
Divides input clock by 2 Toggle F/F Clock Generator Transfers the data according to commands given by PC This block receives data serially on RxD This block transmit data serially on TxD This block connects xmit_control, recv_control & data_transfer Divide by 5 Derived clock for internal use Divide by 16 block for serial communication Baud Clock This block scans keys This block interconnects keyscan and serial block This block interconnects keypad_ip and PLL Test_bench for keypad_ip

About Ishnatek
Ishnatek offers FPGA design and hardware prototyping services. Ishnatek offers Design and Verification Services for embedded solutions. We have IPs such as 8031, RTC, Timers, Enhanced PWM, UART/SIO/IrDA, I2C, LED Driver and Key scan, Parallel Port, ECP/EPP, etc., which can be building blocks for your embedded controller solutions.
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