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ELECTRONICS SYSTEM DESIGN LABORATORY- II

EX NO:1 DATE:

SIMULATION OF NON-ADAPTIVE CONTROL SYSTEM OF SECOND ORDER

AIM: To simulate the non-adaptive control system (second order closed loop system) using MATLAB. REQUIREMENTS: 1. Personal computer 2. MATLAB software. THEORY: Non-adaptive control represents a special type of control without non- linear feedback or with linear feedback. The characteristic equation of second order system is +2 is the undamped frequency. is the damping ratio. ALGORITHM: 1. Double click the MATLAB icon to open the software. 2. Use the simulink library to form the closed loop and open loop system. 3. Give the step input to the system. 4. Simulate the system 5. Double click the scope to view the output. 6. Stop.

ELECTRONICS SYSTEM DESIGN LABORATORY- II

BLOCK DIAGRAM:

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OUTPUT:

RESULT: Thus the non-adaptive digital control system (second order closed loop system) was simulated using the MATLAB control system.
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EX NO:2 DATE:

SIMULATION OF NON-ADAPTIVE CONTROL SYSTEM OF HIGHER ORDER

AIM: To simulate the non-adaptive control system (higher order closed loop system) using MATLAB. REQUIREMENTS: 1. Personal computer 2. MATLAB software. THEORY: Non-adaptive control represents a special type of control without non-linear feedback (or) with feedback. Higher order feedback system will not attain stable soon as order increases stabuility factor decreases. ALGORITHM: 1. Double click the MATLAB icon to open the software. 2. Use the simulink library to form the closed loop and open loop system. 3. Give the step input to the system. 4. Simulate the system 5. Double click the scope to view the output. 6. Stop.

ELECTRONICS SYSTEM DESIGN LABORATORY- II

BLOCK DIAGRAM:

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OUTPUT:

RESULT: Thus the non-adaptive control system (higher order) is simulated using MATLAB.
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ELECTRONICS SYSTEM DESIGN LABORATORY- II

EX NO:3 DATE:

SIMULATION OF NON-ADAPTIVE DIGITAL CONTROL SYSTEM

AIM: To simulate the non-adaptive digital control system using MATLAB. REQUIREMENTS: 1. Personal computer 2. MATLAB software. THEORY: Non-adaptive control represents a special type of control without non- linear feedback or with linear feedback. The characteristic equation of second order system is +2 is the undamped frequency. is the damping ratio. CALCULATION: i) Damping factor: =compare & factor of second order system . = =

ii) Undamped natural frequency = /

iii)Peak time = /

: = /
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iv) Maximum overshoot = /

G(s) =

The characteristic equation is 1+G(s)H(s) = 0 1+ =0

+5s+9=0 =3 2 = =0.8 Peak time : = / = / =5

=/5 =1.04 sec.

Maximum overshoot = =

: / /

=151%
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BLOCK DIAGRAM:

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ALGORITHM: 1. Double click the MATLAB icon to open the software. 2. Use the simulink library to form the closed loop and open loop system. 3. Give the step input to the system. 4. Simulate the system 5. Double click the scope to view the output. 6. Stop.

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OUTPUT:

RESULT: Thus the non-adaptive digital control system have been simulated using MATLAB.

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EX.NO: 4 DATE:

SIMULATION OF ADAPTIVE DIGITAL CONTROL SYSTEM

AIM: To simulate the adaptive digital control system( closed loop system ) using MATLAB. REQUIREMENTS: 1. Personal Computer 2. MATLAB 2007 version THEORY: Adaptive control represents a special type of control with Non-linear feedback in which the states of the process could be divided into two categories parameters which change faster. ALGORITHM: 1. 2. 3. 4. PROGRAM: Num = 15: Den = [15 30]; Subplot (3, 2, 1); Step (num, den); Title (openloop); Kp = 300; Num = [kp]; Den = [1 5 30+kp]; t = [0 : 0.01 : 2]; subplot (3, 2, 2); step(num, den, t);
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Double click the MATLAB icon to open the software. Open the new M-File and type the program. Save the program. Simulate the program and view the output figure.

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title( p response); kp = 30; ki = 70; num = [kp ki]; den = [1 5 30+kp ki]; t=[0: 0.01:2]; subplot(3,2,3); step(num,den,t); title( pi response); kp = 300; kd = 10; num = [kd kp]; den = [1 5+kd 30+kp]; t=[0: 0.01:2]; subplot(3,2,4); step(num,den,t); title( pd response); kp = 350; ki = 300; kd = 50; num = [kd kp ki]; den = [1 5+kd 30+kp ki]; t=[0: 0.01:2]; subplot(3,2,5); step(num,den,t); title( pid response);

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OUTPUT:

RESULT: Thus the Adaptive Digital Control System was simulated using the MATLAB control system.
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EX.NO: 5 DATE:

SAMPLE AND HOLD OPERATION

AIM: To simulate the sample and hold operation using MATLAB. REQUIREMENTS: 1. Personal Computer 2. MATLAB software THEORY: The sampling operation conversion of a continuous time function to a sequence hold operation is the increase of sampling operation conversion of a sequence to continuous time function. In computer controlled system it is necessary to convert the control actions calculated by the computers as a sequence of number to a continuous time signal that can be applied to the process. ALGORITHM: 1. 2. 3. 4. 5. 6. Double click the MATLAB to open the software. Use the simulink tool to perform the sample and hold operation. Give sine wave as input to the system. Simulink the system Double click the scope to see the result. Stop.

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BLOCK DIAGRAM:

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OUTPUT:

RESULT: Thus the sample and hold operation was simulated using MATLAB.

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EX.NO: 6 DATE: AIM:

SIMULATION OF LMS ADAPTIVE FILTER

To simulate LMS adaptive filter program using MATLAB. SOFTWARE USED: MATLAB 6.5 THEORY: Adaptive filters respond in real-time to statistical properties of signals.Many adaptive filters are based on the discrete Wiener filter and the Widrow-Hoff least-mean-squares algortithm. Several applications were illustrated: Adaptive predictor: removal of noise or interfering tones from signals System identification: sonar/radar ranging and design of FIR filters with a classic IIR response. Although the application fields of adaptive filters are quite broad in nature, they can usually be described with one of the following four system configurations: Interference cancellation Prediction Inverse modeling Identification Although it may not always exactly describe the nature of the specific signals it is common to use the following notation for all systems, namely x = input to the adaptive filter y = output of the adaptive filter d = desired response (of the adaptive filter) e = d y = estimation error

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PROGRAM: n = (1:1000)'; s = sin(0.075*pi*n); v = 0.8*randn(1000,1); ar = [1, 1/2]; v1 = filter(1,ar,v); x = s + v1; ma = [1, -0.8, 0.4 , -0.2]; v2 = filter(ma,1,v); L = 7; hlms = adaptfilt.lms(7); hnlms = adaptfilt.nlms(7); [mumaxlms,mumaxmselms] = maxstep(hlms,x) [mumaxnlms,mumaxmsenlms] = maxstep(hnlms); hlms.StepSize =mumaxmselms/30; hnlms.StepSize = mumaxmsenlms/20; [ylms,elms] = filter(hlms,v2,x); [ynlms,enlms] = filter(hnlms,v2,x); bw = firwiener(L-1,v2,x); yw = filter(bw,1,v2); ew = x - yw; plot(n(900:end),[ew(900:end), elms(900:end),enlms(900:end)]); legend('Wiener filter denoised sinusoid',... 'LMS denoised sinusoid', 'NLMS denoised sinusoid'); xlabel('Time index (n)'); ylabel('Amplitude'); hold on plot(n(900:end),x(900:end),'k:') xlabel('Time index (n)'); ylabel('Amplitude'); hold off [bw.' hlms.Coefficients.' hnlms.Coefficients.'] [ylms,elms] = filter(hlms,v2,x); [ylms2,elms2] = filter(hlms,v2,x); [ylms,elms] = filter(hlms,v2,x); hlms.PersistentMemory = true; [ylms2,elms2] = filter(hlms,v2,x); n = (1:5000)'; s = sin(0.075*pi*n); nr = 25; v = 0.8*randn(5000,nr); v1 = filter(1,ar,v); x = repmat(s,1,nr) + v1; v2 = filter(ma,1,v); reset(hlms);
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reset(hnlms); M = 10; mselms = msesim(hlms,v2,x,M); msenlms = msesim(hnlms,v2,x,M); plot(1:M:n(end),[mselms,msenlms]) legend('LMS learning curve','NLMS learning curve') xlabel('Time index (n)'); ylabel('MSE'); reset(hlms); [mmselms,emselms,meanwlms,pmselms] = msepred(hlms,v2,x,M); plot(1:M:n(end),[mmselms*ones(500,1),emselms*ones(500,1),... pmselms,mselms]) legend('MMSE','EMSE','predicted LMS learning curve',... 'LMS learning curve') xlabel('Time index (n)'); ylabel('MSE'); displayEndOfDemoMessage(mfilename) PROCEDURE: 1. 2. 3. 4. Open the application MATLAB 6.5. Click the file menu and create a new m-file. Type the program. View the waveform in the screen.

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OUTPUT:

RESULT: Thus LMS Adaptive filter program is simulated using MATLAB.


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EX.NO: 7 DATE: AIM:

SIMULATION OF RLS ADAPTIVE FILTER

To simulate RLS adaptive filter program using MATLAB. SOFTWARE USED: MATLAB 6.5 THEORY: Adaptive filters respond in real-time to statistical properties of signals.Many adaptive filters are based on the discrete Wiener filter and the Widrow-Hoff least-mean-squares algortithm. Several applications were illustrated: Adaptive predictor: removal of noise or interfering tones from signals System identification: sonar/radar ranging and design of FIR filters with a classic IIR response. Although the application fields of adaptive filters are quite broad in nature, they can usually be described with one of the following four system configurations: Interference cancellation Prediction Inverse modeling Identification Although it maynot always exactly describe the nature of the specific signals it is common touse the following notation for all systems, namely x = input to the adaptive filter y = output of the adaptive filter d = desired response (of the adaptive filter) e = d y = estimation error

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PROGRAM: x = randn(1,500); % Input to the filter b = fir1(31,0.5); % FIR system to be identified n = 0.1*randn(1,500); % Observation noise signal d = filter(b,1,x)+n; % Desired signal P0 = 10*eye(32); % Initial sqrt correlation matrix inverse lam = 0.99; % RLS forgetting factor ha = adaptfilt.rls(32,lam,P0); [y,e] = filter(ha,x,d); subplot(2,1,1); plot(1:500,[d;y;e]); title('System Identification of an FIR Filter'); legend('Desired','Output','Error'); xlabel('Time Index'); ylabel('Signal Value'); subplot(2,1,2); stem([b.',ha.Coefficients.']); legend('Actual','Estimated'); xlabel('Coefficient #'); ylabel('Coefficient valUe'); grid on;

PROCEDURE: 1. 2. 3. 4. Open the application MATLAB 6.5. Click the file menu and create a new m-file. Type the program. View the waveform in the screen.

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OUTPUT:

RESULT: Thus RLS Adaptive filter program is simulated using MATLAB.


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EX.NO: 8 DATE: AIM:

ALARM USING EMBEDDED MICROCONTROLLER

To design the alarm clock using Embedded microcontroller. APPARATUS REQURIED: 1. Personal computer 2. RS 232 cable 3. ARM processor kit THEORY: The microprocessor is used to read the clock button and update tome display. The time is shown as four digits in 12hr format. We use several button to set clock time and alarm time. When we press the hour and minute button we advance the hour and minute respectively by one. We turn the alarm ON and OFF with the alarm ON and OFF button. When alarm activated the alarm ready light is ON the speaker provides the audible sound.

PROCEDURE: 1. Open the project navigator. 2. Open the new project and open the new file. Type the program. 3. Save the program. 4. Open the flash configure and create the hex file. 5. Build and rebuild the program. 6. Open the flash magic. 7. Select the device and select IPC2148,comport-1,baud rate 9600,osc (12mhz). 8. Browse hex file. 9. Verify the program. 10. Download the program. 11. Stop the program.

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PROGRAM: #include<LPC214X.H> #include<lcd.c> #include "mat_7seg.h"

void rtc_init(void) { ILR = 3; CCR = 0x11; }

void set_time(void) { YEAR = 2009; MONTH = 11; DOM = 25; DOY = 0; // Year

// Month

// Day of month // Day of year // Day of week // Hours // Minutes

DOW = 0; HOUR = 18; MIN = 30; SEC = 30; } int main() {

unsigned int hrs_p,min_p,sec_p,i,j; unsigned int key; char En_alarm_enter,alarm_enter_mode,char_count,alarm_hrs,alarm_mins,alarm_secs;


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char hrs[2]; char mins[2]; char secs[2];

lcdinit(); rtc_init(); init_Matrix_7seg(); // Initialize matrix keyboard and 7segment dispaly set_time(); clrscr(2); printstr("SM MICRRO SYSTEM",0,0); printstr(" ARM DEV KIT ",0,1); //printstr(" ",0,1);

lcdcmd(0x01); // clear screen printstr("Key15 Enter time",0,0); printstr("Key16 Set time",0,1); printstr(" ",0,1); // switch off alarm

IOSET0 = 0x00010000; while(1) { gotoxy(0,1); hrs_p = HOUR; min_p = MIN; sec_p = SEC; split_numbers(hrs_p); lcddat(tens+0x30); lcddat(ones+0x30); lcddat(':');

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split_numbers(min_p); lcddat(tens+0x30); lcddat(ones+0x30); lcddat(':'); split_numbers(sec_p); lcddat(tens+0x30); lcddat(ones+0x30); key = catch_key(); if(key != 0) { if(key == 15) En_alarm_enter = 1; else En_alarm_enter = 0;

if(En_alarm_enter) { char_count = 0; alarm_enter_mode =1; printstr(" ",0,0);

lcdcmd(0x80); // start of 1st line while(alarm_enter_mode) { key = catch_key(); if(key!=0) { if(key<=10 || key == 16)
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{ char_count++; if(key == 16) char_count = 7; switch(char_count) { case 1: hrs[0] = key-1; lcddat(hrs[0]+0x30); break; case 2: hrs[1] = key-1; lcddat(hrs[1]+0x30); lcddat(':'); break; case 3: mins[0]= key-1; lcddat(mins[0]+0x30); break; case 4: mins[1]= key-1; lcddat(mins[1]+0x30); lcddat(':'); break; case 5: secs[0]= key-1; lcddat(secs[0]+0x30); break; case 6: secs[1]= key-1; lcddat(secs[1]+0x30); break; default: if(key == 16)
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alarm_enter_mode =0; } } } for(i=0;i<20;i++) for(j=0;j<65000;j++); } alarm_hrs = (hrs[0]*10)+hrs[1]; alarm_mins= (mins[0]*10)+mins[1]; alarm_secs= (secs[0]*10)+secs[1]; } } if(alarm_hrs == hrs_p && alarm_mins == min_p && alarm_secs == sec_p) { // raise alarm IOCLR0 = 0x00010000; while(key != 14) { key = catch_key(); } IOSET0 = 0x00010000; // switch off alarm // wait for stop buzzer key14

} } }

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RESULT: Thus the alarm clock was designed and implemented using ARM processor and verified successfully.

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EX.NO: 9 DATE:

MODEL TRAIN USING EMBEDDED MICROCONTROLLER

AIM: To design model train using Embedded microcontroller. APPARATUS REQUIRED: 1. Personal computer 2. RS 232 cable 3. ARM processor kit THEORY: The user send message to train with control box attached to tracks. The control box may have familiar controls such as throttle emergency stop button and so on. Train receives its electrical power from the two rails of the control box can send signals to the train over the tracks by modulating the power supply voltage.

PROCEDURE: 1. 2. 3. 4. 5. 6. 7. Open project navigator. Open the new project and open the new file. Type the program. Save the program. Open the flash configure and create hex file. Build and rebuild the program. Open the flash magic. Select the device and select IPC 2148, comport-1, baud rate 9600, oscillator(12mhz) 8. Erase all flash code Rdport. 9. Browse hex file. 10. Verify the program. 11. Download the program. 12. Stop the program.

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PROGRAM: STEPPER DRIVER PROGRAM: #include <LPC214x.h> extern int delay; void s_wait (void) { unsigned int d; for (d = 0; d < delay; d++); } void init_stepper(void) { IODIR1 |= 0X00030000; IOSET1 |= 0X00030000; } void init_buz(void) { IODIR0 |= 0x00010000; IOSET1 |= 0x00010000; } void stepper_clockwise(unsigned int NOR) // NOR = Number of Rotation { unsigned int i,loop_val; loop_val =(((float)(NOR*360)/1.8)/4); for(i=0;i<loop_val;i++) { IOCLR1 |= 0x00030000; IOSET1 |= 0x00050000;
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/* s_wait function */ /* only to delay for LED flashes */

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s_wait(); IOCLR1 |= 0x00030000; IOSET1 |= 0x00070000; s_wait(); IOCLR1 |= 0x00030000; IOSET1 |= 0x00060000; s_wait(); IOCLR1 |= 0x00030000; IOSET1 |= 0X00040000; s_wait(); } } void stepper_anticlockwise(unsigned int NOR) // NOR = Number of Rotation { unsigned int i,loop_val; loop_val =(((float)(NOR*360)/1.8)/4); for(i=0;i<loop_val;i++) { IOCLR1 |= 0X00030000; IOSET1 |= 0X00040000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00060000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00070000; s_wait();
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IOCLR1 |= 0X00030000; IOSET1 |= 0X00050000; s_wait(); } } MAIN PROGRAM: #include <LPC214x.h> #include "train.h" unsigned int delay; void wait(unsigned int delay) { unsigned int i; for(i=0;i<delay;i++); } int main() { unsigned int j; init_stepper(); init_buz(); IOCLR0 = 0x00010000; for(j=0;j<80;j++) wait(65000); IOSET0 = 0x00010000; delay = 65500; stepper_clockwise(3); delay = 40000; stepper_clockwise(4);
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// This function can be used to add delays

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delay = 32000; stepper_clockwise(5); delay = 25000; stepper_clockwise(7); delay = 20000; stepper_clockwise(8); delay = 25000; stepper_clockwise(7); delay = 32000; stepper_clockwise(5); delay = 40000; stepper_clockwise(4); delay = 65500; stepper_clockwise(3); delay = 65534; stepper_clockwise(1); IOCLR0 = 0x00010000; for(j=0;j<80;j++) wait(65000); IOSET0 = 0x00010000; while(1); } TRAIN PROGRAM: void init_stepper(void); void init_buz(void); void stepper_clockwise(unsigned int); void stepper_anticlockwise(unsigned int); void s_wait (void);
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RESULT: Thus the model train controller was designed and implemented using ARM processor and verified successfully.

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EX.NO : 10 DATE:

ELEVATOR CONTROLLER USING EMBEDDED MICROCONTROLLER

AIM: To design elevator controller using Embedded microcontroller. APPARATUS REQUIRED: 1. 2. 3. 4. THEORY : The Elevator car in the unit that runs up and down the hoist way carrying passenger. Every elevator car has a control panel that allows the passenger to select the floor to stop it. Each floor has a single floor control panel that calls for an elevator. Each floor also has a set of displays to show the current state of elevator system. Personal Computer RS 232 Cable Stepper Motor ARM Processor Kit

PROCEDURE: 1. 2. 3. 4. 5. 6. 7. Open project navigator. Open the new project and open the new file type the program. Save the program. Open the flash configure and create hex file. Build and rebuild the program. Open the flash magic. Select the device and select IPC 2148, comport-1 ,baud rate 9600, Oscillator(12 MHz). 8. Erase all flash code Rd port. 9. Browse hex file. 10. Verify the program. 11. Download the program. 12. Stop the program.

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PROGRAM: MATRIX 7-SEGMENT DRIVER: #include <LPC214x.h> #include "defs.h" /*Global variables*/ unsigned int thousands,hundreds,tens,ones; void init_Matrix_7seg(void) { IODIR1 |= 0xff0f0000; // set 7seg LEDs as output ports and matrix's MSB as inputs and LSB as outputs IODIR0 |= S7SEG_ENB; // set P0.19 to P0.22 as outputs to drive 7seg enable pins IODIR0 |= 0x00010000; IOSET0 |= 0x00010000; IOPIN0 |= S7SEG_ENB; signals // should be initially set to HIGH. } unsigned long scan_row(unsigned int row_num) { //unsigned int row,i; unsigned long val; IOSET1 = ROW_MASK; row ops high switch(row_num) { case 1: IOCLR1 = ROW1;break; // make P1.16 low case 2: IOCLR1 = ROW2;break; // make P1.17 low case 3: IOCLR1 = ROW3;break; // make P1.18 low //clear the previous scan row output ie make all // since we are using active low 7 seg display, the enable

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case 4: IOCLR1 = ROW4;break; // make P1.19 low //default: row = ERR; } // for(i=0;i<=65000;i++); val = IOPIN1; // read the matrix inputs

val = ((val >> 20) & 0x0000000F)^0x0000000F; // shift the colum value so that it comes to LSB // XORing is done to take 1's complement of // shifted value. return(val); } unsigned int catch_key(void) { unsigned long v; v = scan_row(1); switch(v) { case 1: return(13); case 2: return(14); case 4: return(15); case 8: return(16); } v = scan_row(2); switch(v) { case 1: return(9); case 2: return(10);
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case 4: return(11); case 8: return(12); } v = scan_row(3); switch(v) { case 1: return(5); case 2: return(6); case 4: return(7); case 8: return(8); } v = scan_row(4); switch(v) { case 1: return(1); case 2: return(2); case 4: return(3); case 8: return(4); default: return(0); } } void clearall_7seg(void) { IOPIN1 &= ~S7SEG_LED; // make all the 7seg led pins to LOW IOPIN0 |= S7SEG_ENB } void clearDigit_7seg(int digit_num)
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// Disable all the 7 seg display

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{ IOPIN0 |= S7SEG_ENB; // clear enables first switch(digit_num) { case 1: { IOPIN0 &= ~DIGI1_ENB; break; } case 2: { IOPIN0 &= ~DIGI2_ENB; break; } case 3: { IOPIN0 &= ~DIGI3_ENB; break; } case 4: { IOPIN0 &= ~DIGI4_ENB; break; } } IOPIN1 &= ~S7SEG_LED; // make all the 7seg LED pins LOW } void Digit_Dispay(int digit_num, unsigned int value) { clearDigit_7seg(digit_num); switch(value)
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// now enable only the digit1

// now enable only the digit2

// now enable only the digit3

// now enable only the digit4

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{ case 0: IOPIN1 |= ZERO;break; case 1: IOPIN1 |= ONE; break; case 2: IOPIN1 |= TWO; break; case 3: IOPIN1 |= THREE; break; case 4: IOPIN1 |= FOUR; break; case 5: IOPIN1 |= FIVE; break; case 6: IOPIN1 |= SIX; break; case 7: IOPIN1 |= SEVEN; break; case 8: IOPIN1 |= EIGHT; break; case 9: IOPIN1 |= NINE; break; } } void Alpha_Dispay(int digit_num, unsigned int value) { clearDigit_7seg(digit_num); switch(value) { case 1: IOPIN1 |= ZERO;break; case 2: IOPIN1 |= ONE; break; case 3: IOPIN1 |= TWO; break; case 4: IOPIN1 |= THREE; break; case 5: IOPIN1 |= FOUR; break; case 6: IOPIN1 |= FIVE; break; case 7: IOPIN1 |= SIX; break; case 8: IOPIN1 |= SEVEN; break; case 9: IOPIN1 |= EIGHT; break;
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case 10: IOPIN1 |= NINE; break; case 11: IOPIN1 |= AAA; break; case 12: IOPIN1 |= bbb; break; case 13: IOPIN1 |= ccc; break; case 14: IOPIN1 |= ddd; break; case 15: IOPIN1 |= eee; break; case 16: IOPIN1 |= fff; break; } } void split_numbers(unsigned int number) { thousands = (number /1000); number %= 1000; hundreds = (number / 100); number %= 100; tens = (number / 10); number %= 10; ones = number ; } void Display_Number(unsigned int num) { unsigned int i; if(num <= 9999) { clearall_7seg(); split_numbers((unsigned int)num); Digit_Dispay(4, ones);
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for(i=0;i<10000;i++); Digit_Dispay(3, tens); for(i=0;i<10000;i++); Digit_Dispay(2, hundreds); for(i=0;i<10000;i++); Digit_Dispay(1, thousands); for(i=0;i<10000;i++); } } MAIN PROGRAM: #include <LPC214x.h> #include "elevator.h"

/* --> The variable 'floor_req' is used to store the request from user. --> The variable 'present_floor' is used to keep track of the floor where the lift is present. --> The variable 'buz' is used as flag to trigger the relay. */ char floor_req, present_floor, buz; void wait(unsigned int delay) { unsigned int i; for(i=0;i<delay;i++); } int main() {
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// This function can be used to add delays

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unsigned int key,j; init_Matrix_7seg(); // Initialize matrix keyboard and 7segment dispaly clearall_7seg(); present_floor = 0; floor_req = 0; while(1) { if(key != 0) // Accept only valid keys in key board { switch(key) { case 5: case 8: floor_req = 1; break; case 1: case 4: floor_req = 0; break; case 9: case 12: floor_req = 2; break; case 13: case 16: floor_req = 3; break;
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// clear 7 segment display

// default floor request is initialized to 0'th floor

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default: break; } } if(floor_req == present_floor) { // No Operation Digit_Dispay(1,present_floor); } else if(floor_req > present_floor) { while(present_floor < floor_req) { present_floor++; // increment floor number by one //Display present floor

stepper_clockwise(2); // run the motor clockwise for elevator to climb up Digit_Dispay(1,present_floor); } IOCLR0 = 0x00010000; for(j=0;j<80;j++) wait(65000); IOSET0 = 0x00010000; // turn off buzzer which indicates lift has stopped } else { while(present_floor > floor_req) { present_floor--; climb down
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// Display the present floor

// turn on buzzer which indicates lift has stopped

// decrement the floor number by one // run the motor anticlockwise for elevator to

stepper_anticlockwise(2);

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Digit_Dispay(1,present_floor); } IOCLR0 = 0x00010000; for(j=0;j<100;j++) wait(65000); IOSET0 = 0x00010000; // turn off buzzer which indicates lift has stopped } key = catch_key(); }} // scan for a valid key press // turn on buzzer which indicates lift has stopped

STEPPER DRIVER PROGRAM: #include <LPC214x.h> void s_wait (void) { unsigned int d; for (d = 0; d < 65000; d++); } void stepper_clockwise(unsigned int NOR) // NOR = Number of Rotation { unsigned int i,loop_val; loop_val =(((float)(NOR*360)/1.8)/4); for(i=0;i<loop_val;i++) { IOCLR1 |= 0X00030000; IOSET1 |= 0X00050000; s_wait(); IOCLR1 |= 0X00030000;
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/* s_wait function */

/* only to delay for LED flashes */

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IOSET1 |= 0X00070000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00060000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00040000; s_wait(); }} void stepper_anticlockwise(unsigned int NOR) // NOR = Number of Rotation { unsigned int i,loop_val; loop_val =(((float)(NOR*360)/1.8)/4); for(i=0;i<loop_val;i++) { IOCLR1 |= 0X00030000; IOSET1 |= 0X00040000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00060000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00070000; s_wait(); IOCLR1 |= 0X00030000; IOSET1 |= 0X00050000; s_wait();
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} }

ELEVATOR PROGRAM: /* Function prototypes */ void init_Matrix_7seg(void); unsigned long scan_row(unsigned int); unsigned int catch_key(void); void clearall_7seg(void); void clearDigit_7seg(int); void Digit_Dispay(int, unsigned int); void split_numbers(unsigned int); void Display_Number(unsigned int); void Alpha_Dispay(int, unsigned int); void init_stepper(void); void stepper_clockwise(unsigned int); void stepper_anticlockwise(unsigned int); void s_wait (void);

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RESULT: Thus the Elevator Controller was designed and implemented using ARM processor and verified.

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EX.NO : 11 DATE:

SYSTEM DESIGN USING CPLD - ALU

AIM : To design and implement ALU ( 4-bit). APPARATUS REQUIRED: 1. Personal Computer. 2. Xilinx ISE 9.2i. 3. CPLD Kit. THEORY:

A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The building block of a CPLD is the macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. The characteristic of non-volatility makes the CPLD the device of choice in modern digital designs to perform 'boot loader' functions before handing over control to other devices not having this capability. Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up. For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. CPLDs typically have the equivalent of thousands to tens of thousands of logic gates, allowing implementation of moderately complicated data processing devices.

PROCEDURE: 1. 2. 3. 4. 5. 6. Open the project navigator. Click new project and select new source and save it. Type the program and synthesis. Assign package pins and generate PROM and configure files. ON the CPLD kit during the program reload period. And set package pin numbers and check the outputs.
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PROGRAM: module alu(control_in, result_out); input [3:0] control_in; output reg [7:0] result_out;

// These values can be changed from 0 to 4'hff // before compiling the program parameter value1 = 4'd2; parameter value2 = 4'd8;

// Control inputs and its operation reference parameter NOP = 4'b0000; parameter ADD = 4'b0001; parameter SUB = 4'b0010; parameter MUL = 4'b0011; parameter DIV = 4'b0100; parameter CMP = 4'b0101;

always @(control_in) begin case(control_in) NOP: result_out = 8'd0; ADD: result_out = value1 + value2; SUB: result_out = value1 - value2; MUL: result_out = value1 * value2; DIV: result_out = value1 / value2; CMP: if(value1 > value2)
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result_out = 8'd1; else result_out = 8'b10; default: result_out = 8'd0; endcase end endmodule

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RESULT : Thus the 4-bit ALU was designed and implemented using CPLD.
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EX.NO : 12 DATE:

SYSTEM DESIGN USING CPLD ENCODER & DECODER

AIM : To design and implement encoder & decoder ( 4-bit). APPARATUS REQUIRED: 1. Personal Computer. 2. Xilinx ISE 9.2i. 3. CPLD Kit. THEORY:

A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The building block of a CPLD is the macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. The characteristic of non-volatility makes the CPLD the device of choice in modern digital designs to perform 'boot loader' functions before handing over control to other devices not having this capability. Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up. For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. CPLDs typically have the equivalent of thousands to tens of thousands of logic gates, allowing implementation of moderately complicated data processing devices.

PROCEDURE: 1. 2. 3. 4. 5. 6. Open the project navigator. Click new project and select new source and save it. Type the program and synthesis. Assign package pins and generate PROM and configure files. ON the CPLD kit during the program reload period. And set package pin numbers and check the outputs.
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PROGRAM: ENCODER: module kml9(i, out); input [2:0] i; output [7:0] out; reg [7:0] out; always @(i) begin case(i) 0:out=8'b00000001; 1:out=8'b00000010; 2:out=8'b00000100; 3:out=8'b00001000; 4:out=8'b00010000; 5:out=8'b00100000; 6:out=8'b01000000; 7:out=8'b10000000; default:out=8'bXXXXX; endcase end endmodule

DECODER: module kml9a(w, y); input [7:0] w; output [2:0] y; reg [2:0]y; always @w case(w) 8'b00000001:y=0;
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8'b00000010:y=1; 8'b00000100:y=2; 8'b00001000:y=3; 8'b00010000:y=4; 8'b00100000:y=5; 8'b01000000:y=6; 8'b10000000:y=7; endcase endmodule

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RESULT : Thus the 4-bit encoder and decoder was designed and implemented using CPLD.
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EX.NO : 13 DATE:

SYSTEM DESIGN USING CPLD VENDING MACHINE

AIM : To design and implement vending machine. APPARATUS REQUIRED: 1. Personal Computer. 2. Xilinx ISE 9.2i. 3. CPLD Kit. THEORY:

A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The building block of a CPLD is the macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. The characteristic of non-volatility makes the CPLD the device of choice in modern digital designs to perform 'boot loader' functions before handing over control to other devices not having this capability. Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up. For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. CPLDs typically have the equivalent of thousands to tens of thousands of logic gates, allowing implementation of moderately complicated data processing devices.

PROCEDURE: 1. 2. 3. 4. 5. 6. Open the project navigator. Click new project and select new source and save it. Type the program and synthesis. Assign package pins and generate PROM and configure files. ON the CPLD kit during the program reload period. And set package pin numbers and check the outputs.
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PROGRAM: module vending(sysclk, rst, switch, led); input sysclk; input rst;

input [1:0]switch; // switch[0] refers 1 rupee coin, switch[1] refers 2 rupee coin output [7:0]led;

/* The macro defenitions for each state. Binary encoding is used for state encoding. */ parameter WS = 4'b0000, // welcome state R1_W = 4'b0001, // Rupee 1 wait state. It indicates switch 1 is HIGH R1 = 4'b0010, // Rupee 1 state. It indicates successfully 1 drop is recognized by the machine R2_W = 4'b0011, // Rupee 2 wait state. It indicates user dropped total of 2 rupee R2 = 4'b0100, // Rupee 2 state. Indicates total of 2 rupee is recognized by the machine R3_W = 4'b0101, // Rupee 3 wait state. It indicates user dropped total of 3 rupee R3 = 4'b0110, // Rupee 3 state. Indicates total of 3 rupee is recognized by the machine R4_W = 4'b0111, // Rupee 4 wait state. It indicates user dropped total of 4 rupee R4 = 4'b1000, // Rupee 4 state. Indicates total of 4 rupee is recognized by the machine D_W = 4'b1001, // Rupee 5 wait state. It indicates user dropped total of 5 rupee

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D = 4'b1010, // Rupee 5 state. Indicates total of 5 rupee is recognized by the machine and item is dispensed. ERROR= 4'b1011; // Error state. Indicates that the user has wrongly asserted switch 1 and switch 2, or rst // is asserted /* Macro defenitions to indicate switch position */ parameter SW1_HIGH = 2'b01, = 2'b10,

SW2_HIGH

SW1_SW2_LOW = 2'b00, SW1_SW2_HIGH = 2'b11; /* Macro definitions for system clock frequnecy and delay calculation. Frequency means number of cycles per second. Here sysclk frequency is 11059200. Hence 11059200 clk cycles corresponds to 1 second. This count is used to create delay of 1 second to control blink rate of LEDs */ parameter XTAL_CLK = 11059200; // 11.0592Mhz ==> 1 clk = 0.904ns

parameter CLK_DIV = XTAL_CLK / 16; // clock divider to achive nominal speed

/* Modeling Local registers and nets*/ reg [7:0] led; reg [3:0] PS, NS; // PS -> Present state, NS -> Next state reg [23:0] delay_count; // used to count the clk cycles reg one_sec = 1'b0;
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reg clk=1'b0;

/*** FSM Starts here ***/ /* Modeling of flipflops to store the present state */ always @(posedge clk or negedge rst) if(~rst) PS <= WS; else PS <= NS;

/* Modeling of combinational circuit to derive Next_state Next_state = function(sw[1], sw[0], PS) */ always @(switch or PS or one_sec) begin //default NS = PS;

//Derive Next state and output based on Present state and switch inputs case (PS) WS: begin // Derive next state if(switch == SW1_SW2_LOW)
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NS = WS; else if(switch == SW1_HIGH) NS = R1_W; else if(switch == SW2_HIGH) NS = R2_W; else NS = ERROR; // Derive output = ALL LEDS blink if(one_sec == 1'b1) led = 8'b00000000; // All LEDs OFF else led = 8'b11111111; // ALL LEDs ON end R1_W: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R1; else if(switch == SW1_HIGH) NS = R1_W; else NS = ERROR; // Derive output = LED1 Blink if(one_sec == 1'b1) led = 8'b0000_0001; //led1 ON else led = 8'b0000_0000; //led1 OFF end
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R1: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R1; else if(switch == SW1_HIGH) NS = R2_W; else if(switch == SW2_HIGH) NS = R3_W; else NS = ERROR; // Derive output = LED1 ON led = 8'b0000_0001; //led1 ON end R2_W: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R2; else if(switch == SW1_HIGH || switch == SW2_HIGH) NS = R2_W; else NS = ERROR; // Derive output = LED2 blink if(one_sec == 1'b1) led = 8'b0000_0010; //led2 ON else led = 8'b0000_0000; //led2 OFF end
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R2: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R2; else if(switch == SW1_HIGH) NS = R3_W; else if(switch == SW2_HIGH) NS = R4_W; else NS = ERROR; // Derive output = LED1, LED2 ON led = 8'b0000_0011; //led2 ON end R3_W: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R3; else if(switch == SW1_HIGH || switch == SW2_HIGH) NS = R3_W; else NS = ERROR; // Derive output = LED 3 blink if(one_sec == 1'b1) led = 8'b0000_0100; //led3 ON else led = 8'b0000_0000; //led3 OFF end
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R3: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R3; else if(switch == SW1_HIGH) NS = R4_W; else if(switch == SW2_HIGH) NS = D_W; else NS = ERROR; // Derive output = LED1 , LED2 and LED3 ON led = 8'b0000_0111; end R4_W: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R4; else if(switch == SW1_HIGH || switch == SW2_HIGH) NS = R4_W; else NS = ERROR; // Derive output = LED4 blink if(one_sec == 1'b1) led = 8'b0000_1000; //led4 ON else led = 8'b0000_0000; //led4 OFF end
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R4: begin // Derive next state if(switch == SW1_SW2_LOW) NS = R4; else if(switch == SW1_HIGH || switch == SW2_HIGH) NS = D_W; else NS = ERROR; // Derive output led = 8'b0000_1111; end D_W: begin // Derive next state if(switch == SW1_SW2_LOW) NS = D; else if(switch == SW1_HIGH || switch == SW2_HIGH) NS = D_W; else NS = ERROR; // Derive output = LED5 blink if(one_sec == 1'b1) led = 8'b0001_0000; //led5 ON else led = 8'b0000_0000; //led5 OFF end D: begin // Derive next state
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if(switch == SW1_SW2_LOW) NS = D; else NS = ERROR; // Derive output = ALL LEDs ON led = 8'b1111_1111; //All LEDs ON end ERROR: begin // Derive next state if(switch == SW1_SW2_LOW) NS = WS; else NS = ERROR; // Derive output = LED 8 ON led = 8'b1000_0000; //led8 ON end default: begin // Derive next state NS = 4'bxxxx; // Derive output led = 8'bxxxx_xxxx; end endcase end /* Counter to produce a clk_cycle = 2 seconds */
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always @(posedge sysclk or negedge rst) if (~rst) begin one_sec <= 1'b0; delay_count <= 0; end else begin delay_count <= delay_count + 1; if(delay_count == XTAL_CLK) one_sec <= ~one_sec; else one_sec <= one_sec; if(delay_count == CLK_DIV) clk <= ~clk; else clk <= clk; end

endmodule

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RESULT : Thus the vending machine was designed and implemented using CPLD.
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EX.NO : 14 DATE:

SYSTEM DESIGN USING PLL - FSK

AIM: To construct a frequency shift keying circuit using PLL. REQUIREMENTS: 1. 2. 3. 4. 5. DESIGN: Vc = Vcc (1 e t/Rc) T = 0.69 (RA+2RB)C f = 1/T = 1.45/( RA+2RB)C When i/p is low f = 1.45 / (R4 || Rc)+ 2RB THEORY: The digital data communication and computer peripheral, binary data is transmitted by means of a carrier frequency which is shifted between present frequencies. This type of data transmission is called Frequency Shift Keying (FSK). It is used in all radio telegraph system using automatic printing equipment. IC PLL 565. 710 Comparator. Resistor 10k,5k,600. Capacitor 0.02f, 0.1f, 0.01f, 0.2f,0.05f. Connecting wires.

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CIRCUIT DIAGRAM: FSK MODULATION:

FSK DEMODULATION:

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TABULAR COLUMN: Amplitude (V) Message signal Carrier signal Modulated signal Demodulated signal PROCEDURE: 1. Connections are given for the circuit diagram. 2. Now provide a suitable 5V power supply. 3. The FSK modulated signal is applied to second pin of IC565 the demodulated signal is generated. 4. Output digital data at 50Hz is measured from CRO and graph is plotted. Time (ms)

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RESULT: Thus the frequency shift keying circuit was designed and the output was verified.
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EX.NO : 15 DATE:

SYSTEM DESIGN USING PLL FREQUENCY MODULATION & DEMODULATION

AIM: To construct a frequency modulated signal and obtain its output using PLL and to demodulate the modulated output signal. REQUIREMENTS: 1. 2. 3. 4. 5. THEORY: Frequency modulation is defined as the process in which the frequency of the carrier wave is altered in accordance with the instantaneous amplitude of the message signal the current can be controlled by changing the voltage Vc is applied at the modulating signal input the instantaneous of the angular frequency is given by Wi = wc + kf + k PROCEDURE: 1. Connections are made as per the circuit diagram. 2. Check the connection before switch ON the power supply. 3. Apply the carrier and message signal for modulation and note the amplitude and time period for modulated output. 4. Apply the modulated output signal to the demodulator and note down the amplitude and time period. VCO, IC 565. Resistor 15k, 10k, 1.8k. Capacitor 0.01f. CRO, Breadboard. Connecting wires.

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CIRCUIT DIAGRAM: FM MODULATION:

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TABULAR COLUMN:

Amplitude (V) Message signal Carrier signal Modulated signal Demodulated signal

Time (ms)

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FM DEMODULATION:

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RESULT: Thus the frequency modulation and demodulation was designed and the output have been verified.

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