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Mixed Signal Design

by Mike Harwood Distinguished Member of Technical Staff Texas Instruments Limited Northampton, UK

What is mixed signal design? Why do we need mixed signal design? Components available for mixed signal design Conflicts in technology choice Simulation challenges Ideal design flow/issues Typical design turbulence/issues Layout aspects - things to do and avoid Debug techniques Conclusions

What is Mixed Signal Design?

Altavista: Mixed signal design 3648 hits What is mixed signal design? 0 hits Mixed signal designs have both analogue and digital subsections combined. Overall operation of the system relies on both functionality of each section, and interoperation between the analogue/digital subsections.

Example of a Mixed Signal Design


Custom Logic Laser Driver

analogue Input





Divide ratio

Why do we need Mixed Signal Designs?

Lower cost (fewer devices, footprint, pcb area) Allows complexity not feasible with isolated analogue/digital sub-systems Allows approaches not possible with separated solutions.

Components Available
PMOS/ NMOS Digital CMOS CMOS+ BiPolar BiCMOS Yes Yes No Yes BiPolars Vertical Vertical Yes Yes Resistors NWELL/Poly? NWELL/Poly Poly Poly CAPS MOS/Metal MOS/Metal/Poly? Metal N+/Metal/Poly? Poly/Metal/MOS

Conflicts in Technology Choice

Digital Requirements
Digital CMOS 1. 2. 3. 4. High speed High levels of Integration Low Cost Low Power Good V Good V Good V Good

Process Type
CMOS+ Good V Good Good V Good BiPolar V Good V Poor Poor V Poor BiCMOS Good Fair Fair Fair

Analogue Requirements
1. 2. 3. 4. 5. High speed and low I/p cap High accuracy/low offsets Low Cost Analogue component availability Low power Fair Fair/Poor Fair Fair Poor Fair Fair/Poor Fair Good Poor V Good V Good V Good Good V Good Good Good Good V Good Good

Conflicts in Technology Choice

There is no universal solution. Choice depends on how much analogue/digital and any showstopping requirements. At TI the trend is towards the cmos+ choice and user of clever techniques to solve analogue accuracy/offset problems. The cmos+ solution is the most cost effective solution if large numbers of gates need to be integrated.

Simulation Challenges
Main Simulation Areas
analogue sections: Digital sections:Top level simulations:Architectural analysis:MATLAB/SIMULINK high accuracy needed for relatively small circuits. E.g. SPICE or SPECTRE high speed (many clock cycles) need simulating for large circuits. E.g. MODELSIM, NC_VERILOG, VSS Needs to support both of the above criteria. Mixed mode simulators have been available for 10+ years. TimeMill/PowrMill are often used. Software exists to characterise and simulate parasitic interactions. Layout resistances, inductances, capacitances can be added to to simulations to improve accuracy (+ reduce speed). Software can accurately predict localised problem areas.

Other Simulation areas

Parasitic extraction:-

Substrate analysis/crosstalk:-

Electromigration/IR drop:-


New software is available on a weekly basis.

Ideal Design Flow

Analogue Schematic Capture Analogue Simulation

Verilog/VHDL Design

Digital Sims


Top Level

Top Level Sim (mixed) STA etc

Layout (Custom and P&R)

Gate level Sims Custom Digital Design Digital Sims




Issues with Ideal Design Flow

Computing power/time for top level simulation is normally prohibitive.

TI is currently having success with this flow for small mixed signal designs.

Typical Design Turbulence

Analogue complete Selective back annotation

Analogue schematics

Analogue Sim

Analogue Layout

Selective BA sim

Characterisation analogue models

Verilog/ VHDL

Digital Sim (RTL)


Top level representation

Top level Sim/STA B.A

Digital Layout

Custom Dig

Gate Level sim

Combine analogue/ digital

Checks + GO

Issues with the Design Turbulence

Accuracy of characterised analogue blocks (analogue models). Non-linear, non-simple effects cause problems unless thoroughly characterised. Noise injection (substrate + supplies) not easily modelled. Asynchronous real world events not readily modelled. Electromigration/ESD issues often need considering outside the normal design flow.

Normally the design flow needs refinement depending on the amount and relative proportions of analogue/digital circuitry.

Layout Aspects
It is very difficult to simulate non-intentional interactions between analogue and digital sections, Guardringing (if appropriate) can give a degree of noise isolation between analogue and digital sections. However, this is not the whole story .

Example Layouts
Tball layout plot

Things to do
Keep analogue/digital supplies separate. Keep analogue circuitry differential where possible. Design analogue circuits to rely on device matching rather than absolute parameters. Analyse guardrings wrt process and use if applicable. Simulate in as much detail as possible.

Things to avoid
Large current switching i/o s close to analogue circuitry. Routing high speed digital lines close to analogue reference signals. Differential ground noise. Matching small or well separated devices. Forgetting Ohm s law!!!

Things we should have avoided

Things we should have avoided

Things we should have avoided

Things we should have avoided

Things we should have avoided

Things we should have avoided

Things we should have avoided

Debug techniques mainly analogue

Board level measurement at device pins. - Nature of digital problems can usually be identified this way. - Digital constraints can be tightened normally allowing correlation. - analogue problems can be identified at device pins. Focussed Ion beams can be used to cut and modify metal connections to investigate circuit configurations, e.g. FEI, Schlumberger. Backside diagnostic probing can be used to investigate flip-chip designs. Electron beam measurements e.g IDS5000 can be used to measure signals without loading them. Signal resolution is restrictive for analogue work.

Mixed signal design is good fun. Mixed signal design breaks all the software known to mankind. There is often not a right answer only a slightly less wrong answer. If it can t go wrong it will go wrong. The lab is for keeping us out of the pubs on winter evenings.