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Internal Use Only

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LED LCD TV SERVICE MANUAL


CHASSIS : LB23J

MODEL : 84LM9600
CAUTION

84LM9600-TA

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67365306 (1209-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2 SAFETY PRECAUTIONS ......................................................................... 3 SERVICING PRECAUTIONS. .................................................................... 4 SPECIFICATION........................................................................................ 5 ADJUSTMENT INSTRUCTION............................................................... 13 EXPLODED VIEW .................................................................................. 20 SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Before returning the receiver to the customer,


always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 M and 5.2 M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1.  Always unplug the receiver AC power cord from the AC power source before; a.  Removing or reinstalling any component, circuit board module or any other receiver assembly. b.  Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c.  Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2.  Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3.  Do not spray chemicals on or near this receiver or any of its assemblies. 4.  Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5.  Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6.  Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7.  Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8.  Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1.  Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test. 2.  After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3.  Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4.  Use only an anti-static type solder removal device. Some solder removal devices not classified as anti-static can generate electrical charges sufficient to damage ES devices. 5.  Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6.  Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7.  Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8.  Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1.  Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 F to 600 F. 2.  Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4.  Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5.  Use the following unsoldering technique a.  Allow the soldering iron tip to reach normal temperature. (500 F to 600 F) b. Heat the component lead until the solder melts. c.  Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6.  Use the following soldering technique. a.  Allow the soldering iron tip to reach a normal temperature (500 F to 600 F) b.  First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c.  Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d.  Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.

Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1.  Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2.  Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1.  Carefully insert the replacement IC in the circuit board. 2.  Carefully bend each IC lead against the circuit foil pad and solder it. 3.  Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1.  Remove the defective transistor by clipping its leads as close as possible to the component body. 2.  Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3.  Bend into a "U" shape the replacement transistor leads. 4.  Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3.  Carefully remove the transistor from the heat sink of the circuit board. 4.  Insert new transistor in the circuit board. 5.  Solder each transistor lead, and clip off excess lead. 6.  Replace heat sink. Diode Removal/Replacement 1.  Remove defective diode by clipping its leads as close as possible to diode body. 2.  Bend the two remaining leads perpendicular y to the circuit board. 3.  Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4.  Securely crimp each connection and solder it. 5.  Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1.  Clip each fuse or resistor lead at top of the circuit board hollow stake. 2.  Securely crimp the leads of replacement component around notch at stake top.

3.  Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1.  Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2.  carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3.  Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4.  Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1.  Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2.  Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3.  Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.

Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

NOTE : Specifications and others are subject to change without notice for improvement.

SPECIFICATION

1. Application range

This specification is applied to the LCD TV used LB23J chassis.

3. Test method

2. Requirement for Test

1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : CE, IEC specification - EMC : CE, IEC

Each part is tested as below without special appointment. 1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C 2) Relative Humidity: 65 % 10 % 3) Power Voltage : Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models. 4)  Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5)  The receiver must be operated for about 5 minutes prior to the adjustment.

4. Model General Specification


No. 1 Market Item Specification Asia, Oceania, Africa, Middle East(PAL/DVB Market) Digital : DVB-T Analog : PAL-BG, DK, I/I, SECAM-DK/BG/I Remarks DTV & Analog * DTV Region: Australia/ NewZealand(AU), Singapore(SG), Indonesia(ID), Malaysia(MY), Vietnam(VN), South Africa(ZA), Iran(IR), Israel(IL) Australia/India : only PAL DVB-T - Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32 - Modulation : Code Rate QPSK : 1/2, 2/3, 3/4, 5/6, 7/8 16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 4 System : PAL, SECAM, NTSC, PAL60 Rear 1EA, AV gender jack 1EA Rear gender (1EA) Analog(D-SUB 15PIN) Rear gender(1EA) Side L/R Input ; Rear (Phone) Component and av use same jack ; Rear (Gender) Rear (1EA) Side JPEG, MP3, DivX HD

Broadcasting system

Receiving system

Digital : COFDM, QAM Analog : Upper Heterodyne

5 6 7 8 9 10 11

Video Input RCA(2EA) Component Input (2EA) RGB Input (1EA) HDMI Input (4EA) Audio Input (3EA) SPDIF out(1EA) USB Input(3EA)

PAL, SECAM, NTSC Y/Cb/Cr, Y/Pb/Pr RGB-PC PC(HDMI version 1.3) / DTV format, Support HDCP HDMI1-ARC, HDMI2, HDMI3, HDMI4-MHL RGB/DVI Audio Component, AV Optical Audio out EMF, DivX HD, For SVC (download)

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LGE Internal Use Only

5. Component Video Input (Y, Cb/Pb, Cr/Pr)


No. 1. 2 3. 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Resolution 720*480i 720*480i 720*576i 720*480p 720*480p 720*576p 1280*720 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 15.73 15.73 15.625 31.47 31.50 31.25 44.96 45.00 37.50 28.125 33.72 33.75 26.97 27.00 33.71 33.75 56.25 67.432 67.5 V-freq(Hz) 59.94 60.00 50.00 59.94 60.00 50.00 59.94 60.00 50.00 50.00 59.94 60.00 23.976 24.000 29.97 30.00 50 59.94 60.00 Pixel clock(MHz) 13.500 13.514 13.500 27.000 27.027 27.000 74.176 74.250 74.25 74.250 74.176 74.25 63.296 63.36 79.120 79.20 148.5 148.350 148.5 Proposed SDTV, DVD 480I(525I) SDTV, DVD 480I(525I) SDTV, DVD 576I(625I) 50Hz SDTV 480P SDTV 480P SDTV 576P 50Hz HDTV 720P HDTV 720P HDTV 720P 50Hz HDTV 1080I 50Hz HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P

6. RGB (PC)
No. 1. 2 3. 4 5 6 7 8 Resolution 640*350 720*400 640*480 800*600 1024*768 1152*864 1360*768 1920*1080 H-freq(kHz) 31.468 31.469 31.469 37.879 48.363 54.348 47.712 66.5 V-freq.(Hz) 70.09 70.09 59.94 60.317 60.004 60.053 60.015 60.00 Pixel clock(MHz) 25.17 28.32 25.17 40 65 80 84.5 148.5 EGA DOS VESA(VGA) VESA(SVGA) VESA(XGA) VESA VESA(WXGA) WUXGA(CEA 861D) Proposed Remarks

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LGE Internal Use Only

7. HDMI Input
7.1. DTV Mode
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 720*480 720*480 720*576 720*480 720*480 720*576 1280*720 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 3840*2160 3840*2160 3840*2160 3840*2160 3840*2160 Resolution H-freq(kHz) 15.73 15.75 15.625 31.47 31.5 31.25 44.96 45 37.5 28.125 33.72 33.75 26.97 27.00 33.71 33.75 56.25 67.432 53.95 54 56.25 61.43 67.5 V-freq.(kHz) 59.94 60.00 50.00 59.94 60.00 50.00 59.94 60.00 50.00 50.00 59.94 60.00 23.976 24.000 29.97 30.00 50.00 59.94 23.976 24.00 25.00 29.970 30.00 Pixel clock(MHz) 13.500 13.514 13.500 27 27.027 27 74.176 74.25 74.25 74.25 74.176 74.25 63.296 63.36 79.120 79.20 148.5 148.350 297.00 297.00 297.00 297.00 297.00 Proposed SDTV, DVD 480I(525I) SDTV, DVD 480I(525I) SDTV, DVD 576I(625I) 50Hz SDTV 480P SDTV 480P SDTV 576P HDTV 720P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P UDTV 2160P UDTV 2160P UDTV 2160P UDTV 2160P UDTV 2160P Only UD Model Only UD Model Only UD Model Only UD Model Only UD Model Remarks Spec. out but display.

7.2. PC Mode
No. 1 2 3 4 5 6 7 8 9 10 11 Resolution 720*400 640*480 800*600 1024*768 1360*768 1152*864 1280*1024 1920*1080 3840*2160 3840*2160 3840*2160 H-freq(kHz) 31.469 31.469 37.879 48.363 47.712 54.348 63.981 67.5 54 56.25 67.5 V-freq.(Hz) 70.09 59.94 60.317 60.004 60.015 60.053 60.02 60 24.00 25.00 30.00 Pixel clock(MHz) 28.32 25.17 40 65 84.75 80 109.00 158.40 297.00 297.00 297.00 DOS VESA(VGA) VESA(SVGA) VESA(XGA) VESA(WXGA) VESA SXGA WUXGA(Reduced Blanking) UDTV 2160P UDTV 2160P UDTV 2160P Only UD Model Only UD Model Only UD Model Support to HDMI-PC Proposed Remarks

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LGE Internal Use Only

8. RF Input_3D Mode
No. 1 2 Resolution 1280*720 1920*1080 H-freq(kHz) 37.500 28.125 V-freq.(Hz) 50 50 Pixel clock(MHz) 74.25 74.25 Proposed HDTV 720P HDTV 1080I Remarks Side by Side, Top & Bottom Side by Side, Top & Bottom

9. HDMI Input
No. 1 Resolution 1280*720

9.1. HDMI 1.3 (3D Supported mode manually)


H-freq(kHz) 45.00 V-freq.(kHz) 60.00 Pixel clock(MHz) 74.25 Proposed HDTV 720P 3D input proposed mode 2D to 3D Side by Side(half), Top & Bottom, Single Frame Sequential 2D to 3D Side by Side(half), Top & Bottom, Single Frame Sequential 2D to 3D Side by Side(half), Top & Bottom 2D to 3D Side by Side(half), Top & Bottom 2D to 3D Side by Side(half), Top & Bottom, Checkerboard 2D to 3D Side by Side(half), Top & Bottom, Checkerboard 2D to 3D Side by Side(half), Top & Bottom, Checkerboard 2D to 3D Side by Side(half), Top & Bottom, Checkerboard, Single Frame Sequential, Row Interleaving, Column Interleaving 2D to 3D Side by Side(half), Top & Bottom, Checkerboard, Single Frame Sequential, Row Interleaving, Column Interleaving

1280*720

37.500

50

74.25

HDTV 720P

1920*1080

33.75

60.00

74.25

HDTV 1080I

1920*1080

28.125

50.00

74.25

HDTV 1080I

1920*1080

27.00

24.00

74.25

HDTV 1080P

1920*1080

28.12

25.00

74.25

HDTV 1080P

1920*1080

33.75

30.00

74.25

HDTV 1080P

1920*1080

67.50

60.00

148.5

HDTV 1080P

1920*1080

56.250

50.00

148.5

HDTV 1080P

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LGE Internal Use Only

9.2. HDMI 1.4b (3D Supported mode automatically)


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Frame packing, Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing, Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing, Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Field alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Top-and-Bottom Side-by-side(half) Frame packing Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Field alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Field alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Line alternative Top-and-Bottom Side-by-side(half) Frame packing Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Frame packing Line alternative Side-by-side(Full) Top-and-Bottom Side-by-side(half) Top-and-Bottom Side-by-side(half) Proposed Secondary(SDTV 480P) (SDTV 480P) (SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P) (SDTV 480P) (SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P) (SDTV 480P) (SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 576I) (SDTV 576I (SDTV 576I Secondary(SDTV 576I) Secondary(SDTV 576I) Primary(HDTV 720P) Primary(HDTV 720P) Primary(HDTV 720P) (HDTV 720P) (HDTV 720P) Primary(HDTV 720P) Primary(HDTV 720P) Primary(HDTV 720P) (HDTV 720P) (HDTV 720P) Secondary(HDTV 1080I) Primary(HDTV 1080I) Primary(HDTV 1080I) (HDTV 1080I) (HDTV 1080I) Secondary(HDTV 1080I) Primary(HDTV 1080I) Primary(HDTV 1080I) (HDTV 1080I) (HDTV 1080I) Primary(HDTV 1080P) Primary(HDTV 1080P) Primary(HDTV 1080P) (HDTV 1080P) (HDTV 1080P) Secondary(HDTV 1080P) Secondary(HDTV 1080P) Secondary(HDTV 1080P) (HDTV 1080P) (HDTV 1080P) (HDTV 1080P) Secondary(HDTV 1080P) (HDTV 1080P) (HDTV 1080P) (HDTV 1080P) Primary(HDTV 1080P) Secondary(HDTV 1080P) Primary(HDTV 1080P) Secondary(HDTV 1080P)

640*480

31.469 / 31.5

59.94 / 60

25.125

720*480

31.469 / 31.5

59.94 / 60

27.00 / 27.03

2,3

720*576

31.25

50

27

17,18

720*576

15.625

50

27

21

5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

1280*720 1280*720 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080

37.500 75 44.96 / 45 90 33.72 / 33.75 67.50 28.125 56.25 26.97 / 27 26.97 / 27 28.12 28.12 33.716 / 33.75 33.716 / 33.75 56.250 67.43 / 67.5

50 50 59.94 / 60 59.94 / 60 59.94 / 60 59.94 / 60 50.00 50.00 23.97 / 24 23.97 / 24 25 25 29.976 / 30.00 29.976 / 30.00 50 59.94 / 60

74.25 148.5 74.17/74.25 148.5 74.17/74.25 148.5 74.25 148.5 74.17/74.25 148.5 74.17/74.25 148.5 74.25 148.5 148.5 148.35/148.50

19 19 4 4 5 5 20 20 32 32 33 33 34 34 31 16

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LGE Internal Use Only

9.3. HDMI-PC Input (3D) (3D Supported mode manually)


No. 1 2 3 Resolution 1024*768 1360*768 1920*1080 H-freq(kHz) V-freq.(kHz) 48.36 47.71 67.500 60 60 60 Pixel clock(MHz) 65 85.5 148.50 3D input proposed mode 2D to 3D, Side by Side(half) Top & Bottom 2D to 3D, Side by Side(half) Top & Bottom 2D to 3D, Side by Side(half) Top & Bottom, Checker Board, Single Frame Sequential Proposed HDTV 768P HDTV 768P HDTV 1080P 640*350 720*400 640*480 800*600 1152*864

Others

2D to 3D

9.4. RGB-PC Input(3D) (3D Supported mode manually)


No. 1 2 3 Resolution 1024*768 1360*768 1920*1080 H-freq(kHz) V-freq.(kHz) 48.36 47.71 67.500 60 60 60 Pixel clock(MHz) 65 85.5 148.50 3D input proposed mode 2D to 3D, Side by Side(half) Top & Bottom 2D to 3D, Side by Side(half) Top & Bottom 2D to 3D, Side by Side(half) Top & Bottom Proposed HDTV 768P HDTV 768P HDTV 1080P 640*350 720*400 640*480 800*600 1152*864 1280*1024

Others

2D to 3D

9.5. Component Input (3D) (3D Supported mode manually)


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Resolution 1280*720 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) V-freq.(kHz) 37.5 45.00 44.96 33.75 33.72 28.12 67.500 67.432 27.000 28.12 56.25 26.97 33.75 33.71 50 60.00 59.94 60.00 59.94 50 60 59.94 24.000 25 50 23.976 30.000 29.97 Pixel clock(MHz) 74.25 74.25 74.176 74.25 74.176 74.25 148.50 148.352 74.25 74.25 74.25 74.176 74.25 74.176 3D input proposed mode 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom 2D to 3D, Side by Side(half), Top & Bottom Proposed HDTV 720P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P

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LGE Internal Use Only

9.6. USB Input (3D) (3D Supported mode manually)


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode 2D to 3D Side by Side(Half)*, Top & Bottom*, Checkerboard* Row Interleaving, Column Interleaving (Photo : side by Side(half), Top & Bottom) Proposed

1920*1080

33.75

30

74.25

HDTV 1080P

(* 3D supported mode manually & automatically)

9.7. DLNA Input (3D) (3D Supported mode manually)


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode 2D to 3D Side by Side(Half)*, Top & Bottom*, Checkerboard* Row Interleaving, Column Interleaving (Photo : side by Side(half), Top & Bottom) Proposed

1920*1080

33.75

30

74.25

HDTV 1080P

(* 3D supported mode manually & automatically)

Remark: 3D Input mode No. Side by Side Top & Bottom Checker board Single Frame Sequential Frame Packing Line Interleaving Column Interleaving

LLLLL R L

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LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range
3.1.3. Adjustment
This specification sheet is applied to all of the LED LCD TV with LB23J chassis. (1) Adjustment method - U sing RS-232, adjust items in the other shown in "3.1.3.3)" (2) Adj. protocol
Protocol Enter adj. mode Source change Begin adj. Return adj. result (main) ad 00 20 Read adj. data (sub ) ad 00 21 Confirm adj. End adj. ad 00 99 aa 00 90 Command aa 00 00 xb 00 04 xb 00 06 ad 00 10 OKx (Case of Success) NGx (Case of Fail) (main) 000000000000000000000000007c007b006dx (Sub) 000000070000000000000000007c00830077x NG 03 00x (Fail) NG 03 01x (Fail) NG 03 02x (Fail) OK 03 03x (Success) a 00 OK90x a 00 OK00x b 00 OK04x (Adjust 480i, 1080p Comp1 ) b 00 OK06x (Adjust 1920*1080 RGB) Set ACK

2. Designation

(1)  Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3)  The adjustment must be performed in the circumstance of 25 C 5 C of temperature and 65 % 10 % of relative humidity if there is no specific designation. (4)  The input voltage of the receiver must keep AC 100-240 V~, 50/60 Hz. (5)  The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15. In case of keeping module is in the circumstance of 0 C, it should be placed in the circumstance of above 15 C for 2 hours. In case of keeping module is in the circumstance of below -20 C, it should be placed in the circumstance of above 15 C for 3 hours. [Caution] When still image is displayed for a period of 20 minutes or longer (Especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.

Ref.) ADC Adj. RS232C Protocol_Ver1.0 (3) Adj. order - aa 00 00 [Enter ADC adj. mode] - xb 00 04 [Change input source to Component1 (480i& 1080p)] - ad 00 10 [Adjust 480i&1080p Comp1] - xb 00 06 [Change input source to RGB(1024*768)] - ad 00 10 [Adjust 1920*1080 RGB] - ad 00 90 End adj.

3. Automatic Adjustment
3.1. ADC Adjustment
3.1.1. Overview
ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate RGB deviation. (1) USB to RS-232C Jig (2)  M SPG-925 Series Pattern Generator(MSPG-925FA, pattern - 65) - Resolution : 480i Comp1 1080P Comp1 1920*1080 RGB - Pattern : Horizontal 100% Color Bar Pattern - Pattern level : 0.7 0.1 Vp-p - Image

3.2. MAC address D/L , Widevine key D/L

Connect: PCBA Jig RS-232C Port== PC RS-232C Port Communication Prot connection

3.1.2. Equipment & Condition

Com 1,2,3,4 and 115200(Baudrate) Mode check: Online Only  Check the test process: DETECT MAC Widevine Play: START Result: Ready, Test, OK or NG Printer Out (MAC Address Label)

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LGE Internal Use Only

3.3. LAN

3.3.1. Equipment & Condition

Each other connection to LAN Port of IP Hub and Jig

3.3.2. LAN inspection solution

LAN Port connection with PCB Network setting at MENU Mode of TV Setting automatic IP Setting state confirmation ->  If automatic setting is finished, you confirm IP and MAC Address.

3.5. Model name & Serial number Download


3.5.1. Model name & Serial number D/L
-

 ress "Power on" key of service remote control. P (Baud rate : 115200 bps) - Connect RS232 Signal to USB Cable to USB. - Write Serial number by use USB port. - Must check the serial number at Instart menu. (1) Serial number D/L is using of scan equipment. (2)  Setting of scan equipment operated by Manufacturing Technology Group. (3)  Serial number D/L must be conformed when it is produced in production line, because serial number D/L is mandatory by D-book 4.0 * Manual Download (Model Name and Serial Number) If the TV set is downloaded by OTA or service man, sometimes model name or serial number is initialized.(Not always) It is impossible to download by bar code scan, so It need Manual download. 1) Press the "Instart" key of Adjustment remote control. 2) Go to the menu "6.Model Number D/L" like below photo. 3)  Input the Factory model name(ex 55LM8600-TA) or Serial number like photo.

3.3.3. WIDEVINE key Inspection

3.5.2. Method & notice

- Confirm key input data at the "IN START" MENU Mode.

3.4. LAN PORT INSPECTION(PING TEST)


Connect SET -> LAN port == PC -> LAN Port

SET
3.4.1. Equipment setting

PC

(1) Play the LAN Port Test PROGRAM. (2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2 (1) Play the LAN Port Test Program. (2) Connect each other LAN Port Jack. (3) Play Test (F9) button and confirm OK Message. (4) Remove LAN cable. 4)  Check the model name Instart menu. -> Factory name displayed. (ex 55LM8600-TA) 5)  Check the Diagnostics.(DTV country only) -> Buyer model displayed. (ex 55LM8600-TA)

3.4.2. LAN PORT inspection (PING TEST)

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LGE Internal Use Only

3.6. WIFI MAC ADDRESS CHECK


(1) Using RS232 H-freq(kHz) Transmission [A][I][][Set ID][][20][Cr] V-freq.(Hz) [O][K][X] or [NG]

4.2.4. EDID DATA


0 0 10 20 30 40 50 60 70 80 90 A0 B0 C0 D0 E0 F0 00 01 0F 01 45 40 3F 00 02 22 B8 06 2D 71 00 00 1 FF 16 50 01 00 70 1F 4C 03 15 3C 10 40 1C 72 00 2 FF 01 54 01 A0 36 52 47 3A 01 20 16 58 16 51 00 3 FF 03 A1 01 5A 00 10 20 F1 26 C0 10 2C 20 D0 00

HDMI(UD 3D AC3 PCM)


4 FF 80 08 01 00 A0 00 54 4E 15 6E 28 45 58 1E 00 5 FF A0 00 01 00 5A 0A 56 90 07 01 01 00 2C 20 00 6 FF 5A 31 02 00 00 20 0A 1F 50 02 03 A0 25 6E 00 7 00 78 40 3A 1E 00 20 20 04 09 03 05 5A 00 28 00 8 1E 0A 45 80 66 00 20 20 13 57 01 03 00 A0 55 00 9 6D EE 40 18 21 1E 20 20 05 07 4F 01 00 5A 00 00 A 01 91 61 71 50 00 20 20 14 78 3F 02 00 00 A0 00 B 00 A3 40 38 B0 00 20 20 03 03 FC 3A 1E 00 5A 00 C 01 54 71 2D 51 00 00 20 02 0C 08 80 01 00 00 00 D 01 4C 40 40 00 FD 00 20 12 00 10 18 1D 9E 00 00 E 01 99 81 58 1B 00 00 01 20 XX 18 71 80 01 00 00 F 01 26 80 2C 30 39 FC 43 21 XX 10 38 18 1D 1E XX

(2) Check the menu on in-start.

RGB
0 0 00 01 0F 01 45 40 3E 00 1 FF 16 50 01 00 70 1E 4C 2 FF 01 54 01 A0 36 53 47 3 FF 03 A1 01 5A 00 10 20 4 FF 68 08 01 00 A0 00 54 5 FF A0 00 01 00 5A 0A 56 6 FF 5A 31 02 00 00 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 45 80 66 00 20 20 9 6D EE 40 18 21 1E 20 20 A 01 91 61 71 50 00 20 20 B 00 A3 40 38 B0 00 20 20 C 01 54 71 2D 51 00 00 20 D 01 4C 40 40 00 FD 00 20 E 01 99 81 58 1B 00 00 00 F 01 26 80 2C 30 3A FC 5C 10 20 30 40 50 60 70

4. Manual Adjustment

* ADC adjustment is not needed because of OTP(Auto ADC adjustment)

4.1. EDID(The Extended Display Identification  Data)/DDC(Display Data Channel) download


4.1.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of "Plug and Play". - Since embedded EDID data is used, EDID download JIG, HDMI cable and D-sub cable are not need. - Adjustment remote control (1)  Press "ADJ" key on the Adjustment remote control then select "12.EDID D/L", By pressing "Enter" key, enter EDID D/L menu. (2)  S elect "Start" button by pressing "Enter" key, HDMI1/ HDMI2/ HDMI3/ HDMI4/ RGB are writing and display OK or NG. For Analog D-sub to D-sub For HDMI EDID DVI-D to HDMI or HDMI to HDMI

Reference - HDMI1 ~ HDMI4 - In the data of EDID, bellows may be different by Input mode. * Physical Add & Checksum(HDMI1/2/3/4) INPUT HDMI1 HDMI2 HDMI3 HDMI4 9Eh/9Fh (Physical Addr) 10 20 30 40 00 00 00 00 FFh (Checksum) 96 86 76 66

4.1.2. Equipment

4.1.3. Download method

4.3. White Balance Adjustment


4.3.1. Overview
W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel's W/B deviation (2)  How-it-works : When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (3) Adjustment condition : normal temperature 1) Surrounding Temperature : 25 C 5 C 2) Warm-up time: About 5 Min 3) Surrounding Humidity : 20 % ~ 80 %

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LGE Internal Use Only

4.3.2. Equipment

(1) Color Analyzer: CA-210 (LED Module : CH 14) (2)  Adjustment Computer(During auto adj., RS-232C protocol is needed) (3) Adjustment Remote control (4) Video Signal Generator MSPG-925F 720p/216-Gray (Model: 217, Pattern: 78) Only when internal pattern is not available Color Analyzer Matrix should be calibrated using CS-100.

Adj. Map
Adj. item R Gain G Gain Cool B Gain R Cut G Cut B Cut R Gain j j j a b c 00 00 00 C0 C0 C0 G Gain Medium B Gain R Cut G Cut B Cut R Gain G Gain Warm B Gain R Cut G Cut j j j d e f 00 00 00 C0 C0 C0 Command (lower case ASCII) CMD1 j j j CMD2 g h i Data Range (Hex.) MIN 00 00 00 MAX C0 C0 C0 Default (Decimal)

4.3.3. Equipment connection MAP


Co lo r Analyzer
Probe

RS -232C

Co m p ut er
RS -232C RS -232C

Pat t ern Generat o r


Signal Source * If TV internal pattern is used, not needed

4.3.4. Adj. Command (Protocol)


<Command Format>
A 50 START 6E A LEN A 03 A CMD A 00 A VAL A CS STOP

4.3.5. Adj. method

- LEN: Number of Data Byte to be sent - CMD: Command - VAL: FOS Data value - CS: Checksum of sent data - A: Acknowledge Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX] RS-232C Command used during auto-adjustment.
RS-232C COMMAND [CMD ID DATA] wb wb wb wb wb wb 00 00 00 00 00 00 00 10 1f 20 2f ff Explantion Begin White Balance adjustment Gain adjustment(internal white pattern) Gain adjustment completed Offset adjustment(internal white pattern) Offset adjustment completed End White Balance adjustment (internal pattern disappears )

(1) Auto adj. method 1) Set TV in adj. mode using POWER ON key. 2)  Zero calibrate probe then place it on the center of the Display. 3) Connect Cable.(RS-232C to USB) 4) Select mode in adj. Program and begin adj. 5)  When adj. is complete (OK Sign), check adj. status pre mode. (Warm, Medium, Cool) 6) Remove probe and RS-232C cable to complete adj.  W/B Adj. must begin as start command wb 00 00 , and finish as end command wb 00 ff, and Adj. offset if need. (2) Manual adjustment. method 1) Set TV in Adj. mode using POWER ON. 2)  Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10 cm of the surface. 3)  Press ADJ key EZ adjust using adj. R/C 7. WhiteBalance then press the cursor to the right(key ). (When right key() is pressed 216 Gray internal pattern will be displayed) 4)  One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. 5)  Adjustment is performed in COOL, MEDIUM, WARM 3 modes of color temperature. ** G-fix adjustment for 84/60LM9600 Adjust modes (Cool), Fix the G gain to 172 (default data) and change the others (G/B Gain ). Adjust two modes(Medium / Warm), Fix the one of R/G/B gain to 192 (default data) and decrease the others.  If internal pattern is not available, use RF input. In EZ Adj. menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216 Gray pattern.

Ex)

wb 00 00 -> Begin white balance auto-adj. wb 00 10 -> Gain adj. ja 00 ff -> Adj. data jb 00 c0 ... ... wb 00 1f -> Gain adj. completed *(wb 00 20(Start), wb 00 2f(end)) -> Off-set adj. wb 00 ff -> End white balance auto-adj.

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LGE Internal Use Only

Adjustment condition and cautionary items 1) Lighting condition in surrounding area Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. 2) Probe location : Color Analyzer(CA-210) probe should be within 10 cm and perpendicular of the module surface (80 ~ 100) 3) Aging time - After Aging Start, Keep the Power ON status during 5 Minutes. - In case of LCD, Back-light on should be checked using no signal or Full-white pattern.

2) Normal line EDGE LED (84LM9600) ** Use the G-Fix adjustment for 84LM9600
GP3 1 2 3 4 5 6 7 8 9 Aging time (Min) 0-2 3-5 6-9 10-19 20-35 36-49 50-79 80-119 Over 120 Cool X y 269 273 280 287 279 285 277 284 276 283 274 280 272 277 271 275 270 274 269 273 Medium x y 285 293 296 307 295 305 293 304 292 303 290 300 288 297 287 295 286 294 285 293 Warm x y 313 329 320 337 319 335 317 334 316 333 314 330 312 327 311 325 310 324 309 323

4.3.6.  Reference(White balance adjusmtment coordinate and color temperature)


Luminance : 216 Gray Standard color coordinate and temperature using CS-1000 (over 26 inch) Coordinate x 0.269 0.285 0.313 y 0.273 0.293 0.329 Temp 13000 K 9300 K 6500 K uv 0.0000 0.0000 0.0000

Mode Cool Medium Warm

4.4. EYE-Q function check

Standard color coordinate and temperature using CA-210(CH 14) Mode Cool Medium Warm Coordinate x 0.269 0.002 0.285 0.002 0.313 0.002 y 0.273 0.002 0.293 0.002 0.329 0.002 Temp 13000 K 9300 K 6500 K uv 0.0000 0.0000 0.0000

(1) Turn on TV. (2) Press EYE key of Adjustment remote control. (3)  Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds. (4)  Confirm that R/G/B value is lower than 10 of the "Raw Data (Sensor data, Back light)". If after 6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor. (5)  Remove your hand from the Eye Q II sensor and wait for 6 seconds. (6)  Confirm that "ok" pop up. If change is not seen, replace Eye Q II sensor.

4.3.7. ALELF & EDGE & IOL LED White balance table

- EDGE LED module change color coordinate because of aging time. - Apply under the color coordinate table, for compensated aging time. - Use the G-Fix adjustment for 60/84LM9600 1) Aging chamber line EDGE LED (84LM9600) ** Use the G-Fix adjustment for 84LM9600
Aging time (Min) 0-5 6-10 11-20 21-30 31-40 41-50 51-80 81-119 Over 120 Cool X y 269 273 280 287 277 284 276 282 274 280 272 276 270 272 266 269 264 267 263 266 Medium x y 285 293 296 307 293 304 292 302 290 300 288 296 286 292 282 289 280 287 279 286 Warm x y 313 329 320 337 317 334 316 332 314 330 312 326 310 322 306 319 304 317 303 316

4.5. Local Dimming Function Check

GP3 1 2 3 4 5 6 7 8 9

Step 1) Turn on TV. Step 2)  At the Local Dimming mode, module Edge Backlight moving right to left Back light of IOP module moving. Step 3) Confirm the Local Dimming mode. Step 4) Press "exit" key.

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LGE Internal Use Only

4.6. Magic Motion Remote control test

- E quipment: RF Remote control for test, IR-KEY-Code Remote control for test - You must confirm the battery power of RF-Remote control before test(recommend that change the battery per every lot) - Sequence (test) 1)  If you select the "Start(Mute)" key on the Adjustment remote control, you can pairing with the TV SET. 2)  You can check the cursor on the TV Screen, when select the "OK" key on the Adjustment remote control. 3)  You must remove the pairing with the TV Set by select "OK" key + "Mute" key on the Adjustment remote control for 5 seconds.

4.9. Tool Option selection

- Method : Press "ADJ" key on the Adjustment remote control, then select Tool option.

4.10. Ship-out mode check(In-stop)

After final inspection, press "IN-STOP" key of the Adjustment remote control and check that the unit goes to Stand-by mode.

4.11. GND and Internal Pressure check


4.11.1. Method
(1) GND & Internal Pressure auto-check preparation - Check that Power Cord is fully inserted to the SET. (If loose, re-insert) (2) Perform GND & Internal Pressure auto-check - Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process. - Connect D-terminal to AV JACK TESTER - Auto CONTROLLER(GWS103-4) ON - Perform GND TEST - If NG, Buzzer will sound to inform the operator. - If OK, changeover to I/P check automatically. (Remove CORD, A/V form AV JACK BOX.) - Perform I/P test - If NG, Buzzer will sound to inform the operator. - If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process. TEST voltage - GND: 1.5 KV / min at 100 mA - SIGNAL: 3 KV / min at 100 mA TEST time: 1 second TEST POINT - GND TEST = POWER CORD GND & SIGNAL CABLE METAL GND - Internal Pressure TEST = POWER CORD GND & LIVE & NEUTRAL LEAKAGE CURRENT: At 0.5 mArms

4.7. 3D function test

(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4]) * HDMI mode NO. 872 , pattern No.83 1)  Please input 3D test pattern like below. (HDMI mode No. 872 , pattern No.83)

2)  When 3D OSD appear automatically, then select green key.

4.11.2. Checkpoint

3)  Don't wear a 3D Glasses, Check the picture like below.

5. Audio
No. 1

Item

Min

Typ 10 8.10

Max 12 10.8

Unit W Vrms EQ Off AVL Off Clear Voice Off EQ On AVL On Clear Voice On

Audio practical max Output, L/R (Distortion=10% max Output) Speaker (8 Impedance)

10

12

4.8. Option selection per country


4.8.1. Overview 4.8.2.Method
- Option selection is only done for models in NON-AU (1)  Press "ADJ" key on the Adjustment remote control, then select Country Group Menu. (2)  Depending on destination, select Country Group Code or Country Group then on the lower Country option. Selection is done using +, - or KEY

Measurement condition: (1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation (2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms (3) RGB PC: 1 KHz sine wave signal 0.7 Vrms

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LGE Internal Use Only

6. USB S/W download(Service only)

(1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn't work. But your downloaded version is High, USB data is automatically detecting. (3) Show the message "Copying files from memory".

(4) Updating is starting.

(5) Updating Completed, The TV will restart automatically. (6)  If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage) * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn't have a DTV/ATV test on production line. * After downloading, have to adjust TOOL OPTION again. 1) Push "IN-START" key in service remote control. 2) Select "Tool Option 1" and push "OK" key. 3) Punch in the number. (Each model has their number.)

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LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

710

700

570

400

420

910

810

541

540

121

320

531

532

LV1

820

200T

830

530

122

120

560

410

200D

510

AG1

310

580

300

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- 20 -

500

A2

A22

Stand Base Set + Stand + Body

200

201D

A9

A10

Dual Play

AG2

900
LGE Internal Use Only

System Configuration

NVRAM
Clock for LG1152
MAIN Clock(24Mhz) C100 8pF 50V

+3.3V_NORMAL

IC102 R1EX24256BSAS0A
A0 VCC

C111 0.1uF

for DiiVA(China)
Write Protection - Low : Normal Operation - High : Write Protection

HP_DET EPHY_INT

I2C_SDA2 I2C_SCL2 SEL_USB1 SEL_USB2 SMARTCARD_DATA SMARTCARD_RST SMARTCARD_PWR_SEL SMARTCARD_VCC SMARTCARD_DET SMARTCARD_CLK
M25 M24 M23 N23 T27 T28 U27 U26 U28 J22 K22 J23 L26 L27 L25 N26 N27 M26 L28 L24 L23 K28 K27 K26 K25 K24 K23 V22 U22 T22 R22 P22 N22 M22 L22 T26 R28 R27 R26 P28 P27 P26 N28 EB_CS3/GPIO64 EB_CS2/GPIO79 EB_CS1/GPIO78 EB_CS0/GPIO77 EB_ADDR17/GPIO84 EB_ADDR16/GPIO83 EB_ADDR15/GPIO82

X-TAL_1

GND_1

XIN_MAIN
A1 2 7 WP

R112

24MHz X101

1M

A2

A0h

SCL

I2C_SCL5 SEL_USB1 SEL_USB2 SEL_USB3


SDA

SEL_USB3 /RST_PHY

C101 8pF 50V

VSS

I2C_SDA5 OPT R142 22 R143 OPT 22 I2C_SCL3 I2C_SDA3

X-TAL_2

GND_2

EB_BE_N1

EB_BE_N0

EB_ADDR9

EB_ADDR8

EB_ADDR7

EB_ADDR6

EB_ADDR5

EB_ADDR4

EB_ADDR3

EB_ADDR2

EB_ADDR1

EB_ADDR0

EB_DATA9

EB_DATA8

EB_DATA7

EB_DATA6

EB_DATA5

EB_DATA4

EB_DATA3

EB_DATA2

EB_DATA1

EB_ADDR14

EB_ADDR13

EB_ADDR12

EB_ADDR11

EB_ADDR10

EB_DATA15

EB_DATA14

EB_DATA13

EB_DATA12

EB_DATA11

SC_DET DiiVA_POD_CTL

A22 B22 AB16 AB17 AE3 PORES_N V23 U25 V25 V24 U24 Y22 AA22 AB20 AB21 W22 AB9 AB8 AB15 AB14 TRST_N0 TMS0 TCK0 TDI0 TDO0 TRST_N1 TMS1 TCK1 TDI1 TDO1 PLLSET1 PLLSET0 BOOT_MODE1 BOOT_MODE0 XIN_MAIN XO_MAIN OPM1 OPM0

EB_DATA10

EB_DATA0

EB_OE_N

EB_WE_N

EB_WAIT

XO_MAIN

E28 EMMC_RST EMMC_CLK EMMC_CMD EMMC_DATA7 EMMC_DATA6 EMMC_DATA5 EMMC_DATA4 EMMC_DATA3 EMMC_DATA2 EMMC_DATA1 EMMC_DATA0 R23 NAND_CS1 NAND_CS0 NAND_ALE NAND_CLE NAND_REN NAND_WEN AC1 GPIO31 GPIO30 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 V7 W5 W4 V6 V5 V4 U6 U5 U4 T6 T5 T4 R6 R5 R4 P6 P5 P4 N6 N5 N4 N3 M6 AC23 AC24 AE24 AD23 AE23 AC22 AD22 AE22 P24 N25 P23 N24 P25 F27 F26 C26 E27 E26 D27 D28 C27 C28 D26

MOTOR_CLOSE_SW MOTOR_OPEN_SW MOTOR_CW MOTOR_CCW MO_SENS_TO_MAIN_UP MO_SENS_TO_MAIN_DOWN

Place to LVDS Wafer


EB_ADDR[0-14] FPGA_LVDS_INFO EB_DATA[0-7]

Y23 W25 W24 W23 Y5 W6 AA6 Y6 AB5 AA5 AB23 AB24 AA25 AB25 Y25 AA23 Y24 AA24 AB6 AB4 AC5 SCL0/GPIO60 SDA0/GPIO59 SCL1/GPIO58 SDA1/GPIO57 SCL2/GPIO56 SDA2/GPIO71 SCL3/GPIO70 SDA3/GPIO69 SC_DETECT/GPIO93 SCL4/GPIO68 SDA4/GPIO67 SC_CLK/GPIO90 RMII_REF_CLK CAM_INPACK_N CAM_IOIS16_N SCL5/GPIO66 SDA5/GPIO65 RMII_CRS_DV CAM_VCCEN_N CAM_IREQ_N CAM_WAIT_N SC_VCC_SEL/GPIO88 SC_VCCEN/GPIO89 SD_DATA3/GPIO72 SD_DATA2/GPIO87 SD_DATA1/GPIO86 SD_DATA0/GPIO85 SPI_DI0/GPIO39 SPI_DO0/GPIO38 SPI_SCLK0/GPIO37 SPI_CS0/GPIO36 SPI_DI1/GPIO35 SPI_DO1/GPIO34 SPI_SCLK1/GPIO33 SPI_CS1/GPIO32 UART0_RX/GPIO49 UART0_TX/GPIO50 UART1_RX UART1_TX UART2_RX UART2_TX EXT_INTR3/GPIO48 EXT_INTR2/GPIO63 EXT_INTR1/GPIO62 EXT_INTR0/GPIO61

OPTIC_FPGA_RESET OPTIC_SERDES_RESET OLED_TCON_RESET FPGA_LVDS_INFO IRB_SPI_MISO IRB_SPI_MOSI IRB_SPI_CK IRB_SPI_SS IR_B_RESET

R151 FRC_RESET

22 FRC3_RESET FRC3 R170 10K

DiiVA_POD_CTL

AC4 AD4 AE4 AE5 AD5 AE6 AD6 AC6 AC7

SC_DATA/GPIO92

SD_CD_N/GPIO75

SD_WP_N/GPIO74

USB_ANALOGTEST

SC_RST/GPIO91

SD_CLK/GPIO76

SD_CMD/GPIO73

EB_ADDR[3]

EB_ADDR[2]

EB_ADDR[1]

EB_ADDR[0]

EB_ADDR[9]

EB_ADDR[8]

EB_ADDR[7]

EB_ADDR[5]

EB_ADDR[13]

EB_ADDR[12]

EB_ADDR[14]

EB_ADDR[11]

EB_ADDR[10]

EB_ADDR[6]

EB_ADDR[4]

USB_CTL3

EB_BE_N1

EB_BE_N0

EB_DATA[7]

EB_DATA[6]

EB_DATA[5]

EB_DATA[4]

EB_DATA[3]

EB_DATA[2]

EB_DATA[1]

EB_DATA[0]

EB_OE_N

EB_WE_N

AD2

AB1

AB2

AB3

AC2

AC3

AE1

AD3

AD1

W26

V28

Y27

Y26

W28

W27

Y28

V27

V26

R25

U23

T25

T24

T23

R24

C22

C23

A23

B23

A24

B24

C24

A25

B27

A27

A26

B26

C25

B25

AA1

AA2

AA28

AB26

AA27

R109

PLL SET[1:0] ==> Internal 00 : CPU clock(1056Mhz), 01 : CPU clock(792Mhz), 10 : CPU clock(1152Mhz), 11 : CPU clock(984Mhz), OPT R102 R103 OPT 22

Pull-UP. Main0,1/2 Main0,1/2 Main0,1/2 Main0,1/2

N.C DDR DDR DDR DDR

is high (792/792 (672/792 (792/672 (792/792

3D_DEPTH_RESET Mhz) Mhz) Mhz) Mhz) I2C_SDA1 R113 4.7K

+3.3V_NORMAL

LG1152_RM IC100-*1

R160 PLLSET1 R162 PLLSET0 I2C_SCL1

22 I2C_BE_SDA1 M25 M24 M23 N23 T27 T28 U27 U26 U28 J22 K22 J23 L26 L27 L25 N26 N27 M26 L28 L24 L23 K28 K27 K26 K25 K24 K23 V22 U22 T22 R22 P22 N22 M22 L22 T26 R28 R27 R26 P28 P27 P26 I2C_BE_SCL1 LOCAL_DIM_EN N28 22

22

EB_BE_N1

EB_BE_N0

EB_ADDR9

EB_ADDR8

EB_ADDR7

EB_ADDR6

EB_ADDR5

EB_ADDR4

EB_ADDR3

EB_ADDR2

EB_ADDR1

EB_ADDR0

10K

EB_DATA9

EB_DATA8

EB_DATA7

EB_DATA6

EB_DATA5

EB_DATA4

EB_DATA3

EB_DATA2

EB_DATA1

EB_ADDR17/GPIO84

EB_ADDR16/GPIO83

EB_ADDR15/GPIO82

EB_ADDR14

EB_ADDR13

EB_ADDR12

EB_ADDR11

EB_ADDR10

EB_DATA15

EB_DATA14

EB_DATA13

EB_DATA12

EB_DATA11

EB_CS3/GPIO64

EB_CS2/GPIO79

EB_CS1/GPIO78

EB_CS0/GPIO77

EB_DATA10

EB_DATA0

EB_OE_N

EB_WE_N

EB_WAIT

AA26

BOOT "11" "10" "00"

MODE or "01" : NOR : eMMC : NAND +3.3V_NORMAL

EMMC_RST E28 EMMC_RST EMMC_CLK EMMC_CMD EMMC_DATA7 EMMC_DATA6 EMMC_DATA5 EMMC_DATA4 EMMC_DATA3 EMMC_DATA2 EMMC_DATA1 EMMC_DATA0 R23 NAND_CS1 NAND_CS0 NAND_ALE NAND_CLE NAND_REN NAND_WEN AC1 GPIO31 GPIO30 GPIO29 GPIO28 V7 W5 W4 V6 V5 V4 U6 U5 U4 T6 T5 T4 R6 R5 R4 P6 P5 P4 N6 N5 N4 N3 M6 AC23 AC24 AE24 AD23 AE23 AC22 AD22 AE22 5% 1/16W SC_DET COMP1_DET HW_OPT_5 HW_OPT_6 M_RFModule_ISP HW_OPT_10 M_RFModule_RESET FRC_RESET HW_OPT_2 HW_OPT_1 HW_OPT_0 HW_OPT_4 FLASH_WP /RST_HUB HW_OPT_3 HP_DET S RF_SWITCH_CTL /TU_RESET /S2_RESET D HDMI_S/W_RESET G +5V_NORMAL OPTIC_FPGA_RESET OPTIC_SERDES_RESET 3D_DEPTH_RESET /RST_PHY OLED_TCON_RESET HW_OPT_9 HW_OPT_7 HW_OPT_8 DSUB_DET +3.3V_NORMAL SW1 JTP-1127WEM 2 4 2.7K R201 1 3 P24 N25 P23 N24 P25 F27 F26 C26 E27 E26 D27 D28 C27 C28 D26 EMMC_DATA[7] EMMC_DATA[6] EMMC_DATA[5] EMMC_DATA[4] EMMC_DATA[3] EMMC_DATA[2] EMMC_DATA[1] EMMC_DATA[0] EMMC_CLK EMMC_CMD EMMC_DATA[0-7]

JTAG I/F FOR MAIN

XIN_MAIN XO_MAIN R104 1% 560

A22 B22 AB16 AB17 AE3 PORES_N V23 U25 V25 V24 U24 Y22 AA22 AB20 AB21 W22 AB9 AB8 BOOT_MODE1 BOOT_MODE0 AB15 AB14 Y23 W25 R101 22 W24 W23 Y5 W6 TRST_N0 TMS0 TCK0 TDI0 TDO0 TRST_N1 TMS1 TCK1 TDI1 TDO1 PLLSET1 PLLSET0 BOOT_MODE1 BOOT_MODE0 R150 22 XIN_MAIN XO_MAIN OPM1 OPM0

+3.3V_NORMAL R187 4.7K

SOC_RESET TRST_N0

10K

BOOT_MODE1 4.7K R185

10K

TMS0 TCK0 TDI0 TDO0

OPT

TRST_N0

BOOT_MODE1
+3.3V_NORMAL

TDI0 TDO0 TMS0 TCK0 +3.3V_NORMAL +5V_NORMAL PLLSET1 PLLSET0 BOOT_MODE1 BOOT_MODE0

R188

4.7K

SOC_RESET 10K 10K G 100K R202 ERROR_OUT EPHY_INT /USB_OCD2 /USB_OCD3 G EXT_INTR3/GPIO48 EXT_INTR2/GPIO63 EXT_INTR1/GPIO62 EXT_INTR0/GPIO61 UART0_RX/GPIO49 UART0_TX/GPIO50 UART1_RX UART1_TX UART2_RX UART2_TX AB23 AB24 AA25 AB25 Y25 AA23 Y24 DTV_ATV_SELECT AA24 AB6 AB4 AC5 AC4 AD4 AE4 AE5 AD5 AE6 AD6 AC6 AC7 SCL0/GPIO60 SDA0/GPIO59 SCL1/GPIO58 SDA1/GPIO57 SCL2/GPIO56 SDA2/GPIO71 SCL3/GPIO70 SDA3/GPIO69 SC_DETECT/GPIO93 SCL4/GPIO68 SDA4/GPIO67 SC_CLK/GPIO90 RMII_REF_CLK CAM_INPACK_N CAM_IOIS16_N SCL5/GPIO66 SDA5/GPIO65 RMII_CRS_DV CAM_VCCEN_N CAM_IREQ_N CAM_WAIT_N SC_VCC_SEL/GPIO88 SC_VCCEN/GPIO89 SD_DATA3/GPIO72 SD_DATA2/GPIO87 SD_DATA1/GPIO86 SD_DATA0/GPIO85 SPI_DI0/GPIO39 SPI_DO0/GPIO38 SPI_SCLK0/GPIO37 SPI_CS0/GPIO36 SPI_DI1/GPIO35 SPI_DO1/GPIO34 SPI_SCLK1/GPIO33 SPI_CS1/GPIO32 I2C_SCL1 I2C_SDA1 +3.3V_NORMAL I2C_SCL2 I2C_SDA2 I2C_SCL3 FRC_EXTERNAL R100 10K DVB_T2_TUNER R152 10K DVB_C2_TUNER R156 10K DVB_S_TUNER R154 10K UD_FRC R121 10K URSA5 R110 10K OPTIC R138 10K FHD 10K 3D_DEPTH R140 10K OPT 10K CP_BOX R147 10K NO_FRC MODEL_OPT_0 MODEL_OPT_1 0 0 SoC internal FRC 0 1 I2C_SDA3 LG FRC3 1 0 URSA5 1 1 I2C_SCL4 I2C_SDA4 I2C_SCL5 I2C_SDA5 I2C_SCL6 I2C_SDA6 HIGH MODEL_OPT_2 FHD OPTIC 3D DEPTH DDR CP BOX T2 Tuner S Tuner C2 Tuner UD FRC (For UD) NON_DVB_T2_TUNER R153 10K NON_DVB_C2_TUNER R158 10K NON_DVB_S_TUNER R155 10K NON_3D DEPTH R141 10K 3D_Depth_IC Reserved Enable Support Support Support Support LOW UD AD2 NON_OPTIC NON_3D_Depth_IC DDR_Default Disable R106 Not Support +3.3V_NORMAL Not Support Not Support CAM_INPACK_N CAM_CD1_N CAM_CD2_N CAM_IREQ_N CAM_WAIT_N CAM_REG_N /PCM_CE1 /PCM_CE2 PCM_RST R180 3.3K R196 3.3K R181 3.3K R197 3.3K R199 3.3K R183 1.2K R178 2.2K R179 2.2K R182 2.2K R195 2.2K R198 3.3K R184 1.2K EPHY_REFCLK EPHY_CRS_DV EPHY_MDC EPHY_TXD1 EPHY_TXD0 EPHY_RXD1 EPHY_MDIO Not Support EPHY_RXD0 EPHY_EN R105 R108

OPT

R132 OPT

OPT R131

BOOT_MODE0 4.7K R134 OPT OPT R133 R186

SOC_RX

Q100 2N7002K D SOC_TX

BOOT_MODE0
+5V_NORMAL

Q103 2N7002K

UART1_RX UART1_TX M_REMOTE_RX M_REMOTE_TX

AA6 Y6 AB5 AA5

IC100 LG1152D-B1 LG1152_NON_RM

GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0

AA4

Y4

BT_ANALOGTEST

USB_TXR_RKL

BT_TXR_RKL

RMII_MDIO

RMII_TXEN

RMII_TXD1

RMII_TXD0

RMII_RXD1

RMII_RXD0

CAM_CE1_N

CAM_CE2_N

CAM_CD1_N

CAM_CD2_N

CAM_VS1_N

CAM_VS2_N

CAM_RESET

CAM_REG_N

BT_USB_DP

BT_USB_DM

RMII_MDC

USB_DP1

USB_DM1

USB_DP2

USB_DM2

For ISP Delete PV

DEBUG

+3.3V_NORMAL G R203 100K OPT

IRB_SPI_MISO IRB_SPI_MOSI IRB_SPI_CK IRB_SPI_SS AV1_CVBS_DET

MHL_DET D Q105 2N7002K OPT HDMI_INT S

Q104 2N7002K

R124

R145

SC_DATA/GPIO92

SD_CD_N/GPIO75

SD_WP_N/GPIO74

USB_ANALOGTEST

SC_RST/GPIO91

SD_CLK/GPIO76

SD_CMD/GPIO73

USB_TXR_RKL

HW_OPT_0 BackEnd 1 HW_OPT_1 BackEnd 2 HW_OPT_2 Pannel Resol HW_OPT_3 OPTIC I/F HW_OPT_4 3D Depth IC MODEL_OPT_4 HW_OPT_5 DDR Size HW_OPT_6 CP BOX HW_OPT_7 FrontEnd 1 HW_OPT_8 FrontEnd 2 HW_OPT_9 MODEL_OPT_8 MODEL_OPT_9 MODEL_OPT_10 MODEL_OPT_7 MODEL_OPT_6 MODEL_OPT_5 MODEL_OPT_3

AB1

AB2

AB3

AC2

AC3

AE1

AD3

AD1

W26

V28

Y27

Y26

W28

W27

Y28

V27

V26

R25

U23

T25

T24

T23

R24

C22

C23

A23

B23

A24

B24

C24

A25

B27

A27

A26

B26

C25

B25

AA1

AA2

AA28

AB26

AA27

AA26

AA4

22

I2C PULL UP
SMARTCARD_RST SMARTCARD_PWR_SEL SMARTCARD_DATA SMARTCARD_CLK SMARTCARD_DET SMARTCARD_VCC

22

22

Y4

BT_ANALOGTEST

BT_TXR_RKL

RMII_MDIO

RMII_TXEN

RMII_TXD1

RMII_TXD0

RMII_RXD1

RMII_RXD0

CAM_CE1_N

CAM_CE2_N

CAM_CD1_N

CAM_CD2_N

CAM_VS1_N

CAM_VS2_N

CAM_RESET

CAM_REG_N

BT_USB_DP

BT_USB_DM

RMII_MDC

USB_DP1

USB_DM1

USB_DP2

USB_DM2

Debug
USB_HUB_IC_IN_DP USB_HUB_IC_IN_DM USB_DP3 USB_DM3 P100 +3.3V_NORMAL 12507WS-04L

HW_OPT_10

NON_OPTIC R139 10K

HP_AMP_MUTE

FRC_INTERNAL R107 10K

1GByte R146 10K

R111 FRC310K

NON_CP_BOX R148 10K

10K

22 R117

NON_UD_FRC R126 10K

OPT

I2C_SCL2 I2C_SDA3 I2C_SCL3 I2C_SDA4 I2C_SCL4 I2C_SDA5 I2C_SCL5 I2C_SDA6 I2C_SCL6 +3.3V_NORMAL

10K CI

I2C_SDA2

10K CI 10K CI

MODEL OPTION 8 is just for CP Box It should not be appiled at MP

I2C_SDA1 I2C_SCL1

UD

OPT 1 DEBUG

PCM_5V_CTL

R125

R166 R167

R168

22

22

OPT

OPT

UART1_RX RCLAMP0502BA D100

R173

R174

R175

MO_SENS_TO_MAIN_DOWN

MO_SENS_TO_MAIN_UP MOTOR_CCW

MOTOR_CW

MOTOR_CLOSE_SW

MOTOR_OPEN_SW IR_B_RESET

R176

UART1_TX WIFI_DP WIFI_DM

4 5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Place near Jack side LG1152 B1


MAIN & GPIO

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Max 360mA
+1.0V_VDD AVDD10_DEMOD +1.0V_VDD

Max 12mA Max 1mA


VDDC_XTAL L308 BLM18PG121SN1D 0.1uF 0.1uF 0.1uF C366 10uF C359 10uF C369 10uF +1.0V_VDD AVDD10_VSB

+1.0V_VDD

Max 35mA
AVDD10_LVTX

+1.5V_Bypass Cap
+1.5V_DDR

LG1152D
VCC1.5V_MAIN

L305 BLM18PG121SN1D C332 10uF 0.1uF 0.1uF

(18)
L300 BLM18PG121SN1D 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C302 10uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

L304 BLM18PG121SN1D 0.1uF 0.1uF C312 10uF

L302 BLM18PG121SN1D C305 10uF

Max 680mA
VDD33 U8 U9 C317 C311 C320 C323 C329 C337 C334 C342 C343 C346 U10 V8 V9 VDD33_USB V10 J21 VCC1.5V_MAIN K21 AA10

IC100 LG1152D-B1

C326 10uF

ESD_LG1152 ZD301 5V

K13 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 AVDD33_USB_1 AVDD33_USB_2 AVDD33_BT_USB_1 AVDD33_BT_USB_2 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 VDD18_1 VDD18_2 VDD18_3 VDD18_4 VDD18_5 VDD18_6 VDD18_LTX_1 VDD18_LTX_2 VDD18_LTX_3 VDD18_LTX_4 VDD18_LVRX_1 VDD18_LVRX_2 VDD18_LVRX_3 VDD18_DISPPLL VDD18_DR3PLL VDD18_MAIN_XTAL GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 VDD15_M2_1 VDD15_M2_2 VDD15_M2_3 VDD15_M2_4 VDD15_M2_5 VDD15_M2_6 VDD15_M2_7 VDD15_M2_8 VDD15_M2_9 VDD15_M0_1 VDD15_M0_2 VDD15_M0_3 VDD15_M0_4 VDD15_M0_5 VDD15_M0_6 VDD15_M0_7 VDD15_M0_8 VDD15_M0_9 VDD15_M0_10 VDD15_M0_11 VDD15_M0_12 VDD15_M0_13 VDD15_M0_14 VDD15_M0_15 VDD15_M0_16 VDD15_M0_17 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 VREF_M2_0 VREF_M1_0 VREF_M1_1 VREF_M0_0 VREF_M0_1 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 VDDC10_OSPREY_1 VDDC10_OSPREY_2 VDDC10_OSPREY_3 VDDC10_OSPREY_4 VDDC10_OSPREY_5 VDDC10_OSPREY_6 VDDC10_OSPREY_7 VDDC10_OSPREY_8 VDDC10_OSPREY_9 VDDC10_OSPREY_10 VDDC10_OSPREY_11 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 VDDC09_1 VDDC09_2 VDDC09_3 VDDC09_4 VDDC09_5 VDDC09_6 VDDC09_7 VDDC09_8 VDDC09_9 VDDC09_10 VDDC09_11 VDDC09_12 VDDC09_13 VDDC09_14 VDDC09_15 VDDC09_16 VDDC09_17 VDDC09_18 VDDC09_19 VDDC09_20 VDDC09_21 VDDC09_22 VDDC09_23 VDDC09_24 VDD09_LTX_1 VDD09_LTX_2 VDD09_LTX_3 AVDD09_DR3PLL GND_94 GND_95 GND_96 GND_97 GND_98 GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 VDDC_MAIN_XTAL GND_123 GND_124 SP_VQPS GND_125 GND_126 GND_MAIN_XTAL GND_127 GND_128 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 K14 K15 K16 K17 K18 K19 K20 L7 L12 L13 L14 L15 L16 L17 L18 L19 L21 M7 M12 M13 M14 M15 M16 M17 M18 M19 N7 N12 N13 N14 N15 N16 N17 N18 N19 P7 P12 P13 P14 P15 P16 P17 P18 P19 R7 R12 R13 R14 R15 R16 R17 R18 R19 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 U7 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 U21 V11 V12 V13 V14 V15 V16 V17 V18 V19 V20 V21 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 W20 W21 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 Y20 Y21 AA14 AA15 AA16 AA17 AA18 AA20 AA21 AB7 AB10 AB11 AB13 AB22

C318

C321

C313

C368

C370

C333

C338

On Package Decap : 0.1uF *3ea

On Package Decap : 0.1uF *1ea


VCC1.5V_MAIN

Max 40mA
R300 1K 1% R302 1K 1%

Max 40mA
VREF_M1 VDD18

LG1152A
IC101 LG1152AN-B2
VDD33 VDD33_CVBS VDD33_HDMI VDD33_XTAL P1 P2 P14 R14 F18 H16 M16 VDD25_VSB VDD25_CVBS L15 R13 VDD25_REF R12 V13 P10 VDD25_COMP R10 P9 R9 V7 VDD25_AUD J16 P6 VDD25_LVTX P7 V6 B18 VDD18_A G12 G13 N1 N2 AVDD10_DEMOD G6 AVDD10_VSB G7 R15 AVDD10_LVTX K15 D17 D18 VDDC_XTAL N7 L16 +2.5V_NORMAL G4 VQPS For HDCP OTP Will be change to LOW for MP AVSS25_REF N10 K16 D16 G5 G8 G9 G10 G11 G14 G15 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 J4 J5 J6 J7 AVSS25_REF GND_XTAL GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 VDDC10_1 VDDC10_2 AVDD10_CVBS AVDD10_VSB AVDD10_LVTX_1 AVDD10_LVTX_2 AVDD10_LLPLL VDDC_XTAL VDD18_1 VDD18_2 VDD25_VSB VDD25_CVBS_2 VDD25_CVBS_1 VDD25_CVBS_3 AVDD25_REF VDD25_COMP_3 VDD25_COMP_1 VDD25_COMP_2 VDD25_COMP_4 VDD25_AAD VDD25_AUD_1 VDD25_AUD_2 VDD25_AUD_3 VDD25_LVTX_1 VDD25_LVTX_2 VDD25_LVTX_3 VDD33_1 VDD33_2 AVDD33_CVBS_1 AVDD33_CVBS_2 AVDD33_HDMI_1 AVDD33_HDMI_2 VDD33_XTAL GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 J8 J9 C421 10uF J10 J11 J12 J13 J14 J15 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 L4 L5 L6 L7 L8 L9 L10 L11 L12 L324 BLM18PG121SN1D 0.1uF 0.1uF C414 10uF +2.5V_NORMAL +1.8V_NORMAL VDD18_A 0.1uF L326 BLM18PG121SN1D C422 10uF

VREF_M0

AA11 W18 W19

1000pF

0.1uF

1000pF

0.1uF

Y18 Y19 VDD18_LVTX AG28 AH27 AA7 AA8 AA9 VDD18_LVRX AG1 AA12 VDD18_MAIN_XTAL AA13 AB12 J28 B28 G22 F9 G8

1%

R301

R303

1%

C300

C308

C423

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea


VCC1.5V_DE

C350

Max 40mA
VREF_M2 VCC1.5V_DE

+1.5V_DDR

Max 340mA
VCC1.5V_DE R304 1K 1%

L301 BLM18PG121SN1D 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C303 10uF

C362

1K

1K

0.1uF

1000pF

G9 G10 G11 H8 H9 H10 VCC1.5V_MAIN H11 F22 G13 G14 G16 G17

C306

C336

C310

VDD25_CVBS

VDD25_LVTX

L313 BLM18PG121SN1D 0.1uF 0.1uF C375 10uF

L325 BLM18PG121SN1D 0.1uF C415 10uF

On Package Decap : 0.1uF *2ea

On Package Decap : 0.1uF *1ea

C417

C419

C385

C390

C418

+0.9V_VDD +0.9V_VDD

C351

1K

+2.5V_NORMAL

+2.5V_NORMAL

C316

C340

C363

Max 100mA

Max 250mA

Max 28mA
VDD25_VSB

R305

1%

Max 6mA
MAIN_XTAL

G18 G19 G20 G21 H13

Max 5900mA
0.1uF 0.1uF 0.1uF C301 10uF C307 10uF

L14 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 M17 N4 N5 N6 N8 N9 N11 N12 N13 N14 N15 N16 P3 P4 P5 P13 P15 P16 R3 R17 R18 T13 U13 R16

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea


ESD_LG1152 ZD300 5V

0.1uF

0.1uF

L13

On Package Decap : 0.1uF *1ea

L303 BLM18PG121SN1D 0.1uF 0.1uF C309 10uF

H14 H16 H17 H18 H19 H20 H21 VREF_M2 VREF_M1 L4 F13 G12 F14 AVDD10_OSPREY G15 L20 M20 M21 M27 M28 N20 N21 P20

C319

C322

C314

C325

C327

C315

Max 250mA Max 50mA


+2.5V_NORMAL VDD25_AUD +2.5V_NORMAL VDD25_COMP

Max 10mA
VDD25_REF

On Package Decap : 0.1uF *6ea

Max 20mA
+0.9V_VDD L315 BLM18PG121SN1D 0.1uF 0.1uF 0.1uF L321 BLM15BD121SN1 0.1uF

+1.0V_VDD

C324

Max 1320mA
AVDD10_OSPREY

VREF_M0

L322 BLM18PG121SN1D 0.1uF C401 10uF

L306 BLM18PG121SN1D 0.33uF C348 C341 10uF 0.1uF 0.1uF 0.33uF C349

C379 10uF

AVSS25_REF

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea

C353

On Package Decap : 0.1uF *3ea

C345

L320 BLM15BD121SN1

C347 10uF

C386

C393

C409

C407

C400

P21 R20 R21 +0.9V_VDD

+1.8V_NORMAL

Max 120mA
VDD18_LVTX

+1.8V_NORMAL

Max 49mA
VDD18

K8 K9 K10 K11

Max 35mA
+3.3V_NORMAL VDD33_CVBS

Max 256mA
+3.3V_NORMAL VDD33_HDMI +3.3V_NORMAL

Max 1mA
VDD33_XTAL L312 BLM18PG121SN1D 0.1uF C374 10uF

L316 BLM18PG121SN1D 0.1uF C395 10uF 0.1uF

L8 L9 L10 L11 M8 M9 M10 M11 N8

L319 BLM18PG121SN1D 0.1uF 0.1uF C398 10uF

L323 BLM18PG121SN1D 0.1uF 0.1uF C413 10uF

L309 BLM18PG121SN1D 0.1uF C371 10uF

C410

C405

OPT C416

C403

C408

C381

C382

On Package Decap:0.1uF *1ea On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea
+1.8V_NORMAL

On Package Decap:0.1uF *1ea

C411

N9 N10 N11 P8 P9 P10

Max 93mA
VDD18_LVRX

+1.8V_NORMAL

Max 31mA
VDD18_MAIN_XTAL

P11 R8 R9 +0.9V_VDD R10 R11 Y7 Y8 MAIN_XTAL AF1 F28 H22 VDD18

L318 BLM18PG121SN1D 0.1uF C397 10uF

L314 BLM18PG121SN1D 0.1uF 0.1uF C389 C378 10uF 0.1uF C304

SMD Bottom
UD Option M315 For HeatSinK, AL Block / SMD Top MDS62110215 ESD M312 HEATSINK/ALBLOCK M300 MDS62110218 HEATSINK/ALBLOCK M303 MDS62110218 HEATSINK/ALBLOCK M301 MDS62110218 MDS62110215 M304 HEATSINK M313 MDS62110215 OPT M314 MDS62110215 HEATSINK/ALBLOCK M306 MDS62110218 M321 ALBLOCK M324 HEATSINK M318 MDS62110215 ESD_AJ M317 MDS62110215 ESD ESD ESD MDS62110218 M305 HEATSINK M315-*1 MDS62110214 UD_ESD_9.5T M312-*1 MDS62110214 UD_ESD_9.5T M322 M313-*1 MDS62110214 OPT_UD_ESD_9.5T M314-*1 MDS62110214 UD_ESD_9.5T M318-*1 MDS62110214 UD_ESD_AJ_9.5T M317-*1 MDS62110214 UD_ESD_9.5T M308-*1 MDS62110214 M309*-1 MDS62110214 M322-*1 MDS62110214 GASKET_8.0X6.0X9.5H UD_GASKET except ATSC M319 GASKET_8.0X6.0X9.5H UD_9.5T GASKET_8.0X6.0X9.5H UD_9.5T M311-*1 MDS62110214 UD_ATSC_9.5T MDS62110217 C372 10uF ESD UD Option UD Option M310-*1 MDS62110214 OPT_UD_9.5T M320 MDS62110217 ESD +3.3V_NORMAL MDS62110215 GASKET_8.0X6.0X7.5H NON_UD For ATSC For Tuner Sensitivity / Under DDR M308 GASKET_8.0X6.0X7.5H MDS62110215 M309 MDS62110215 GASKET except ATSC GASKET_8.0X6.0X7.5H LM8600 For Tuner Sensitivity / Under TUNER M310 MDS62110215 M311 MDS62110215 ATSC M316 MDS62110217 ESD OPT SMD TOP FOR ESD

C404

C384

On Package Decap:0.1uF *1ea


For secure BOOT OTP Will be change to LOW for MP

AA19 G23 G7 H7 H12 H15 VDD33 J7 J8 J9 J10 J11 J12 0.1uF 0.1uF C396 10uF J13 J14 J15 C402 C406 J16 J17 J18 J19

HEATSINK/ALBLOCK M302 MDS62110218

MDS62110218

Max 48.8mA
+3.3V_NORMAL VDD33_USB

MDS62110218

MDS62110218 HEATSINK/ALBLOCK M323 MDS62110218

L310 BLM18PG121SN1D 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

L317 BLM18PG121SN1D

HEATSINK/ALBLOCK M307 MDS62110218

C388

C392

C377

C383

C391

On Package Decap : 0.1uF *1ea

C394

C399

J20 K7 K12

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
11/05/31

LG1152 MAIN POWER 3

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+5V_NORMAL Q506 MMBT3904(NXP) Place these close to tuner TU_CVBS 680pF C506 OPT EU C510 0.1uF 16V EU R527 10K

C B EU EU R507 10K

+5V_NORMAL
DTV_ATV_SELECT

IC101 LG1152AN-B2

IC100 LG1152D-B1
47CHB AR102 CHB_CLK CHB_SYNC CHB_VAL R200 47 CHB R556 33 CHB_ERR CHB_DATA

R592 220 EU IC500 NLASB3157DFT2G E

R593 220 EU

L1 INTR_GBB INTR_HDMI1 INTR_AFE3CH 100 R576 ATV_OUT K1 AUD_HMR00ARC AUD_HMR0AMUTE AUD_HMR0ALRCK OPT AUD_HMR0ABCK AUD_HMR0ASD4 AUD_HMR0ASD3 K2 J2 J3 K3 H1 H2 H3 J1 G1 AUD_DAC1_LRCH L2 L3

AH2 AG2 AF2 AH3 AG3 AG4 AF4 AF3 AH5 AG5 AF5 AH4 AH6 AG6 AF6 AH7 AG7 AH10 AG10 AF10 AH8 AF7 AE8 AD8 AE7 AD7 C529 220pF OPT 50V AC8 AG8 AH9 AF8 AG9 AF9 AE9 AD9 AC9 AE10 AD10 AC10 AE11 AD11 AC11 AE12 AH11 AG11 AF11 AH12 AG12 AF12 AD12 AC12 AE13 AG13 AF13 AH14 AG14 AF14 Close to LG1152A R581 33 AH13 AE14 AC13 AD13 AD14 AC14 Close to LG1152A R582 33 R583 33 AH15 AG15 AF15 AE15 AD15 AC15 AF16 AE16 AD16 AC16 AE17 AD17 AC17 AE18 AD18 AC18 AE19 AD19 AC19 AE20 AD20 AC20 AE21 AD21 R9112 33 AC21 AUPLL_CLK AG16 AH16 AH17 AG17 AF18 AF17 AG18 AH18 AH19 AG19 AF20 AF19 AG20 AH20 AH21 AG21 AF22 AF21 AG22 AH22 AH23 AG23 AF24 AF23 HS_RX1_AM HS_RX1_AP HS_RX1_BM HS_RX1_BP HS_RX1_CM HS_RX1_CP HS_RX1_CLKM HS_RX1_CLKP HS_RX1_DM HS_RX1_DP HS_RX1_EM HS_RX1_EP HS_RX2_AM HS_RX2_AP HS_RX2_BM HS_RX2_BP HS_RX2_CM HS_RX2_CP HS_RX2_CLKM HS_RX2_CLKP HS_RX2_DM HS_RX2_DP HS_RX2_EM HS_RX2_EP PWM0/GPIO55 PWM1/GPIO54 PWM2/GPIO53 PWM_IN AAD_GC0 AAD_GC1 AAD_GC2 AAD_GC3 AAD_GC4 AAD_DATAEN AAD_DATA0 AAD_DATA1 AAD_DATA2 AAD_DATA3 AAD_DATA4 AAD_DATA5 AAD_DATA6 AAD_DATA7 AAD_DATA8 AAD_DATA9 TXA0N TXA0P TXA1N TXA1P TXA2N TXA2P TXACLKN TXACLKP TXA3N TXA3P TXA4N TXA4P TXB0N TXB0P TXB1N TXB1P TXB2N TXB2P TXBCLKN TXBCLKP TXB3N TXB3P TXB4N TXB4P DAC_DATA0 DAC_DATA1 DAC_DATA2 DAC_DATA3 DAC_DATA4 DAC_START BTSCSEL DTS_EN FS00CLK AUDCLK_TO_DIGITAL AUD_SUBMCK AUD_SUBLRCH AUD_SUBSCK/GPIO51 AUD_SUBLRCK/GPIO52 CLK_54 CVBS_GC2 CVBS_GC1 CVBS_GC0 CVBS_UP CVBS_DN IEC958OUT PCMI3LRCK/GPIO81 PCMI3LRCH PCMI3SCK/GPIO80 CHB_DN CHB_UP CHB_START CHB_DATA0 CHB_DATA1 CHB_DATA2 CHB_DATA3 CHB_DATA4 AUDCLK_OUT DACLRCH DACSLRCH/GPIO95 DACCLFCH/GPIO94 DACSCK DACLRCK BB_SDA_I BB_SDA_O BB_SCL HS_SCL HS_SDA_I HS_SDA_O BB_TPI_DATA0 BB_TPI_DATA1 BB_TPI_DATA2 BB_TPI_DATA3 BB_TPI_DATA4 BB_TPI_DATA5 BB_TPI_DATA6 BB_TPI_DATA7 BB_TPI_VAL BB_TPI_SOP BB_TPI_ERR BB_TPI_CLK TPO_CLK TPO_SOP TPO_VAL TPO_ERR TPO_DATA0 TPO_DATA1 TPO_DATA2 TPO_DATA3 TPO_DATA4 TPO_DATA5 TPO_DATA6 TPO_DATA7 AUD_DAC1_LRCH AUD_DAC1_SCK AUD_DAC1_LRCK AUD_FS25CLK AUD_FS24CLK AUD_FS23CLK AUD_FS21CLK AUD_FS20CLK AUDCLK_OUT_SUB AUD_DAC0_LRCK AUD_DAC0_LRCH AUD_DAC0_SCK AUD_ADC_LRCH AUD_ADC_SCK AUD_ADC_LRCK AUD_MIC_LRCH AUD_MIC_SCK AUD_MIC_LRCK TPI_CLK TPI_SOP TPI_VAL TPI_ERR TPI_DATA0 TPI_DATA1 TPI_DATA2 TPI_DATA3 TPI_DATA4 TPI_DATA5 TPI_DATA6 TPI_DATA7 AUD_HMR0ARC AUD_HMR0AMUTE AUD_HMR0ALRCK AUD_HMR0ABCK AUD_HMR0ASD4 AUD_HMR0ASD3 AUD_HMR0ASD2 AUD_HMR0ASD1 AUD_HMR0ASD0 TPI_DVB_CLK/GPIO47 TPI_DVB_SOP/GPIO46 TPI_DVB_VAL/GPIO45 TPI_DVB_ERR TPI_DVB_DATA0/GPIO44 TPI_DVB_DATA1 TPI_DVB_DATA2 TPI_DVB_DATA3 TPI_DVB_DATA4 TPI_DVB_DATA5 TPI_DVB_DATA6 TPI_DVB_DATA7 INTR_GBB INTR_HDMI1 INTR_AFE3CH STPI_CLK STPI_SOP STPI_VAL STPI_ERR STPI_DATA STPIO_CLK STPIO_SOP/GPIO43 STPIO_VAL/GPIO42 STPIO_ERR/GPIO41 STPIO_DATA/GPIO40

AE27 AE26 AD28 AD27 AD26 AC28 AC26 AB28 AC27 AB27

L503 1uH SC_CVBS_IN C508 150pF 50V EU AV1_CVBS_IN EU C509 150pF EU R614 75 1%

SELECT

EU

B1

EU Q504 MMBT3906(NXP) C

B R599 75

EU

VCC

GND

USB_CTL2

L504 1uH 5.5V D504 50V 150pF C511 C514 150pF 50V R615 75 1%

A DTV/MNT_V_OUT

B0 DTV/MNT_VOUT

AUD_HMR0ASD2 AUD_HMR0ASD1 AUD_HMR0ASD0

Selece = High ==> A = B1 Selece = Low ==> A = B0

AF27 AE28 AG27 AF28 AG26 AF26 AF25 AH26 AH25 AG25 AH24 AG24 FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]

FE_TS_CLK FE_TS_SYNC FE_TS_VAL TPI_DVB_ERR FE_TS_DATA[0-7]

+5V_TU
R618 220 CHB Q505 CHB R617 75 OPT B C E 680pF C517 OPT R613 75 1% OPT XIN_SUB XO_SUB R560 R561 330 33 L17 L18 P17 K17 K18 M2 M1 SC_SOG_IN XIN_SUB XO_SUB VSB_AUX_XIN XTLIN_AAD XTLOUT_AAD OPM1 OPM0 AUDA_BGR_OUT AUDA_OUTL AUDA_OUTR AUD_SCART0_OUTLN AUD_SCART0_OUTLP AUD_SCART0_OUTRN SOC_RESET R4 PORES_N AUAD_L_CH5_IN N3 M3 EU R524 2.7K 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF R563 DTV/MNT_VOUT R528 R529 R530 10K 10K C515 100pF 50V EU R579 R580 22 22 EU 0 U14 T14 V15 U15 T15 U16 V14 T16 V16 V17 U17 CVBS_IN1 CVBS_IN2 CVBS_IN3 CVBS_VCM CVBS_IN4 CVBS_IN5 CVBS_IN6 CB_IN CB_VCM BUF_OUT1 BUF_OUT2 AUMI_BIAS AUMI_IN AUMI_COM E18 DDCD0_DA Close to LG1152A P8 R8 P11 SC_B SC_G SC_R OPT 75 75 OPT OPT 75 R11 R536 R539 R541 R546 R547 R548 C528 10pF R595 C546 10pF C524 10pF R600 R594 R550 R568 R569 SC_SOG_IN R570 R564 COMP1_Pb COMP1_Y 5.5V D505 5.5V D506 COMP1_Pr R565 R566 R567 5.5V D503 R606 1% 75 R605 1% 75 R604 1% 75 33 150 150 0 150 68 33 68 33 0 68 33 33 33 C516 C518 C523 C526 C527 C531 C532 C542 C543 C544 C545 C538 C539 C540 C541 0.047uF 0.047uF 0.047uF 0.047uF 1000pF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF 0.047uF 0.047uF 0.047uF 1000pF 0.047uF U8 V8 V10 T8 V9 T11 U9 T9 U10 T10 V11 U11 V12 U12 T12 HSYNC VSYNC SC1_FB SC1_SID BINCOM_IN B_IN GINCOM_IN G_IN SOG_IN RINCOM_IN R_IN PB1_IN Y1_IN SOY1_IN PR1_IN PB2_IN Y2_IN SOY2_IN PR2_IN ADC_I_INCOM ADC_I_INP ADC_I_INN ANTCON RFAGC IFAGC T17 U18 T18 C115 C116 C117 PHY0_RXCN_0 PHY0_RXCP_0 PHY0_RX0N_0 PHY0_RX0P_0 PHY0_RX1N_0 PHY0_RX1P_0 PHY0_RX2N_0 PHY0_RX2P_0 PHY0_ARC_OUT_0 P12 M18 P18 DDCD0_CK HPD0 J18 J17 H17 H18 G17 G18 G16 F16 F17 HDMI_CLKHDMI_CLK+ HDMI_RX0HDMI_RX0+ HDMI_RX1HDMI_RX1+ HDMI_RX2HDMI_RX2+ SPDIF_OUT_ARC E17 E16 R577 R578 AUAD_REFN AUAD_REFP AUAD_VR_OUT R7 R5 R6 +3.3V_NORMAL 4.7K 4.7K L9A_SCL L9A_SDA AUAD_R_CH5_IN AUAD_L_CH4_IN AUAD_R_CH4_IN AUAD_L_CH3_IN AUAD_R_CH3_IN AUAD_L_CH2_IN AUAD_R_CH2_IN AUAD_L_CH1_IN AUAD_R_CH1_IN T4 U4 V5 10K 10K R534 R520 2.2uF 2.2uF 2.2uF C537 C547 C548 CHB_DATA JDVR_SCLK CHB_VAL CHB_ERR TU_CVBS SCART_Lout SCART_Rout SC_R CHB_CVBS SC_CVBS_IN SC_B SC_G SC_FB SC_ID ATV_OUT SC_L_IN SC_R_IN TUNER_SIF TUNER_SIF DTV/MNT_V_OUT R571 R572 R573 R559 R574 L500 DSUB_G+ L502 5.5V D500 OPT 5.5V D501 OPT 5.5V D502 OPT OPT OPT OPT DSUB_R+ 75 75 75 R551 R557 R575 R558 33 C549 33 C550 100 C551 68 C552 100 C553 33 C554 33 C555 33 C556 68 C557 AUD_SCART0_OUTRP EU U3 V3 V4 T3 U5 T5 U6 T6 U7 T7 TPI_SOP TPI_CLK TPO_ERR TPO_VAL TPO_SOP TPO_CLK AUAD_L_CH5_IN AUAD_R_CH5_IN AUAD_L_CH4_IN AUAD_R_CH4_IN AUAD_L_CH3_IN AUAD_R_CH3_IN AAD_ADC_SIFM AAD_ADC_SIF U1 R1 R2 T1 V2 U2 T2 100 N17 N18 C533 C534 C535 C536 0.1uF 0.1uF 10uF 2.2uF AUDA_OUTL AUDA_OUTR 100 EU R502 22K 22K 0.01uF 0.01uF SCART_Rout_SOC R501 SCART_Lout_SOC C558 1000pF OPT TUNER_SIF R616 220CHB

G2 G3 B1 C1 A4 B4 C4 A2 D1 D2 E2 E1 F1 F2 B2 A3 C2 B3

AUD_DAC1_SCK

IC101 LG1152AN-B2

AUD_DAC1_LRCK AUD_FS25CLK AUD_FS24CLK AUD_FS23CLK AUD_FS21CLK AUD_FS20CLK AUDCLK_OUT_SUB AUD_DAC0_LRCK AUD_DAC0_LRCH AUD_DAC0_SCK AUD_ADC_LRCH AUD_ADC_SCK AUD_ADC_LRCK AUD_MIC_LRCH AUD_MIC_SCK AUD_MIC_LRCK BB_TP_DATA0 R532 C520 EU C521 EU BB_TP_DATA1 BB_TP_DATA2 BB_TP_DATA3 BB_TP_DATA4 BB_TP_DATA5 BB_TP_DATA6 BB_TP_DATA7 BB_TP_VAL BB_TP_SOP BB_TP_ERR BB_TP_CLK

CHB_CVBS

H24 J25 J24 H25 J27 J26 H28 H27 H26 G28 G27 G26 TPI_DATA[0] TPI_DATA[1] TPI_DATA[2] TPI_DATA[3] TPI_DATA[4] TPI_DATA[5] TPI_DATA[6] TPI_DATA[7]

TPI_CLK TPI_SOP TPI_VAL TPI_ERR TPI_DATA[0-7]

SC_FB SC_ID NON SCART R525-*1 0 EU R525 75 R522 10K EU NON SCART R524-*1 0

EU

R521

100

EU

R531

C3 D3 E3 F3 D4 E4 F4 D5 E5 F5 D6 A5

D24 E23 D25 D23 H23 G25 G24 F25 F24 F23 E25 E24 TPO_DATA[0] TPO_DATA[1] TPO_DATA[2] TPO_DATA[3] TPO_DATA[4] TPO_DATA[5] TPO_DATA[6] TPO_DATA[7]

TPO_CLK TPO_SOP TPO_VAL TPO_ERR TPO_DATA[0-7]

L501 DSUB_B+

BB_SDA_I BB_SDA_O BB_SCL L9DA_SCL L9DA_SDA_I L9DA_SDA_O

B5 C5 A6 B6 C6 E6

C605 10pF

C606 10pF

C607 10pF

R553

DSUB_HSYNC DSUB_VSYNC

R555

CHB_DN CHB_UP CHB_START CHB_DATA0 CHB_DATA1 CHB_DATA2 CHB_DATA3 CHB_DATA4

F6 D7 B7 C7 A8 B8 C8 A7

C1 C2 A3 A2 B2 B1 B3 C3 A4 AE2 AD25 AC25 AD24 AE25

100

R542 100 R543

AUD_MASTER_CLK AUD_LRCH FRC3_FLASH_WP AUD_SCK AUD_LRCK

100 100

R544 R545

CLK_F54M CVBS_GC2 CVBS_GC1 CVBS_GC0 CVBS_UP CVBS_DN

D8 F7 E7 E8 F8 A9

OPTIC_BACK_CHANNEL OPTIC_GPIO1 R630 R598 OPT 47 R619 OPT 47 R629 R628 OPT 22 47 +3.3V_NORMAL 100 C630 82pF 50V SPDIF_OUT

IF_AGC
0.1uF 0.1uF 0.1uF

JDVR_SCLK

IF_N IF_P

IF_N IF_P IF_AGC


FE_TS_CLK FE_TS_SYNC FE_TS_VAL TPI_DVB_ERR FE_TS_DATA[0-7]

FS00CLK AUDCLK_OUT

B9 C9

H/NIM&CHB H/NIM&CHB

DAC_DATA0 DAC_DATA1 DAC_DATA2 DAC_DATA3 DAC_DATA4 DAC_START

AMP_RESET_N

D9 E9 F9 C10 D10 E10

C580 10pF

C579 10pF

C578 10pF

AB18 AB19

22 22

R596 R597

DTS_EN: ENABLE(1) (for development) BTSC_EN: ENABLE(1) (for development)

OPT R3634 2K

C3625 5pF 50V OPT

DSUB_VSYNC OPT R3633 2K C3626 5pF 50V OPT DSUB_HSYNC

Main clock for LG1152A

TPO_DATA[0-7] TPI_DATA[0-7] TPI_ERR TPI_VAL OPTIC_GPIO1

AAD_GC0 AAD_GC1 AAD_GC2 AAD_GC3 AAD_GC4 AAD_DATAEN AAD_DATA0 AAD_DATA1 AAD_DATA2 AAD_DATA3

F10 D11 E11 F11 D12 E12 F12 D13 E13 F13 D14 E14 F14 D15 E15 F15

N1 N2 P2 P1 P3 R3 R1 R2 T2 T1 T3 U3 U1 U2 V2 V1 V3 W3 W1 W2 Y2 Y1 Y3 AA3

SOC_TXA0N SOC_TXA0P SOC_TXA1N SOC_TXA1P SOC_TXA2N SOC_TXA2P SOC_TXACLKN SOC_TXACLKP SOC_TXA3N SOC_TXA3P SOC_TXA4N SOC_TXA4P SOC_TXB0N SOC_TXB0P SOC_TXB1N SOC_TXB1P SOC_TXB2N SOC_TXB2P SOC_TXBCLKN SOC_TXBCLKP SOC_TXB3N SOC_TXB3P SOC_TXB4N SOC_TXB4P

X-TAL_1

EU 25V 1uF C6006 +12V EU

EU 10K R6006 EU SCART_AMP_R_FB C513

8pF

GND_1

Near Place Scart AMP

OPTIC_BACK_CHANNEL XIN_SUB

24MHz X500

R535

1M

SCART_AMP_L_FB 100K R552 EU 100K R538 EU 1uF 25V 10K R6005 C6001 C512 EU SCART_Lout C525 SCART_Rout 100K R554 EU 2.2uF 10V 100K R549 EU EU C522 2.2uF 10V SCART_Rout_SOC SCART_Lout_SOC 8pF

AAD_DATA4 AAD_DATA5 XO_SUB R624 100 AUDA_OUTL R626 22K C603 0.01uF HP_LOUT_MAIN AAD_DATA6 AAD_DATA7 AAD_DATA8 AAD_DATA9 DCO_OUT_CLK

X-TAL_2

GND_2

B10 HSR_AM0 R625 100 AUDA_OUTR R627 22K C604 0.01uF HP_ROUT_MAIN HSR_AP0 HSR_BM0 HSR_BP0 HSR_CM0 HSR_CP0 AUAD_L_CH5_IN HSR_CLKM0 HSR_CLKP0 C575 100pF 50V C501 C587 100pF 50V 2.2uF R509 22K R515 R514 75K HSR_DM0 HSR_DP0 HSR_EM0 AUAD_R_CH5_IN 100K HSR_EP0 HSR_AM1 HSR_AP1 HSR_BM1 C502 C576 330pF 50V EU EU EU L510 EU C588 330pF 50V C504 R510 EU R511 EU R517 R516 22K EU HSR_BP1 AUAD_L_CH4_IN EU 75K AUAD_R_CH4_IN 100K HSR_CM1 HSR_CP1 HSR_CLKM1 HSR_CLKP1 HSR_DM1 HSR_DP1 HSR_EM1 2.2uF R512 22K R518 2.2uF R513 22K R519 R609 470K C586 560pF 50V OPT C589 100pF 50V AUAD_L_CH3_IN 75K AUAD_R_CH3_IN 100K HSR_EP1 A10 A11 B11 C12 C11 B12 A12 A13 B13 C14 C13 B14 A14 A15 B15 C16 C15 B16 A16 A17 B17 C18 C17

L506 PC_L_IN R601 470K OPT C573 560pF 50V

C500

2.2uF R508

22K

L509

PC_R_IN R607 470K C581 560pF 50V OPT EU SC_L_IN EU R602 470K C572 330pF 50V OPT L507

L6 L5 M4 M5

OPT EDGE_LED

R631 R632 R633

10K 100 100 2.2uF C559 OPT

A_DIM PWM_DIM2 PWM_DIM

BPL_IN

2.2uF EU 2.2uF EU

22K

C503

SC_R_IN L508 AV1_L_IN R603 470K C574 560pF 50V OPT C577 100pF 50V

R608 470K

C582 330pF 50V OPT

L511

C505

AV1_R_IN

LG1152A
Place SOC Side

LG1152D

Place JACK Side THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LG1152 B0
MAIN AUDIO/VIDEO

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

IC100 LG1152D-B1

IC700 H5TQ2G83BFR-PBC
D18

M0_DDR_VREFCA VCC1.5V_MAIN VCC1.5V_MAIN M0_1_DDR_VREFCA R730 1K 1% K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8

IC703 H5TQ2G83BFR-PBC DDR3 2Gbit

M0_1_DDR_VREFCA

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8 M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14

E17 E18 E20 E16 D20 F16 F19 E15 D19 D14 E14 D17 F18 D16 F20

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8 M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14 M0_DDR_CLK R705 200 M0_DDR_CLK M0_DDR_CLKN M0_DDR_CKE M0_DDR_ODT M0_DDR_CLKN M0_DDR_RESET_N R709 10K VCC1.5V_MAIN

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8 M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14

K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14

DDR3 2Gbit

M0_DDR_VREFDQ J9 VREFCA R722 1K 1% M0_DDR_VREFCA

M0_1_DDR_VREFDQ M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 0.1uF 1000pF M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8 M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14 J9 VREFCA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 M0_DDR_BA0 J3 K9 J4 F8 G8 G10 H3 0.1uF 1000pF CK CK CKE CS ODT RAS CAS WE N3 RESET NC_S1 NC_S2 NC_S3 M0_DDR_DQSU_P M0_DDR_DQSU_N C4 D4 B8 A8 DM/TDQS NF/TDQS VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 M0_DDR_DQ10 M0_DDR_DQ13 M0_DDR_DQ14 M0_DDR_DQ11 M0_DDR_DQ15 M0_DDR_DQ9 M0_DDR_DQ8 M0_DDR_DQ12 B4 C8 C3 C9 E4 E9 D3 E8 A4 F2 F10 H2 H10 J8 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 B3 B9 C10 D2 D10 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQS DQS A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10 NC_S4 A1 A11 N1 N11 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 B10 C2 E3 E10 C756 0.1uF VDD_8 VDD_9 C751 C761 0.1uF 0.1uF A3 A10 D8 G3 G9 K2 K10 M2 M10 C760 0.1uF C746 C723 0.1uF 0.1uF C758 0.1uF ZQ 240 1% H9 R739 VCC1.5V_MAIN VREFDQ E2

E2 VREFDQ R720 240 1% A3 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 A10 D8 G3 G9 K2 K10 M2 M10 C706 C707 C708 C709 C710 C711 C712 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VCC1.5V_MAIN

0.1uF

1%

R723

C728

R731

ZQ

1%

H9

1000pF

C724

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2

D15 F17 A17

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2 R700 R701 0 0

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2 M0_DDR_CLK M0_DDR_CLKN M0_DDR_CKE

J3 K9 J4 F8 G8 G10 H3 CK CK CKE CS BA0 BA1 BA2

VDD_9

VCC1.5V_MAIN B10 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 C2 R724 E3 E10 1K 1%

VCC1.5V_MAIN M0_1_DDR_VREFDQ R732 1K 1%

C732

C747

1K

1K

M0_DDR_BA1 M0_DDR_BA2 M0_DDR_CLK M0_DDR_CLKN M0_DDR_CKE

M0_DDR_CLK M0_DDR_CLKN M0_DDR_CKE

A18 F15 F21

M0_DDR_VREFDQ

M0_DDR_ODT M0_DDR_RASN M0_DDR_CASN M0_DDR_WEN

D22 E21 D21 E19

0.1uF

M0_DDR_WEN M0_DDR_RESET_N

R706 200 M0_DDR_CLKN

M0_DDR_RASN M0_DDR_CASN M0_DDR_WEN M0_DDR_RESET_N

R733

F4 G4 H4 N3

R725

M0_DDR_ODT

1%

M0_DDR_CASN

1%

M0_DDR_CLK

G2

1000pF

M0_DDR_RASN

ODT RAS CAS WE NC_S1 RESET NC_S2 NC_S3 NC_S4 DQS DQS A1 A11 N1 N11

M0_DDR_ODT M0_DDR_RASN M0_DDR_CASN M0_DDR_WEN M0_DDR_RESET_N

G2 F4 G4 H4

C729

C725

M0_DDR_RESET_N B20 M0_DDR_DQSL_P M0_DDR_DQSL_N B16 M0_DDR_DQSU_P M0_DDR_DQSU_N C19 M0_DDR_DML M0_DDR_DMU C20 M0_DDR_DQ0 M0_DDR_DQ1 M0_DDR_DQ2 M0_DDR_DQ3 M0_DDR_DQ4 M0_DDR_DQ5 M0_DDR_DQ6 M0_DDR_DQ7 M0_DDR_DQ8 M0_DDR_DQ9 M0_DDR_DQ10 M0_DDR_DQ11 M0_DDR_DQ12 M0_DDR_DQ13 M0_DDR_DQ14 M0_DDR_DQ15 M0_DDR_ZQCAL B19 C21 B18 A21 C18 B21 A19 B17 C14 A16 B14 B15 A14 C17 A15 E22 SIGN50005 C15 C16 A20

M0_DDR_DQSL_P M0_DDR_DQSL_N M0_DDR_DQSU_P M0_DDR_DQSU_N M0_DDR_DML M0_DDR_DMU M0_DDR_DQ0 M0_DDR_DQ1 M0_DDR_DQ2 M0_DDR_DQ3 M0_DDR_DQ4 M0_DDR_DQ5 M0_DDR_DQ6 M0_DDR_DQ7 M0_DDR_DQ8 M0_DDR_DQ9 M0_DDR_DQ10 M0_DDR_DQ11 M0_DDR_DQ12 M0_DDR_DQ13 M0_DDR_DQ14 M0_DDR_DQ15 R704 240 1%

M0_DDR_DQSL_P M0_DDR_DQSL_N M0_DDR_CKE R742 10K M0_DDR_DML

C4 D4 B8 A8 DM/TDQS NF/TDQS

A2 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 B3 VSSQ_1 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 B9 C10 D2 D10 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10

C733

C748

1K

1K

M0_DDR_DMU

M0_DDR_DQ0 M0_DDR_DQ1 M0_DDR_DQ6 M0_DDR_DQ7 M0_DDR_DQ4 M0_DDR_DQ3 M0_DDR_DQ2 M0_DDR_DQ5

B4 C8 C3 C9 E4 E9 D3 E8 A4 F2 F10 H2 H10 J8

IC100 LG1152D-B1
M1_DDR_A0 M1_DDR_A0 M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8 M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 M1_DDR_CLK E12 M1_DDR_BA0 M1_DDR_BA1 M1_DDR_BA2 M1_DDR_CLK M1_DDR_CLKN M1_DDR_CKE D13 M1_DDR_ODT M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN F11 M1_DDR_RESET_N C12 M1_DDR_DQSL_P M1_DDR_DQSL_N A7 M1_DDR_DQSU_P M1_DDR_DQSU_N A11 M1_DDR_DML M1_DDR_DMU A12 M1_DDR_DQ0 M1_DDR_DQ1 M1_DDR_DQ2 M1_DDR_DQ3 M1_DDR_DQ4 M1_DDR_DQ5 M1_DDR_DQ6 M1_DDR_DQ7 M1_DDR_DQ8 M1_DDR_DQ9 M1_DDR_DQ10 M1_DDR_DQ11 M1_DDR_DQ12 M1_DDR_DQ13 M1_DDR_DQ14 M1_DDR_DQ15 B11 A13 C10 B12 A10 B13 B10 A8 B4 C8 B5 B6 A5 B8 A6 C6 B7 C11 C13 E13 D12 A9 R702 B9 R703 D7 0 0 F7 D9 M1_DDR_BA0 M1_DDR_BA1 M1_DDR_BA2 M1_DDR_CLKN M1_DDR_CLK M1_DDR_CLKN M1_DDR_CKE M1_DDR_ODT M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN M1_DDR_RESET_N M1_DDR_DQSL_P M1_DDR_DQSL_N M1_DDR_DQSL_P M1_DDR_DQSU_P M1_DDR_DQSU_N M1_DDR_DML M1_DDR_DMU M1_DDR_DQ0 M1_DDR_DQ1 M1_DDR_DQ2 M1_DDR_DQ3 M1_DDR_DQ4 M1_DDR_DQ5 M1_DDR_DQ6 M1_DDR_DQ7 M1_DDR_DQ8 M1_DDR_DQ9 M1_DDR_DQ10 M1_DDR_DQ11 M1_DDR_DQ12 M1_DDR_DQ13 M1_DDR_DQ14 M1_DDR_DQ15 A4 F2 F10 H2 H10 J8 M1_DDR_DQ0 M1_DDR_DQ1 M1_DDR_DQ6 M1_DDR_DQ7 M1_DDR_DQ4 M1_DDR_DQ3 M1_DDR_DQ2 M1_DDR_DQ5 B4 C8 C3 C9 E4 E9 D3 E8 R741 10K M1_DDR_CKE M1_DDR_DML B8 A8 M1_DDR_DQSL_N C4 D4 R708 200 M1_DDR_CLKN M1_DDR_RESET_N M1_DDR_CLK M1_DDR_CLKN M1_DDR_CKE R707 200 M1_DDR_BA0 M1_DDR_BA1 M1_DDR_BA2 J3 K9 J4 F8 G8 G10 H3 M1_DDR_RESET_N R710 10K VCC1.5V_MAIN M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8 M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8

IC701 H5TQ2G83BFR-PBC DDR3 2Gbit

M1_DDR_VREFCA VCC1.5V_MAIN M1_DDR_VREFDQ J9 VCC1.5V_MAIN M1_1_DDR_VREFCA R734 1K 1% K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8

IC704 H5TQ2G83BFR-PBC DDR3 2Gbit

M1_1_DDR_VREFCA

M1_1_DDR_VREFDQ M1_DDR_A0 M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 0.1uF 1000pF M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8 M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 J9 VREFCA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 M1_DDR_BA0 J3 K9 J4 F8 G8 G10 H3 0.1uF 1000pF CK CK CKE CS ODT RAS CAS WE N3 RESET NC_S1 NC_S2 NC_S3 M1_DDR_DQSU_P M1_DDR_DQSU_N C4 D4 B8 A8 DM/TDQS NF/TDQS VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 M1_DDR_DQ10 M1_DDR_DQ13 M1_DDR_DQ14 M1_DDR_DQ11 M1_DDR_DQ15 M1_DDR_DQ9 M1_DDR_DQ8 M1_DDR_DQ12 B4 C8 C3 C9 E4 E9 D3 E8 A4 F2 F10 H2 H10 J8 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 B3 B9 C10 D2 D10 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQS DQS A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10 NC_S4 A1 A11 N1 N11 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 B10 C2 E3 E10 C759 0.1uF C745 0.1uF VDD_8 VDD_9 A3 A10 D8 G3 G9 K2 K10 M2 M10 C755 0.1uF C754 0.1uF C752 C753 0.1uF 0.1uF C757 0.1uF ZQ 240 1% H9 R740 VCC1.5V_MAIN VREFDQ E2

C9 M1_DDR_A0 M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8 M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 E9 F10 F12 F8 D11 E8 E11 E7 D10 C4 C5 D8 E10 C7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14

VREFCA R726 1K 1%

M1_DDR_VREFCA

E2 VREFDQ R721 240 1% A3 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 A10 D8 G3 G9 K2 K10 M2 M10 C713 C714 C715 C716 C717 C718 C719 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VCC1.5V_MAIN

0.1uF

1%

R727

C730

R735

ZQ

1%

H9

1000pF

C726

BA0 BA1 BA2

VDD_9

VCC1.5V_MAIN B10 VDDQ_1 C2 R728 E3 E10 1K 1% VDDQ_2 VDDQ_3 VDDQ_4

VCC1.5V_MAIN M1_1_DDR_VREFDQ R736 1K 1%

C734

C749

1K

1K

M1_DDR_BA1 M1_DDR_BA2 M1_DDR_CLK M1_DDR_CLKN M1_DDR_CKE

M1_DDR_VREFDQ

CK CK CKE CS

0.1uF

1%

1%

M1_DDR_CLK

R737

M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN

F4 G4 H4 N3

R729

M1_DDR_ODT

G2

1000pF

ODT RAS CAS WE NC_S1 RESET NC_S2 NC_S3 NC_S4 DQS DQS A2 DM/TDQS NF/TDQS VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VSSQ_1 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 B3 B9 C10 D2 D10 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10 A1 A11 N1 N11

M1_DDR_ODT M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN M1_DDR_RESET_N

G2 F4 G4 H4

C731

C727

C735

C750

1K

1K

M1_DDR_DMU

IC702 H5TQ1G63DFR-PBC
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 R743 R714 10K 10K M2_DDR_BA0 M2_DDR_BA1 M2_DDR_BA2 M2_DDR_RESET_N M2_CLK M2_CLKN M2_DDR_CKE M2 N8 M3 J7 K7 K9 L2 M2_DDR_ODT M2_DDR_RASN M2_DDR_CASN M2_CLKN M2_DDR_WEN M2_DDR_RESET_N K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 DQSL DQSL C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8

M2_DDR_VREFCA

IC100 LG1152D-B1

M2_DDR_A0 M2_DDR_A1 M2_DDR_A2 M2_DDR_A3 D1 M2_DDR_A4 M2_DDR_A5 M2_DDR_A6 M2_DDR_A7 M2_DDR_A8 M2_DDR_A9 M2_DDR_A10 M2_DDR_A11 M2_DDR_A12 M2_DDR_A13 VCC1.5V_DE M2_DDR_CKE

M2_DDR_VREFDQ

M2_DDR_A0 M2_DDR_A1 M2_DDR_A2 M2_DDR_A3 M2_DDR_A4 M2_DDR_A5 M2_DDR_A6 M2_DDR_A7 M2_DDR_A8 M2_DDR_A9 M2_DDR_A10 M2_DDR_A11 M2_DDR_A12 M2_DDR_A13

K4 D2 E5 H6 E4 J4 D6 J5 D3 H4 J6 K5 D4

M2_DDR_A0 M2_DDR_A1 M2_DDR_A2 M2_DDR_A3 M2_DDR_A4 M2_DDR_A5 M2_DDR_A6 M2_DDR_A7 M2_DDR_A8 M2_DDR_A9 M2_DDR_A10 M2_DDR_A11 M2_DDR_A12 M2_DDR_A13

R738 SIGN50000 VCC1.5V_DE

240

C705 C720 C721

0.1uF 0.1uF 0.1uF

E6 M2_DDR_BA0 M2_DDR_BA1 M2_DDR_BA2 M2 M2_DDR_CLK M2_DDR_CLKN M2_DDR_CKE F6 M2_DDR_ODT M2_DDR_RASN M2_DDR_CASN M2_DDR_WEN D5 M2_DDR_RESET_N H3 M2_DDR_DQSU_P M2_DDR_DQSU_N H1 M2_DDR_DQSL_P M2_DDR_DQSL_N K3 M2_DDR_DML M2_DDR_DMU F1 M2_DDR_DQ0 M2_DDR_DQ1 M2_DDR_DQ2 M2_DDR_DQ3 M2_DDR_DQ4 M2_DDR_DQ5 M2_DDR_DQ6 M2_DDR_DQ7 M2_DDR_DQ8 M2_DDR_DQ9 M2_DDR_DQ10 M2_DDR_DQ11 M2_DDR_DQ12 M2_DDR_DQ13 M2_DDR_DQ14 M2_DDR_DQ15 M2_DDR_ZQCAL L1 E3 L2 E1 M1 E2 L3 J3 G1 K2 F3 J2 G2 K1 G3 K6 F2 H2 J1 G5 G4 F5 M3 G6 H5 F4

M2_DDR_BA0 M2_DDR_BA1 M2_DDR_BA2 M2_DDR_CLK M2_DDR_CLKN M2_DDR_CKE M2_DDR_ODT M2_DDR_RASN M2_DDR_CASN M2_DDR_WEN M2_DDR_RESET_N R715 150

C736 C737 C738 C739 C740 C741 C742 C743 C744

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 10V

M2_CLK

M2_DDR_DQSL_P M2_DDR_DQSU_P M2_DDR_DQSU_N M2_DDR_DQSL_P M2_DDR_DQSL_N M2_DDR_DML M2_DDR_DML M2_DDR_DMU M2_DDR_DQ0 M2_DDR_DQ0 M2_DDR_DQ1 M2_DDR_DQ2 M2_DDR_DQ3 M2_DDR_DQ4 M2_DDR_DQ5 R712 1K 1% M2_DDR_DQ6 M2_DDR_DQ7 M2_DDR_DQ8 M2_DDR_DQ9 0.1uF 1000pF 0.1uF 1000pF 1% 1% M2_DDR_DQ10 R713 M2_DDR_DQ11 M2_DDR_DQ12 M2_DDR_DQ13 M2_DDR_DQ14 M2_DDR_DQ15 R711 240 1% R719 M2_DDR_VREFCA R718 1K 1% M2_DDR_VREFDQ VCC1.5V_DE VCC1.5V_DE M2_DDR_DQ1 M2_DDR_DQ2 M2_DDR_DQ3 M2_DDR_DQ4 M2_DDR_DQ5 M2_DDR_DQ6 M2_DDR_DQ7 M2_DDR_DQ8 M2_DDR_DQ9 M2_DDR_DQ10 M2_DDR_DQ11 M2_DDR_DQ12 M2_DDR_DQ13 M2_DDR_DQ14 M2_DDR_DQ15 M2_DDR_DMU M2_DDR_CLK M2_DDR_CLKN R716 R717 0 0 M2_CLK M2_CLKN M2_DDR_DQSU_P M2_DDR_DQSU_N M2_DDR_DQSL_N

F3 G3

C701

C700

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C702

C703

1K

1K

DDR3 1.5V bypass Cap - Place these caps near Memory

C722 C704

0.1uF 0.1uF

LG1152 B0 MAIN DDR 4 50

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+5V_CI_ON

CI HOST I/F

C6200 0.1uF CI

C6201 10uF 10V CI

5V <=> 3.3V
R6208 10K OPT R6209 10K OPT CI_DATA[0-7] +3.3V_NORMAL P6200 10067972-000LF CI GND 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 G2 69 G1 B WE=>OE CI_IN_TS_VAL CI_IN_TS_CLK CI_IN_TS_SYNC IOWE=>IORD /PCM_IORD GND 3 4 Y DIR /PCM_OE A 2 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 GND DAT3 DAT4 DAT5 DAT6 DAT6 /CARD_EN1 ADDR10 /O_EN ADDR11 ADDR10 ADDR8 ADDR13 ADDR14 /WR_EN /IRQA VCC VPP TS_IN_VAL TS_IN_CLK ADDR12 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 DAT0 DAT1 DAT2 /IO_BIT GND R6217 OPT 10K IC905 74LVC1G00GW CI 0.1uF C903 CI_DATA[0] CI_DATA[1] CI_DATA[2] +3.3V_NORMAL +5V_CI_ON CI_ADDR[12] CI_ADDR[7] CI_ADDR[6] CI_ADDR[5] CI_ADDR[4] CI_ADDR[3] CI_ADDR[2] CI_ADDR[1] CI_ADDR[0] CI_ADDR[12] CI_ADDR[7] CI_ADDR[6] CI_ADDR[5] CI_ADDR[4] CI_ADDR[3] CI_ADDR[2] CI_ADDR[1] CI_ADDR[0] EB_DATA[0-7] CI_DATA[0-7] GND 10 11 B7 EB_DATA[7] A7 9 12 B6 EB_DATA[6] R6216 0 OPT C6205 0.1uF CI CI R6243 C6206 0.1uF 16V 22 OPT CI_ADDR[11] CI_ADDR[9] CI_ADDR[8] CI_ADDR[13] CI_ADDR[14] CI_ADDR[11] CI_ADDR[9] CI_ADDR[8] CI_ADDR[13] CI_ADDR[14] R6244 10K CI R6246 10K OPT /PCM_WE /PCM_IRQA CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] A6 A5 7 14 B4 EB_DATA[4] 33 CI AR910 +5V_CI_ON R6219 10K OPT CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] CI R6224 22 CI_ADDR[10] CI_ADDR[10] +5V_CI_ON CI_DATA[0-7] CI AR909 DIR 1 20 VCC /PCM_CE1 DIR

+5V_CI_ON

/CI_CD1 CI_TS_DATA[3] CI_TS_DATA[4]

R6214

C904

100 /CI_DET1 CI TS_OUT3 TS_OUT4 TS_OUT5 TS_OUT6 TS_OUT7 CARD_EN2

0.1uF

IC904 74LVC245A

0 OPT R913

CI

16V

R6204 10K OPT /PCM_IORD /PCM_IOWR CI_IN_TS_DATA[0-7]

R6206 10K OPT

CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7] /PCM_CE2 CI_VS1 R6249 0 OPT

VS1 IORD IOWR TS_IN_SYN

R6245 10K OPT /PCM_OE

CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3]

33

A0

19

OE /PCM_CE1 B0 EB_DATA[0]

A1

18

A2

17

B1

EB_DATA[1]

CI_IN_TS_DATA[0] CI_IN_TS_DATA[1] CI_IN_TS_DATA[2] CI_IN_TS_DATA[3] +5V_CI_ON CI_IN_TS_DATA[4] CI_IN_TS_DATA[5] R6211 10K OPT PCM_RST /PCM_WAIT PCM_INPACK R6202 R6203 R6200 22 CI 22 CI 22 OPT /PCM_REG CI_TS_VAL CI_TS_SYNC CI_TS_DATA[0] CI_VS1 PCM_INPACK /PCM_CE2 R6210 0 OPT CI_TS_DATA[1] CI_TS_DATA[2] /CI_CD2 R6212 R6205 10K OPT R6207 10K CI CI_IN_TS_DATA[6] CI_IN_TS_DATA[7] CI_TS_CLK R6213 0 OPT

TS_IN0 TS_IN1 TS_IN2 TS_IN3 VCC VPP TS_IN4 TS_IN5 TS_IN6 TS_IN7 TS_OUT_CLK CI_RESET CI_WAIT INPACK REG 0 CI TS_OUT_VAL TS_OUT_SYN TS_OUT0 TS_OUT1 TS_OUT2 R6215 CI 100 /CI_DET2 GND

A3

16

B2

EB_DATA[2]

A4

CI

15

B3

EB_DATA[3] EB_DATA[0-7]

13

B5

EB_DATA[5]

VCC

16V

CI
AND GATE => NAND GATE

TPO_DATA[0-7] TPO_DATA[0] TPO_DATA[1] TPO_DATA[2] TPO_DATA[3] TPO_DATA[4] TPO_DATA[5] TPO_DATA[6] TPO_DATA[7]

CI AR904

33 CI_IN_TS_DATA[0] CI_IN_TS_DATA[1] CI_IN_TS_DATA[2] CI_IN_TS_DATA[3] CI_IN_TS_DATA[4] CI_IN_TS_DATA[5] CI_IN_TS_DATA[6] CI_IN_TS_DATA[7] AR905 CI 33

CI_ADDR[0] CI_ADDR[1] CI_ADDR[2] CI_ADDR[3]

33

CI AR911 EB_ADDR[0] EB_ADDR[1] EB_ADDR[2] EB_ADDR[3] CI AR912 EB_ADDR[4] EB_ADDR[5] EB_ADDR[6] EB_ADDR[7] /PCM_OE /PCM_WE /PCM_IORD /PCM_IOWR CI_ADDR[12] CI_ADDR[13] CI_ADDR[14] /PCM_REG

33

CI AR915 EB_ADDR[12] EB_ADDR[13] EB_ADDR[14] CAM_REG_N

CI_ADDR[4] CI_ADDR[5] CI_ADDR[6] CI_ADDR[7]

33

33

CI AR914 EB_OE_N EB_WE_N EB_BE_N1 EB_BE_N0

TPO_CLK TPO_SOP TPO_VAL TPO_ERR

33

CI AR903 CI_IN_TS_CLK CI_IN_TS_SYNC CI_IN_TS_VAL CI_ADDR[8] CI_ADDR[9] CI_ADDR[10] CI_ADDR[11] 33

CI AR913 EB_ADDR[8] EB_ADDR[9] EB_ADDR[10] EB_ADDR[11]

BUFFER FOR 5V => 3.3V


IC903 74LVC16244ADGG +5V_NORMAL 2OE 1A0 R915 CI R916 CI /PCM_WAIT 1A1 10K /PCM_IRQA GND_8 1A2 /CI_CD2 1A3 /CI_CD1 VCC_4 CI C905 0.1uF 16V CI C906 0.1uF 16V PCM_INPACK CI_TS_CLK CI_TS_VAL CI_TS_SYNC 100 GND_7 2A2 2A3 3A0 AR920 CI CI_TS_DATA[7] CI_TS_DATA[6] CI_TS_DATA[5] CI_TS_DATA[4] 100 GND_6 3A2 3A3 VCC_3 4A0 AR919 CI CI_TS_DATA[3] CI_TS_DATA[2] CI_TS_DATA[1] CI_TS_DATA[0] 100 GND_5 4A2 4A3 3OE 4A1 3A1 2A0 AR921 CI 2A1 1OE 1Y0 1Y1 GND_1 1Y2 1Y3 VCC_1 2Y0

+3.3V_NORMAL

CI

16V

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

1 2 3 4 5 6 7 8 9 10 11 12

0.1uF

C900

CAM_WAIT_N CAM_IREQ_N

10K

CAM_CD2_N CAM_CD1_N TPI_CLK CAM_INPACK_N TPI_VAL

2Y1 GND_2 2Y2 2Y3 3Y0

CI AR918 75

TPI_SOP

CI

13 14 15 16 17 18 19 20 21 22 23 24

TPI_DATA[7] 3Y1 GND_3 3Y2 3Y4 TPI_DATA[4] VCC_2 4Y0 4Y1 GND_4 4Y2 4Y3 TPI_DATA[0] 4OE TPI_DATA[6] TPI_DATA[5]

75 CI AR917
TPI_DATA[3] TPI_DATA[2] TPI_DATA[1]

AR916 75

CI

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+3.5V_ST MMBT3906(NXP)

+12V

PANEL_POWER
TYP 1450mA

Power_DET
+12V +3.5V_ST R2373 100K +3.5V_ST PANEL_VCC PD_+12V R2362 2.7K 1% PD_+3.5V R2366 0 5% VCC IC2307 NCP803SN293 RESET R2376 10K OPT POWER_DET

L2311 CIS21J121 C2328 0.1uF 50V Q2305 AO3407A S D R2343 33K C2339 OPT 1uF 25V

10K R2306

RL_ON

Q2301

R2305 10K

C2326 0.01uF 50V OPT P2301 FW20020-24S +24V PWR ON 1 24V 3 GND 2 4 6 8 10 12 14 16 18 20 22 24 24V 24V GND GND 3.5V 3.5V GND GND/V-sync INV ON A.DIM P.DIM1 Err OUT LPB R2302 100 L/DIM0_VS A_DIM PWM_DIM C2317 0.1uF 50V L2305 CIS21J121

3 1 GND

C2332 10uF 16V

C2335 0.1uF 50V OPT

+3.5V_ST

L2303 BLM18SG121TN1D C2307 0.1uF 16V CIS21J121

5 7 9 11 13 15 17 19 21 23

GND 3.5V 3.5V GND GND 12V 12V 12V GND/P.DIM2

+3.3V_NORMAL R2330 1K R2312 100 PANEL_CTL INV_CTL R2341 10K

R2344 5.6K

C2346 0.1uF 50V

PD_+12V R2363 1.2K 1%

C2359 0.1uF 16V

C2365 0.1uF 16V

C B Q2304 MMBT3904(NXP) E

+24V

PD_24V R2372 100K not to RESET at 8kV ESD PD_24V IC2308 NCP803SN293 VCC RESET

+12V

C2306 0.1uF 50V

L2302

PD_24V R2364 8.2K 1%

3 1 GND

25 SMAW200-H24S2 P2300 PWM_DIM2

PD_24V R2365 1.5K 1%

C2360 0.1uF 16V PD_24V

24V-->3.48V 12V-->3.58V ST_3.5V-->3.5V

1
+12V

+5V_Normal
MAX 1A
+5V_NORMAL

ERROR_OUT R2304 0

L2310 BLM18PG121SN1D

4
+12V

+1.0V_VDD
LG1152 Max: 1728 mA LG1132 Max: 2000 mA
[EP]PGND IC2306 TPS54425PWPR URSA5 R2322-*1 24K VO 1%

C2322 10uF 16V

POWER_ON/OFF1

R2301 10K

eMMC POWER
+3.3V_NORMAL 3.3V_EMMC +1.8V_NORMAL EMMC_VCCQ

Tuner 1.25V REG Input


+3.3V_TU_IN +3.3V_TU

IC2304 TPS54327DDAR [EP]GND


EN VIN

L2309 BLM18PG121SN1D

POWER_ON/OFF2_1 OPT R2348 10K VIN2 14 THERMAL 15 1

1 THERMAL

R2
VFB R2322 22K 1% FRC3 C2318 1uF 10V

R1

1% R2308

VFB

VBST

C2345 0.1uF 16V L2313 6.8uH NR8040T4R7N C2354 10uF 16V

VIN1

13

L2319 BLM18PG121SN1D

L2306 BLM18PG121SN1D

56K L2314 BLM18PG121SN1D C2376 22uF 10V SAMSUNG_eMMC C2334 100pF 50V

VREG5

SW

VBST

12

VREG5

SS R2311 10K 1%

C2371 0.1uF 16V

C2372 0.1uF 16V

3A

GND

C2343 22uF 10V

SW2 C2303 0.1uF 50V

4A
11 4 10 5

SS

R1
SW1 GND R2309 100K C2319 3300pF 50V R2313 9.1K 1%

OPT C2321 22pF 50V

R2

C2336 1uF 10V

C2342 2200pF 50V

PGND2

PG

+1.0VDC EN R2310 C2305 0.1uF OPT 10K POWER_ON/OFF2_3 L2316 2uH

Switching freq: 700K

Vout=0.765*(1+R1/R2)

PGND1

3. soft start

+1.8V
+3.5V_ST

293 mA

IC2300 AP7173-SPG-13 HF(DIODES)


[EP]

+2.5V
IC2303 AP7173-SPG-13 HF(DIODES)
+3.3V_NORMAL [EP]

C2368 22uF 10V +2.5V_NORMAL

C2369 22uF 10V

+1.8V_NORMAL

L2301 BLM18PG121SN1D IN 1 THERMAL 8 OUT

700 mA

Vout=0.765*(1+R1/R2)

IN FB 1% 1/16W 3.9K R2321 R2314 3K 1% C2308 2200pF 50V R2315 100 1%

C2301 4.7uF 10V

PG

VCC R2300 10K POWER_ON/OFF1

SS

C2313 10uF 10V

C2315 0.1uF 16V

+5V_NORMAL VCC R2334 10K C2324 10uF 10V

PG

THERMAL

R1

OUT

FB R2347 4.3K R1 1% C2331 2200pF 50V

4
C2340 10uF 10V C2344 0.1uF 16V

SS

EN

GND

R2
POWER_ON/OFF2_2

1.5A
EN 4 5 GND R2346 2K 1% R2

1.5A

Vout=0.8*(1+R1/R2) Vout=0.8*(1+R1/R2)
2 4
+12V R2377 100K RT/CLK

IC2305 EAN62348501
[EP]GND

Max 5926 mA

GND_1

15

L2315

1/16W 5%

THERMAL

DDR MAIN 1.5V


1074 mA
10K R2339 POWER_ON/OFF2_3 C2325 0.1uF 16V EP[GND] +0.9V_VDD

14

PWRGD C2349 0.1uF 16V +0.9V_VDD

13

BOOT

+3.3V_NORMAL

MAX

4.7 A

GND_2

12

PH_2

L2317 1uH

PVIN_1 C2327 0.1uF 16V C2347 10uF 16V R2378 6.8K 1/16W 1%

11

PH_1

+3.3V_NORMAL +3.5V_ST

C2350 22uF 10V

C2363 22uF 10V

OPT C2370 10uF 10V

+1.5V_DDR C2375 180pF 50V

PVIN_2

10

EN

CIS21J121 L2318

VIN_3

PWRGD

CIS21J121 L2307

BOOT

OPT

EN

+12V L2304 2uH


[EP]LX

L2308

R1
FRC3

VIN

SS/TR

R2379 12K

1/16W 1%

R2319

PGND

1 THERMAL

NC_2

1.5K 1%

Placed on SMD-TOP

R2382 30K

47K 1%

VSENSE

COMP

RT/CLK

AGND

6A

URSA5

R2379-*1 15K

R2342 1/16W 330K 5% R2340 15K C2330 4700pF 50V

R1

ADUC 20S 02 010L D2350

C2310 0.1uF 16V

1%

R2318 10K

POWER_ON/OFF2_1

R2320 10K

1/16W 1%

URSA5

R2

1/16W

5%

R2

Vout=0.6*(1+R1/R2) 3A $ 0.145 Vout=0.827*(1+R1/R2)=1.521V


R2350 56K 1/16W 1%

Switching freq: 400 ~ 580 Khz

Vout=0.8*(1+R1/R2) THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LG1152

POWER
LGE Internal Use Only

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

R2381 0

1/16W 5%

FB

COMP

C2338 100pF 50V

4700pF

R2349

47pF

0.01uF 50V

1/16W 1%

C2300 10uF 16V

C2304 10uF 16V

C2309 0.1uF 16V OPT

R2317 20K

1/16W 1%

C2348

AGND

EN

GND_2

3A

SS/TR

C2373

C2311 2200pF 50V

C2329

R2378-*1 8.2K

FRC3

50V

50V

VIN

NC_1

OPT R23160

C2312 10uF 10V

C2314 10uF 10V

C2316 10uF 10V

C2352 10uF 10V

C2353 3300pF 50V OPT

R1

C2320 10uF 10V

2 3

11

GND_1

IC2302 10 TPS54319TRE 9

PH_1

C2333 22uF 10V

C2337 22uF 10V

C2341 0.1uF 16V

R2

22000pF

*NOTE 17

VIN_2

THERMAL 17

PH_2

NR8040T3R6N

C2302 4.7uF 16V

R2307

12

C2374

L2300 BLM18PG121SN1D

IC2301 AOZ1038PI

VIN_1

PH_3

50V

L2312 3.6uH

VSENSE

16

15

14

13

COMP

R2357

1K POWER_ON/OFF2_3

1.3K

Renesas MICOM
For Debug
FLG_POD_DR

+3.3V_NORMAL

R3035 4.7K OPT 12V_EXT_PWR_DET 10K

HDMI_WAUP:HDMI_INIT

8pF

POD_WAKEUP_N MICOM_DEBUG R3011 10K R3014 1K /RST_DIIVA

8pF

P3000
12507WS-12L

POD_WAKEUP_N FLG_POD_DR MICOM_DIIVA R3001 22 MICOM_DIIVA R3002 22

X3000 32.768KHz R3023 4.7M OPT

MICOM_RESET

/RST_DIIVA

LOGO_LIGHT

MICOM_DEBUG

MICOM_DEBUG

Dont remove R3014, Not making P40 floated

LOGO_LIGHT

C3002

C3003

for DiiVA
3 4

MICOM_DIIVA R3025 22

R3026

10K

MICOM_DEBUG

R3000 +3.5V_ST

+3.5V_ST

MICOM_RESET

+3.5V_ST

GND
22

MICOM_RESET_SW SW3000 JTP-1127WEM 2 1 EXT_AMP_MUTE 4 3 EXT_AMP_RESET COMMERCIAL_12V_CTL 270K OPT

11

P124/XT2/EXCLKS

0.47uF

P122/X2/EXCLK

13

C3001

C3000 0.1uF

P41/TI07/TO07

12

R3024

C3004 0.1uF 16V

R3027

10

P137/INTP0

+3.3V_NORMAL

P120/ANI19

12V_EXT_PWR_DET

P40/TOOL0

P123/XT1

P121/X1

48

47

46

45

44

43

42

41

40

39

38

37

GP4 High/MID Power SEQUENCE


I2C_SCL3

R3032 10K AMP_RESET_BY_MICOM

R3033 10K

RESET

SCART_MUTE

REGC

VDD

VSS

POWER_ON/OFF2_4

P60/SCLA0
POWER_ON/OFF!
I2C_SDA3 R3003 AMP_RESET_N AMP_RESET_BY_MICOM 22

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MICOM

36 35 34 33 32 31 30 29 28 27 26 25

P140/PCLBUZ0/INTP6
RL_ON

+3.3V_NORMAL

P61/SDAA0 P62 P63

P00/TI00/TXD1
SCART_MUTE R3037 10K OPT POWER_ON/OFF2_1

P01/TO00/RXD1 P130

For Japan:LNB_INIT
POWER_ON/OFF2_4

POWER_ON/OFF2_1

PANEL_CTL

P31/TI03/TO03/INTP4
MODEL1_OPT_5

IC3000
R5F100GEAFB

P20/ANI0/AVREFP
KEY2

P75/KR5/INTP9/SCK01/SCL01
POWER_ON/OFF2_2
IR

P21/ANI1/AVREFM
KEY1

P74/KR4/INTP8/SI01/SDA01
HDMI_CEC

P22/ANI2
MODEL1_OPT_2

+3.3V_NORMAL

P73/KR3/SO01
POWER_ON/OFF2_3
POWER_ON/OFF2_3 POWER_ON/OFF2_2

P23/ANI3
MODEL1_OPT_1

P72/KR2/SO21
POWER_ON/OFF2_3

P24/ANI4
MODEL1_OPT_0

R3036 10K OPT SIDE_HP_MUTE

P71/KR1/SI21/SDA21
POWER_ON/OFF2_4
EEPROM_SDA EEPROM_SCL

P25/ANI5 P26/ANI6
MODEL1_OPT_4

P70/KR0/SCK21/SCL21 P30/INTP3/RTC1HZ/SCK11/SCL11

P27/ANI7
MODEL1_OPT_3

SOC_RESET

MODEL1_OPT_6

R3018 3.3K +3.5V_ST

R3019 3.3K

P11/SI00/RXD0/TOOLRXD/SDA00

P15/PCLBUZ1/SCK20/SCL20

P12/SO00/TXD0/TOOLTXD

P50/INTP1/SI11/SDA11

P51/INTP2/SO11

P17/TI02/TO02

P16/TI01/TO01/INTP5

P14/RXD2/SI20/SDA20

P13/TXD2/SO20

P10/SCK00/SCL00
SOC_RX

P146
AMP_MUTE EXT_AMP_MUTE

MICOM MODEL OPTION MICOM MODEL OPTION


+3.5V_ST MODEL_OPT_0 NON LOGO_LIGHT LOGO_LIGHT For LM86

MICOM_OLED_MAIN R3005-*1 56K

MICOM_OLED_FRC R3005-*2 22K

MICOM_LOGO_LIGHT R3012 10K

MICOM_TOUCH_KEY R3007 10K

MICOM_GP4_10PIN R3030 10K

MODEL_OPT_1

NON JAPAN

JAPAN

For JAPAN

MICOM_PDP R3005 10K

MICOM_JAPAN R3009 10K

MICOM_GED R3016 10K

MICOM_MHL R3020 10K

MODEL_OPT_2

TACT_KEY

TOUCH_KEY

MODEL_OPT_3

LCD / OLED

PDP

MODEL1_OPT_1 MODEL1_OPT_2 MODEL1_OPT_3 MODEL1_OPT_4 MODEL1_OPT_5 MODEL1_OPT_6

IR Wafer MODEL_OPT_4 12/15Pin (GP3_Soft touch)

IR Wafer 10Pin (GP4_TOOL) For Sample Set

MODEL_OPT_5

NON_MHL

MHL

GP4_HIGH

MODEL_OPT_6

NON_GED

GED POWER_DET COMMERCIAL_12V_CTL SOC_RESET INV_CTL LED_B/GP4_LED_R EXT_AMP_RESET SOC_TX

MICOM_NON_LOGO_LIGHT R3013 10K

R3022

10K

MODEL1_OPT_0

P147/ANI18

MICOM_GP3_12/15PIN R3031 10K

+3.3V_NORMAL

MICOM_NON_JAPAN R3010 10K

For CEC

MICOM_LCD/OLED R3006 10K

MICOM_NON_GED R3017 10K

MICOM_NON_MHL R3021 10K

MICOM_TACT_KEY R3008 10K

R3034 4.7K OPT

Eye Sensor Option


MODEL_OPT_4

POWER_ON/OFF1 EDID_WP C

+3.5V_ST
Q3000 MMBT3904(NXP) EDID_WP

0
MODEL_OPT_2

1
MC8101_ABOV (TACT_KEY)

E R3029 120K G D3000 CEC_REMOTE BAT54_SUZHO D Q3001 RUE003N02 HDMI_CEC_FET_ROHM Q3001-*1 SI1012CR-T1-GE3 HDMI_CEC_FET_VISHAY S S

0 1

N/A

R3028 27K

CM3231_CAPELLA (GP3 Soft touch)

CM3231_CAPELLA (GP4 Soft touch)

HDMI_CEC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

2011.12.12 MICOM 30

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

AVDD12_3

VDD33_2

TPVDD12

TCVDD12

[EP]GND

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

UD R1XCN R1XCP R1X0N

67

BODY_SHIELD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

VDD12_3

R0X2P

R0X2N

R0X1P

R0X1N

R0X0P

R0X0N

R0XCP

R0XCN

TXCN

TXCP

TX0N

TX0P

TX1N

TX1P

TX2N

TX2P

ARC

66 THERMAL 89 65 64 63 62 61 60

RSVDL SPDIF_IN INT CSCL CSDA RESET_N TPWR GPIO1 GPIO0 CD-SENSE4 CD_SENSE3 GPIO2 CD_SENSE1 CD_SENSE0 WKUP LPSBV PWRMUX_OUT SBVCC5 R5PWR5V[VGA] DSCL5[VGA] DSDA5[VGA] R4PWR5V

5V_HDMI_1 BODY_SHIELD 20 HP_DET 19 18 17 16 15 ARC 14 13 12 EAG62611204 11 10 9 8 7 6 5 4 3 2 1 CE_REMOTE CEC_REMOTE OPT R3248 1K CKCK-_HDMI1 CK_GND CK+ CK+_HDMI1 D0OPT R3249 3.9K D0-_HDMI1 D0_GND D0+ D0+_HDMI1 D1D1-_HDMI1 D1_GND D1+ D1+_HDMI1 D2D2-_HDMI1 D2_GND D2+ D2+_HDMI1 5V HDMI_HPD_1

GND 20 HP_DET 19 18 5V GND DDC_DATA DDC_CLK NC 14 CE_REMOTE

5V_HDMI_4 [EP] HDMI_HPD_4 5V_HDMI_4 FAULT D3206 MBR230LSFT1G DDC_SDA_4 DDC_SCL_4 ILIM0 CEC_REMOTE CK-_HDMI4 CK_GND CK+ CK+_HDMI4 D0D0-_HDMI4 D0_GND D0+ D0+_HDMI4 D1D1-_HDMI4 D1_GND D1+_HDMI4 D2D2-_HDMI4 D2_GND D2+ D2+_HDMI4 D3207 5.6V R3243 1K 1/16W 5% C3223 0.047uF 25V Q3200 MMBT3904(NXP) E C B SPDIF_OUT_ARC D1+ R3246 10K +3.5V_ST 30V OUT_1 8 10 THERMAL 11 1 GND +5V_NORMAL IC3202 TPS2554

R1X0P R1X1N R1X1P R1X2N R1X2P AVDD12_1 VDD12_1 R3XCN R3XCP R3X0N R3X0P R3X1N R3X1P

IC3201-*1 SII9587CNUC-3

59 58 57 56 55 54 53 52 51 50 49 48 47 46 45

GND 17 DDC_DATA DDC_CLK R3207 R3208 0 DDC_SDA_1 0 DDC_SCL_1 15 16

R3222 0 R3223 0

OUT_2

IN_1 C3208 0.1uF

R3X2N R3X2P AVDD12_2 VDD33_1 R4XCN R4XCP

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42 DSDA4

43 DSCL4

R4X0N

R4X0P

R4X1N

R4X1P

R4X2N

R4X2P

DSDA0

DSCL0

DSDA1

DSCL1

DSDA3

VDD12_2

R0PWR5V

R1PWR5V

DSCL3

CBUS_HPD0

CBUS_HPD1

CBUS_HPD3

R3PWR5V

ILIM_SEL 5% 1/16W 220K R3206 5% 1/16W 10K R3245 C

Limit 0.8A

Limit 0.8A

ARC
EAG62611204 C3202 1uF 10V

13 12 11 10 9 8 7 6 5 4 3 2 1

CK-

ILIM1 1/10W 62K R3201

EN

D3204

A1 MHL_DET A2

1/10W

SPDIF_OUT_ARC OPT C3226 0.1uF 16V

62K R3200

OPT

R3247 10K B

E MMBT3906(NXP) Q3201

HDMI1
D1+_HDMI1 D1-_HDMI1 D0+_HDMI1 D0-_HDMI1 D2-_HDMI1 D2+_HDMI1 CK+_HDMI1 CK-_HDMI1 HDMI_CLK-

HDMI S/W OUTPUT


HDMI_RX0HDMI_RX0+ HDMI_RX1HDMI_RX1+ HDMI_RX2HDMI_CLK+ HDMI_RX2+

C MHL_DET

JK3202 51U019S-312HFN-E-R-B-LG

51U019S-312HFN-E-R-B-LG

+5V_NORMAL 5V_HDMI_1

+5V_NORMAL 5V_HDMI_2 L3202 L3203

A1

BODY_SHIELD 20 HP_DET 19 18 17 16 15 14 13 12 EAG62611204 11 10 9 8 7 6 5 4 3 2 1 5V GND DDC_DATA DDC_CLK NC CE_REMOTE

5V_HDMI_2 D3200

A2

A1

D3202

A2

OPT

HDMI1 With ARC

JK3203

R3221 10

HDMI4 With MHL

AVDD12_3

HDMI_HPD_2 R3217 47K R3209 0 R3210 0 DDC_SDA_2 DDC_SCL_1 DDC_SCL_2 +5V_NORMAL 5V_HDMI_3 R3219 47K DDC_SDA_1 R3225 47K

VDD33_2

TPVDD12

TCVDD12

[EP]GND

TXCN

TXCP

TX0N

TX0P

TX1N

TX1P

TX2N

TX2P

R3228 47K DDC_SDA_2 DDC_SCL_2

VDD12_3

R0X2P

R0X2N

R0X1P

R0X1N

R0X0P

R0X0N

R0XCP

R0XCN

C3224 0.1uF 16V

16V 0.1uF C3225

ARC

+3.3V_NORMAL 10K R3202

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

HDMI2
+5V_NORMAL 5V_HDMI_4 +3.5V_ST CK-_HDMI2 CK+_HDMI2

R1XCN R1XCP R1X0N R1X0P R1X1N R1X1P R1X2N R1X2P AVDD12_1 VDD12_1 R3XCN R3XCP R3X0N R3X0P R3X1N R3X1P R3X2N R3X2P AVDD12_2 VDD33_1 R4XCN

67

CEC_REMOTE CKCK-_HDMI2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 THERMAL 89

66 65 64 63 62 61 60

RSVDL SPDIF_IN INT CSCL CSDA RESET_N TPWR GPIO1 GPIO0 CD-SENSE4 CD_SENSE3 GPIO2 CD_SENSE1 CD_SENSE0 WKUP LPSBV PWRMUX_OUT SBVCC5 DSCL5[VGA] DSDA5[VGA] R4PWR5V
C3209 0.1uF 16V R3216 10

OPT R3224 33 R3211 R3236 R3237 R3214 33

SPDIF_OUT HDMI_INT

A1

CK_GND CK+ CK+_HDMI2 D0D0-_HDMI2 D0_GND D0+ D0+_HDMI2 D1D1-_HDMI2 D1_GND D1+ D1+_HDMI2 D2D2-_HDMI2 D2_GND R3218 47K D3201

A2

A1

A2

A1

A2

D0-_HDMI2 D0+_HDMI2

33 I2C_SCL5 33 I2C_SDA5 33 HDMI_S/W_RESET

D3203 C

D3205 C

D1-_HDMI2 D1+_HDMI2

R3220 47K DDC_SDA_3 DDC_SCL_3 R3226 47K R3229 47K DDC_SDA_4 DDC_SCL_4

D2-_HDMI2 D2+_HDMI2

IC3201 SII9587CNUC

59 58 57 56 55 54 53

CBUS_HPD4

44

IN_2

MHL_DET +3.5V_ST +5V_NORMAL 1/16W R3213 5.1K 5%

HDMI3
CK-_HDMI3 CK+_HDMI3

FHD
Device Address : 0XB0

+3.3V_NORMAL

D2+ D2+_HDMI2 D0-_HDMI3 D0+_HDMI3

10K R3203

JK3200 51U019S-312HFN-E-R-B-LG

D1-_HDMI3

52 51 50 49 48 47 46 45

10K R3244

HDMI_WKUP

HDMI2

D1+_HDMI3 +3.3V_NORMAL D2-_HDMI3 L3200 BLM18PG121SN1D D2+_HDMI3

RGB_5V R3242 10

R5PWR5V[VGA]

RGB_DDC_SCL RGB_DDC_SDA C3215 0.1uF 16V C3212 1uF 10V C3218 10uF 10V C3221 1uF 10V C3222 10uF 10V

C3205 10uF 10V BODY_SHIELD 20 HP_DET 19 18 17 16 15 14 13 12 EAG62611204 11 10 9 8 7 6 5 4 3 2 1 5V GND DDC_DATA DDC_CLK NC CE_REMOTE CEC_REMOTE CKCK-_HDMI3 CK_GND CK+ CK+_HDMI3 D0D0-_HDMI3 D0_GND D0+ D0+_HDMI3 D1D1-_HDMI3 D1_GND D1+ D1+_HDMI3 D2D2-_HDMI3 D2_GND D2+ D2+_HDMI3 C3200 10uF 10V R3204 0 R3205 0 DDC_SDA_3 DDC_SCL_3 IN OUT HDMI_HPD_3 5V_HDMI_3

C3210 0.1uF 16V

C3211 0.1uF 16V

R4XCP

VDD12_2

R0PWR5V

R1PWR5V

R3PWR5V

R4X0N

R4X0P

R4X1N

R4X1P

R4X2N

R4X2P

DSDA0

DSCL0

DSDA1

DSCL1

DSDA3

DSCL3

DSDA4

CBUS_HPD0

CBUS_HPD1

CBUS_HPD3

DSCL4

IC3200 AZ1117BH-1.2TRE1
L3201

3 1

BLM18PG121SN1D

CBUS_HPD4

GND/ADJ

C3203 10uF 10V

C3201 10uF 10V

C3206 0.1uF 16V

C3216 10uF 10V

OPT R3215 33 HDMI_WKUP

12V_EXT_PWR_DET

R3212 MHL_DET C3204 0.1uF 16V C3207 0.1uF 16V

33

C3217 0.1uF 16V DDC_SDA_1 DDC_SCL_1 DDC_SDA_2 DDC_SCL_2

D0-_HDMI4

D0+_HDMI4

D1-_HDMI4

D1+_HDMI4

D2-_HDMI4

CK-_HDMI4

CK+_HDMI4

D2+_HDMI4

DDC_SDA_3

DDC_SCL_3

DDC_SDA_4

HDMI_HPD_1

HDMI_HPD_2

HDMI_HPD_3

DDC_SCL_4

Vout=0.8*(1+R1/R2)

HDMI4

HDMI_HPD_4

5V_HDMI_1 R3231 10

5V_HDMI_2 R3232 10

5V_HDMI_3 R3240 10 1/16W R3241 5.1K 5%

5V_HDMI_4 R3238 10 1/16W R3239 5.1K 5%

JK3201 51U019S-312HFN-E-R-B-LG 1/16W R3233 5.1K 5% C3214 1uF 1/16W R3234 5.1K 5% C3220 1uF C3219 1uF

HDMI3 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C3213 1uF

GP4 HDMI

2011.10.19 32

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

RGB/ PC AUDIO/ SPDIF

RGB PC

RGB_5V

RGB_5V

+5V_NORMAL

A1 C A2 MMBD6100 D3620

RGB_EDID

R3641
IC3600 M24C02-RMN6T
E0 VCC

2.7K

R3642 2.7K

R3645 10K

RGB_EDID
E1 2 7 WC

+3.3V_NORMAL EDID_WP R3643 R3644 C3633 18pF 50V C3634 18pF 50V SPDIF_OUT D3613 5.5V ADUC 5S 02 0R5L OPT C3615 0.1uF 16V 22 RGB_DDC_SCL 22 RGB_DDC_SDA R3620 2.7K OPT

JK3602 2F11TC1-EM52-4F VIN A Fiber Optic 4 SHIELD

E2

SCL

VSS

SDA

SPDIF OUT
R3615 33

VCC

GND

DSUB_VSYNC D3615 30V OPT D3621 ADUC 5S 02 0R5L 5.5V OPT

D3613-*1 5.5V ADUC 5S 02 0R5L ESD_MTK

DSUB_HSYNC D3616 30V OPT

D3622 ADUC 5S 02 0R5L 5.5V OPT

RGB_DEBUG R3602 100 DSUB_B+ RGB_DEBUG R3647 100 SOC_TX R3600 0 NON_RGB_DEBUG D3600 20V OPT D3601 20V OPT JK3601 KJA-PH-0-0177 5 4 DSUB_G+ +3.3V_NORMAL 3 R3646 10K DSUB_DET 1 DETECT R D3611 5.6V OPT D3611-*1 ESD_MTK 5.6V GND L SOC_RX

PC AUDIO

R3601 0 NON_RGB_DEBUG

PC_L_IN

DSUB_R+

D3623 5.6V OPT D3612 5.6V OPT D3612-*1 ESD_MTK 5.6V

PC_R_IN

11

12

13

14

10

15

Closed to JACK

11

12

13

14

15

10

JK3603 SLIM-15F-D-2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

16

16

JACK HIGH / MID

2011.11.21 36

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

HP_LOUT +3.3V_NORMAL GND R3700 10K HP_OUT HP_DET L DETECT R

JK3700 KJA-PH-0-0177 5 4 3 1

HP_ROUT VA3700 5.6V OPT

EAG61030001 HP_OUT

ESD for MTK

ESD for LG1152

VA3700-*1 VA3700-*2 5.6V ESD_MTK_HP_OUT 5.6V ESD_LG1152_HP_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JACK_COMMON

2011.11.21 37

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

12V_COMMERCIAL_OUT

12V 1A FOR COMMERCIAL(RS-232C POWER) 12V_COMMERCIAL_OUT

RS232C
9 IR_OUT IC3800 MAX3232CDR +3.5V_ST RS232 100 R3820 8

CVBS 1 PHONE JACK


10 5 +3.3V_NORMAL 4 R3810 10K

3 7 2 6 1 10K RS232 4 SPG09-DB-009 JK3803 3 1 6 M4 AV_JACK_BLACK JK3800 KJA-PH-1-0177 5 M5_GND D3800 5.6V OPT

AV1_CVBS_DET

0.1uF

C3800

C1+

16

VCC

RS232 100 R3821 +3.5V_ST OPT_RS232 R3834

RS232 0.1uF C3801 V+ 2 15 GND D3804 20V OPT D3805 20V OPT

RS232 C13 14 DOUT1

FOR COMMERCIAL RIN1

AV1_CVBS_IN M3_DETECT M1 M6

0.1uF

C3802

C2+

4 RS232

13

RS232 C25

12

ROUT1

0.1uF RS232

C3803

V-

11

DIN1

DOUT2

10

DIN2 AV_JACK_YELLOW ROUT2 SOC_RX JK3800-*1 KJA-PH-1-0177-1 5 M5_GND M4 M3_DETECT M1 AV1_R_IN 6 1 1 M6 D3802 5.6V OPT 2 2 D3801 5.6V OPT SOC_TX 4 UART_4PIN_STRAIGHT +3.5V_ST +3.5V_ST R3811 4.7K OPT R3814 4.7K OPT P3800 12507WS-04L UART_4PIN_ANGLE P3801 12507WR-04L 1 3 AV1_L_IN

RIN2

8 EAN41348201

4 5

4 5

ESD For MTK

ESD For LG1152 D3803-*1 5.6V D3803-*2 5.6V ESD_LG1152

COMPONENT 1 PHONE JACK


+3.3V_NORMAL R3806 10K COMP1_DET

ESD_MTK

D3800-*1 5.6V ESD_MTK

D3800-*2 5.6V ESD_LG1152

D3803 5.6V COMP_JACK_BLACK JK3801 KJA-PH-1-0177 5 4 3 1 6 M5_GND M4 M3_DETECT M1 M6 OPT

D3801-*1 5.6V ESD_MTK

D3801-*2 5.6V ESD_LG1152

D3802-*1 5.6V COMP1_Y ESD_MTK

D3802-*2 5.6V ESD_LG1152

COMP_JACK_GREEN JK3801-*1 KJA-PH-1-0177-2 5 4 3 1 6 M5_GND M4 M3_DETECT M1 M6

COMP1_Pb

COMP1_Pr

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JACK_COMMON

2011.11.21 38

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+3.5V_ST

IR & KEY
R4117 10K 5% R4113 100 KEY1 +3.5V_ST R4114 100 KEY2 C4100 0.1uF +3.5V_ST C4102 0.1uF R4118 10K 5%

RGB Sensor
EEPROM_SCL R4123 100 D4105 ADUC 20S 02 010L 20V OPT R4124 100 D4106 ADUC 20S 02 010L 20V OPT GP4_IR_10P P4102 12507WR-10L

COMMERCIAL +3.5V_ST
R4101 1K IR Q4100 MMBT3904(NXP) COMMERCIAL_IR C B E COMMERCIAL_IR C B Q4101 MMBT3904(NXP) COMMERCIAL_IR E COMMERCIAL_IR R4104 47K COMMERCIAL_IR

EEPROM_SDA D4101 5.6V AMOTECH CO., LTD. OPT

COMMERCIAL_IR R4103 3.3K R4102 10K

R4107 10K

IR_BYPASS

+3.5V_ST

D4100 5.6V AMOTECH CO., LTD. OPT

5 L4100 BLM18PG121SN1D 6

C4104 1000pF 50V

R4125 LED_B/GP4_LED_R

1.5K

8 R4100 0 IR_BYPASS C4107 100pF 50V D4104 5.6V OPT AMOTECH CO., LTD. 10 11 +3.5V_ST COMMERCIAL_IR R4115 3.3K COMMERCIAL_IR_EU R4111 10K B C B Q4104 MMBT3904(NXP) COMMERCIAL_IR E COMMERCIAL_IR R4119 47K

COMMERCIAL

+3.5V_ST

COMMERCIAL_IR_EU R4109 1K R4105 22 IR_OUT COMMERCIAL_IR Q4102 MMBT3904(NXP) COMMERCIAL_IR_EU C E

Soft Touch Micom D/L

R4108 0 COMMERCIAL_IR_US

Zener Diode is close to wafer

ESD for MTK

ESD for LG1152

D4105-*1 ADUC 20S 02 010L 20V 10pF ESD_MTK

D4106-*1 ADUC 20S 02 010L 20V 10pF ESD_MTK D4100-*2 D4100-*1 200pF 5.6V ADMC 5M 02 200L ESD_MTK D4101-*2 D4101-*1 200pF ADMC 5M 02 200L ESD_MTK 5.6V 5.6V 200pF ADMC 5M 02 200L ESD_LG1152 200pF 5.6V ADMC 5M 02 200L ESD_LG1152

D4104-*1 5.6V 200pF ADMC 5M 02 200L ESD_MTK

D4104-*2 5.6V 200pF ADMC 5M 02 200L ESD_LG1152

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IR / KEY

2011.11.21 41

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

USB_DM1

USB_DP1

USB_HUB_IC_IN_DP USB_HUB_IC_IN_DM

SUSP_IND/LOCAL_PWR/NON_REM[0]

1/16W 1%

R4205 1% 1M

R4204

15pF C4205 15pF C4207

X4200 24MHz XTALIN/CLKIN

12K R4206

100K

0.1uF C4208

25V 1uF C4209

USB_DM2

+3.3V_NORMAL

USB_DP2

VDDA33_3

USBDM_UP

USBDP_UP

XTALOUT

PLLFILT

VDD33_3 36 1 2 3

28

29

30

31

32

33

34

R4200 100K /RST_HUB C4200 0.1uF OPT

0.1uF

VBUS_DET RESET_N HS_IND/CFG_SEL[1] SCL/SMBCLK/CFG_SEL[0] VDD33_2

35

C4203 27 26 25 24 23 22 21 20 19

THERMAL 37

[EP]VSS USBDM_DN[1] USBDP_DN[1] USBDM_DN[2] USBDP_DN[2] VDDA33_1 NC_1 NC_2 NC_3 NC_4 C4210 0.1uF OPT C4211 0.1uF OPT C4212 0.1uF OPT C4213 0.1uF C4214 1uF 25V +3.3V_NORMAL 4 5 6 7 8 9

IC4200 USB2512B-AEZG

SDA/SMBDATA/NON_REM[1] NC_8 NC_7 NC_6 100K R4202 100K R4203

USB HUB
18 17 16 15 14 13 12 11 TEST 10

100K R4201

NC_5

OCS_N[2]

CRFILT

OCS_N[1]

RBIAS

PRTPWR[2]/BC_EN[2]

+3.3V_NORMAL

C4201 4.7uF

C4202 0.1uF

100K OPT

OPT R4207 OPT R4208

25V 1uF

22

22

R4209

C4206

PRTPWR[1]/BC_EN[1]

0.1uF C4204

R4210 100K OPT

/USB_OCD2

USB_CTL2

/USB_OCD1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

USB_CTL1

VDDA33_2

VDD33_1

USB3_HUB

2011.06.13 42

LGE Internal Use Only

+3.3V_NORMAL

+5V_USB FOR USB1


MAX 2A
POWER_ON/OFF2_4 R4328 10K C4327 0.1uF 16V +24V 16V 0.1uF C4329 0 R4330 IC4303 TPS2554 D4304-*1 SX34 [EP] R4327 10K OPT R4323 10K

GND 40V L4308 6.8uH

1 THERMAL 11

10

FAULT

IC4305 TPS54331D
PH

IN_1

OUT_2

USB1
C4323 10uF 10V

D4304 SMAB34

L4305 BLM18PG121SN1D

40V

BOOT

IN_2 C4333 22uF 10V C4336 0.1uF 16V /USB_OCD1

OUT_1

VIN C4324 10uF 35V C4326 0.1uF 50V

GND

ILIM_SEL

ILIM0

1%

820 R4343

EN

R4300 27K

OPT R4341 27K

SS/TR 330K R4329 OPT

VSENSE

C4332 47pF 50V

C4334 4700pF 50V R4336 20K

R1
10K R4338 OPT C4338 1000pF 50V 1% USB_DM1

1/10W

1/10W

3A

COMP

EN USB_CTL1

ILIM1

DVR Ready MAX 1.8A


3AU04S-305-ZC-(LG) JK4303 1

C4328 0.01uF 50V

OPT RCLAMP0502BA D4303

USB_DP1

1%

Vout=0.8*(1+R1/R2)

2K R4339

R2

R4332

IC4306
[EP]GND +12V V7V C4341 4.7uF 10V 24 1 EN R4342 10K SN1104041, DC-DC+2CH USB SW

POWER_ON/OFF2_4 10K C4300 0.1uF 16V

+3.3V_NORMAL

OPT R4304 10K

10K

10K

10K

L4306 BLM18PG121SN1D

AGND_3

USB_DCDC_SN1104041

25

23

COMP

5% 3 SS C4342 100pF 50V C4340 4700pF 50V

22

R4301

R4302

C4325 10uF 16V

VIN_1

21

ROSC USB_DCDC_SN1104041 EN_SW2

R4303

OPT

VIN_2

USB_DCDC_SN1104041 C4340-*1 0.01uF 50V USB_DCDC_BD86180

USB2 MAX 1.5A


+5V_USB_2 USB_CTL2 3AU04S-305-ZC-(LG) JK4302 1 OPT RCLAMP0502BA D4302 C4322 10uF 10V 4 3AU04S-305-ZC-(LG) JK4300 1 5 4 P4301 USB_DM3 For EMI 12507WR-04L WIFI USB_DP3 VDD 1 DM USB_CTL3 /USB_OCD3 WIFI_DP GND WIFI_DM DP 2 3 4 5 . 5 /USB_OCD2 USB DOWN STREAM USB DOWN STREAM 3 2 C4310 10uF 10V

PGND_2

20

PGND_1

19

EN_SW1

+5V_USB L4307 3.6uH


DEV_USB_DCDC_BD86180
IC4306-*1 BD86180MUV
EN 1 THERMAL 25 24 [EP]GND

BST C4331 0.1uF 16V

18

NFAULT2 USB_DM2 NFAULT1 USB_DP2 SW_OUT2 +5V_USB_3 2 +5V_USB_3

LX_2

17

VREG

COMP

23

GND_3

C4337 22uF 10V

C4301 22uF 10V

LX_1

16

SS

22

VIN_2

RT

21

VIN_1

SW_IN_3

15

10

AGND_1

CTL2

20

PGND_2

CTL1

19

PGND_1

FLG2

18

BST

SW_IN_2

FLG1

17

SW_2

14

11

AGND_2

+5V_USB_2

USB_OUT2

16

SW_1

GND_1

10

15

USB_IN_3

SW_IN_1

GND_2

11

14

USB_IN_2

13

12

SW_OUT1

USB_OUT1

12

13

USB_IN_1

USB3 MAX 1.5A

ESD for MTK

ESD for LG1152


OPT RCLAMP0502BA D4300

ESD_LG1152 RCLAMP0502BA D4300-*2

ESD_LG1152 RCLAMP0502BA D4302-*1

USB_WIFI
+5V_USB L4302 WIFI 120-ohm BLM18PG121SN1D C4319 0.1uF 16V WIFI C4321 10uF 10V WIFI C4339 10uF 10V WIFI

From SoC
ESD_LG1152 RCLAMP0502BA D4303-*3

C4320 0.1uF 16V WIFI

MAX 0.4A

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB DOWN STREAM

THERMAL

USB3_HUB_WiFi

2011.10.26 43

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL +12V

Full Scart(18 Pin Gender)


D4611 5.6V OPT D4611-*2 5.6V 200pF ESD_LG1152_SCART D4611-*1 5.6V 200pF ESD_MTK_SCART

EU R4601 10K

CLOSE TO JUNCTION

SC_DET EU C4604 0.1uF EU E MMBT3906(NXP) Q4600 B C EU Q4601 EU MMBT3904(NXP) C R4602 390 B EU R4606 47K EU C4607 47uF 25V EU 470 R4605 EU C4606 0.1uF 50V

SC_CVBS_IN D4609 5.5V OPT D4609-*1 5.5V 15pF ESD_MTK_SCART D4609-*2 5.5V 15pF ESD_LG1152_SCART 75 D4610 5.5V OPT EU D4610-*1 5.5V 15pF ESD_MTK_SCART R4600 EU C4605 100uF 16V

E EU R4603 390 Gain=1+Rf/Rg Rf Rg EU R4604 180 EU R4607 15K

SHIELD 19 AV_DET 18 17 16 15 14 13 12 11 10 G_GND 9 ID 8 B_OUT 7 AUDIO_L_IN 6 B_GND 5 AUDIO_GND 4 AUDIO_L_OUT 3 AUDIO_R_IN 2 AUDIO_R_OUT 1 COM_GND SYNC_IN SYNC_OUT SYNC_GND RGB_IO

DTV/MNT_V_OUT

R4608 OPT

SC_FB R_OUT R_GND G_OUT D4601 5.6V OPT D4601-*1 5.6V 200pF ESD_MTK_SCART D4601-*2 5.6V 200pF ESD_LG1152_SCART SC_R D4602 5.5V OPT D4602-*1 5.5V 15pF ESD_MTK_SCART SC_G D4603 5.5V OPT D4603-*1 5.5V 15pF ESD_MTK_SCART

SC_B D4604 5.5V OPT D4604-*1 5.5V 15pF ESD_MTK_SCART

DA1R018H91E JK4600 EU

SC_ID

SC_L_IN D4600 20V OPT D4600-*1 20V 10pF ESD_MTK_SCART D4605 5.6V OPT D4600-*2 20V 10pF ESD_LG1152_SCART D4605-*1 5.6V 200pF ESD_MTK_SCART D4605-*2 5.6V 200pF ESD_LG1152_SCART

SC_R_IN D4606 5.6V OPT D4606-*1 5.6V 200pF ESD_MTK_SCART D4606-*2 5.6V 200pF ESD_LG1152_SCART

BLM18PG121SN1D L4600 D4607 5.6V OPT EU EU C4600 1000pF 50V EU C4602 4700pF DTV/MNT_L_OUT

BLM18PG121SN1D L4601 D4608 5.6V OPT EU EU C4601 1000pF 50V EU C4603 4700pF DTV/MNT_R_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SCART GENDER

2011.10.26 46

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

ZigBee_Radio Pulse M_REMOTE OPTION


+3.3V_NORMAL P4800 12507WR-08L M_REMOTE 1 3.3V C4800 2 GND 0.1uF L4800 120-ohm M_REMOTE

AR4800 100 1/16W


M_REMOTE_RX

RX

TX M_REMOTE_TX RESET M_RFModule_RESET DC M_RFModule_ISP DD 3D_SYNC_RF GND

M_REMOTE

8 9

3D_SYNC_RF Only For PDP

ALL M_REMOTE OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

MOTION REMOTE

2011.11.21 48

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Ethernet Block

LAN_JACK_POWER

C5000 0.1uF 16V JK5000 XRJH-01A-4-DA7-180-LG(B) LAN_XML 1 P1[CT]

C5001 0.01uF 50V

C5002 0.1uF 16V

C5003 0.01uF 50V

P2[TD+] EPHY_TDP P3[TD-] EPHY_TDN P4[RD+] EPHY_RDP P5[RD-] EPHY_RDN P6[CT] D5000 5.5V OPT D5001 5.5V OPT D5002 5.5V OPT D5003 5.5V OPT

P7

P8

P9

10

P10[GND]

11

P11

D1

YL_C

D2

YL_A

D3

GN_C

D4 12

GN_A

ESD for MTK

ESD for LG1152


ESD_LG1152

SHIELD D5000-*1 ESD_MTK ADUC 5S 02 0R5L

D5000-*2 5.5V ADUC 5S 02 0R5L

ESD_LG1152 D5001-*1 ESD_MTK ADUC 5S 02 0R5L D5001-*2 5.5V ADUC 5S 02 0R5L


JK5000-*1 TLA-6T764 LAN_TDK 1 R1

ESD_LG1152

R2

R3

D5002-*1 ESD_MTK ADUC 5S 02 0R5L D5002-*2 5.5V ADUC 5S 02 0R5L

R4

R5

R6

R7

ESD_LG1152 D5003-*1

R8

R9

ESD_MTK ADUC 5S 02 0R5L D5003-*2 5.5V ADUC 5S 02 0R5L

10

R10[GND]

11

R11

D1

YL_C

D2

YL_A

D3

GN_C

D4 12

GN_A

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LAN_VERTICAL

2011.12.09 50

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Ethernet Block

+3.3V_NORMAL +3.3V_NORMAL +3.3V_NORMAL

4.7K R5215

Place 0.1uF close to each power pins LAN_JACK_POWER

R5216

4.7K

C5200 4.7uF 10V

C5201 0.1uF 16V

C5203 0.1uF 16V

EPHY_LINK EPHY_ACTIVITY

ET_RXER

ET_COL/SNI

Place this cap. near IC

C5208 0.1uF 16V

C5210 10uF 10V OPT EPHY_ACTIVITY

C5206 15pF 50V X5200 25MHZ

+3.3V_NORMAL

ET_COL/SNI

ET_RXER

EPHY_CRS_DV

25MHz, CL 18pF, ESR , max 30 Ohm, +/-30ppm

CRS/CRS_DV

DVDD10OUT

RXER/FXEN

Place this cap. near IC

AVDD33_2

C5207 15pF 50V

0 CKXTAL2 CKXTAL1

LED1/PHYAD[1]

R5205

22

R5210

+3.3V_NORMAL

R5212 1.5K

R5204 2.49K 1%

RSET AVDD10OUT

1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 9 THERMAL 33

24 23 22

LED0/PHYAD[0]/PMEB EPHY_LINK MDIO MDC PHYRSTB TXEN TXD[3] TXD[2] TXD[1] EPHY_TXD1 EPHY_EN EPHY_MDC

1/16W 5%

C5204 10uF 10V OPT

C5205 0.1uF 16V

[EP]

Place this Res. near IC

32

31

30

29

28

27

COL

26

25

Route Single 50 Ohm, Differential 100 Ohm MDI+[0] EPHY_TDP MDI-[0] EPHY_TDN MDI+[1] EPHY_RDP EPHY_RDN AVDD33_1 R5203 4.7K RXDV +3.3V_NORMAL MDI-[1]

EPHY_MDIO

IC5200 RTL8201F-VB-CG

21 20 19 18 17

/RST_PHY C5212 0.1uF OPT

RXC

RXD[0]

RXD[1]

DVDD33

TXC

22 RXD[2]/INTB

RXD[3]/CLK_CTL

TXD[0]

+3.3V_NORMAL

22

22

R5206

R5207

R5201

C5209

L5211

C5211 0.1uF 16V 100NH

56pF

EPHY_RXD1

EPHY_INT R5208 4.7K

EPHY_RXD0

C5202

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EPHY_REFCLK

EPHY_TXD0

56pF

R5217 4.7K Place near IC

LG1152 A0 ETHERNET 14 50

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

DUAL COMPONENT Q1801 1ST : 0TRIY80001A 2ND : 0TR387500AA

+3.3V_NORMAL

AMP_RESET_N C5415 1000pF 50V

22000pF

C5416

L5401 BLM18PG121SN1D AUD_MASTER_CLK +24V +24V_AMP

50V

+24V_AMP OPT R5406 3.3

OUT1A_2

OUT1A_1

PVDD1_3

PVDD1_2

PVDD1_1

VDD_IO

GND_IO

/RESET

CLK_I

[EP]

L5400 CIS21J121

0.1uF 16V

BST1A

C5413

C5414 10uF 10V

PGND1A

C5418 0.1uF 50V

C5420 0.1uF 50V

C5422 10uF 35V

OPT C5424 0.01uF 50V SPK_L+ D5400 1N4148W 100V OPT R5407 12 C5429 390pF 50V R5414 12 L5404 10.0uH NRS6045T100MMGK L5405 10.0uH C5434 0.47uF 50V C5437 0.1uF 50V R5416 5.1K SPK_L-

AD

C5400 0.1uF 50V

C5401 0.1uF 50V C5402 100pF 50V C5403 1000pF 50V R5404 3.3K

48

47

46

45

44

43

42

41

40

39

38

37

OPT C5405 10uF 10V

C5407 4.7uF 10V

OPT C5409 10uF 10V

C5411 0.1uF 16V

C5436 0.1uF 50V

R5415 5.1K

SPEAKER_L

AGND_PLL AVDD_PLL DVDD_PLL LF DGND_PLL


OPT C5410 10uF 10V

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 THERMAL 49

36 35 34 33 32 31 30 29 28 27 26 25

OUT1B_2 OUT1B_1 PGND1B BST1B VDR1 VCC_5 AGND VDR2 BST2A PGND2A OUT2A_2 OUT2A_1
C5426 22000pF 50V C5425 22000pF 50V

D5401 1N4148W 100V OPT

C5430 390pF 50V R5408 12 R5412 12

NRS6045T100MMGK

WAFER-ANGLE

GND_1
C5412 0.1uF 16V

IC5400 NTP-7500L
0x54

SPK_L+

DGND DVDD SDATA

SPK_L-

SPK_R+ C5427 1uF 25V C5428 1uF 25V C5433 1uF 25V

AUD_LRCH

SPK_R-

1 P5400

WCK
AUD_LRCK

BCK
AUD_SCK I2C_SDA1 I2C_SCL1 R5402 R5403 +3.3V_NORMAL 100 100 C5406 33pF 50V C5408 33pF 50V

SDA

SPK_R+

MONITOR0

MONITOR1

MONITOR2

OUT2B_1

OUT2B_2

PVDD2_1

PVDD2_2

PVDD2_3

SCL

/FAULT

PGND2B

BST2B

+24V_AMP

R5401 10K R5405 C R5400 AMP_MUTE 10K E B 100 C5404 1000pF Q5400 50V MMBT3904(NXP)

D5402 1N4148W 100V OPT

R5409 12 C5431 390pF 50V

R5413 12

L5402 10.0uH NRS6045T100MMGK L5403 10.0uH NRS6045T100MMGK C5435 0.47uF 50V

C5438 0.1uF 50V

R5417 5.1K

C5419 0.1uF 50V

C5421 0.1uF 50V

C5423 10uF 35V D5403 1N4148W 100V OPT C5432 390pF 50V R5410 12 R5411 12

SPEAKER_R
C5439 0.1uF 50V R5418 5.1K

C5417 22000pF 50V

SPK_R-

WOOFER_MUTE

WOOFER_MUTE

TP5403

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

AMP_NEO

2011.11.21 54

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+24V

+24V_AMP_WOOFER

L5501 CIS21J121 WOOFER C5529 0.1uF 50V WOOFER

WOOFER AMP.

+3.3V_NORMAL WOOFER L5500 BLM18PG121SN1D

AMP_RESET_N WOOFER C5513 1000pF 50V WOOFER R5505 10K AUD_MASTER_CLK

P5500 FW25001-02(SPK 2P) WOOFER 50V WOOFER 22000pF +24V_AMP_WOOFER OPT R5506 3.3 OPT SPK_WOOFER_L1

C5514

SPK_WOOFER_L+ C5522 0.01uF 50V SPK_WOOFER_L+ D5500 1N4148W 100V OPT WOOFER R5507 12 WOOFER C5527 390pF 50V WOOFER C5528 390pF 50V WOOFER R5508 12 WOOFER R5514 12 L5503 10.0uH NRS6045T100MMGK WOOFER WOOFER C5532 0.47uF 50V WOOFER WOOFER C5534 0.1uF 50V WOOFER R5515 5.1K

OUT1A_2

OUT1A_1

PVDD1_3

PVDD1_2

VDD_IO

GND_IO

/RESET

CLK_I

16V WOOFER C5504 4.7uF 10V

[EP]

0.1uF

WOOFER C5500 100pF 50V

WOOFER C5501 1000pF 50V WOOFER R5503 3.3K

48

47

46

45

44

43

42

41

40

39

38

37

OPT C5502 10uF 10V

OPT C5506 10uF 10V

WOOFER C5508 0.1uF 16V

BST1A

C5512 10uF 10V

PGND1A

WOOFER C5511

WOOFER

PVDD1_1

WOOFER C5516 0.1uF 50V

WOOFER C5518 0.1uF 50V

WOOFER C5520 10uF 35V

AD

L5504 10.0uH WOOFER R5512 12

AGND_PLL AVDD_PLL DVDD_PLL LF DGND_PLL


OPT C5507 10uF 10V WOOFER C5509 0.1uF 16V

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 THERMAL 49

36 35 34 WOOFER 33 32 31 30 29 28 27 26 25

OUT1B_2 OUT1B_1 PGND1B BST1B VDR1 VCC_5 AGND VDR2 BST2A PGND2A OUT2A_2 OUT2A_1
WOOFER_MONO 5% 1/16W 4.7K R5517 WOOFER C5524 22000pF 50V WOOFER C5525 1uF 25V WOOFER C5526 1uF 25V WOOFER C5531 1uF 25V WOOFER C5523 22000pF 50V

D5501 1N4148W 100V OPT

NRS6045T100MMGK

WOOFER C5535 0.1uF 50V

WOOFER R5516 5.1K SPK_WOOFER_L-

GND_1 DGND DVDD SDATA

IC5500 NTP-7500L

P5501 250A1-WR-H03B

SPK_WOOFER_R-

SPK_WOOFER_R+

AUD_LRCH

WCK
AUD_LRCK

BCK
AUD_SCK I2C_SDA1 I2C_SCL1 WOOFER R5501 100 WOOFER R5502 100 WOOFER WOOFER C5503 33pF 50V C5505 33pF 50V

WOOFER_STEREO WOOFER_STEREO D5502 1N4148W 100V OPT WOOFER_STEREO WOOFER_STEREO L5502 10.0uH NRS6045T100MMGK WOOFER_STEREO L5505 10.0uH NRS6045T100MMGK WOOFER_STEREO C5536 0.47uF 50V SPK_WOOFER_R+ WOOFER_STEREO WOOFER_STEREO R5513 C5537 0.1uF 5.1K 50V

SDA

R5500 12

R5511 12

MONITOR0

MONITOR1

MONITOR2

OUT2B_1

OUT2B_2

PVDD2_1

PVDD2_2

PVDD2_3

SCL

/FAULT

PGND2B

BST2B

C5530 390pF 50V WOOFER_STEREO WOOFER_STEREO C5533 390pF 50V R5509 12 R5510 12

+24V_AMP_WOOFER D5503 1N4148W 100V OPT

WOOFER_STEREO WOOFER_STEREO C5538 R5519 0.1uF 50V 5.1K SPK_WOOFER_R-

WOOFER C5517 0.1uF 50V

WOOFER C5519 0.1uF 50V

WOOFER C5521 10uF 35V

WOOFER_STEREO WOOFER_STEREO

WOOFER R5504 WOOFER_MUTE 100 WOOFER C5510 1000pF 50V

WOOFER C5515 22000pF 50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

4.7K R5518 WOOFER_MONO

5% 1/16W

LGE Internal Use Only

+12V EU

AUD_OUT >> EU/CHINA_HOTEL_OPT

IC6000 AZ4580MTR-E1
OUT1 1 8 VCC

L6000 EU

EU 2.2K DTV/MNT_L_OUT C6000 1uF 25V EU OPT C6002 6800pF OPT R6002 470K C6003 33pF EU IN1+ 33K EU R6004 IN1R6000

C6004 0.1uF EU R6011 2.2K OPT R6010 470K OPT C6007 6800pF C C6005 EU 33pF SCART_AMP_R_FB Q6000 MMBT3904(NXP) E B EU Q6002 MMBT3906(NXP) C E 50V SIGN600005 EU C6008 DTV/MNT_R_OUT

[SCART AUDIO MUTE]


DTV/MNT_L_OUT

OUT2

EU
3 4

IN2-

R6008

EU

1uF 25V

33K

EU R6013 1K

+3.5V_ST

VEE SCART_AMP_L_FB

IN2+

OPT R6012 4.7K

SCART_MUTE EU R6003 10K

SCART_Lout

EU DTV/MNT_R_OUT EU Q6001 MMBT3904(NXP) E B EU EU R6014 1K R6001 10K C B SCART_Rout

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SCART AUDIO AMP

2011.11.21 60

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

CI POWER ENABLE CONTROL


+5V_NORMAL Q6201 AO3407A S CI OPT C6202 0.1uF 16V CI R6221 10K OPT R6242 2.2K CI C B Q6200 MMBT3904(NXP) CI E D +5V_CI_ON

R6241 22K

C6207 4.7uF 10V OPT

C6210 1uF 25V OPT

R6248 10K CI

PCM_5V_CTL R6218 10K CI

R6223 4.7K CI

Option FOR MTK

Option FOR LG1152

C6210-*1 1uF 25V CI_MTK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI SLOT

2011.10.31 62

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

EARPHONE AMP

L6400 120-ohm BLM18PG121SN1D

Place Near jack Side


C6405 0.1uF 16V R6406 10

C6403 10uF 10V

HP_LOUT C6408 0.47uF 16V

Close to the IC

C6402 1uF 10V +3.3V_NORMAL EN C6406 2.2uF 10V C

1/16W 5%

OUTL

SGND

C6400 1uF 10V HP_LOUT_MAIN

VDD

16 INL1

15

14

13 12 HPVDD

R6404 4.7K

INL+

2 IC6400 TPA6132A2 3

11

CPP C6407 2.2uF 10V

Q6400 MMBT3904(NXP) HP_AMP_MUTE E

R6405 1K SIDE_HP_MUTE From Micom

INR+ C6401 1uF 10V HP_ROUT_MAIN

10

PGND

INR-

4 5

EAN60724701 6 G0 G1 7 HPVSS 8

CPN

R6400 4.7K

OUTR

R6402 4.7K

R6401 OPT

OPT

R6407 10 R6403 4.7K C6404 2.2uF 10V 1/16W 5% C6409 0.47uF 16V

HP_ROUT

Low Pass Filter

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

HEADPHONE AMP

2011.06.29 61

LGE Internal Use Only

T/C/S & H/NIM & T2/C TUNER(EU & CHINA)


RF_SWITCH_CTL USE: T2/C,T/C,ATSC,DTMB.ISDB-T
TU6504 TDSH-T151F

TU6500 TDSS-G151D

TU6501 TDSN-G351D

TU6502 TDSQ-H051F

TU6503 TDSQ-G051D
close to TUNER
CHB +5V_TU L6508 BLM18PG121SN1D

LNB_TX LNB_OUT

CHB_CVBS CHB_ERR CHB_SYNC CHB_VAL CHB_CLK

ERROR & VALID PIN


L9_T2/C/S IC6500 74LVC1G08GW

+3.3V_TU
OPT R6511 100K C6520 0.1uF 16V MTK/L9_DVB/ATSC/NTSC RF_SWITCH_CTL

ATV_OUT

+3.3V_TU

BR_TW_CN_TUNER R6500-*1 1K 5%

/TU_RESET

CHB_DATA

TU_TS_VAL

VCC L9_T2/C/S C6544 0.1uF 16V

TU_TS_ERR

2 Y R6526 100 FE_TS_VAL 1/16W 5% L9_T2/C/S R6525 0 NOT_L9_T2/C/S

TW_H/NIM RF_S/W_CTL RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC DIF[P] DIF[N] 1 2 3 4 5 6 7 8 9 10 11

T/C_H/NIM_V NC RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC DIF[P] DIF[N] 1 2 3 4 5 6 7 8 9 10 11

T2/C_F/NIM_DEV NC_1 RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS NC_2 NC_3 NC_4 +B3[3.3V] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 SHIELD

CHB_V +5V[SPLITTER] 1 RESET TU_SCL TU_SDA M_+3.3V M_SIF M_+1.8V M_CVBS M_IF_AGC M_DIF[P] M_DIF[N] S_3.3V S_1.8V S_CVBS GND_1 SD_ERROR SD_SYNC SD_VALID SD_MCLK 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

T/C/S2_V N.C_1 RESET SCL SDA +3.3V_TUNER SIF +1.8V_TUNER CVBS T/C_IF_AGC T/C_DIF[P] T/C_DIF[N] N.C_2 N.C_3 N.C_4 GND_1 ERROR SYNC VALID MCLK D0 D1 D2 D3 D4 D5 D6 D7 GND_2 GND_3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
C6509 0.1uF 16V CHB C6500 L9 ATSC

CHB C6501 10uF 10V

RF_SWITCH C6503 0.1uF 16V

RF_SWITCH R6500 0

GND

BR_TW_CN_TUNER R6508-*1
R6508 100

ATV_OUT

1K

5%

MTK/L9_DVB/ATSC/NTSC R6509 C6508 33 18pF R6510 OPT 50V 33 C6506 OPT 18pF 50V I2C_SCL6

I2C_SDA6

BR_TW_CN_TUNER C6508-*1 68pF 50V

BR_TW_CN_TUNER C6506-*1 68pF 50V

+5V_TU
R6516 470 E R6518 82 TUNER_SIF

+5V_TU

+3.3V_TU
C6511 100pF 50V C6514 0.1uF 16V L6500 BLM18PG121SN1D

close to TUNER
C6522 0.1uF 16V R6515 4.7K B

R6520 220

R6521 220

2012 perallel because of derating

TU_CVBS E C Q6500 MMBT3906(NXP) B R6519 1K C Q6501 MMBT3906(NXP) T/C_H/NIM T/C/S2 T2/C_F/NIM T2/C/S2 CHB AT_H/NIM CN BR

C6551 100pF 50V

C6550 0.1uF 16V

C6505 0.1uF 16V R6506

+1.8V_TU

T/C&AT&CHB 100 T/C&AT&CHB OPT 1. should be guarded by ground IF_AGC2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils CHB C6523 100pF 50V T2/C&CN&BR L6502 BLM18PG121SN1D OPT C6525 0.1uF 16V OPT C6528 10uF 6.3V +3.3V_D_Demod

DVB_S

NOT_T/C&AT

DVB_S

CHB

T/C&AT&CHB

CN

close to Tuner
0.1uF 16V

NOT_DVB_S

DVB_S&CHB

T2/C

DVB_S&CHB

DVB_S&CHB

NOT_DVB_S

NOT_T/C&AT

should be guarded by groumd IF_P IF_N

Not_L9_T2/C/S NOT_T/C&AT

T2/C&CN

NOT_T/C&AT

NOT_T/C&AT Not_L9_T2/C/S

RF_SWITCH

T/C&AT&CHB

T2/C&CHB&CN

T2/C

T/C&AT&CHB

NOT_T/C&AT&CHB

12 SHIELD

12 +B4[1.23V] SHIELD NC_5 GND ERROR SYNC VALID MCLK D0 D1 D2 D3 D4 D5 D6 D7

NOT_T/C&AT&CHB NOT_T/C&AT&CHB

T2/C&CN

T2/C&CHB&CN

NOT_DVB_S

+1.23V_TU
Not_L9_T2/C/S NOT_DVB_S T2/C&CHB&CN H/NIM&CHB Not_L9_T2/C/S

close to TUNER
C6507 100pF 50V C6510 1000pF 50V CN C6513 4700pF 50V CN

CHB L6507 C6516 BLM18PG121SN1D 0.1uF 16V T2/C&CHB&CN&BR

+1.8V_TU
Not_L9_T2/C/S NOT_T/C&AT&CHB Not_L9_T2/C/S

T2/C&CHB&CN&BR

CHB_CVBS CHB_ERR CHB_SYNC CHB_VAL NOT_T/C&AT&CHB AR6500 0 CHB_CLK TU_TS_ERR FE_TS_SYNC TU_TS_VAL FE_TS_CLK CHB_DATA NOT_T/C&AT&CHB AR6501 0 FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[0-7]

L9_T2/C/S

SD_SERIAL_D0 20 N.C_1 N.C_2 N.C_3 N.C_4 N.C_5 N.C_6 N.C_7 GND_2 GND_3 21 22 23 24 25 26 27 28 29

T2 : Max 1.7A else : Max 0.7A

FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7] NOT_T/C&AT AR6502 0 NOT_T/C&AT&CHB

+3.3V_TU_IN

IC6501 AP2132MP-2.5TRG1
1 THERMAL 8

+1.23V_TU [EP] NOT_T/C&AT R6527 R2 20K 1% NOT_T/C&AT R6528 11K 1% R6529 R1 10K 1% NOT_T/C&AT CN R6528-*1 12K 1/16W 1%

Seperate GND for CHB

28 29
DVB_S&CHB C6512 100pF C6515 0.1uF DVB_S&CHB C6519 10uF 10V DVB_S&CHB +3.3V_D_Demod OPT R6512 2.2K R6513 C6521 0.1uF OPT 10 DVB_S&CHB /S2_RESET NOT_T/C&AT C6533 10uF 16V +5V_NORMAL DVB_S&CHB L6501 BLM18PG121SN1D +1.23V_TU

C6540 0.1uF

PG 2 R6523 10K EN 3 VIN 4 VCTRL

GND 9 7 ADJ 6 VOUT

SD_1.23V_DEMOD 30 SD_RESET 31

+1.23V_S2_DEMOD 30 S2_RESET 31

2A

5 NC NOT_T/C&AT C6549 10uF

SD_3.3V_DEMOD 32 N.C_8 SD_SCL SD_SDA 33 34 35 36

+3.3V_S2_DEMOD 32 S2_F22_OUTPUT 33 S2_SCL S2_SDA LNB GND_4 38 34


LNB_TX

EAN61387601 +3.3V_D_Demod

16V

OPT C6524 100pF C6527 0.1uF OPT C6535 1uF OPT

35
R6503 22

36
OPT

C6517 18pF 50V

I2C_SCL4

DVB_S&CHB

Vout=0.6*(1+R1/R2)
CHB : Max 480mA else : Max 240mA
+3.3V_D_Demod

37
R6504 C6518 18pF 50V 22

I2C_SDA4 +3.3V_TU
IC6503 AZ1117BH-1.8TRE1 NOT_T/C&AT C6531 0.1uF C6538 10uF 10V NOT_T/C&AT C6542 0.1uF IN OUT

SHIELD
LNB_OUT OPT

DVB_S&CHB

+1.8V_TU

SHIELD

+3.3V_TU
NOT_T/C&AT L6506 BLM18PG121SN1D

3 1

ADJ/GND

R6531 1

BR_F/NIM_V

CN_ATBM

T2/C/S2

TU6501-*1 TDSN-B051F
1 2 3 4 5 6 7 RF_S/W_CTL RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS NC_1 NC_2 NC_3 +B3[3.3V] +B4[1.23V] NC_4 GND ERROR SYNC VALID MCLK D0 D1 D2 D3 D4 D5 D6 D7 28

TU6501-*2 TDSN-C251D
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 RF_S/W_CTL RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS NC_1 NC_2 NC_3 +B3[3.3V] +B4[1.23V] NC_4 GND ERROR SYNC VALID MCLK D0 D1 D2 D3 D4 D5 D6 D7

CN_LG3921

TU6503-*1 TDSQ-G351D
N.C_1 RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS N.C_2 N.C_3 N.C_4 +B3[3.3V] +B4[1.23V] N.C_5 GND_1 ERROR SYNC VALID MCLK D0 D1 D2 D3 D4 D5 D6 D7 GND_2 GND_3 +B5[1.23V] S2_RESET +B6[3.3V] S2_F22_OUTPUT S2_SCL S2_SDA LNB GND_4

TU6501-*3 TDSN-C051D
1 2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

RF_S/W_CTL RESET SCL

3 4 5 6

SDA +B1[3.3V] SIF

7 8 9 10

Close to the tuner

C6546 10uF 10V

C6548 0.1uF 16V

AT_H/NIM_V TU6500-*1 TDSS-H151F

+B2[1.8V] CVBS NC_1

11 12 13 14

8 9 10

NC_2 NC_3 +B3[3.3V]

1 2 3 4 5 6 7 8 9 10 11 12

NC RESET SCL

15 16 17 18

11 12 13 14

465mA(MAX)

+B4[1.23V] NC_4 GND

19 20 21 22

L9/BR_TW_CN_TUNER R6532-*1 BLM18PG121SN1D 120-ohm

150mA(MAX)

SDA +B1[3.3V] SIF +B2[1.8V]

15 16 17 18 19

ERROR SYNC VALID

23 24 25 26

+3.3V_NORMAL

+3.3V_TU
+5V_NORMAL

CVBS IF_AGC DIF[P] DIF[N]

MCLK D0 D1

27 28 29 30

20 21 22 23 24 25 26

+5V_TU

D2 D3 D4

31 32 33 34

L6503 BLM18PG121SN1D C6532 0.1uF 16V

NOT_L9_BR_TW_CN Tuner R6532 0 C6534 22uF C6536 22uF 10V 10V C6539 0.1uF 16V

D5 D6 D7
38

35 36 37

SHIELD
28

27

SHIELD

SHIELD

SHIELD SHIELD

C6526 0.1uF 16V

C6529 22uF 10V

C6530 0.1uF 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Close to the tuner

Close to the tuner

TUNER

2011.11.21 65

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

DVB-S2 LNB Part Allegro


(Option:LNB)

DCDC_GND and A_GND are connected DCDC_GND and A_GND are connected in pin#27 PCB_GND and A_GND are connected

Input trace widths should be sized to conduct at least 3A Ouput trace widths should be sized to conduct at least 2A

D6901-*1 LNB_SX34 40V D6901 LNB_SMAB34

D6903-*1 40V LNB_SX34 D6903 40V LNB_SMAB34 C6902 1uF 50V LNB C6912 68uF 35V LNB C6906 68uF 35V LNB

2A
LNB_OUT

40V C6901 0.01uF 50V LNB

3A
+12V_LNB LNB L6900 33UH SP-7850_33 2.4A C6910 10uF 25V LNB DCDC_GND C6911 0.1uF 50V LNB

close to Boost pin(#1)

close to VIN pin(#25)

C6915 18pF OPT

C6916 18pF LNB

C6913 33pF OPT

C6914 33pF LNB

D6904 LNB

R6906 2.2K 1W LNB

DCDC_GND D6900 MBR230LSFT1G 30V LNB

DCDC_GND A_GND

Close to Tuner Surge protectioin LNB

C6900 0.22uF 25V

LNB

C6904 0.1uF 50V

D6902 LNB_SMAB34 40V D6902-*1 LNB_SX34 40V A_GND

GNDLX

LNB

VIN

BFI

28

27

26

25

24

23

A_GND BOOST C6903 0.1uF LNB C6905 22000pF VCP TCAP NC_1 TDO EXTM TDI 1 2 3 4 5 6 7

22

BFO

A_GND

[EP]

NC_9

LX

21 THERMAL 29 20 19

NC_8 NC_7 BFC NC_6 NC_5 NC_4 NC_3 A_GND DCDC_GND A_GND A_GND R6904 0 R6905 0

LNB

IC6900 A8290SETTR-T
LNB

18 17 16 15

A_GND LNB_TX

10

11

12

13

14

+3.3V_NORMAL VREG NC_2 GND SDA ADD SCL A_GND IRQ

Max 1.3A
+12V +12V_LNB

R6903 R6900 33 R6901 33 4.7K LNB LNB

L6901 BLM18PG121SN1D

LNB

0.22uF

27pF

27pF

C6917 LNB 0.1uF 50V LNB OPT

C6918 0.1uF 50V LNB

LNB

OPT

C6907

A_GND

I2C_SDA4

C6908

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

I2C_SCL4

C6909

LNB

2011.11.21 69

LGE Internal Use Only

[51Pin LVDS Connector] (For FHD FRC3 HS_LVDS)

P7200 FI-RE51S-HF-J-R1500

L/DIM0_SCLK L/DIM0_MOSI L/DIM0_VS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 NC L/DIM0_SCLK NC L/DIM0_MOSI NC L/DIM0_VS NC I2C_BE_SDA1 NC I2C_BE_SCL1 NC FRC3_RESET LVDS_SEL NC NC BPL_IN L/DIM_ENABLE GND RA0N TXA0N RA0P TXA0P RA1N TXA1N RA1P TXA1P RA2N TXA2N RA2P TXA2P GND RACLKN TXACLKN RACLKP TXACLKP GND RA3N TXA3N RA3P TXA3P RA4N TXA4N RA4P TXA4P GND BIT_SEL RB0N TXB0N RB0P TXB0P RB1N TXB1N RB1P TXB1P RB2N TXB2N RB2P TXB2P GND RBCLKN TXBCLKN RBCLKP TXBCLKP GND RB3N TXB3N RB3P TXB3P RB4N TXB4N RB4P TXB4P GND GND GND GND GND NC VLCD VLCD VLCD VLCD C7200 10uF 16V OPT C7201 1000pF 50V OPT C7202 0.1uF 16V OPT L7200 120-ohm PANEL_VCC TP7204 LOCAL_DIM_EN LOCAL_DIM_EN R7200 10K R7201 0 FRC3_FLASH_WP I2C_BE_SDA1 I2C_BE_SCL1 FRC3_RESET

52 GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LG1152 A0
Interface block

72

100

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

LOCAL DIMMING
[To LED DRIVER]
P7600 12507WR-08L L/DIM_OUT +3.3V_NORMAL

R7600 10K OPT

1 R7601 10K L/DIM_OUT

AR7600 33 1/16W
L/DIM0_SCLK

5 R7603

L/DIM0_MOSI 0

I2C_SCL1

L/DIM_OUT
R7606 33 L/DIM_OUT

L/DIM_OUT R7602 0 L/DIM_OUT

I2C_SDA1

8 9

L/DIM0_VS R7607 4.7K L/DIM_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LOCAL DIMMING

2012.02.22 76

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

eMMC I/F
EMMC_VCCQ EMMC DATA LINE 47K PULL/UP 47K 47K 47K 47K 47K 47K 47K 47K

R8117 10K

R8100-*1

R8101-*1

R8102-*1

R8103-*1

R8104-*1

R8105-*1

R8106-*1

R8107-*1

R8100

R8101

R8102

R8103

R8104

R8105

R8106

R8107

EMMC DATA LINE 10K PULL/UP

R8116 10K

10K

10K

10K

10K

10K

10K

10K

10K

IC8100 SDIN5D2-4G-974L1

IC8100-*3 H26M31001EFR

EMMC_DATA[0-7] EMMC_DATA[0] EMMC_DATA[1] EMMC_DATA[2] EMMC_DATA[3] EMMC_DATA[4] EMMC_DATA[5] EMMC_DATA[6] EMMC_DATA[7]

AR8100 22 1/16W A3 A4 A5 B2 B3 B4 AR8101 22 1/16W B5 B6 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 NC_25 NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 M6 M5 CLK CMD NC_34 NC_35 NC_36 NC_37 A6 A7 C5 E5 E8 E9 E10 F10 G3 G10 H5 C8107 10pF 50V J5 K6 K7 K10 P7 P10 NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119 NC_38 NC_39 NC_40 NC_41 NC_46 NC_47 NC_48 NC_49 NC_50 NC_51 NC_53 NC_54 NC_55 NC_56 NC_57 NC_60 NC_61 NC_62 C8 C9 C10 C11 C12 C13 C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1 H2 H3 H12 H13 H14 J1 J2 J3 J12 J13 J14 K1 K2 K3 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14 EMMC_CLK_BALL EMMC_CMD_BALL A1 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C7 NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24 E7 G5 H10 K8 C4 N2 N5 P4 P6 VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 C2 VDDI EMMC_RESET_BALL E6 F5 J10 K9 VCC_1 VCC_2 VCC_3 VCC_4 C6 M4 N4 P3 P5 VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5 K5 RESET DAT6 A6 A7 C5 E5 E8 E9 E10 F10 G3 G10 H5 J5 K6 K7 K10 P7 P10 NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119 M6 M5 CLK CMD DAT5 A3 A4 A5 B2 B3 B4 B5 B6 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 NC_25 NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_46 NC_47 NC_48 NC_49 NC_50 NC_51 NC_53 NC_54 NC_55 NC_56 NC_57 NC_60 NC_61 NC_62 NC_63 NC_64 NC_65 C8 C9 C10 C11 C12 C13 C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1 H2 H3 H12 H13 H14 J1 J2 J3 J12 J13 J14 K1 K2 K3 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14 A1 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C7 E7 G5 H10 K8 C4 N2 N5 P4 P6 C2 E6 F5 J10 K9 C6 M4 N4 P3 P5 K5 A6 A7 C5 E5 E8 E9 E10 F10 G3 G10 H5 J5 K6 K7 K10 P7 P10 M6 M5 CLK CMD A3 A4 A5 B2 B3 B4 B5 B6

IC8100-*1 H26M21001ECR

IC8100-*2 KLM2G1HE3F-B001

C8 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 NC_25 NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119 NC_39 NC_40 NC_41 NC_46 NC_47 NC_48 NC_49 NC_50 NC_51 NC_53 NC_54 NC_55 NC_56 NC_57 NC_60 NC_61 NC_62 NC_63 NC_64 NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98 NC_99 NC_100 NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123 C9 C10 C11 C12 C13 C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1 H2 H3 H12 H13 H14 J1 J2 J3 J12 J13 J14 K1 K2 K3 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14

A3 A4 A5 B2 B3 B4 B5 B6 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 NC_25 NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 M6 M5 CLK CMD NC_34 NC_35 NC_36 NC_37 A6 A7 C5 E5 E8 E9 E10 F10 G3 G10 H5 J5 K6 K7 K10 P7 P10 NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119 NC_38 NC_39 NC_40 NC_41 NC_46 NC_47 NC_48 NC_49 NC_50 NC_51 NC_53 NC_54 NC_55 NC_56 NC_57 NC_60 NC_61 NC_62 NC_63 K5 NC_64 RSTN NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98 NC_99 A1 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C7 NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123

C8 C9 C10 C11 C12 C13 C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1 H2 H3 H12 H13 H14 J1 J2 J3 J12 J13 J14 K1 K2 K3 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14

EMMC_CLK EMMC_CMD EMMC_RST

AR8102

22

OPT

NC_63 NC_64 NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98 NC_99 NC_100

K5 RESET OPT C8100 0.1uF 16V EMMC_VCCQ 3.3V_EMMC

DEV_HYNIX_EMMC_4GB

NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98 NC_99 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123

C6 M4 N4 P3 P5 EMMC_RESET_BALL EMMC_CLK_BALL EMMC_CMD_BALL DAT4 DAT5 DAT3 DAT6 C8105 0.1uF 16V C8106 2.2uF 10V VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5

C6 M4 N4 P3 P5 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5

VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5

E6 F5 J10 K9 VCC_1 VCC_2 VCC_3 VCC_4

E6 F5 J10 K9 VDDF_1 VDDF_2 VDDF_3 VDDF_4

VCC_1 VCC_2 VCC_3 VCC_4

EMMC_VDDI C2 VDDI C8104 0.1uF 16V

C2 VDDI

VDDI

E7 G5 H10 K8 VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

C4 E7 G5 H10 K8 N2 N5 P4 P6 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9

VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

C8102 0.1uF 16V

C8103 2.2uF 10V

C4 N2 N5 P4 P6

DAT3 DAT4

A1 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24

NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123

Dont Connect Power At VDDI


(Just Interal LDO Capacitor)

EMMC_VDDI

B13 B14 C1 DAT5 C3 C7

DU1 DU2 DU3 DU4 DU5 DU6 DU7 DU8 DUMMY_1 DUMMY_2 DUMMY_3 DUMMY_4 DUMMY_5 DUMMY_6 DUMMY_7 DUMMY_8 DUMMY_9 DUMMY_10 DUMMY_11 DUMMY_12 DUMMY_13 DUMMY_14 DUMMY_15 DUMMY_16

DU9 DU10 DU11 DU12 DU13 DU14 DU15 DU16

DU1 DU2 DU3 DU4 DU5 DU6 DU7 DU8 DUMMY_1 DUMMY_2 DUMMY_3 DUMMY_4 DUMMY_5 DUMMY_6 DUMMY_7 DUMMY_8 DUMMY_9 DUMMY_10 DUMMY_11 DUMMY_12 DUMMY_13 DUMMY_14 DUMMY_15 DUMMY_16

DU9 DU10 DU11 DU12 DU13 DU14 DU15 DU16

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

eMMC 81

SAMSUNG_EMMC_2GB

RESET

HYNIX_EMMC_2GB

SANDISK_EMMC_4GB

11.09.29

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

+3.5V_ST BLM18PG121SN1D L8900 LOGO_LIGHT

P8900 12507WR-03L

Place Near Micom


+3.5V_ST LOGO_LIGHT R8910 33 10K R8902 OPT LOGO_LIGHT R8911 33

1 LOGO_LIGHT 2

3 4

LOGO_LIGHT B LOGO_LIGHT LOGO_LIGHT R8901 10K LOGO_LIGHT C8900 0.1uF 16V

1K Q8900 R8903 MMBT3904(NXP) E LOGO_LIGHT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

IC9300 LG1132
XTAL(24.75MHz)
R9300 100 SOC_TXA0P SOC_TXA0N SOC_TXA1P SOC_TXA1N SOC_TXA2P SOC_TXA2N SOC_TXACLKP SOC_TXACLKN SOC_TXA3P SOC_TXA3N SOC_TXA4P SOC_TXA4N SOC_TXB0P SOC_TXB0N SOC_TXB1P SOC_TXB1N SOC_TXB2P SOC_TXB2N SOC_TXBCLKP SOC_TXBCLKN SOC_TXB3P SOC_TXB3N SOC_TXB4P SOC_TXB4N R9301 100 R9303 100 R9305 100 R9307 100 R9309 100 R9311 100 AB13 AA13 Y12 Y13 AA12 AB12 AB11 AA11 Y10 Y11 AA10 AB10 AB9 AA9 Y8 Y9 AA8 AB8 AB7 AA7 Y6 P9301 12507WS-04L +3.3V_NORMAL Y7 AA6 AB6 AB5 1 AA5 Y4 2 Y5 AA4 AB4 DEBUG 3 AB3 AA3 4 5 Y2 Y3 AA2 AB2 D3 D2 R9312 R9313 R9314 R9315 R9316 R9317 R9318 33 33 33 33 33 33 33 C2 C1 B1 B2 E2 E1 D1 E3 F2 F1 G3 G2 G1 H1 R9319 33 H3 H2 J3 J2 F3 PORES_N AB21 AA21 XTALO XTALI TRST_N TDO TDI TCK TMS SMODE TMODE0 TMODE1 TMODE2 TMODE3 SDA_M SCL_M SDA_S SCL_S SPI_SCLK SPI_CS SPI_DI SPI_DO UART_RXD UART_TXD SPI_SCLK SPI_CS SPI_DI SPI_DO I2C_SDA2 I2C_SCL2 I2C_SDA2 I2C_SCL2 OPT 0 R9344 GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] GPIO[16] GPIO[17] GPIO[18] GPIO[19] GPIO[20] GPIO[21] GPIO[22] GPIO[23] GPIO[24] GPIO[25] GPIO[26] GPIO[27] GPIO[28] GPIO[29] GPIO[30] GPIO[31] RXD0P RXD0N RXD1P RXD1N RXD2P RXD2N RXDCLKP RXDCLKN RXD3P RXD3N RXD4P RXD4N TXD0P TXD0N TXD1P TXD1N TXD2P TXD2N TXDCLKP TXDCLKN TXD3P TXD3N TXD4P TXD4N Y1 W3 W2 W1 NON_72INCH_LVDS_AB R9321 10K V3 V2 V1 U3 U2 U1 T3 T2 T1 R3 R2 1 DEBUG 3 R1 P3 P2 P1 2 4 N3 N2 N1 M3 M2 M1 L1 L2 L3 K1 K2 K3 J1 Monitoring Pins for 3D-Depth Interanl status A2 A19 B19 C19 D4 D5 D6 D17 D18 D19 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 +3.3V_XTAL_AVDD C9336 4.7uF +2.5V_AVDD Default Setting(0) 0 : Boot From Ext. Flash(Normal Booting) 1 : Internal RAM Boot (JTAG Booting) +2.5V_LVDS_TX D7 D8 SMODE 100 D9 D10 D11 D12 D13 R9325 R9323 R9327 R9328 SW9300 JTP-1127WEM 10K OPT 3D_DEPTH_RESET R9342 D14 D15 D16 +1.0V_PLL_VDD Y21 Y22 AA22 Y20 AA19 AA20 AB20 AB19 DISP_AVDD DR3P_AVDD SSP_AVDD XTAL_AVDD DISP_VDD DR3P_VDD SSP_VDD XTAL_VDD LVTX_VDD25_1 LVTX_VDD25_2 LVTX_VDD25_3 LVTX_VDD25_4 LVTX_VDD25_5 LVTX_VDD25_6 LVTX_VDD25_7 LVTX_VDD25_8 LVTX_VDD25_9 LVTX_VDD25_10 RXC0P RXC0N RXC1P RXC1N RXC2P RXC2N RXCCLKP RXCCLKN RXC3P RXC3N RXC4P RXC4N TXC0P TXC0N TXC1P TXC1N TXC2P TXC2N TXCCLKP TXCCLKN TXC3P TXC3N TXC4P TXC4N A14 B14 C13 C14 B13 A13 A12 B12 C11 C12 B11 A11 RXB0P RXB0N RXB1P RXB1N RXB2P RXB2N RXBCLKP RXBCLKN RXB3P RXB3N RXB4P RXB4N TXB0P TXB0N TXB1P TXB1N TXB2P TXB2N TXBCLKP TXBCLKN TXB3P TXB3N TXB4P TXB4N A18 B18 C17 C18 B17 A17 A16 B16 C15 C16 B15 A15 R9302 100 R9304 100 R9306 100 R9308 100 R9310 100 AB17 AA17 Y16 Y17 AA16 AB16 AB15 AA15 Y14 Y15 AA14 AB14 RXA0P RXA0N RXA1P RXA1N RXA2P RXA2N RXACLKP RXACLKN RXA3P RXA3N RXA4P RXA4N TXA0P TXA0N TXA1P TXA1N TXA2P TXA2N TXACLKP TXACLKN TXA3P TXA3N TXA4P TXA4N A6 B6 C5 C6 B5 A5 A4 B4 C3 C4 B3 A3 A10 B10 C9 C10 B9 A9 A8 B8 C7 C8 B7 A7 TXA0P TXA0N TXA1P TXA1N TXA2P TXA2N TXACLKP TXACLKN TXA3P TXA3N TXA4P TXA4N TXB0P TXB0N TXB1P TXB1N TXB2P TXB2N TXBCLKP TXBCLKN TXB3P TXB3N TXB4P TXB4N TXC0P TXC0N TXC1P TXC1N TXC2P TXC2N TXCCLKP TXCCLKN TXC3P TXC3N TXC4P TXC4N TXD0P TXD0N TXD1P TXD1N TXD2P TXD2N 10K 10K 10K TXDCLKP TXDCLKN TXD3P OPT R9322 OPT R9326 OPT R9324 OPT R9320 TXD3N TXD4P TXD4N +1.0VDC H10 H11 LVTX_VDD10_1 LVTX_VDD10_2 LVTX_VDD10_3 LVTX_VDD10_4 H12 H13 10K 11 10 +3.3V_NORMAL R9333 OPT 9 8 R9331 0 7 R9330 OPT 0 TMODE0 6 DEBUG 3D_DEPTH_RESET TMODE[3:0] 0000 => 0001 => 0010 => 0011 => 0100 => 1001 => 1010 => 1011 => 1100 => 1101 => 1110 => 1111 => System PLL Test LVDS Rx Isolation Test LVDS Tx Isolation Test LVDS Bypass Test ALL PLL Test DDR PLL IsolationTest Functional Test MBIST Scan Test(Normal) Scan Test (Adaptive) Display PLL Test Normal Operation 5 SPI_DI 4 SPI_SCLK 2 SPI_CS 1 P9300 12507WR-10L +3.3V_NORMAL SPI_DI 33 SPI_CS R9337 DO[IO1] C9333 30pF 50V XTAL_IN X-TAL_1 GND_1 2 3 C9339 30pF 50V X9300 24.75MHz 1 4 X-TAL_2 H8 XTAL_OUT E17 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 +3.3V_IO F4 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 VDD33_7 VDD33_8 VDD33_9 VDD33_10 VDD33_11 VDD33_12 +2.5V_LVDS_RX W7 W8 W9 W10 W11 W12 W13 W14 LVRX_VDD25_1 LVRX_VDD25_2 LVRX_VDD25_3 LVRX_VDD25_4 LVRX_VDD25_5 LVRX_VDD25_6 LVRX_VDD25_7 LVRX_VDD25_8 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 E18 F5 F18 G5 G18 H5 H18 J5 J9 J10 J11 J12 J13 J14 J18 K5 K9 K10 K11 K12 K13 K14 K18 L5 L9 L10 L11 L12 L13 L14 L18 M5 M9 M10 M11 M12 M13 M14 M18 N5 N9 N10 N11 N12 N13 N14 N18 P5 P9 P10 P11 P12 P13 P14 P18 R5 R18 T5 T18 T19 U5 U18 U19 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 W4 W5 W6 W15 W16 W17 W18 W19 W20 W21 W22 Y18 Y19 AA1 AA18 AB18 GND_2 H9 H14 C9365 0.1uF VCC H15 J8 J15 K8 HOLD R9343 3.3K 6 CLK SPI_SCLK DI[IO0] SPI_DO K15 L8 L15 M8 M15 N8 N15 P8 P15 R8 R9 R10 R11 R12 R13 R14 3 R15 SPI_DO R9329 1M

SPI FLASH(4M Bit)


+3.3V_NORMAL +1.0VDC

IC9300 LG1132

R9334 4.7K

R9335 10K OPT CS

IC9301 W25X40BVSSIG

LG1132_FLASH

SPI/I2C For Aardvak Interface

WP FLASH_WP R9336 100K 1/16W GND

TEST MODE Configuration LG1132 Has Internal Pull-up


Default Setting All H = Normal Operation Mode

G4 H4 J4 K4 L4 M4 N4 P4 R4

R9338 R9339 R9340 R9341

100 OPT 100 OPT 100 OPT 100 OPT

TMODE0 TMODE1 TMODE2 TMODE3

T4 U4

FLASH_WP

DEBUG R9332 OPT 0 I2C_SCL2 0 I2C_SDA2

System Configuration

LG1132 HW RESET
10K 10K 10K +3.3V_NORMAL

SMODE TMODE0 TMODE1 TMODE2 TMODE3

I2C_SDA1 I2C_SCL1 TRST_N TDO TDI TCK TMS TRST_N TDO TDI TCK TMS 3D_DEPTH_RESET XTAL_OUT XTAL_IN

OPT 0 R9345

+1.0V Power Separation +3.3V_IO Decaps


TXA0P TXA0N TXA1P TXA1N TXA2P TXA2N TXACLKP TXACLKN TXA3P TXA3N TXA4P TXA4N TXB0P TXB0N TXB1P TXB1N TXB2P TXB2N TXBCLKP TXBCLKN TXB3P TXB3N TXB4P TXB4N TXC0P TXC0N TXC1P TXC1N TXC2P TXC2N TXCCLKP TXCCLKN TXC3P TXC3N TXC4P TXC4N C9300 0.1uF 16V OPT C9304 0.1uF 16V OPT C9308 0.1uF 16V OPT C9311 10uF 10V C9312 10uF 10V C9315 4.7uF 10V C9318 4.7uF 10V C9321 0.1uF 16V OPT C9324 0.1uF 16V C9327 0.1uF 16V OPT C9330 0.1uF 16V L9303 BLM18SG121TN1D +3.3V_IO +2.5V_LG1132 +1.0VDC

E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16

+2.5V LVDS_RX Decaps


+2.5V_LVDS_RX +2.5V_LVDS_RX C9353 4.7uF 10V C9361 4.7uF 10V

+1.0VDC Decaps
TXD0P TXD0N TXD1P TXD1N TXD2P TXD2N TXDCLKP TXDCLKN TXD3P TXD3N TXD4P TXD4N C9301 4.7uF 10V C9303 4.7uF 10V C9316 4.7uF 10V C9319 4.7uF 10V C9322 0.1uF 16V OPT C9328 0.1uF 16V +3.3V_NORMAL +3.3V_IO +2.5V_LG1132 +2.5V_LVDS_TX +2.5V_LVDS_TX C9348 0.1uF 16V OPT C9354 0.1uF 16V OPT C9356 10uF 10V C9360 10uF 10V C9364 0.1uF 16V OPT C9366 0.1uF 16V OPT +1.0VDC

+3.3V Power Separation +2.5V LVDS_TX Decaps

L9300 BLM18SG121TN1D

L9304 BLM18SG121TN1D

M9300

ALBLOCK

MDS62110218 M9301 ALBLOCK

MDS62110218 M9302 ALBLOCK

+3.3V XTAL AVDD Decaps


+3.3V_IO +3.3V_XTAL_AVDD

MDS62110218

+1.0V_XTAL/DDR3 PLL/SS PLL/DIS PLL_VDD +2.5V DDR PLL/SS PLL/DIS PLL AVDD Decaps
M9303 +1.0VDC +1.0V_PLL_VDD +1.0V_PLL_VDD +2.5V_LG1132 +2.5V_AVDD +2.5V_AVDD

ALBLOCK

+3.3V_XTAL_AVDD

MDS62110218

L9302 BLM18SG121TN1D

L9305 BLM18SG121TN1D C9310 4.7uF 10V C9314 0.1uF 16V

L9309 BLM18SG121TN1D

For Heat Sink


C9357 4.7uF 10V C9359 0.1uF 16V C9363 0.1uF 16V

C9307 4.7uF 10V

C9317 4.7uF 10V

C9320 4.7uF 10V

C9323 0.1uF 16V OPT

C9326 0.1uF 16V OPT

C9352 4.7uF 10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LG1152 B0 3D Depth

2011. 11. 28

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

DDR0 PHY VREF


+1.5VQ +0.75V_VREF_M0 +1.5VQ +0.75V_VREF_M1

DDR_A[0-13]

IC9400 H5TQ1G63DFR-PBC
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 R9401 DDR_CKE +1.5VQ DDR_ODT DDR_RASN 100 1% K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 DDR_DQS[0] DDR_DQS_N[0] DDR_DQS[1] DDR_DQS_N[1] F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8

+0.75V_VREF_M0 DDR_A[0-13] +0.75V_VREF_M1

IC9300 LG1132

+1.5V_LG1132
+1.5VQ R9406 1K 1% R9410 1K 1%

DDR_A[0] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] DDR_A[5] DDR_A[6] DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] DDR_A[12] DDR_A[13] Connect A13 for Using 2Gbit Memory DDR_BA[0] DDR_BA[1] DDR_BA[2] DDR_CLK DDR_CLKN

DDR_A[0] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] R9402 240 1% DDR_A[5] +1.5VQ DDR_A[6] DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] Connect A13 for Using 2Gbit Memory DDR_DATA[0-15] DDR_DATA[0] DDR_DATA[1] DDR_DATA[2] DDR_DATA[3] DDR_DATA[4] DDR_DATA[5] DDR_DATA[6] DDR_DATA[7] DDR_DATA[8] DDR_DATA[9] DDR_DATA[10] DDR_DATA[11] DDR_DATA[12] DDR_DATA[13] DDR_DATA[14] DDR_DATA[15] DDR_A[12] DDR_A[13]

V21 B22 V20 T20 C22 T21 C21 T22 C20 U22 D22 B21 D20 U21 B20 M22 G20 N20 F22 N22 F20 N21 F21 H21 L22 G22 M20 H22 L21 H20 L20 E22 E21 K22 K21 J22 J21 E20 R20 P20 P21 P22 G21 M21 R21 D21 R22 U20 240 A20 V22 A21 E19 F19 G19 H19 J19 DDR_VDDQ_1 DDR_VDDQ_2 DDR_VDDQ_3 DDR_VDDQ_4 DDR_VDDQ_5 DDR_VDDQ_6 DDR_VDDQ_7 DDR_VDDQ_8 DDR_VDDQ_9 DDR_VDDQ_10 DDR_VDDQ_11 DDR_VDDQ_12 DDR_VDDQ_13 C9403 0.1uF DDR_VREF0 DDR_VREF1 DDR_CK DDR_CK_N DDR_DQS[0] DDR_DQS_N[0] DDR_DQS[1] DDR_DQS_N[1] DDR_CKE DDR_WE_N DDR_RAS_N DDR_CAS_N DDR_ODT DDR_DM[0] DDR_DM[1] DDR_BA[0] DDR_BA[1] DDR_BA[2] DDR_RST_N DDR_ZQ_CAL DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[6] DDR_DQ[7] DDR_DQ[8] DDR_DQ[9] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[14] DDR_DQ[15] DDR_A[0] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] DDR_A[5] DDR_A[6] DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] DDR_A[12] DDR_A[13] DDR_A[14]

L9400 BLM18SG121TN1D R9407 1K 1% C9401 4.7uF C9407 4.7uF C9413 0.1uF C9417 1000pF R9411 1K 1% C9420 0.1uF C9422 1000pF

+1.5VQ

+0.75V_VREF_D0

+1.5VQ

+0.75V_VREF_D1

R9404 1K 1% C9400 0.1uF R9405 1K 1% C9406 0.1uF C9410 1000pF

R9408 1K 1% C9415 0.1uF R9409 1K 1% C9419 0.1uF C9421 1000pF

R9400 200

DDR_CASN DDR_WEN

DDR_RESET_N

DDR_CLK DDR_CLKN DDR_DQS[0] DDR_DQS_N[0] DDR_DQS[1] DDR_DQS_N[1] DDR_CKE DDR_WEN DDR_RASN DDR_CASN DDR_ODT DDR_DM[0] DDR_DM[1] DDR_BA[0] +0.75V_VREF_D0 DDR_BA[1] DDR_BA[2] +0.75V_VREF_D1 DDR_RESET_N R9403 1%

+1.5VQ DDR3 1.5V Decaps - Place these caps near Memory

DDR_DATA[0-15]

DDR_DM[0] DDR_DM[1] DDR_DATA[0] DDR_DATA[1] DDR_DATA[2] DDR_DATA[3] DDR_DATA[4] DDR_DATA[5] DDR_DATA[6] DDR_DATA[7] DDR_DATA[8] DDR_DATA[9] DDR_DATA[10] DDR_DATA[11] DDR_DATA[12] DDR_DATA[13] DDR_DATA[14] DDR_DATA[15]

C9402 C9404 C9405 C9408 C9411 C9412 C9414 C9416 C9418 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF OPT OPT OPT OPT

B1 B9 D1 D8 E2 E8 F9 G1 G9

DDR3 1.5V/0.75V Decap - Place these caps near IC101

+0.75V_VREF_D0

+0.75V_VREF_D1

+1.5VQ

J20 K19 K20 L19 M19 N19 P19 R19

C9409 0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LG1132 DDR3 LG1132 DDR3

2011. 06 .28

LGE Internal Use Only

3D-Depth Analog for 2.5V

+2.5V
+1.5V_LG1132
+1.5V_DDR +3.3V_NORMAL

+2.5V_LG1132

IC9500 AP7173-SPG-13 HF(DIODES)


[EP]

Max 600 mA

L9500 BLM18PG121SN1D +5V_USB ZD9500 5.48VTO5.76V

IN

1 THERMAL

OUT

PG

FB R9502 4.3K R1 1% C9501 2200pF 50V

VCC C9500 10uF 10V R9500 EN 10K

SS

1.5A
4 5 GND R9501 2K 1% R2

C9513 10uF 10V

C9514 0.1uF 16V

Place near USB JACK

Vout=0.8*(1+R1/R2)

LG1152 for 1.0V


+1.0VDC +1.0V_VDD

L9 CORE for 1.0V (UD Model only / LG1132 DDR=792Mh) READY


+12V OPT L9501 BLM18PG121SN1D 120-ohm

Max 2000 mA
+1.0V_VDD

Max 2000 mA
C9502 10uF 16V OPT +1.0VDC L9502 CIC21J501NE 500 POWER_ON/OFF2_3 R9504 10K OPT

IC9501 TPS54327DDAR [EP]GND


EN VIN 16V 0.1uF C9506 OPT 6 SW L9503 3.6uH OPT SS OPT R9505 33K 1% 4

**NON UD Model LG1132 DDR = 668Mhz LG1152 1.0V ==> IC2306 LG1132 1.0V ==> IC2306 **UD Model LG1132 DDR = 792Mhz LG1152 1.0V ==> IC2501 LG1132 1.1V ==> IC2306
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

1 THERMAL

R1

1% OPT R9503 11K

VFB

VBST

VREG5

C9503 100pF 50V

3A
OPT

GND OPT

C9507 22uF 10V

OPT C9508 22uF 10V

OPT

OPT

R2

C9504 1uF 10V

OPT

C9505 3300pF 50V

Switching freq: 700K

Vout=0.765*(1+R1/R2)

LG1132 Power
LG1132 POWER

2011. 06. 28

LGE Internal Use Only

+3.3V_NORMAL

10K R10006

10K R10007

+3.3V_NORMAL +12V_MOTOR R10023 R10008 100 IC10001

R10009 100 ZD10000 UDZS8.2B ZD10001 UDZS8.2B C10004 0.1uF 16V C10005 0.1uF 16V

MOTOR_CLOSE_SW MOTOR_OPEN_SW
L/DIM0_VS

R10022

BD6222HFP

4.7K

4.7K

VREF

OPT R10020 0 MOTOR+ R10019 0 R10029 100

OUT1

8.2V

8.2V

MOTOR_CW MOTOR_CCW
A_DIM

FIN

GND R10028 SIGN100013 100

R10017

RIN

OUT2 R10018 OPT P10000 12507WR-06L MOTOR_SENSOR 0 MOTORR10034 R10033 1 1 VCC

CLOSE
JP10000 R10027 0

2 JP10001 3 JP10002 4 JP10003

OPEN

MOTOR_SENSOR MOTOR_SENSOR

L10000 MLB-201209-0120P-N2 MOTORL10001

5 JP10004 6 OPT 7 C10000 0.1uF 50V MLB-201209-0120P-N2 C10001 0.1uF OPT 50V

MOTOR+

MOTOR DRIVER

+12V

+12V_MOTOR

MAX 1500mA Close to IC7406


MLB-201209-0120P-N2 L10002 C10011 10uF 50V C10012 0.1uF 50V MLB-201209-0120P-N2 L10003

C10009 0.1uF 50V

MOTOR Ground

+12V_MOTOR

+12V_MOTOR

MOTOR_SENSOR

R10014 22K

+12V_MOTOR 1/16W 1%

C10002 0.1uF 25V

MOTOR_SENSOR R10010 MO_SENS_TO_MAIN_DOWN OPT R10013 MOTOR_SENSOR MOTOR_SENSOR R10011 0 JP10006 R10012 20K

MOTOR_SENSOR A C +3.3V_NORMAL R10001 22K AC MOTOR_SENSOR R10003 10K 1/16W 1% C B Q10000 2SC3052 MOTOR_SENSOR E R10002 1K 1/16W 1% B

1% 1/16W

MOTOR_SENSOR D10000 BAT54SWT1

20K R10024

MOTOR_SENSOR

1/10W 1% MOTOR_SENSOR

R10004 1K

IC10000 KA4558D

MOTOR_SENSOR_UP

MOTOR_SENSOR

+12V_MOTOR

MOTOR_SENSOR_UP R10030 20K R10026 OPT JP10007 0 R10036 MO_SENS_TO_MAIN_UP MOTOR_SENSOR_UP MOTOR_SENSOR_UP R10035 MOTOR_SENSOR_UP 10K

10K

E C10006 0.1uF 50V MOTOR_SENSOR_O R10005 51K JP10005 1/8W 1% C10003 0.1uF 50V MOTOR_SENSOR MOTOR_SENSOR MOTOR_SENSOR

R10016 MOTOR_SENSOR_O

MOTOR_SENSOR 3 3 6 6 R10021 0 MOTOR_SENSOR_O MOTOR_SENSOR_UP 1/10W 1% C10008 0.1uF 50V MOTOR_SENSOR C10010 0.1uF 50V MOTOR_SENSOR_UP 4 4 5 5 MOTOR_SENSOR_UP 22K R10025

MOTOR_SENSOR

1/16W 1%

50V MOTOR_SENSOR

MOTOR_SENSOR

R10015 12K

10K

Q10001 C MMBT3906(NXP) MOTOR_SENSOR

10K

C10007 0.1uF

C10013 0.1uF 50V

C10014 0.1uF 50V MOTOR_SENSOR_UP

MOTOR_SENSOR

R10000 18K

1/16W 1%

MOTOR_SENSOR

MOTOR SENSOR OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

1% 1/10W

GP4
MOTOR CONTROL

2011.07.01

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

IR BLASTER

Pattern Width : 0.5mm +3.3V_NORMAL IR_Bla +3.3V_IR_Bla D11001 +3.3V_IR_Bla IR_Bla C

IR_Bla R11020 10

IR_Bla
JP11002

Pattern Width : 0.5mm R DETECT


JP11001

1 3 4 5 KJA-PH-0-0177 JK11001

R11015

120

IR_Bla +5V_NORMAL IR_Bla R11021 10K C11009 0.1uF 16V OPT AO3438 Q11002 E G

IR_Bla Q11001 SBT2222A_AUK

L11001 BLM18PG121SN1D IR_Bla

L IR_Bla D11002 GND

R11019 0 IR_Bla C11004 C11008 10uF 10uF 10V IR_Bla IR_Bla Close to JK11001

C11006 0.1uF 16V OPT

+3.3V_IR_Bla +3.3V_IR_Bla

P11001 12507WS-04L

IC11002 MC96FR3128R
VSS VDD

1 IR_Bla

IR_Bla

IR_Bla C11003 8MHz 22pF X11001 50V

IR_Bla

28

IR_Bla C11005 22pF 50V

XIN

27

REMOUT

DSCL DSDA

XOUT

26

P22/INT3/DSDA

4 5

P20/RESETB

25

P21/INT2/DSCL

+3.3V_IR_Bla

P10/KS8/MOSI1

24

P07/KS7

P11/KS9/MISO1

23

P06/KS6

R11022 4.7K IR_Bla

P12/KS10/INT0

22

P05/KS5/EC3

P13/KS11/INT1

21

P04/KS4/EC0

P14/KS12/SS1/INT2

20

P03/KS3/T3/PWM3

C IR_B_RESET R11001 IR_Bla E 1K B Q11003 MMBT3904(NXP) IR_Bla

IR_B Micom Download

IR_Bla C11010 0.1uF 16V

P15/KS13/XCK1/INT3

10

19

P02/KS2/T2

P16/KS14/MOSI0

11

18

P01/KS1/T1/PWM1

P17/KS15/MISO0

12

17

P00/KS0/T0

P30/SS0/EC2/EXTREF

13

16

P37/INT1/SS0

P31/XCK0/SENSOR

14

15

P36/INT0/XCK0

IRB_SPI_MOSI IRB_SPI_MISO IRB_SPI_SS IRB_SPI_CK

R11006 R11007 R11008 R11009

22 IR_Bla 22 IR_Bla 22 IR_Bla 22 IR_Bla

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LG1152 A1
IR Blaster/Boost

2011. 06. 02 94
LGE Internal Use Only

2012 LED/LCD TV Engineering guide


Applicable Model High-end 72LM9500-TA xxLM9600-TA xxLM8600-TA

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

New Feature : Tool option ,Country Group, Area Option Country Group
- Country Group : 9 unit -> 3 unit(AJ,JA,IL) - Country : Set in Factory -> Set by User - Myanmar / Sri Lanka: New DTV country - India / Thailand : Large corporation - Algeria / Tunisia : Manage in Asia-Africa - Israel : Separate by distribution

Asia-Africa in 2012
Country Group Country Australia (Default) ATV/DTV DTV (DVB-T)

New Zealand

DTV (DVB-T)
DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) ATV (PAL-BG,DK,I,M) ATV (PAL-BG,DK,I,M) ATV (PAL-BG,DK,I,M) ATV (PAL-BG,DK,I,M) DTV (Basic:EU"--Standard) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T) DTV (DVB-T)
LGE Internal Use Only

Asia-Africa in 2011
Country Group Country

Singapore Vietnam Indonesia AJ (Asia) Malaysia Myanmar Sri Lanka India Thailand "--" Analog TV (Default) Digital TV JA (MEA) South Africa Iran Algeria Tunisia IL (Israel) Israel

A-ASIA (XB)
AU SG ID MY VN IR IL ZA

Analog TV
Australia, New Zealand Singapore Indonesia Malaysia Vietnam Iran Israel South Africa

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Country Group

AJ

MARKET

Myanmar

Australia New Zealand Singapore Malaysia

Indonesia

Vietnam

Thailand Sri Lanka

India

Area Option

257

263

262

16645

16647

18183

JA

IL

West Africa

Iraq (MQ_FARSI)

Iraq (MH,ME_ARABIC) Sudan Syria Libya

South Africa Kenya Mauritius

Kuwait Algeria Tunisia Israel (MT_SBITANY)

Nigeria

U.A.E Saudi Arabia

Egypt Jordan Lebanon

Iran

Pakistan

Israel (MF_H.Y.E)

257

385

353

259

355

260

357

359

391

16738

355

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Main PCB Feature for High-end models


xxLM9600/8600
Local Dim.
Woofer Spk (ONLY LM96)

To LPB / PSU

Main processor_Digital(LG1152D), DDR Memory Flash Memory Main processor_analog(LG1152A) Micom for Key/IR sensing

To FRC BOARD
2
2 3 4

wifi
LG LOGO (ONLY LM86)

Local Key +IR Front Spk Motion assy

4
7

Audio AMP (10W+10W) HDMI switch (4:1) 3D Depth Control IC, DDR Memory Tuner (Picture can be different)
LGE Internal Use Only

5 6

7
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

FRC PCB Feature for High-end models


xxLM9600 (T480)
From Main Board

FRC Processor(LG1122)

1
2

T-Con IC(LG5812)

To Panel ( Left )

To Panel ( Right )

xxLM8600 (T240)

From Main Board

FRC Processor(LG1122)

T-Con IC(LG5822)

To Panel ( Left )
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

To Panel ( Right )
LGE Internal Use Only

72LM9500 (T480)
To Panel ( Master Left )
To Panel ( Master Right)

FRC Processor(LG1122)

T-Con IC(LG5812)

To Panel (LED Driver) 1

From Main Board

To Panel ( Slave Left )

To Panel (Slave Right )


LGE Internal Use Only

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Block Diagram for High-end models(Main + BE)


<Parallel TS>
FE_TS_DATA[0-7] FE_TS_SYNC FE_TS_ERR FE_TS_CLK FE_TS_VAL DIF (DA ONLY) Tuner CVBS SIF PC_Audio L/R PC_AUDIO I2S AV 1_Audio L/R A/V1 A/V1_CVBS Audio AMP SPK

(SA ONLY)

USB

Built-in WiFi

AUD
SPDIF OPTIC

BB_TP_DATA

CHB_DATA

COMP1

Comp1 Y,Pb,Pr

L9 LG1152A

DAC_DATA

L9 LG1152D

HS_LVDS 2Link

PC-RGB

PC_R,G,B,H,V

3D Depth LG1132

AAD_DATA HDMI Switch

HS_LVDS / 2Link
HSR_P/M

HDMI1~4

FRC-III LG1122

USB1 USB2 USB3

USB HUB

V by One / 8 Line

RMII
LAN PHY

mini_LVDS T-con LG5812


M-Remote_R/TX
16 16 8

mini_LVDS

Motion-R

DDR 256MB4 (1600)

DDR 128MB1 (1600)

eMMC 4GB1

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Block Diagram for High-end models(Back-end)


* FHD 240Hz, T480Hz ( 47/55LM9600)
Main Board
L9D (LG1152)
eMMC 4Gb
8P L/Dimming 2 link HS-LVDS

DDR3@ 800MHz
2 link HS-LVDS 51P Cable

DDR3@ 800MHz

DDR3@ 800MHz
8 lanes VbyOne

T-Con Board
Mini-LVDS

80Pin Mini -LVDS Output

3D Chip (LG1132)

FRC-III (LG1122)

T-Con (LG5812)

240Hz LCM
Mini-LVDS

80Pin Mini -LVDS Output

LED Driver

* FHD 120Hz, T240Hz ( 47/55LM8600)


Main Board
L9D (LG1152)
eMMC 4Gb
8P L/Dimming 2 link HS-LVDS

DDR3@ 800MHz
2 link HS-LVDS 51P Cable

DDR3@ 800MHz

T-Con Board
EPI 4 lanes LVDS

50Pin EPI

3D Chip (LG1132)

FRC-III (LG1122)

T-Con (LG5822)

EPI

120Hz LCM
50Pin EPI

LPB (LED Driver)


Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

* FHD 240Hz T480Hz ( 72LM9500)


LG1121__RESET I2C_SDA_S I2C_SCL_S VLCD_POWER(+12V)

* Epoxy 4Layer 1.2T (206x183mm)

DDR3 SDRAM - 1Gbit (x16)


- 800MHz

VLCD_POWER (+12V)

L/DIM0_VS L/DIM0_MOSI/SCLK I2C_SCL_1 OPT_N/ SOE/POL H_CONV/GSC/GOE I2C_SDA_1 I2C HUB (PCA9516) I2C_SCL_S I2C_SDA_S

I2C_EN_M

DC-DC Con (TPS54327)

+1.5V

DDR0_A[14:0] / BA[2:0]/CLK/CKE

DDR0_DATA[15:0]

VLCD_POWER(+12V)

DC-DC Con (TPS54327)

+3.3V

- 800MHz

DDR1_DATA[15:0]

I2C_SCL_S I2C_SDA_S

(0x1C, direct 0xB2, in-direct)

DC-DC Con (AOZ1038PI)

Dual-Link HS-LVDS
LG1121_RESET VLCD_POWER(+12V)

HF mini-LVDS (2-Link)

8Lane Vx1 HS

OPT_N/OPT_P/ GSP/GSC/GOE

DC-DC Con (TPS54327)

+1.8V

P-GAMMA IC Master2 (BUF06830)

VCC/VDD

I2C_SDA_S

I2C_SCL_S

L/DIM0_VS, L/DIM0_SCLK/MOSI TX_LOCK I2C_SDA_S

VDD/VCC/ HVDD/ VGL/VGH/ VCOM/ GMA[18:1]

FRC-III (LG1122)

SPI_DI SPI_DO/CK/CS

SPI FLASH (32Mbit)

VLCD_POWER(+12V)

+0.9V

VCOMLFB

DDR3 SDRAM - 1Gbit (x16)

DDR1_A[13:0]/ BA[2:0]/CLK/CKE

XTAL_OUT

X-Tal (24.75Mhz)

I2C_EN_S

I2C_SDA_2

(LG5812, 0x70)

GMA[4:1] / GMA[14:10] VCC/VDD I2C_SCL_S

GMA_M[9:5] / GMA_M[18:15]

Vx1 Rep

Vx1 Rep

Vx1 Rep

Vx1 Rep

Vx1 Rep

Vx1 Rep

Vx1 Rep

Vx1 Rep

LGE 240Hz T-Con [M]

HF mini-LVDS (2-Link)

I2C_SDA_S

I2C_SCL_S

TCON_SDA

TCON_SCL

VLCD_POWER(+12V)

VLCD_POWER(+12V)

TCON_SDA

TCON_SCL

DC-DC Con (TPS54327)

+2.5V

DC-DC Con (TPS54327)

+1.8V

I2C_SCL_S I2C_SDA_S

PMIC (MAX17139)

VCC/VDD/ VGH_A/VGL/ HVDD/VCORE

I2C_SCL_S I2C_SDA_S

PMIC (MAX17139)

VCC/VDD/ VGH_A/VGL/ HVDD/VCORE

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

EEPROM (AT24C32D, 32Kbit)

VLCD_POWER(+12V)

VLCD_POWER(+12V)

OPT_NN/OPT_P/ SOE/POL/ H_CONV/ VCOMRFB GSC/GOE

80P mini-LVDS Output RIGHT

VDD/VCC/ HVDD/ VGL/VGH/ VCOMR/ GMA[18:1]

I2C_SDA_S

8Lane Vx1 HS
OPT_N/OPT_P/ GSP/GSC/GOE

8Lane Vx1 HS

[S]

P-GAMMA IC Master1 (BUF06830)

VCOM

80P mini-LVDS Output LEFT

XTAL_IN

I2C_SCL_2

OPT_NN/OPT_P/ SOE/POL/ H_CONV/ GSC/GOE VCOMRFB

80P mini-LVDS Output RIGHT


I2C_SDA_S VCOM I2C_SCL_S GMA[4:1] / GMA[14:10] P-GAMMA IC Master1 (BUF06830)

VDD/VCC/ HVDD/ VGL/VGH/ VCOMR/ GMA[18:1]

HF mini-LVDS (2-Link)

GMA_M[9:5] / GMA_M[18:15] P-GAMMA IC Master2 (BUF06830) I2C_SDA_S VCC/VDD I2C_SCL_S VCC/VDD

I2C_SCL_S

TCON_SDA

TCON_SCL

[M]

[S]

(LG5812, 0x70) HF mini-LVDS (2-Link)

LGE 240Hz T-Con

80P mini-LVDS Output LEFT

VDD/VCC/ HVDD/ VGL/VGH/ VCOM/ GMA[18:1] VCOMLFB EEPROM (AT24C32D, 32Kbit)

OPT_N/ SOE/POL H_CONV/GSC/GOE

TCON_SDA

TCON_SCL

LGE Internal Use Only

Jack Interface for High/Middle models


REAR
SPDIF_OUT

SIDE

[SPDIF_OUT]

SPDIF(AUDIO OPTIC)
USB DM3 / DP3 USB3 APPS USB2 USB HUB USB1 DVR Ready

Main SoC

Air Analog 2~69ch Digital 2~69ch Cable Analog 1~125ch


CVBS 1 Phone JACK _Yellow

Main SoC

USB MUX

USB_DM2 / DP2

USB_DM1 / DP1

[CVBS0P] [AIN3_L_AADC] [AIN3_R_AADC] [OPCTRL5]

AV1_CVBS_IN AV1_L_IN AV1_R_IN AV1_CVBS_DET AV PHONE JACK Component 1 Phone JACK _Green HDMI1 D0/D1/D2/CLK/SCL/SDA/HPD HDMI1 /ARC

COMP1_Y/Pb/Pr COMP1_DET

HDMI2 D0/D1/D2/CLK/SCL/SDA/HPD COMP PHONE JACK PC AUDIO


[AIN2_L_AADC] [AIN2_R_AADC]

HDMI2

PC_L_IN
PC_R_IN RGB_PC

HDMI MUX
HDMI3 D0/D1/D2/CLK/SCL/SDA/HPD HDMI3

[Y1P],[PB1P],[PR1P] [OPCTRL9]

[OPCTRL7] [VGA_SCL] [VGA_SDA] [RP],[GP],[BP] [VSYNC], [HSYNC]

DSUB_DET RGB_DDC_SCL

RGB_DDC_SDA
DSUB_R+, DSUB_G+, DSUB_B+ DSUB_VSYNC, DSUB_HSYNC HDMI4 D0/D1/D2/CLK/SCL/SDA/HPD HDMI4 / PC

EPHY_TDP/TDN //RDP/RDN

LAN
LGE Internal Use Only

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Interconnection for High-end models


xxLM9600-TA
[PCBs]
1 2 2 3 7 4

Main PCB LED driver

WIFI ASSY
RF MOTION ASSY IR Key PCB FRC ASSY PSU

5
1 6 7 6

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

xxLM8600-TA

[PCBs]
1 2 3 2 4 5 6 1

Main PCB LPB

WIFI ASSY
RF MOTION ASSY IR Key PCB FRC ASSY

4 5

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Interconnection for High-end models

Speaker cover Assy

IR Key PCB
4

RF MOTION ASSY

SPK unit Local Key PCB

WIFI ASSY

IR PCB

RF MOTION ASSY

WIFI ASSY

To Main
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

New Sub Assy : Tact key(Above LM6400 Series)


Circuit Block Diagram

LED+Sensor+IR Assy

Tact Key Assy

LED+Sensor+IR Assy Picture

Tact Key Assy Picture

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

New Sub Assy : Magic Motion Remote Control(Above LM6400 Series)


* Motion Remote Controller
RF UART or USB LS5700//LM6200(Dongle)

Remote

TV LM6600//LM7600(Built in) Pairing Information Transmission (Send to TV after Paired) Static Calibration Data (Bypass only) Remote FW ver. (Save also in Receiver) BD_ADDR (Save also in Receiver) Pairing Information Transmission Sequence When it is paired, the remote sends packets(pairing success, F/W version, BD_ADDR) to the receiver. The receiver sends the pairing success packet to TV directly. F/W version and BD_ADDR packets are just saved on the receiver. The receiver sends F/W version or BD_ADDR packet to TV when it is required. Motion Data Transmission Period : 7.5msec Motion Data : gyro, accelerometer Voice Data Transmission ( not supported ) Period : 10msec Voice sampling : 16khz 16bit See 6-2. Packets on page 8.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

New Sub Assy : Magic Motion Remote Control


* RF Pairing / Un-pairing Method
Method
Method1 If unpaired, just press "OK" button. If paired, press "OK" button after unpairing. Method 2 (Repairing) Press BACK" button for 5 sec.

Description
When do pairing, the remote should make pairing request IR signal(0x29) to TV. When TV receive the IR signal, it should send "pairing request packet" to the RF receiver. After pairing success, the remote should blink LED for some time and TV send "pairing success packet" back to TV. When remote try to unpairing, it doesnt care about state of receiver(stand alone). When remote try to unpairing, it doesnt care about state of receiver(stand alone). After unpairing, all pairing information should be erased. After unpairing, LED should be blinked for 3sec. The remote just becomes to IR mode.

RF Pairing

RF Unpairing

Press HOME" button and BACK" button at the same time for 5 sec.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

* Function list
Item IC Manufacturer Function

Voice Codec
Voice MEMS Mic. Gyro Sensor Accelerometer RF Antenna

WM8950
SPU0414HR5H ITG3050 MMA8452 SDBTPTR3015 24MHz BCM20733 TPS61097 uPI7716 uPI7716

Wolfson
Knowles Invensense Stmicro Partron Partron Broadcom TI uPI uPI

16KHz Sampling of Audio data


Sensing Voice Sensing angular velocity of X, Y, Z-axis Sensing device tilt (Pitch & Roll angle)

Motion Sensor

Remocon

RF + Micom

X-tal RF + Micom

Wireless communication

DC-DC Converter LDO1 LDO2

Battery Boost up Regulator RF, Gyro, Accelerometer Power Supply Audio Codec, Mic. Power Supply

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Adjust way of new features : Widevine


* Widevine

Widevine is the Solution(Library) offering Adaptive Streaming and DRM. In BBTV, when special CP do service, this module is required key. Currently CP which is requested to widevine, is typically Australian Bigpond Live and North American CinemaNow. Furthermore, because the future will be the spread of CP, widevine key download for the global model should be applied to production. (Because operation unique key should be downloaded for Widevine , Widevine key dowmload by NSU is impossible.)

[Widevine Key] Widevine Key is unique data stored TV for using Widevine.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Adjust way of new features : HDCP2.0 & Netflix


* HDCP2.0 High-bandwidth Digital Content Protection
Protect high-value digital motion pictures, television programs and audio against unauthorized interception and copying between a digital set top box or digital video recorder and a digital TV or PC. Specification developed by Intel Corporation to protect digital entertainment across the DVI/HDMI interface.

Why HDCP2.0?
HDCP revision 2.0 supports a broader range of wired and wireless interfaces.

* NetFlix the services maintain a huge selection of movies and latest releases and offer DVD rentals via mail & online streaming.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Adjust way of new features : DTCP


* DTCP
[DTCP] The Digital Transmission Content Protection Specification defines a cryptogrphic protocol for protecting audio/video entertainment content from unauthorized copying, intercepting, and tampering as it traverses digital transmission mechanisms such as a high-performance serial bus that conforms to the IEEE 1394-1995 standard. Only legitimate entertainment content delivered to a source device via another approved copy protection system (such as the DVD Content Scrambling System) will be protected by this protection system.

[Three cryptographic Keys]


Authentication Key which is formed as a result of authentication and used to protect the exchange keys. Exchage Key which is used to set up and protect content streams. Content Key which is used to encrpt the content being exchanged.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Repair guide
Contents of LCD TV Standard Repair Process
No. 1 2 Error symptom (High category) Error symptom (Mid category) No video/Normal audio No video/No audio A. Video error Page 1 2 Remarks

3
4 5 6

Video error, video lag/stop, fail tunning


Color error Vertical/Horizontal bar, residual image, light spot, external device color error No power

3, 4
5 6 7

7
8 9 10 11 12 13

B. Power error

Off when on, off while viewing, power auto on/off No audio/Normal video Wrecked audio/discontinuation/noise No response in remote controller, key error, recording error, memory error External device recognition error

8
9 10 11 12 13 14

C. Audio error

D. Function error E. Noise F. Exterior error

Circuit noise, mechanical noise Exterior defect

First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Contents of LCD TV Standard Repair Process Detail Technical Manual


No. 1 2 3 4 6 7 9 10 11 12 13 14 15 16 17 18 19 20
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Error symptom

Content Check LCD back light with naked eye

Page A1 A2 A3 A4 A6 A7 A8 A9 A10 A11 A12 A8 A10 A11 A12 A-1/5 A-2/5 A-3/5 A-4/5 A-5/5

Remarks

A. Video error_ No video/Normal audio

LED driver B+ 24V measuring method Check White Balance value Power Board voltage measuring method TUNER input signal strength checking method LCD-TV Version checking method LCD TV connection diagram Tuner Checking Part

A. Video error_ No video/Video lag/stop

A. Video error_Color error

Check Link Cable (LVDS) reconnection condition Adjustment Test pattern - ADJ Key LCD TV connection diagram

A10 : 32/37/42/47/55 A11 : 32 AUO

A. Video error_Vertical/Horizontal bar, residual image, light spot

Check Link Cable (LVDS) reconnection condition Adjustment Test pattern - ADJ Key Exchange T-Con Board (1) Exchange T-Con Board (2)

A10 : 32/37/42/47/55 A11 : 32 AUO

<Appendix> Defected Type caused by T-Con/ Inverter/ Module

Exchange LED driver Board (PSU) Exchange Module itself (1) Exchange Module itself (2)

55 : driver board Other : PSU

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

A. Video error
No video/ Normal audio

Established date Revised date

2010. 12 .14

1/13

First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)
A1
No video Normal audio Normal audio N Move to No video/No audio Y Check Back Light On with naked eye On N Y

A4
Check Power Board 12v,3.5v etc. Normal voltage N Repair Power Board or parts Replace Inverter or module

Replace T-con Board or module And Adjust VCOM

A28

A2

Check Power Board 24v output

Normal voltage N Repair Power Board or parts

End

Precaution

A7 & A3
Replace Main Board Re-enter White Balance value

Always check & record S/W Version and White Balance value before replacing the Main Board

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

A. Video error
No video/ No audio

Established date Revised date

2010. 12 .14

2/13

A4
No Video/ No audio Check various voltages of Power Board ( 3.5V,12V,20V or 24V) Normal voltage? Y Check and replace MAIN B/D End

N
Replace Power Board and repair parts

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
A6
Check RF Signal level

Error symptom

A. Picture Problem
Picture broken/ Freezing

Established date Revised date

2010. 12 .14

3/13

. By using Digital signal level meter . By using Diagnostics menu on OSD ( Menu Set up Support Signal Test ) - Signal strength (Normal : over 50%) - Signal Quality (Normal: over 50%)

Normal Signal? N Check RF Cable Connection 1. Reconnection 2. Install Booster

Check whether other equipments have problem or not. (By connecting RF Cable at other equipment) DVD Player ,Set-Top-Box, Different maker TV etc`

A7
Normal Picture? N Y Check S/W Version SVC Bulletin? Y N

MenuSetup Booster
Booster menu OnOff: Check OffOn: Check Normal Picture? Y Close

N
Check Tuner soldering

Normal Picture? Y

S/W Upgrade
Contact with signal distributor or broadcaster (Cable or Air) Normal Picture?

N Replace Main B/D

Y
Close Close

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

A. Video error
Color error

Established date Revised date

2010. 12 .14

4/13

A8
Check color by input -External Input -COMPONENT -RGB -HDMI/DVI
Y

A10/ A11
Color error? N Check error color input mode

Check and replace Link Cable (LVDS) and contact condition

Y Color error? N End Y Replace Main B/D Color error? N Replace module

A12
Check Test pattern

External Input/ Component error

Check external device and cable

External device Y /Cable normal N Request repair for external device/cable N

Replace Main B/D

RGB/ HDMI/DVI error

Check external device and cable

External device Y /Cable normal

Replace Main B/D

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

A. Video error
Vertical / Horizontal bar, residual image, light spot, external device color error

Established date Revised date

2010. 12 .14 5/13


Replace Module

Vertical/Horizontal bar, residual image, light spot


A8
Check color condition by input -External Input -Component -RGB -HDMI/DVI Screen Y normal? N Replace module Check external device connection condition Normal? N Request repair for external device End Y

A10/ A11
Check and replace Link Cable Screen normal? Y N

A28
Replace Main B/D (adjust VCOM)

N Screen normal? Y End

For LGD panel


Replace Main B/D

A12
Check Test pattern

For other panel

External device screen error-Color error


Check S/W Version Check version Y S/W Upgrade N

Check screen condition by input -External Input -Component -RGB -HDMI/DVI

External Input error Component error

Connect other external device and cable (Check normal operation of External Input, Component, RGB and HDMI/DVI by connecting Jig, pattern Generator ,Set-top Box etc.

Screen normal? Y

Replace Main B/D

Request repair for external device Y Screen N normal?

Normal screen? Y

RGB error HDMI/ DVI

End

Connect other external device and cable (Check normal operation of External Input, Component, RGB and HDMI/DVI by connecting Jig, pattern Generator ,Set-top Box etc.

Replace Main B/D

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

B. Power error
No power

Established date Revised date

2010. 12 .14

6/13

A17
Check Power LED Power LED On? N Check Power cord was inserted properly Y DC Power on by pressing Power Key On Remote control Normal N operation? Y

A19
Check Power On High OK?

. Stand-By: Red . Operating: white

Replace Power B/D

Replace Main B/D

A4
N Normal? Y Measure voltage of each output of Power B/D

Close
Check ST-BY 3.5V

Normal voltage? N

Replace Main B/D

Normal Y voltage?

A18
N

Replace Power B/D

Replace Power B/D

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Check outlet

Error symptom

B. Power error
Off when on, off while viewing, power auto on/off

Established date Revised date

2010. 12 .14

7/13

A22
Check A/C cord Error? N Check Power Off Mode CPU Abnormal Replace Main B/D Normal? N Y Abnormal 1 Y End

Check for all 3- phase power out

Replace Power B/D

Fix A/C cord & Outlet and check each 3 phase out

A19
(If Power Off mode is not displayed) Check Power B/D voltage
Caution Check and fix exterior of Power B/D Part

Normal voltage? N

Replace Main B/D

Replace Power B/D Explanation by REMOTE CONTROL by OFF TIMER by SLEEP TIMER by INSTOP KEY by AUTO OFF by ON TIMER by RS232C by Reservated Record by End of Recording by S/W Download by unknown status except listed case by abnormal status except CPU trouble by CPU Abnormal
LGE Internal Use Only

* Please refer to the all cases which can be displayed on power off mode.

Power off List "POWEROFF_REMOTEKEY" "POWEROFF_OFFTIMER" "POWEROFF_SLEEPTIMER" "POWEROFF_INSTOP" "POWEROFF_AUTOOFF" Normal "POWEROFF_ONTIMER" "POWEROFF_RS232C" "POWEROFF_RESREC" "POWEROFF_RECEND" "POWEROFF_SWDOWN" "POWEROFF_UNKNOWN" "POWEROFF_ABNORMAL1" Abnormal "POWEROFF_CPUABNORMAL"

Status

Power Power Power Power Power Power Power Power Power Power Power Power Power

off off off off off off off off off off off off off

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Standard Repair Process


LCD TV
Error symptom

C. Audio error
No audio/ Normal video

Established date Revised date

2010. 12 .14

8/13

A24
No audio Screen normal Check user menu > Speaker off Off Y Cancel OFF N

A25
Check audio B+ 24V of Power Board Normal voltage N Replace Power Board and repair parts Y

Check Speaker disconnection

Disconnection Y Replace Speaker

Replace MAIN Board

End

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

C. Audio error
Wrecked audio/ discontinuation/noise

Established date Revised date

2010. 12 .14

9/13

abnormal audio/discontinuation/noise is same after Check input signal compared to No audio


Wrecked audio/ Discontinuation/ Noise for all audio Signal normal? N Y Wrecked audio/ Discontinuation/ Noise only for D-TV Wrecked audio/ Discontinuation/ Noise only for Analog (When RF signal is not received) Request repair to external cable/ANT provider (In case of External Input signal error) Check and fix external device Replace Main B/D N Replace Power B/D Normal voltage?

A25
Check and replace speaker and connector Check audio B+ Voltage (24V) Y

Check input signal -RF -External Input signal

Wrecked audio/ Discontinuation/ Noise only for External Input Connect and check other external device Normal audio? Y

Replace Main B/D

End

Check and fix external device

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

D. General Function Problem


Remote control & Local switch checking

Established date Revised date

2010. 12 .14 10/13 Replace Main B/D

1. Remote control(R/C) operating error


A27
Check R/C itself Operation Normal Y operating? N Check R/C Operating When turn off light in room Check & Replace Baterry of R/C Check & Repair Cable connection Connector solder Normal operating? Y Close N

A27
Check B+ 3.5V On Main B/D Normal Voltage? N Y

A27
Check IR Output signal Normal Signal? N Repair/Replace IR B/D Y

A4

Check 3.5v on Power B/D Replace Power B/D or Replace Main B/D (Power B/D dont have problem)

If R/C operate, Explain the customer cause is interference from light in room.

Normal operating? N Replace R/C

Close

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

D. Function error
External device recognition error

Established date Revised date

2010. 12 .14

11/13

Check input signal

Signal input?
N

Check technical information - Fix information - S/W Version

Technical information?
Y

External Input And Component Recognition error

Replace Main B/D

Check and fix external device/cable

Fix in accordance with technical information

RGB,HDMI/ DVI, Optical Recognition error

Replace Main B/D

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

E. Noise
Circuit noise, mechanical noise

Established date Revised date

2010. 12 .14

12/13

Identify nose type

Circuit noise

Check location of noise

Replace PSU(with LED driver) OR Replace LED driver

Mechanical noise

Check location of noise

Mechanical noise is a natural phenomenon, and apply the 1st level description. When the customer does not agree, apply the process by stage. Describe the basis of the description in Part related to nose in the Owners Manual.

OR

When the nose is severe, replace the module (For models with fix information, upgrade the S/W or provide the description) If there is a Tak Tak noise from the cabinet, refer to the KMS fix information and then proceed as shown in the solution manual (For models without any fix information, provide the description)

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process


LCD TV
Error symptom

F. Exterior defect
Exterior defect

Established date Revised date

2010. 12 .14 13/13

Zoom part with exterior damage

Module damage

Replace module

Adjust VCOM

A28
Cabinet damage Remote controller damage Replace cabinet

Replace remote controller

Stand dent

Replace stand

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Contents of LCD TV Standard Repair Process Detail Technical Manual


Continued from previous page
No. 21 22 23 24 25 26 27 28 C. Audio error_No audio/Normal video 29 30 31 32 C. Audio error_Wrecked audio/discontinuation D. Function error_ No response in remote controller, key error D. VCOM Adjustment B. Power error_Off when on, off while viewing B. Power error_Off when on, off while viewing POWER OFF MODE checking method POWER BOARD PIN voltage checking method Checking method in menu when there is no audio Voltage and speaker checking method when there is no audio Voltage and speaker checking method in case of audio error Remote controller operation checking method Sequence of the Vcom adjustment A22 A19 A24 A25 A25 A27 A28 B. Power error_No power Error symptom Content Check front display LED Check power input Voltage & ST-BY 5V Checking method when power is ON POWER BOARD voltage measuring method Page A17 A18 A19 A4 Remarks

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

A. Video error_No video/Normal audio


Check White Balance value

Established date Revised date

2010. 12 .14 A4

Entry method 1. Press the ADJ button on the remote controller for adjustment. 2. Enter into White Balance of item 7. 6. 3. After recording the R, G, B (GAIN, Cut) value of Color Temp (Cool/Medium/Warm), reenter the value after replacing the MAIN BOARD.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

A. Video error_No video/ Audio


Power Board voltage measuring method

Established date Revised date

2010. 12 .14 A5

Check the DC 24V, 12V, 3.5V. Edge LED 24 Pin (Power Board Main Board) - Common
SMAW200-H24S (YEONHO) 1 3 5 7 9 11 13 15 17 19 Power on 24V GND GND 3.5V 3.5V GND GND 12V 12V 2 4 6 8 10 12 14 16 18 20 24V 24V GND GND 3.5V 3.5V GND GND Inverter On/off Lamp : A-Dim LED : N.C PWM Dim #1 Error-out

21 23

12V GND/P_DIM2 Lamp SCANNING Model : PWM Dim #2

22 24

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

A. Video error_Video error, video lag/stop


TUNER input signal strength checking method

Established date Revised date

2010. 12 .14 A6

MENU - Set up support - signal test - select channel

When the signal is strong, use the attenuator (-10dB, -15dB, -20dB etc.)

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

A. Video error_Video error, video lag/stop


LCD-TV Version checking method

Established date Revised date

2010. 12 .14 A7

1. Checking method for remote controller for adjustment

Version

Press the IN-START with the remote controller for adjustment

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

A. Video error _Vertical/Horizontal bar, residual image, light spot


LCD TV connection diagram (1)

Established date Revised date

2010. 12 .14 A8

As the part connecting to the external input, check the screen condition by signal

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

A. Video error_Video error, video lag/stop


TUNER checking part

Established date Revised date

2010. 12 .14 A9

Checking method: 1. Check the signal strength or check whether the screen is normal when the external device is connected. 2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

A. Video error_Color error


Adjustment Test pattern - ADJ Key

Established date Revised date

2010. 12 .14 A12

You can view 6 types of patterns using the ADJ Key Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..) 4.Video error (Classification of MODULE or Main-B/D!)
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

B. Power error _No power


Check front display LED

Established date Revised date

2010. 12 .14 A17

Front LED control : Menu Option Power Indicator Standby light ON

ST-BY condition: Red Power ON condition: white

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

B. Power error _No power


Check power input voltage and ST-BY 5V

Established date Revised date

2010. 12 .14 A18

For 10 models, there is no voltage out for st-by purpose. When st-by, only 3.5V is normally on.
24 Pin (Power Board Main Board) Common Check the DC 20V/24V, 12V, 3.5V. SMAW200-H24S (YEONHO) Edge LED
1 3 Power on 24V GND GND 3.5V 3.5V GND GND 12V 12V 2 4 6 8 10 12 14 16 18 20 24V 24V GND GND 3.5V 3.5V GND GND Inverter On/off Lamp : A-Dim LED : N.C PWM Dim #1 Error-out

Edge LED

5 7 9 11 13 15 17 19

21 23

12V GND/P_DIM2 Lamp SCANNING Model : PWM Dim #2

22 24

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

B. Power error _No power


Checking method when power is ON

Established date Revised date

2010. 12 .14 A19

Check power on pin is high 24 Pin (Power Board Main Board) - Common
SMAW200-H24S (YEONHO)

Edge LED

1
3

Power on
24V GND GND 3.5V 3.5V GND GND 12V 12V

2
4 6 8 10 12 14 16 18 20

24V
24V GND GND 3.5V 3.5V GND GND Inverter On/off Lamp : A-Dim LED : N.C PWM Dim #1 Error-out

Edge LED

5 7 9 11 13 15 17 19

21 23

12V GND/P_DIM2 Lamp SCANNING Model : PWM Dim #2

22 24

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

B. Power error _Off when on, off whiling viewing


POWER OFF MODE checking method

Established date Revised date

2010. 12 .14 A22

Entry method 1. Press the IN-START button of the remote controller for adjustment 2. Check the entry into adjustment item 3
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
Error symptom Content

C. Audio error_No audio/Normal video


Checking method in menu when there is no audio

Established date Revised date

2010. 12 .14 A24

Checking method
1. Press the MENU button on the remote controller 2. Select the AUDIO function of the Menu 3. Select TV Speaker from Off to On

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
1 3 5 7

Error symptom Content

C. Audio error_No audio/Normal video


Voltage and speaker checking method when there is no audio
24 Pin (Power Board Main Board) - Common SMAW200-H24S (YEONHO) Power on 20V (24V) GND GND 3.5V 3.5V GND GND 12V 12V 2 4 6 8 10 12 14 16 18 20 20V (24V) 20V (24V) GND GND 3.5V 3.5V GND GND Inverter On/off Lamp : A-Dim LED : N.C PWM Dim #1 Error-out

Established date Revised date

2010. 12 .14 A25

9 11 13 15 17 19

21 23

12V GND/P_DIM2

22 24

Checking order when there is no audio

Check the contact condition of or 24V connector of Main Board


Measure the 24V input voltage supplied from Power Board (If there is no input voltage, remove and check the connector) Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the GND and output terminal, the speaker is normal.
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
<ALL MODELS>
P4102 1 2 3 4 5 6 7 8 9 10 SCL SDA GND KEY1 KEY2 St 3.5V GND RED_LED IR GND Error symptom Content D. Function error_ No response in remote controller, key error Remote controller operation checking method Established date Revised date 2010. 12 .14 A27

Checking order 1, 2. Check IR cable condition between IR & Main board. 3. Check the st-by 3.3V on the terminal 6. 4. When checking the Pre-Amp when the power is in ON condition, it is normal when the Analog Tester needle moves slowly, and defective when it does not move at all.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual


LCD TV
Error symptom Content

D. VCOM Adjustment
Sequence of the Vcom adjustment

Established date Revised date

2010. 12 .14 A28

1. Case
LCD module change T-Con board change

2. Equipment
Service Remote controller

3. Adjust sequence
Press the adj key select V-COM As pushing the right or the left button on the remote controller, And find the V-COM value Which is no or minimized the Flicker. (If there is no flicker at default value, Press the exit key and finish the VCOM adjustment.) Push the OK key to store the value. Then the message Saving OK is pop. Press the exit key to finish V-COM adjustment.

Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Appendix : Exchange T-Con Board (1)

Solder defect, CNT Broken

Solder defect, CNT Broken

Solder defect, CNT Broken

Solder defect, CNT Broken

T-Con T-Con Defect, Defect, CNT CNT Broken Broken Solder defect, CNT Broken T-Con Defect, CNT Broken

Abnormal Power Section

Solder defect, Short/Crack


Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Abnormal Power Section

Solder defect, Short/Crack


LGE Internal Use Only

Appendix : Exchange T-Con Board (2)

Abnormal Power Section

Abnormal Power Section

Solder defect, Short/Crack

Solder defect, Short/Crack

Fuse Open, Abnormal power section

Abnormal Display

GRADATION
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes

Noise

GRADATION
LGE Internal Use Only

Appendix : Exchange PSU(LED driver)

No Light

Dim Light

Dim Light

Dim Light

No picture/Sound Ok
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Appendix : Exchange the Module (1)

Panel Mura, Light leakage

Panel Mura, Light leakage

Press damage

Crosstalk

Press damage

Crosstalk

Un-repairable Cases In this case please exchange the module.

Press damage
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

Appendix : Exchange the Module (2)

Vertical Block Source TAB IC Defect

Vertical Line Source TAB IC Defect

Vertical Block Source TAB IC Defect

Horizontal Block Gate TAB IC Defect

Horizontal Block Gate TAB IC Defect Gate TAB IC Defect

Horizontal line Gate TAB IC Defect Gate TAB IC Defect

Un-repairable Cases In this case please exchange the module.


Horizontal Block Gate TAB IC Defect Gate TAB IC Defect
Copyright 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes LGE Internal Use Only

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