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Clippers & Clampers

Objectives: Sketch each of the following circuits: series clipper, shunt clipper, biased shunt clipper, zener diode clipper, clamping circuit, and biased clamper circuit. Draw input & output waveforms for each of the above circuits and explain the circuit operation. Design each of the above circuit and select suitable components. Analyze each of the above circuits to determine its performance.

Introduction:Because it passes a large current when forward biased and an extremely small current when reverse biased, a semiconductor diode can be employed as a switch. The speed with which a diode can be switched is determined by the reverse recovery time of the device. Diodes are widely applied to chip unwanted portions from a waveform, or to clamp the peak of a waveform at a desired dc level. Zener diodes may be used as reference voltage sources in clipping and clamping circuits.

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2.1

Experiment No.2 CLIPPING CIRCUITS Aim:- To design various clipping circuits and check their functionality. Components and Equipments:-Diode, Zener diodes, Resistors, CRO, Function generator, Power supply, BNC cables, Groove board, clips, transistors. Circuit diagrams: (i) Biased Positive Clipper:R

+
Vi

VR

Vo -

Fig2.1.1: Biased Positive Clipper

Piecewise linear Transmission characteristics. Vo V Vr+VR O/P t Vi Slope =1 Vr+VR D OFF D ON I/P Vr+VR slope Rf /(Rf+R)

2.2

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(ii) Biased Negative Clipper:R

+
Vi

VR

Vo -

Fig2.1.2: Biased Negative Clipper

Vo

O/P

Slope = Rf/(Rf+R) Slope = 1

t Vi VR-Vr I/P D ON D OFF

Transfer characteristics

For good clipping, we should have Rf << R << Rr R = (Rf.Rr).

2.3

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(iii) Two Level Clipper:R D1 D2 VR2 Vo

Vi0Vdc

vi

V VR1

Fig2.1.3: Two Level Clipper Transfer characteristics

V VR2+Vr Vo VR1-Vr t Vi

Vo

VR1-Vr D1 on D1 off D2 off D2 off

VR2+Vr D1 off D2 on

Vi

(iv) Double ended clipper:-

R D1 vi V D2 Vo

2.4

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Vi Vo Vo

(VZ + Vr) (VZ + Vr) Transfer characteristics

Vi

Transistor Clipper: -

Vi VBE

VCC Rc Rb Q1

V + Vo

1Vac 0Vdc

V1

Fig2.1.5: Transistor as a clipper Vcc

Vo

2.5

VCesat
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Design:- The input Vi is sinusoidal and large enough to carry the transistor both into saturation and below cutoff. The base is biased so that cutin occurs at the voltage V. In saturation, however, the collector current will remain constant at Ic = (Vcc-Vcesat)/Rc = Ics This limiting occurs when ib > Ics/hfe Let us take binary Q (2.5V, 1mA). Vcc = 5V IcRc = 5-2.5 Then Rc = 2.5k. 1) 2) 3) When the transistor is in active region Vo = -hfe.Rc.Vi/Ri When it is in cutoff region Vo = Vcc When it is in saturation Vo = Vcesat.

Procedure: Construct a Biased positive clipper circuit as in figure2.1.1 using a 1N4001 or BY127 diode and a 2.2K resistor. Apply a 10V, 1KHz square wave input & monitor both input & output waveform ON a (dc-coupled) oscilloscope. Sketch the input & output waveforms carefully notify the precise output amplitudes with respect to ground level Construct a two level clipper circuit using zener diode. Sketch the input & output waveforms. Carefully notify the output amplitude

2.6

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CLAMPERS Aim:-To design clamping circuits and observe their outputs. Components and Equipments:-Capacitor, Resistors, Diode, Function Generator, CRO, RPS and Transistors. Circuit diagram:1) Negative Clamper:C

Vi

+ Vo -

Fig2.2.1: Negative Clamper circuit


Input and output wave forms:Transfer characteristics

Vm Vi t -VmVo Vm Vi t Vo -Vm -2Vm -2Vm 2.7 Vo

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Procedure: Construct a negative clamping circuit as in figure2.2.1 using the componenet values determined in design R1 = 56K & C1 = 1f. Apply a 10V, 1KHz square wave input from a source with a reisstance of approximately 500 and monitor both input & output waveform on a (dccoupled) oscilloscope. Sketch the input & output waveforms carefully noting the precise output amplitudes with respect to ground level. Adjust the signal frequency to 100KHz and measure the tilt on the output.

(ii) Positive Clamper:C

Vi

Vo

Fig2.2.2: Positive Clamping circuit Vm Vi 2Vm t -Vm Vo

Vi
2Vm -Vm Vm

Vo
t

2.8

Transfer Characteristics

(iii) Negative Clamper: -

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Vi R D

+ Vo -

Fig2.2.3: Negative Clamper circuit I/P & O/P Waveforms:Vi Vm t 2Vm


-Vm

Vo Vr t

(iv) Biased Negative Clamper:C

Vi R D VR

+ Vo

Fig2.2.4: Biased Negative Clamper circuit I/P & O/P Waveforms:Vi Vm t VR +Vr 2Vm t Vo

2.9

Clamping in base circuit: -

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VCC

Rc C1 R Q1

+ Vc -

1Vac 0Vdc

V1

Fig2.2.5: clamping in the input circuit of an amplifier Voltage Waveforms at Different Nodes:Vs V' V'' t

VB

v
Vc V2' V2
Vs

Vcc t Vs

2.10 t

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Analysis: Explain the shape of the output waveforms from each of the clipping circuits. Explain the shape of the output waveforms from each of the clamping circuits. Calculate the expected output tilt for the clamping circuit in example 1 (class Note Book) when the signal frequency is 100KHz. Compare to the tilt measured in procedure 2-4. Conclusion:In clamping circuit it is observed that an extremity can be set for positive or negative signal excursion. Hence it is also called DC restorer. We can limit a particular voltage up to some voltage level by reference voltage.

2.11

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2.12

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