H Bch Khoa TP.

HCM

L Ch Thng www.tinyurl.com/thongchile

The 8051 Microcontroller Chapter 6 Interrupts

L Ch Thng Ref. I. Scott Mackenzie, The 8051 Microcontroller

Interrupts

Hardware Event

When an interrupt occurs, the main program temporarily suspends execution and branches to the interrupt service routine (ISR), perform the operation, and terminates with a return from interrupt instruction (RETI).
Ref. I. Scott Mackenzie L Ch Thng 2

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Interrupts
An interrupt = Occurrence of a condition (an event) Deal with the event while another program is executing Do many things simultaneously When an interrupt occurs, the main program temporarily suspends execution and branches to the interrupt service routine (ISR), perform the operation, and terminates with a return from interrupt instruction (RETI). ISR vs. subroutine: Similarity: CPU executes another program and then returns to the original program. Difference: It is NOT known when the main program suspends execution.
Ref. I. Scott Mackenzie L Ch Thng 3

Interrupt Sources

2 external interrupts (/INT0 and /INT1), 2 timer interrupts (TF0 and TF1), a serial interrupt (RI or TI), and Timer 2 interrupt (8052 only) Ref. I. port Scott Mackenzie L Ch Thng 4

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Enabling and Disabling Interrupts

EA

ET2 ES ET1 EX1 ET0 EX0

IE (Interrupt Enable) Register

EA : Global enable/disable - : Undefined ET2: Enable Timer 2 interrupt ES: Enable Serial port interrupt ET1: Enable Timer 1 interrupt EX1: Enable External 1 interrupt ET0: Enable Timer 0 interrupt EX0: Enable External 0 interrupt

1 = Enable; 0 = Disable

Ref. I. Scott Mackenzie

Eg. Timer 1 interrupt is enabled as follow: SETB ET1 SETB EA or MOV IE,#10001000B Eg. External 0 and serial interrupts are enabled as follow: SETB EX0 SETB ES SETB EA or L Ch Thng MOV IE,#10010001B 5

Interrupt Priority
PT2 PS PT1 PX1 PT0 PX0
IP (Interrupt Priority) Register

PT2 : Priority for Timer 2 interrupt If 2 interrupts occur simultaneously a high-priority ISR executes PS: Priority for Serial port interrupt If a low-priority ISR is executing PT1: Priority for Timer 1 interrupt when a high-priority interrupts PX1: Priority for External 1 interrupt the low-priority is interrupted A high-priority interrupt can PT0: Priority for Timer 0 interrupt interrupt a low-priority ISR. PX0: Priority for External 0 interrupt A high-priority ISR cannot be interrupted. 1 = Higher Level; 0 = Lower Level If 2 interrupts of the same priority occur simultaneously a fixed polling sequence determines which is serviced first
Ref. I. Scott Mackenzie L Ch Thng

The polling sequence is external 0, Timer 0, external 1, Timer 1, serial 6 port, Timer 2.

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Processing Interrupts
When an interrupt (an event) occurs: The corresponding interrupt flag is set The current instruction completes execution. The PC is saved on the stack. The PC is loaded with the interrupt vector, which is the address of the start of the ISR. The interrupt flag is automatically cleared, except RI &TI (and TF2 & EXF2 for 8052) The ISR executes and takes action in response to the interrupt. The ISR finishes with a RETI (return from interrupt) instruction. This retrieves the old value of the PC from the stack and execution of the main program continues. Ref. I. Scott Mackenzie L Ch Thng 7

Interrupt Flags and Interrupt Vectors

When an interrupt (an event) occurs, the corresponding interrupt flag is set Eg. - When a falling edge occur at /INT0 pin, the IE0 flag is set. - When the Timer 0 is overflow, the TF0 flag is set. - When the transmit buffer is empty, the TI flag is set. When an interrupt is accepted, the value loaded into PC is called interrupt vector. It is the address of the start of the ISR.
INTERRUPT System reset External 0 Timer 0 External 1 Timer 1 Serial port Timer 2
Ref. I. Scott Mackenzie

FLAG RST IE0 TF0 IE1 TF1 RI or TI TF 2 or EXF2

L Ch Thng

VECTOR ADDRESS 0000H 0003H 000BH 0013H 001BH 0023H 002BH

8

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

An Example
Assume that Timer 1 interrupt was enabled. When Timer 1 is overflow TF1 is set (automatically by hardware) The current PC is saved on the stack PC 001BH (and the main program is interrupted) The instruction at address 001BH (i.e. the first instruction of the ISR for Timer 1) executes. When the ISR is done, the RETI instruction retrieves the old value of the PC from the stack and the main program continues. Question: What will happen if the Timer 1 is NOT overflow (i.e. NO interrupt signal occur) but TF1 is set by software (i.e. by using SETB TF1)?

Ref. I. Scott Mackenzie

L Ch Thng

An Example of a Program Using Small ISR

ORG 0000H LJMP MAIN ORG 000BH T0ISR: RETI MAIN: END ;Reset ;Interrupt vector of Timer 0

;Return to main program

Ref. I. Scott Mackenzie

L Ch Thng

10

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

An Example of a Program Using Large ISR

ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 000BH LJMP T0ISR ORG 0013H LJMP E1ISR ORG 001BH LJMP T1ISR ORG 0023H LJMP SPISR ORG 0030H MAIN: SJMP $ E0ISR: RETI T0ISR: RETI Mackenzie Ref. I. Scott END ;Reset ;Interrupt vector of External 0 ;Interrupt vector of Timer 0 ;Interrupt vector of External 1 ;Interrupt vector of Timer 1 ;Interrupt vector of serial port

L Ch Thng

11

Memory Organization

ISR Vector table

3-byte instruction

Ref. I. Scott Mackenzie

L Ch Thng

12

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

A Square Wave Using Timer Interrupt

Write a program using Timer 0 and interrupts to create a 10 kHz square wave on P1.0
ORG 0000H ;Reset LJMP MAIN ORG 000BH ;Interrupt vector of Timer 0 T0ISR: CPL P1.0 RETI ORG 0030H MAIN: MOV TMOD,#02H MOV TH0,#-50 SETB TR0 MOV IE,#82H SJMP $ END

Ref. I. Scott Mackenzie

L Ch Thng

13

Two Square Waves Using Timer Interrupts

Write a program using interrupts to create 7 kHz and 500 Hz square waves on P1.7 and P1.6
ORG 0000H LJMP MAIN ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: MOV TMOD,#12H MOV IE,#8AH MOV TH0,#-71 SETB TR0 MOV TH1,#HIGH(-1000) MOV TL1,#LOW(-1000) SETB TR1 SJMP $ T0ISR: CPL P1.7 RETI T1ISR: CPL P1.6 CLR TR1 MOV TH1,#HIGH(-1000) MOV TL1,#LOW(-1000) SETB TR1 RETI END

Ref. I. Scott Mackenzie

L Ch Thng

14

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Two Square Waves Using Timer Interrupts

Write a program using interrupts to create 7 kHz and 500 Hz square waves on P1.7 and P1.6
ORG 0000H LJMP MAIN ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: MOV TMOD,#12H MOV IE,#8AH MOV TH0,#-71 SETB TR0 SETB TF1 SJMP $ T0ISR: CPL P1.7 RETI T1ISR: CPL P1.6 CLR TR1 MOV TH1,#HIGH(-1000) MOV TL1,#LOW(-1000) SETB TR1 RETI END

Ref. I. Scott Mackenzie

L Ch Thng

15

Character Output Using Interrupts

Write a program using interrupts to continually transmit the ASCII code set (excluding control codes) to a terminal attached to the 8051s serial port (1200 baud, 12 MHz crystal). The ASCII codes consist of 95 graphic codes (20H to 7EH) and 33 control codes (00H to 1FH, and 7FH).
ORG 0000H LJMP MAIN ORG 0023H LJMP SPISR ORG 0030H MAIN: MOV TMOD,#20H MOV TH1,#-26 SETB TR1 MOV SCON,#42H MOV A,#20H MOV IE,#90H SJMP $ SPISR: CJNE A,#7FH,SKIP MOV A,#20H SKIP: MOV SBUF,A INC A CLR TI RETI END

Ref. I. Scott Mackenzie

L Ch Thng

16

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Furnace Controller
Using interrupts, design an 8051 furnace controller that keeps a building at 20oC 1oC. Temperature sensors are connected to /INT0 and /INT1 and provide /HOT and /COLD signals. The furnace ON/OFF solenoid is connected to P1.7. /HOT = 0 if T > 21oC /COLD = 0 if T < 19oC P1.7 = 1 : Furnace ON P1.7 = 0 : Furnace OFF

P3.2

P3.3

Ref. I. Scott Mackenzie

L Ch Thng

17

Furnace Controller
Using interrupts, design an 8051 furnace controller that keeps a building at 20oC 1oC.
ORG 0000H LJMP MAIN ORG 0003H CLR P1.7 RETI ORG 0013H SETB P1.7 RETI ORG 0030H MOV IE,#85H SETB IT0 SETB IT1 SETB P1.7 JB P3.2,SKIP CLR P1.7 SJMP $ END

E0ISR:

;turn furnace off

E1ISR:

;turn furnace on

MAIN:

SKIP:

;enable external 0 & 1 interrupts ;negative edge triggered for external 0 ;negative edge triggered for external 1 ;turn furnace on ;if T > 21 degrees, ; turn furnace off ;do nothing

Ref. I. Scott Mackenzie

L Ch Thng

18

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Intrusion Warning System (1)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone using loudspeaker connected to P1.7 whenever a door sensor connected /INT0 makes a high-to-low transition.

P3.2

Ref. I. Scott Mackenzie

L Ch Thng

19

Intrusion Warning System (1)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone using loudspeaker connected to P1.7 whenever a door sensor connected /INT0 makes a high-to-low transition.
ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0 MOV TMOD,#10H MOV IE,#81H SJMP $ E0ISR: SETB TF1 SETB ET1 RETI T1ISR: CLR TR1 MOV TH1,#HIGH(-1250) MOV TL1,#LOW(-1250) CPL P1.7 SETB TR1 RETI END

Ref. I. Scott Mackenzie

L Ch Thng

20

10

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Intrusion Warning System (2)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for 50 ms (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

P3.2

50 ms

Ref. I. Scott Mackenzie

L Ch Thng

21

Intrusion Warning System (2)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for 50 ms (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.
ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0 MOV TMOD,#11H MOV IE,#81H SJMP $ E0ISR: MOV TH0,#HIGH(-50000) MOV TL0,#LOW(-50000) SETB TR0 SETB TF1 Ref. I. Scott Mackenzie SETB ET0 SETB ET1 RETI T0ISR: CLR TR0 CLR ET0 CLR ET1 RETI T1ISR: CLR TR1 MOV TH1,#HIGH(-1250) MOV TL1,#LOW(-1250) CPL P1.7 SETB TR1 RETI END

L Ch Thng

22

11

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

Intrusion Warning System (3)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for 1 second (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

P3.2

Ref. I. Scott Mackenzie

L Ch Thng

23

Intrusion Warning System (3)

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for 1 second (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.
ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0 MOV TMOD,#11H MOV IE,#81H SJMP $ E0ISR: MOV R7,#20 SETB TF0 SETB TF1 SETB ET0 Ref. I. Scott Mackenzie SETB ET1 RETI T0ISR: CLR TR0 DJNZ R7,SKIP CLR ET0 CLR ET1 LJMP EXIT SKIP: MOV TH0,#HIGH(-50000) MOV TL0,#LOW(-50000) SETB TR0 EXIT: RETI T1ISR: CLR TR1 MOV TH1,#HIGH(-1250) MOV TL1,#LOW(-1250) CPL P1.7 SETB TR1 RETI L Ch Thng 24 END

12

H Bch Khoa TP.HCM

L Ch Thng www.tinyurl.com/thongchile

References
I. Scott Mackenzie, The 8051 Microcontroller Cc ti liu trn Internet khng trch dn hoc khng ghi tc gi

L Ch Thng

25

13