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February 1988
Features
Y Y
Connection Diagram
Dual-In-Line Package
TL F 5943 1
Top View
Note All P-channel substrates are connected to VDD and all N-channel substrates are connected to VSS
TL F 5943
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
Voltage at Any Pin Operating Temperature Range CD4007M CD4007C VSS b0 3V to VDD a 0 3V
b 55 C to a 125 C b 40 C to a 85 C
Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VDD Range Lead Temperature (Soldering 10 seconds)
b 65 C to a 150 C
Units
Min
Typ Max 30 60 15 60 0 05 0 05 mA mA mW mW V V V V 14 29 V V V V mA mA mA mA pA
Quiescent Device VDD e 5 0V Dissipation Package VDD e 10V Output Voltage Low Level Output Voltage High Level Noise Immunity (All Inputs) Noise Immunity (All Inputs) VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VO e 3 6V VDD e 10V VO e 7 2V VDD e 50V VO e 0 95V VDD e 10V VO e 2 9V 36 71 0 75 16 4 95 9 95
4 95 9 95 15 30 35 70 06 13
50 10 2 25 45 2 25 45 10 25 15 30
4 95 9 95
35 70 04 0 95
b1 0 b 0 75
Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS b1 75 P-Channel VDD e 10V VO e 9 5V VI e VSS b1 35 Input Current
b1 4 b4 0 b1 1 b2 5
10
Units
Typ Max 05 10 25 10 0 05 0 05
Min
Min
Quiescent Device VDD e 5 0V Dissipation Package VDD e 10V Output Voltage Low Level Output Voltage High Level Noise Immunity (All inputs) Noise Immunity (All Inputs) VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VO e 3 6V VDD e 10V VO e 7 2V VDD e 5 0V VO e 0 95V VDD e 10V VO e 2 9V 36 71 0 35 12 4 95 9 95
4 95 9 95 15 30 35 70 03 10
50 10 2 25 45 2 25 45 10 25 15 30
4 95 9 95
35 70 0 24 08
b0 9 b 0 45
Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS b1 3 P-Channel VDD e 10V VO e 9 5V VI e VSS b0 65 Input Current
b1 1 b4 0 b 0 55 b 2 5
10
Note 1 This device should not be connected to circuits with the power on because high transient voltages may cause permanent damage
AC Electrical Characteristics CD4007M TA e 25 C and CL e 15 pF and rise and fall times e 20 ns Typical temperature coefficient for all values of VDD e 0 3% C
Symbol tPLH e tPHL tTLH e tTHL CI Parameter Propagation Delay Time Transition Time Input Capacitance Conditions VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input Min Typ 35 20 50 30 50 Max 60 40 75 40 Units ns ns ns ns pF
AC Electrical Characteristics CD4007C TA e 25 C and CL e 15 pF and rise and fall times e 20 ns Typical temperature coefficient for all values of VDD e 0 3% C
Symbol tPLH e tPHL tTLH e tTHL CI Parameter Propagation Delay Time Transition Time Input Capacitance Conditions VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input Min Typ 35 20 50 30 5 Max 75 50 100 50 Units ns ns ns ns pF
AC Test Circuits
TL F 59432
TL F 5943 3
TL F 5943 4
TL F 5943 5
Ceramic Dual-In-Line Package (J) Order Number CD4007MJ or CD4007CJ NS Package Number J14A
Molded Dual-In-Line Package (N) Order Number CD4007MN or CD4007CN NS Package Number N14A
LIFE SUPPORT POLICY NATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user
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2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness
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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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