Instrumentation and Measurement Technology Conference - IMTC 2007 Warsaw, Poland, May 1-3, 2007

Digital Differential Capacitive Angle Transducer

Department of Electrical Engineering, IIT Madras, Chennai-600036, India Phone: +91-44-22574406, Fax: +91-44-22574402, Email: vjk@,iitm. ac. in
Abstract - A high accuracy, easy to fabricate, capacitive angle transducer that provides a digital output linearly proportional to the angle being sensed in the range 0 to 3600 is presented. The variations in the sensor capacitances are converted to digital employing dual slope digital conversion principle. High accuracy is easily obtained since the output is dependent only on a dc reference voltage and a high frequency clock. The signal conditioning circuitry is configured such that the eJfect due to stray capacitances on the output is completely eliminated A prototype developed and tested validates the practicality of the proposed method Keywords: Angle transducer, angular position measurement, dual slope capacitance to digital converter, differential capacitive angle sensor, ratio-metric measurement principle.

Boby George and V Jagadeesh Kumar

I. INTRODUCTION Angle sensors are required in many application areas like automobile, ship, aerospace and industrial automation. Most of the transducers for sensing an angle of rotation provide an analog voltage or current output [1-16]. Angle sensors based on the resistive potentiometer principle lack resolution, vibration tolerance and life span [1]. Though angle sensors of the optical type possess excellent accuracy and resolution they are not suited for dirty and harsh environment. On the other hand capacitive angle sensors are simple in construction and provide low power, contact-less and maintenance free operation. Capacitance type angle sensors of different types have been proposed [2-16] in the past. These sensors either suffer from limited resolution [2, 3] or have limited range of operation [2] or possess appreciable non-linearity [3]. It has been shown that the non-linearity can be minimized but with the use of non-standard complicated geometry [4]. Brasseur G had shown that some of these limitations could be overcome by the use of charge amplifiers and special excitation pattern [5]. Cermak S P et al has proposed a method of sensing using ratiometric computation but their method requires compensation for obtaining reduced errors [6]. Kero N had proposed an integrated approach that has fast response at the cost of resolution [7]. The technique by Chao Hu et al uses phase discrimination and requires involved computations [8]. Zangl H et al have proposed a method that uses a combination of capacitance and magnetic sensors [9]. Li X et al presented an optimization procedure for capacitive angular sensors [10] and Sauter T et al studied the effects of symmetry on the performance of a class of sensors [11]. The angle sensor based on a synchro-resolver proposed by Benammar M et al requires complex signal conditioning

circuit with analog multipliers [12]. Brasseur G has described an angular position sensor comprising a bottom plate that is made of four, quarter circle shapes, a half circle shaped middle plate and a full circle top plate and employed special pulsed voltage sources for excitation [13]. Muhamed E B et al have demonstrated that by using four sinusoids having equal magnitudes but possessing the phase angles of 0, 900, 1800, and 2700 as excitation in Brasseur's transducer, the phase angle of the output can be made proportional to the tangent of the angular movement 0 of the middle plate. The nonlinearity due to the tan function in the output of their transducer is reduced by the use of complicated, non-standard shapes for the bottom quarter plates, thus leading to poor precision and accuracy [14]. Moreover, the output from their transducer is sensitive to the magnitudes and phases of the sinusoids employed for excitation. Ferrari V et al proposed a capacitive angularposition sensor with electrically floating conductive rotor but the span is limited to 110 [15]. Earlier a linear variable capacitive angle transducer (LVDCT) has been proposed [16]. While the optical shaft encoders provide a direct digital output, most of the sensors described above provide an analogue output. We now propose a novel digital signal conditioning circuitry that in conjunction with the basic capacitive sensor of the LVDCT provides a direct digital output that is linearly proportional to the angle being sensed. The measurement range of the proposed transducer covers the full circle range of angles, namely, 0 to 3600. The proposed digital signal conditioning circuit based on dual slope principle provides a digital output that is dependent only on a dc reference voltage and a high frequency clock. Hence, high accuracy is obtained simply by employing a stable dc reference voltage and clock. An added advantage of the proposed technique is that the output from the transducer is insensitive to changes in temperature, moisture, vertical displacement in the moving parts and parasitic capacitances.

II. DIGITAL DIFFERENTIAL CAPACITIVE ANGLE TRANSDUCER The proposed transducer is made of a sensor part and a signal conditioning part. The sensor part of the proposed digital differential capacitive angle transducer, shown in Fig. 1, consists of three circular shaped conducting plates mounted concentrically [16]. While the top and bottom plates (TP and BP) are made of four quarter circle parts and firmly fixed, the middle plate MP, having a semi-circular

1-4244-0589-0/07/$20.00 2007 IEEE

shape, freely rotates between the top and bottom plates. The top, middle and the bottom plates are electrically insulated from one another. The four, quarter circle parts of the top and bottom plates are identical in dimensions and are insulated from each other. The four, quarter circle parts of the top plate (marked as TP1, TP2, TP3 and TP4) are positioned such that each top quarter circle part is aligned with the corresponding quarter circle part at the bottom, marked as BP1, BP2, BP3 and BP4 respectively. The middle, half circle plate MP mounted on a spindle and suitably anchored, rotates freely between the top and bottom plates. The spindle attached to the middle plate MP is mechanically linked to the element whose angular position 0 is to be measured. An annular ring AP, whose outer radius is exactly equal to the outer radius of the top or bottom plate, serves as the guard ring. The radius of the middle, half circle plate rmp is chosen to be slightly less than that of the inner radius of the annular guard ring AP and thus AP encircles the half circular plate, without any mechanical or electrical contact. If the annular ring AP, firmly fixed and insulated from the other parts of the sensor, the middle plate MP and the four bottom quarter circle plates are all kept at the same potential, it nicely turns out that the resulting four capacitances C1, C2, C3 and C4 between lead pairs TP1-BP1, TP2-BP2, TP3-BP3 and TP4-BP4 respectively vary as 0

of a pair of plates of a capacitance. As 0 varies from 00 to 3600, the values of capacitances C1, C2, C3 and C4 will vary as indicated in Fig. 2, resulting in two push-pull or differential pairs of capacitances, namely, C1 - C3 and C2 C4. It is easily seen that the values of the capacitance pair C1 and C3 change only in the intervals 00 <. < 900 and <2700 and remain constant during 900 < 0 < 1800 1800< . < and 2700 0< 3600. Similarly C2 and C4 vary in a push-pull manner but in 900 < 0< 1800 and 2700 < 0< 3600 intervals and remain constant during 00 < 0 < 900 and 1800< 0 < 2700. The values of C1, C2, C3 and C4 can be expressed mathematically as
Ci

CM(0/90),C2 = 0, C3 =CM[1- (/90)] and C4= CM,for00<0<900. Cl =CM, C2 = CM [(O-90)/90], C3 = 0 and for 900 < 0 < 180. C4 =CM [1 - (

C2 =CM, C3 = CM [(0- 180)/90] andC4 =0, for 1800< 0 < 2700. Ci =0, C2 =CM [1-(0 -270)/90], C3 = CM and C4 = CM [(0-270)/90] for 2700< 0 < 3600.
Ci
=

-90)/90], CM 01- (O- 180)/90],

Cl

CM
"Oo

C2
C3

CM
oo-

oo

CM CM

0-00

C4
U

o 4
0

'lon

C# Cq
0
90 180 270
Angular position (a), degree

-4 360

Fig. 1. Sensor part of the proposed digital differential capacitive angle transducer.

Fig. 2. Variations in sensor capacitances C1, C2, C3, C4 and f (C1, C2, C3, C4) as a function of 0.

varies. The dimensions of the plates and the dielectric constant of the insulator employed determine the maximum value CM that any of these capacitances (C1, C2, C3 and C4) can attain when the middle plate MP is in a position such that it is completely outside the corresponding pair of plates of that capacitance. Minimum value of nearly zero occurs when the middle plate MP is positioned such that it covers the complete area

Now we define a function f (C1, C2, C3, C4) as

(Cl - C3

-C4 -2 sgn(Cl -C3 +C2 CI+C3 C2+C4 Cl +C3

)

C2 C4 C2 + C4
-

(1)
(2)

Substituting the values of C1, C2, C3 and C4, we get: f (C1, C2, C3, C4) 0(8/360) -4,

if 0 is measured in degrees. If 0 is expressed in radians, then

f (C1, C2, C3, C4)

0(4/zT) - 4.

Here the function sgn(x) will be -1 for x < 0 and equal to +1 otherwise. The value of f (C1, C2, C3, C4) is also portrayed in Fig. 2. The functional block diagram of the signal conditioning part of the proposed digital differential capacitive angle transducer that evaluates (1) is shown in Fig. 3. The control and logic unit (CLU) of the signal conditioning circuitry contains an N-bit timer-counter to obtain pre-set periods of time intervals, measure time intervals in terms of a clock and compute the angle 0 from the measured values of time. VR in Fig. 3 is a stable dc reference voltage. SI, S2, S3, S4, S5 and S6 are single pole double throw (SPDT) analog switches operated by the control and logic unit. The sensor capacitances C1 and C3 in conjunction with the analog switches SI, S2, S3, opamp OAt and the feed back capacitor CFA form a switched capacitor integrator. This switched capacitor integrator along with comparator OCt and control and logic unit constitute a dual slope Capacitance to Digital Converter, say, CDC-A. Similarly, the sensor capacitances C2 and C4 are an integral part of another CDC, CDC-B realized using the analog switches S4, S5 and S6, opamp OA2 and comparator OC2. A conversion cycle begins with an "auto-zero phase", wherein the control and logic unit makes the outputs of the integrators, namely, v,,A and VoiB in Fig. 3 to become zero by suitably controlling the switches SI, S2, S3, S4, S5 and S6. Once voiA and VoiB are zero, a typical measurement cycle starts. The measurement cycle consists of two integrations. During the first period of integration, say T1 s, a high frequency clock having time period Tc with a 500O duty cycle from the control and logic unit controls SI, S2 and S3 in such a way that C1 and C3 are charged to + VR and discharged every clock cycle. The difference in their charges is transferred to CFA for every clock period Tc. Simultaneously S4, S5 and S6 are controlled in such a way that C2 and C4 are charged to + VR and discharged, with the difference in their charges transferred to CFB, every clock period Tc. This is achieved by setting the switches S2 and S5 at position 2 and switches SI, S3, S4, and S6 to position 1 when the clock is high. During this time C1 and C2 are charged to + VR and C3 and C4 are discharged to ground. When the clock turns low, switches S2 and S5 are set at position 1 and switches S1, S3, S4, and S6 are changed to position 2. Thus when clock is low, C1 will discharge to CFA and at the same time, the charging current of C3 will also enter CFA. Hence CFA will get a charge VR (C1 - C3) during every clock period. Similarly CFB will get a charge VR (C2 - C4). This condition is maintained for a pre-set time period of T1 s (=N1 T). During the period T1, if C1 = C3, then the net charge transferred to CFA will be zero and hence the output of the integrator will be zero. On the other hand if C1 > C3 then the output of integrator OAt, VoiA will ramp in the positive direction in small steps of value VR (C1 - C3)/CFA for every clock period Tc as shown in Fig. 4. If C1 < C3 then the output of integrator OAt, voiA will

ramp in the negative direction in small steps of value VR (C3-C1 )/CFA for every clock period Tc. Similarly depending on the values of C2 and C4, the output of integrator OA2, VoiB will be either positive, zero or negative at the end of T1.

VR

S1'
1,v2 v

1 2

VR

:VS2

VS1 VS3

VCA
VCB Dgt

VR

Control & Logic Unit 'VS4 VS5 ; VS6 i+ 2 '

Output

gta

VR 1 2~~~

VR (C1 + C3 )/CFA for every cock, as indicated in Fig. 4. The time taken for the output voiA to reach zero is measured as T2A (= +N2AT). If at the end of T1 the comparator output is zero (vOiA is negative) then during the second integration time T2, when the clock is high switches S1, S2 and S3 are kept at
position 1 and C1 and C3 get charged to + VR. When the clock turns low, these switches are toggled, transferring the charges in C1 and C3 cumulatively to CFA. Then for every

At the end of T1, the second integration time T2 starts. At the beginning of T2, the outputs of the integrators OAI and OA2 are sensed by the control unit through the comparators OCt and OC2 respectively. During T2, if the output of OCt is high (vOiA is positive) then when the clock is low, S3 is set to position 1 and SI and S2 are kept at position 2 and hence discharging C1 and C3. When the clock turns high, S3 is set to position 2 and SI and S2 are kept at position 1 and hence C1 and C3 get charged to + VR. The charging currents of both C1 and C3 will now enter CFA and hence the output of the integrator OAt will ramp down with small steps of value

Fig. 3. The digital differential capacitive angle transducer - signal conditioning part.

[(N2A +N2B -2Ni) sgn(N2A -N2B) + 4Ni];

(6)

O |

-il :VCB L.._

T2B
._..

GND

t-

..._..

._.._........

if 0 is expressed in radians. Thus if the control unit is programmed to evaluate (5) or (6) after obtaining N2A and N2B, we obtain a digital value directly proportional to the angle being measured. The total conversion time is T1 + T2, which can be a maximum of 2N1Tc. Two conflicting constraints, namely, fast conversion and noise suppression dictate the selection of T1. T1 should be small for fast conversion while for suppression of noise and interference; it should be large [17]. Typically a conversion speed of few samples to few thousand samples per second is obtainable with the proposed method. Since during T2, the charging current is nearly double the full-scale digital output value can be at the best N1. However, this problem can be solved by either reducing the value of VR, to say cx VR, cx < 1 or by increasing the value of CFA and CFB during T2. Thus the full-scale digital output can be set as 2N1, as in the case of a dual slope ADC.

Fig. 4. Integrator output voltages VoiA (solid line) and VoB (dotfed line) along with the comparator output voltages VCA and VCB over a complete cycle when 0 = 900.

III. ERROR ANALYSIS

We assumed ideal parts and circuit components in deriving (1) to (6). However, the characteristics of practical parts and components may vary from the expected ideal ones. The effect of such variations of parts and components on the performance of the transducer is analyzed next.

clock cycle, a net charge of VR(C1 + C3) is transferred to CFA and the output of the integrator OA1 will ramp up with small steps of value VR (C1 + C3 )/CFA . Here too the time taken for the output v,,A to reach zero is measured as T2A and the polarity of T2A is taken as negative (= -N2ATc). During the second integration, simultaneously a similar process is carried out for CDC-B and depending on the values of C2 and C4, the second integration period T2B (+N2BTc or -N2BTC) is obtained. Fig. 4 portrays the condition that would exist when 0 is 900. Since the net charge gained by either CFA or CFB is zero at the end of T2A or T2B, we get NTCVR(Cl- C3)/CFA=N2A TCVR(C1+C3)/CFA and

A. Effects due to dimensional and alignment tolerances

can affect the output [16]. Of these, significant ones alone are discussed here. A small deviation Ad, along the axis of spindle, by individual plates from the expected top or bottom layer positions will introduce a worst case error of (Ad/2d)N counts in the output. This is one of the major error sources. Thus all four quarter circle plates in a layer should be kept at same plane. If the top and bottom planes are not parallel it is seen that the output voltage will become a nonlinear function. In the worst case, a component

The dimensional tolerances introduced during fabrication

N1 TC VR (C2 -C4 )ICFB

resulting in

N2B TC VR (C2 + C4 )/CFB

and C2 -C4

C1 +C3

C1

C3

N2

N1

C2 +C4

N2B

N1

C3 and C2 -C4 in terms of C3 C2 +C4 in f and we N1, N2A N2B (1) get (C1, C2, C3, C4) as N2A N2B As (N2A N2B1
Substituting the values of C

C1 +

2L(D/d)-(D/d)2 L(0/90)2-_(0/90)],

where D is the

Ni+ Ni

sgn

Ni

Utilizing (2), (3) and (4) and rearranging we get

0

total deviation of the plates from the expected parallel position will be added to the output. In fact this was the major source of error in the prototype developed. Eight spacer screws, two in every quarter, to enable proper alignment are employed so that the plates can be positioned parallel to each other and thus bring down the errors.
B. Stray capacitances

[(N2A +N2B -2Ni) sgn(N2A N2B) + 4Ni]360

8Ni

(5)

if Ois measured in degrees

Fig. 5 shows a part of CDC-A with possible stray capacitances. CGP, CGQ and CGR are the stray capacitance from node to ground at nodes P, Q and R respectively.

During the period T1 when the clock is high the switch S1 will be at position 1 and CGP will get charged to VR. When the clock becomes low, switch S1 will set to position 2. Now, since both the ends of CGP are at ground, it discharges to ground, without affecting the performance of the converter. During T1, when S2 is set to position 1, the stray capacitance CGR will get charged to VR but the resulting charging current will not go through the feed back capacitor. When S2 goes to position 2, CGR will discharge to ground, thus having no effect on the converter performance. During T2, depending on the condition C1 < C3 or C1 > C3, both the switches S1 and S2 will be operated in a similar manner as was done during T1. Hence the stray capacitances will not have any effect on the transducer's performance during period T2 as well. The node Q is always at virtual ground or circuit ground thus CGQ neither charges nor discharges, thus the stray capacitance CGQ does not affect the performance of the converters. Hence the CDCs and hence the transducer output are insensitive to stray capacitances. The intra-plate capacitances of top an bottom plates are normally negligible and hence will not influence the performance of the transducer. C. Switch leakage currents
For switches S1 and S2, the leakage currents flow from reference dc source to ground and hence will not affect the output of the circuit. Nodes of S3 are either at ground or at virtual ground thus no leakage current exits between these nodes. Thus the final output is not affected by switch leakage currents. The errors due to opamp bias current can be made negligible by choosing the minimum charging current icimin (z 2 VR(Cl, C3)min/Tc) several orders higher than the opamp bias current. For the prototype, maximum expected bias current for the integrator opamp is 100 pA and the minimum charging current was chosen to be 0.5 gA. The sensor capacitances vary in the range of 10 pF to 100 pF and the switch ON resistances are in the range of few Q, resulting in very small charging and discharging time constants. Hence ON resistances of the switches will not have any effect on the final output.
IV. EXPERIMENTAL SETUP AND RESULTS
In order to demonstrate the practical feasibility of the proposed transducer, a prototype was developed and tested in the laboratory. All the conductive parts, namely, the top, middle and bottom plates as well as the annular ring of the sensor were fabricated out of flat aluminum sheet of 700 gm thickness. 125 mm and 10 mm respectively were the outer and inner radii of the top and bottom plates, while the radius of the middle half circle plate was chosen to be 114 mm. The middle plate was fastened to a 3 mm radius spindle. The annular ring was fabricated to have 10 mm width and an outer radius of 125 mm. Mylar insulating sheets (z. = 3.6) of 100 tm were used as insulation to separate the top and bottom layers of the sensor from the movable middle plate.

For ease of fabrication and testing, the dimensions of the prototype were intentionally made large. However, the transducer can be fabricated to suit any given dimensional constraints. If it is required to reduce the outer radius of the transducer, multiple set of plates can be ganged, as in a variable capacitor, to obtain reasonable value of CM and hence good resolution and accuracy.
2

12
Fig. 5. CDC with possible stray capacitances.

The signal conditioning circuit was implemented using commercially available IC's and tested. Precision reference voltage VR was derived from an LM 385-2.5 reference diode. Two CD4053 ICs were used to realize the switches SI to S6. Two LF356 ICs served as the opamps OAI and OA2. Comparators were implemented with LF357 feeding an LM311. A suitable program, written and burnt into a PIC 16F877A microcontroller [18] served as the Control and Logic Unit for controlling the switches SI to S6, to generate N1 clocks during T1 and count N2A and N2B clocks during T2A and T2B as well as to compute (5) or (6) as the case may be and display the result. The block diagram of the CLU is shown in Fig. 6. As illustrated in Fig. 6, the pins 34 to 37 of the micro controller are used to send the binary coded
VA 3
5V

38
37
3

-11
13

4 MLz Crystal

g X13 Xo888o
17
15 V0 32l 16PO3
-

Ivsi VS2
VS3 VS4

18 1--

24 VS6 23 I v<! S5

Fig. 6. Control and logic unit and display unit.

decimal values of the output digits, serially one digit at a time to be displayed on the corresponding seven segment displays. VCA and VCB are the output signals emanating from the comparators OCt and OC2 respectively and fed as inputs to the microcontroller.

The prototype was tested for the entire range (0 to 360). The angle was measured using a precision protractor having an attached vernier giving a resolution of 0.05. The waveforms at cardinal points of the circuit were observed on an Agilent 54624A oscilloscope. The output recorded for every 2, as well as the resulting errors computed there from are shown in Fig. 7. The worst-case error is found to be less than 0.3O.
400001.0

REFERENCES
[1] [2]

Doebelin E 0, "Measurement systems - application and design McGraw - Hill Publications, Fifth Edition, 2004.
Falkner A H, "The use of capacitance in the measurement of angular and linear displacement", IEEE Trans. Instrum. Meas., Dec-1994, Vol. 43, No. 6, pp. 939 - 42.

[3] [4]

Li X and Meijer G C M, "A novel smart resistive-capacitive position sensor", IEEE Trans. Instrum. Meas., 1995, Vol. 44, No. 3, pp.768-70.
Li X, Meijer G C M, de Jong G W and Spronck J W, " An accurate low-cost capacitive absolute angular-position sensor with a full-circle range", IEEE Trans. Instrum. Meas., April 1996, Vol. 45, No. 2, pp.5 16-19.
Brasseur G, "A capacitive 4-turn angular-position sensor", IEEE Trans. Instrum. Meas., Feb. 1998, Vol. 47, No. 1, pp.275-79.

% Error
300000

Output

-0.5

[5]

[6]

~20000 -* o
10000-

*k

.*

,.,.

0.0 U.U

Cermak S P and Brasseur G, "A planar capacitive sensor for angular 21-23, 2001, measurement", Proc. IEEE IMTC/01, May Budapest, Hungary. pp. 1393-96.

-0.5

[7] Kero N, "Design of an integrated angular sensor system", Proc. of IEEE IMTC/01, May 21-23, 2001, Budapest, Hungary. pp. 433-36. [8]
Chao Hu, Meng M and Liu P X, "Microcomputer-based phasediscrimination capacitive angular sensor", Proc. IEEE international symposium on Comp. Intelligence in Robotics and Automation, July 16-20, 2003, Kobe, Japan, pp. 1439-33.

50

100 150 200 250 Reference angle, degree)

300

350

-1.0

[9] Zangal H, Gallbrunner M, Griesser G and Brasseur G, "A non-contact multi-turn angular position sensor," Proc. Slcon/04, Louisiana, USA, Jan., 27-29, 2004, pp. 2-6.
[10] Li X, de Jong G W and Meijer G C M, "The application of the capacitor's physics to optimize capacitive angular-position sensors", IEEE Trans. Instrum. Meas., Feb. 1997, Vol. 46, No. 1, pp. 8-14. [11] Sauter T and Nachtnebel H, "The effects of asymmetry on Capacitive Angular Sensors", Proc. IEEE IMTC/02, AK, USA, May 21-23, 2002, pp. 1087-92.

Fig 7. Actual output and error characteristic obtained from the prototype developed.

V. CONCLUSIONS A novel direct digital output differential capacitive transducer for the measurement of planar angles from 00 to 3600 and beyond has been developed. The sensor part of the transducer is made of easy to fabricate circular shapes. Signal conditioning electronics, though designed to evaluate a complex equation, is based on simple and efficient dual slope capacitance to digital converter principle. The output sensitivity is dictated only by a dc reference voltage and a high frequency clock hence high accuracy can be easily obtained by selecting a stable precision dc reference voltage and clock. Effects of important mechanical and electrical parameters on the performance of the transducer is analyzed and found to be minimal. A prototype developed and tested establishes that the transducer provides a linear output for the entire 360 range of input angle. Worst-case error spotted during the test on the prototype was less than 0.3 00. Since the middle plate is free to rotate infinitely, the transducer can be extended to measure angles more than 360 (several turns).

[12] Benammar M, Ben-Brahim L, and Alhamadi M A, "A novel resolverto-3600 linearized converter", IEEE Sensors J., Vol.4, No. 1, Feb. 2004, pp. 96-101. [13] Brasseur G, "A robust capacitive angular position sensor", Proc. IEEE IMTC/96, June 4-6, 1996, Brussels, Belgium, pp. 1081-86. [14] Mohammed E B and Rehman M," Digital capacitive angular-position sensor", IEE Proc.- Sci. Meas. Technol., Vol. 150, No. 1, Jan. 2003, pp 15 -18. [15] Ferrari V, Ghisla A, Marioli D and Taroni A, "Capacitive angularposition sensor with electrically floating conductive rotor and measurement redundancy", IEEE Trans. Instrum. Meas., April. 2006, Vol. 55, No. 2, pp. 514-20.

[16] George B, Mohan N M and Kumar V J, "A linear variable differential capacitive transducer for sensing planar angles" Proc. IEEE IMTC-06, Italy, April - 2006, pp. 2070-75. [17] Application note, 1999, AN017, The integrating AID converter (ICL7135), http:Hwww.intersil.com/data/an/anOI7.pdf [18] Data Sheet, 2003 Microchip Technology Inc.,PIC16F87XA, 28140144PinEnhancedFlashMicrocontrollers, http:Hwwl.microchip.com/down loads /en/DeviceDoc/39582b.pdf

ACKNOWLEDGEMENT

The authors thank the IIT Madras authorities for helping them in obtaining a patent on the transducer being proposed in this work.