A Current-Sharing Control Strategy for Paralleled Multi-Inverter Systems Using Microprocessor-Based Robust Control

Y.-K. Chen, Member, ZEEE, T.-F. Wu, Senior Member, ZEEE, Y.-E. Wu and C.-P. Ku
Research Laboratory (PEARL),Department of Electrical Engineering, a i w a n , National C h u g Cheng University, fig-Hsiung, Chia-Yi, T R.O.C. (Tel:886-5-2428159; Fax:886-5-2720862; E-mail: tfwu@ee.ccu.edu.tw)

Abstract - A current-sharing control strategy for paralleled multi-inverter systems using microprocessor-based robust control is presented in this paper. With an averaged current-sharing control (ACSC) strategy, the inverters are in parallel connection and each inverter has a voltage robust controller to achieve system stabiliw and robustness, and a current robust controller to track the averaged inductor current of the inverters to achieve an equal current distribution. Simulation results and hardware measurements of a single-inverter system and a two-inverter system, and simulation results of a three-inverter system with linear and nonlinear loa& have demonstrated the feasibility o f the proposed control scheme in equal current distribution andfast regulation.
Index Terms: Current-sharing control, Robust control, Multi-invertersystem

modulation control [6],[l 11. In a master-slave control (MSC) controlled system [6],the master module is responsible for output voltage regulation, while the slave ones track the current command provided by the master to achieve an equal current distribution. In such a system, if the master module fails, the system will shut down. This is a major drawback. In literature [111, the proposed instantaneous voltage and current controller for the paralleled inverters with a highest output current , I as a command can quickly eliminate the current deviation M and can achieve power balance among inverters. However, those paralleled inverters with non-identical component characteristics and input voltage variation will affect the models of the inverters and might deteriorate in system performance.

I. INTRODUCTION In recent years, sinusoidal pulse width modulated (SPWM) inverters have found their wide applications in various types of ac power conditioning systems, such as automatic voltage regulators (AVR) and minterruptible power supplies (UPS), and so forth. Parallel operation of inverters to obtain a larger power capacity and to improve system reliability becomes the trend of power system design. Two or more inverters operating in parallel must satisfy the following conditions: 1) Same amplitude, frequency and phase among the output voltages of inverters. 2) Proper current distribution among inverters according to their capacities. To meet the above conditions, there are several types of control strategies were proposed in literature [1]-[ll]. Phase locked loop (PLL) control technique was used to synchronize the output voltage of inverters [11. One of most common methods of load current-sharing control is instantaneous
This work w a s supported by the National Science Council, Taiwan,
R.O.C., with the project no: NSC 89-2213-E-270-027. Y.-K. Chen is with Department of Electrical Engineering, Chien Kuo
Institute of Te~h~log~ ChWg-HW, , Taiwan, R.O.C. (Tek88647224676ext.3234; E-mail: ykchen@ckit.edu.tw) T.-F. W u ,Y.-E. W u and C.-P. Ku are with Power Electronics Applied

In this paper, a voltage H robust controller is adopted to reduce the prementioned effects and to achieve the system stability and robustness; thus, the output voltage can be well regulated. In addition, an averaged current-sharing control (ACSC) strategy is used to replace the highest output current scheme proposed in [113 to achieve an equal output current distribution among the inverters connected in parallel and to avoid the noise effect occurring at inverter switching transition.
U. CONFIGURATIONOF PARALLELED MULTI-INVERTER SYSTEM
A paralleled multi-inverter system with the proposed ACSC can be conceptually illustrated by Fig. l(a), in which a schematic diagram of each inverter associated with a DSP controller and the current-sharing bus are depicted in Fig. l(b) and (c), respectively. With the ACSC strategy, the inductor current of each inverter is sensed as the input of current-sharingbus and the averaged current I , of the paralleled multi-inverter system can be obtained from the current-sharing bus. In the system, all the inverters are with the same configuration, and each inverter consists of a half-bridge switch configuration and an L-C output filter. The DSP controller performs digital control and generates SPWM driv-

IEEE Catalogue No. 01CH37239 0-7803-7101-1/01/$10.00 0 2001 IEEE.

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ing signals for switching devices, in which a clock rate of 20 M H z and 10-bit A/D converters ( for feeding back inductor current and output voltage) are adopted. In the proposed system, the voltage

H" robust controller is responsible for output voltage regulation, while the current ones will track the current command I , to achieve an equal current distribution. The proposed control scheme is realized with a DSP chip (TI TMS320F240).

m. ANALYSIS AND DESIGN OF ROBUST

CONTROLLERS
Each inverter with the ACSC strategy includes two controllers: one is for output voltage loop, the other is for current-sharing loop. H" robust control technique is adopted to design these controllers for achieving an equal current distribution and a low output voltage distortion. Before performing these designs, the dynamics of the inverters needs to be analyzed.

transfer characteristics vary with different kinds of loads, input voltage and component values of an inverter system. To reduce the effects due to the variations, robust control technique is adopted to design an output voltage controller. A block diagram used to illustrate the proposed H" robust control is depicted in Fig. 4, in which the multiplicative uncertainty-plant AG(s) is with three uncertainties, including variations of component values, load and input voltage. The design procedure of a robust controller is outlined as follows: . . . . . . . .

A. Modeling of a Single-Inverter System To design a proper controller for an SPWM controlled inverter, the dynamics of a single-inverter system is modeled and illustratedby a control block diagram shown in Fig. 2, where vref is a sinusoidal reference voltage, V, is the output voltage,
Vlb

is the feedback voltage, io is the output cur-

rent, and voltage controller

K,(s) is an output

voltage loop controller. H, represents the feed-

, , is the PWM gain of the inback gain and K verter. The small-signal control-to-output voltage
transfer characteristics ( ) of the single-inverter system is expressed as follows:

;,/i

where RI and LI are resistance and inductance of the load, respectively. Fig. 3 shows the plots of control-to-output voltage transfer function versus frequency under three different load conditions (no load, a 0.7 lagging load and full load). Note that as shown in Fig. 3, the voltage loop small-signal transfer characteristics of the single-inverter system are different under different load conditions. In addition, variations of input voltage and component values are treated as the uncertainty of the single-inverter system in this paper. B. Design of a VoltageRobust Controller It can be observed that output voltage loop

, . . . . . . .

icj...... ' (a) Block diagram of the paralleled multi-inverter system, (b) circuit diagram of a single-inverter system, and (c) circuit diagram of current-sharing bus for the proposed ACSC strategy.
Fig.1.
. . .

Fig. 2. Control block diagram of the single-inverter system.

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need to go back to step 1) to select another set of weighting functions and go through all steps.

Fig. 3. Bode plot of control-to-outputtransfer function.

aumented olant P(s)

C. Modeling of a Paralleled Currentlrharing Multi-Inverter System To investigate the current distribution among inverters, a multi-inverter system is designed with the inverters in parallel connection and each inverter has a current robust controller to track the averaged inductor current I , to achieve an equal current distribution. The control block diagram of the proposed ACSC system is shown in Fig. 5. The small-signal control-to-current transfer function
(;/>) of the inverter system is represented as

follows:

ACSC

Fig. 4. Iilustration of an augmented plant with a robust controllerK(s). 1) Augment the plant G(s) ( = cO/G ) with weighting functions W,(s) and W,(s)based on the desired performance indices. The augmented plant P(s) can be conceptually illustrated by Fig. 4. Generally, weighting function W,(s)is a typical low-pass filter, shaping the sensitivity function S at low frequency to reject disturbance and to reduce tracking errors, and Z, is a control variable used to adjust the tracking errors. Weighting function W,(s) is chosen to be a high-pass filter, shaping the complementary sensitivity function T at high fiequency to minimize instability effects. 2) Find an H" robust controllerK(s)to satisfy the H"' inequality

vdd
inverbplant 1

ACW

where S(s) = (I+G(s)K(s)r' is the sensitivity function and ~ ( s= ) G ( ~ ) K ( ~+ )~ (I ( s ) ~ ( s ) ) - ' is the closed-loop transfer function of the reference command vre, to the measurement output V, (also called complementarysensitivity function). 3) Verify if the design is close to the desired performance indexes based on the evaluation of the singular value bode plot. If it is not, we

Fig.5. System configuration of the proposed paralleled multi-inverter system w i t h e ACSC stratea.

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From (3), it can be observed that the small-signal control-to-inductor current transfer function of each inverter varies with different component values and input voltage.
D. Design of a Current Robust Controller Design of a current robust controller for a current-sharing loop is the same as that of a voltage robust controller, which is shown in subsection B of this section.

parameters used to adjust the bandwidth of the closed-loop system. For good tracking performance, sensitivity function S ( S ) should generally exhibit low-gaii property over low fiequency range. Since

A. Output Voltage Loop

IlW,Sll,< 1, W,(s) must behave as a low-pass filter. The multiplicative uncertainty-plant AG(s) of the single-inverter system includes the variations of input voltage, component values and load conditions. As to the choice of W,(s) for system roN.ILLUSTRATION EXAMPLES AND DISCUSSION bustness, the magnitude of w,(~) should be large Three examples, single-inverter, two-inverter enough to accommodate the multiplicative uncerand three-inverter systems, with current and voltage tainty-plant, which is shown as Fig. 6. Similarly, H"' robust controllers are used to illustrate the high-pass property of W,(S) is required to previous discussion. The design specifications of achieve enough bandwidth for the closed loop the above examples are given as follows: transfer function 2%) because IlW2TIIw< 1.
1) phase margin (PM) 2 60" and gain margin (GM) 2 40 dB, 2) bandwidth2 3 kHz, 3) minimizing the sensitivity to the variations of input voltage, component value and load conditions.
Table LSpecifications and component values of the sinde-invertersvstem. value Component Value Specification Input voltage (V&) k38OV Inductor (L,) s a '

B. Current-SharingLoop

Output frequency

1) P M 2 4 9 andGM24OdB, 2) bandwidth2 0.3 kHz, 3) minimizing the sensitivity to the variations of input voltage and component values.
Example 1: Single-Inverter System The electrical specifications and component values of a single-inverter are collected in Table I. For the output voltage loop, weighting functions W , ( S ) and W,(s) are determined to satisfy all afore-mentioned specifications simultaneously and to ensure robust stability. Typically, the weighting functions W,(s) and W,(s) are chosen as follows:
(4)

Output current

I 60 Hz ICapacitor ESR I 4a I 3A I I

,,,,,,,, ,

L * I * W %
I 1 1 * 1 1 * .

1 1'1"
I , , , , ,

,,,,I"

1 1 , 1 1 1

;,ill.,- i in:..

I1,111111

,11111 U

Fig. 6. Magnitude plot of weighting function W, (s) and multiplicative uncertainty-plant. and W , ( S ) The weighting functions W,(s) of the output voltage loop are selected as

and
12

[$+I]
(1 0-6 s + 1)

and
(5)

where K , is used to adjust the tracking error, nl and n2 are 1 or 2, and 0, and dCare the two

The 6" order H" robust controller K,,(s) can be derived with MATLAB Robust Control Toolbox.

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Through a minimal realization, which is the realization of a model with the redundant or unnecessary states eliminated, a second order robust controller can be obtained as follows:
K A s )=

loop, the weighting functions W,(s) and of the current-sharing loop are selected as

W,(s)

lo4x (1.81~10-~ s2 + 7 . 8 9 lo4 ~ s + 7.64)

sz

+5.95s + 1.98x 10"

(8)

(9)
and

The magnitude-frequency bode plots of K,,(s) and

K, (s) and plotted in Fig. 7. From the figure,

Thus, the robust current-sharing controller is expressed as
K i (s) =
x (-6.90 x sz + 6.83 x 1 0 - l ~ - 1.18 x lo-') sz + 5 . 1 8 ~ 1 0 ' s +1.72~10-'

we can observe that the characteristic of K,,(s) is nearly the same as that of K , (s) from DC to 3 kHz (bandwidth). In simulation, the controller is realized with analog circuits, while in hardware implementation, they are first converted to discrete forms and represented in difference equations, and, then, they are programmed on the DSP chip (TMS 320F240). Simulated and measured results of such a system loaded with a resistor are shown in Fig. 8, where the voltage and current waveforms are sinusoidal and in phase. These results appear closely consistent with each other. Fig. 9 and Fig. 10 show the simulated and measured output current and voltage responses of such a system with a high crest factor load (CF=3) and with a step load change from 33% to loo%, respectively. It can be observed fiom the waveforms that fast regulation can be achieved. Total harmonic distortion (THD) and odd harmonics of the output voltage of the system operated with a linear full load are listed in Table II.

(1 1)

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TLL

(20OV/DIv, SA/DIv, l o m S / D I v )
(b)

Fig. 8. Output voltage and current waveforms of the single-inverter system operating with a pure resistance: (a) simulation, and (b) measurement.

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Fig. 7. Bode plot of 6* and second order robust controllers. Example 2: Two-Inverter System To investigate the current distribution between inverters, a two-inverter system with the circuit parameters collected in Table 1 1 1 is simulated and implemented. As described in previous section, the robust current-sharing control technique has been adopted to deal with the uncertainty between the paralleled inverters. Thus, the controller of this example is the same as that used in example 1. With the design specifications of current-sharing

65 1

Fig. 9. Output voltage and current waveforms of the single-inverter system operating with a high crest factor load: (a) simulation, and Ib) measurement.

proposed ACSC scheme, a three-inverter system with a pure resistant load is simulated, whose results are plotted in Fig. 12. The three output currents are tracking each other precisely and the output voltage waveform sustains sinusoidal. Moreover, in order to investigate the system reliability, the system with ACSC scheme under the case of one inverter in open-circuit failure or short-circuit failure is presented. Fig. 12(a) shows the waveforms of a system with inverter 3 in these failures. Fig. 120) shows an plot in which the load is first supplied by inverter1 and inverter 2; Inverter 3 is then synchronized and connected to the load. It can be seen that the output voltage and current waveforms are sinusoidal and in phase without noticeable variation under such a sudden failure, and the other two inverters can continuously supply power to the load.

(2OOV/DIv, 5A/DIv, loms/DIv)

(b)

Fig. 10. Transient responses of output voltage and current to a step load change from 33% to 100% of the full load: (a) simulation, and (b) measurement. Table IT. Total harmonic distortion (THD) and odd harmonics of output voltage of the single-inverter syste:m. THD of output voltage 1.548% 1.143% 3rd harmonic 5rd harmonic 0.708% 0.608% 7rd harmonic 0.553% 9rd harmonic 0.453% 11rd harmonic 13rd harmonic 0.492%

D .Circuit parameters of a two-inverter sysTable I tem

1
I

(200V/DIv, 1oA/DIv, 1oms/DIv) (b) Fig. 11. Output voltage and current waveforms of the two-inverter system with a pure resistance load: (a) simulation,and (b) measurement.

The voltage and current simulated and measured waveforms for pure resistance load are illustrated in Fig. 11, where v, denotes the output voltage, and

io, and io, are the output currents of inverters 1 and 2, respectively. It can be observed from these plots that equal current distribution can be achieved regardless of the types of loads and component discrepancy between inverters.
Example 3: Three-Inverter System For further verifying the feasibility of the

V. CONCLUSION An ACSC strategy for inverters in parallel operation to achieve an equal current distribution has been studied. Each inverter in the proposed system consists of a voltage robust controller to achieve a fast dynamic response, and a current robust controller to reach system robustness and to reduce uncertainty among inverters. It has been verified that a system with ACSC strategy can accommodate various types of loads and variations of input voltage and component values. In other words, the proposed ACSC strategy is with a tight current tracking characteristic regardless the types of loads and discrepancyamong inverters.

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Simulation results have shown that fast dynamic response, tight output regulation and equal current distribution can be achieved in the proposed paralleled multi-inverter system. Hardware measurements obtained from a laboratorious prototype have shown similar performance to those of the simulation results and have also verified the theoretical discussion.

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Fig. 12. Simulated output voltage and current waveforms of a three-inverter system with (a) inverter 3 in failure, and (b) inverter 3 is connected to the load. REFERENCES P. Dobrorolny, J. Woods, and P. D. Ziogas, A Phase-locked-loop Synchronization Scheme for Parallel Operation of Modular Power Supplies, Proceedings of the IEEE Power Electronics Specialists, 1989, pp. 861-869. J. F. Chen, C. L. Chu, and 0. L. Huang, The Parallel Operation of Two U P S by the Coupled-Inductor Method, Proceedings o f the IEEE Industrial Electronics, Control and Instrumentation, 1992, pp. 733-736. M. E. Fraser and C. D. Manning, Performance of Average Current Mode Controlled PWM UPS Factor Load, Proceedings of the IEEE Power Electronics and Variable-Speed Drives., 1994, pp. 661-667. Y. Y. TZOU, DSP-Based Fully Digital Control of a PWM DC-AC Converter for AC Voltage Regulation, Proceedings of the

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