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ATM switches are central to the operation of ATM networks ATM is Based on BISDN standards
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ATM switch
Both VPI and VCI are
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Input Ports
Switch Fabric
Output Ports
VPI VCI
5 TSSN 4 ECE JNTUHCEH
Control Unit
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Switch Ports
Provide the physical connection to other ATM entities
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Switch Fabric
Defines the interconnection between the input ports and the
output ports Distinguishing characteristic of different types of ATM switches (e.g., shared memory, banyan, Benes, hypercube, ...) Affects performance (cell delay, cell loss)
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Buffering
Some switches are bufferless
that cannot yet be sent on their desired output ports Uses RAM, DRAM, or FIFO...
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Buffering (Contd)
Buffering can be located at the input ports, at the output
ports, internal to the switch fabric, or any combination Buffers are usually limited in size:
e.g., 100 cells per port e.g., 4096 cells per port
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cells of different VCs from input ports to output ports Translation table:
4 27
15 104
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Control Unit
Controls entire operation of switch
Cell switching
Signalling (UNI and NNI) Call Admission Control (CAC)
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VPI = d and VCI = e on output port f uses VPI / VCI table simple fast hardware switching (for data cells)
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new call (e.g., PCR, SCR, CLR, CDV) considers available resources, and (potential) impact on the QOS of existing calls many different approaches proposed
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basis check for conformance to traffic descriptor e.g., leaky bucket, dual leaky bucket can provide traffic shaping tags or discards non-conforming cells
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References
Sumit Kasera, ATM Networks.
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