A New Reversible Design of BCD Adder AIM: The main aim of the project is to design A New Reversible Design

of BCD Adder. ABSTRACT: Reversible logic is one of the emerging technologies having promising applications in quantum computing. In this work, we present new design of the reversible BC adder that has been primaril! optimi"ed for the number of ancilla input bits and the number of garbage outputs. The number of ancilla input bits and the garbage outputs is primaril! considered as an optimi"ation criteria as it is e#tremel! difficult to reali"e a quantum computer with man! qubits. $s the optimi"ation of ancilla input bits and the garbage outputs ma! degrade the design in terms of the quantum cost and the dela!, thus the quantum cost and the dela! parameters are also considered for optimi"ation with primar! focus towards the optimi"ation of the number of ancilla input bits and the garbage outputs. %irstl!, we propose a new design of the reversible ripple carr! adder having the input carr! C& and is designed with no ancilla input bits. The proposed reversible ripple carr! adder design with no ancilla input bits has less quantum cost and the logic depth 'dela!( compared to its e#isting counterparts. The e#isting reversible )eres gate and a new reversible gate called the TR gate is efficientl! utili"ed to improve the quantum cost and the dela! of the reversible ripple carr! adder. The improved quantum design of the TR gate is also illustrated. %inall!, the reversible design of the BC adder is presented which is based on a * bit reversible binar! adder to add the BC
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number, and finall! the conversion of the binar! result to the BC reversible binar! to BC converter. BLOCK DIA RAM:

format using a

%ig+ esign of conventional BC adder.

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%ig+ )roposed reversible BC adder.

TOOLS: ,ilin# -..I/0, 1odelsim2.*c. A!!LICATION AD"ANTA #S: The optimi"ation of the quantum cost and the dela! are also considered. The efficient design of the BC to BC converter. R#$#R#NC#S: 3. 4ang, 1. 0rle, C. Tsen, 0. 1. /chwar", and 1. 5./chulte, 6$ surve! of hardware designs for decimal arithmetic,7 IB1 5. Research and evelopment, vol. 8*, no. ., pp. 9+: ; 9+:8. 1. $. <ielsen and I. 3. Chuang, =uantum Computation and =uantum Information. <ew >ork+ Cambridge ?niv. )ress. >. Takahashi, 6=uantum arithmetic circuits+ a surve!,7 I0IC0 Trans. %undamentals, vol. 0-.@$, no. 8, pp. .A2;:.9B. >. Takahashi and <. Cunihiro, 6$ linear@si"e quantum circuit for addition with no ancillar! qubits,7 =uantum Information and Computation, vol. 8, no. 2, p. **&**9. adder depends on the design methodolog!

used for designing the reversible ripple carr! adder and the reversible binar!

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 T. Toffoli, 6Reversible computing,7 1IT 3ab for Computer /cience, Tech. Rep. Tech memo 1ITD3C/DT1@:8:.

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Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &