KKKL2152 Electrical and Electronics Laboratory II Laboratory 5: MOSFET Biasing and Frequency Response

Instructions: This experiment consists of TWO sections. All students are required to conduct all experiments in Section A. In section B, student will be assigned one question based on the day that the student is performing the lab. Monday Question 1 Tuesday Question 2 Thursday Question 3 Perform all necessary calculations/simulations that are required before your lab. Students need to have a list of components needed to perform the lab. This list shall be submitted to the lab assistant or technician in order to obtain the required items. The lab report needs to be handed in at the end of the lab, using the format given. Each group is required to submit one lab report.

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013

Introduction This laboratory focus on designing a MOSFET amplifier based on the common source topology. This lab shall investigate the behavior, and characteristic of the amplifier, as well as manipulating the gain and frequency response. Objective: By the end of the laboratory work, student should be able to: 1. Properly bias MOSFET at the optimal quiescent point. 2. Explain the factors that govern the frequency response, and hence control the frequency response of a common source amplifier. 3. Explain the factors that affect gain of MOSFET amplifier based on small signal analysis, and hence control to the gain of the amplifier. 4. Explain the Clipping, Distortion and Linearity behavior of MOSFET amplifier, and provide solution to these issues. 5. Materialize an original design of a MOSFET amplifier based on given specifications Pre-Lab Preparation: Students are expected to prepare in advance before commencing on the lab work. The work will take a considerably longer time, if students come unprepared. Spend 1.5 hours on Part A and 1.5 hours on Part B. Reading Recommendation: 1. 2N7000 Enhancement-Mode Datasheet 2. The behavior of Enhancement-Mode MOSFETs trans-conductance. 3. Biasing Enhancement-Mode MOSFET common source amplifier, Q-point, and load line analysis. 4. Small signal analysis of Enhancement-Mode MOSFET common source and common source with degeneration. 5. Frequency response, Bode plot, high and low pass filter. List of Components: 2N7000 Enhancement-Mode MOSFET Semi-Log Graph Paper Resistors (Assorted) Capacitors (Assorted)

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013

Part A: Semi-Guided (Mark: 60%) 1. Build the following circuit in Figure 1. Use the DC offset function of the function generator as a variable DC voltage source to the gate of the MOSFET.

Figure 1: Obtaining Q-point for 2N7000 MOSFET 2. Choose a suitable value for RD. (Note: Do not exceed the maximum manufacturers current rating of 200mA for the 2N7000 MOSFET). Measure the resistance RD of using the multi-meter. 3. Calculate the current across RD when VDS = 0 V. Calculate the current IDS and voltage VDS across the MOSFET at optimal Q-point 4. While varying the gate voltage VGS, measure the current IDS and voltage VDS across the MOSFET at the Q-point. Measure and determine the gate voltage VGS that gives the optimal Q-point. How does the measured current IDS and voltage VDS at Q-point compare with the calculated value? (Hint: Part A.3 and A.4 could be done by the load line analysis, draw the load line and choose the gate voltage that gives the maximum output swing). 5. Remove the variable DC voltage offset; modify the circuit in Figure 1 to include the gate resistances RG1 and RG2, as in Figure 2.

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013

Figure 2: Common Source MOSFET Amplifier 6. Choose the appropriate resistance value for RG1 and RG2 to bias the MOSFET at the Qpoint determined earlier. Measure RG1 and RG2 using the multi-meter. (Note: total resistance of RG1 and RG2 should be in the range of hundreds of kilo-Ohm to Mega-Ohm). 7. Measure the voltage at the gate of MOSFET VGS, and the voltage across the drain-source of the MOSFET VDS. Verify that the MOSFET is biased at the Q-point determined earlier. If it is not biased at the Q-point, re-select RG1 and RG2 and re-measure VGS and VDS. 8. Modify the circuit in Figure 2 to include the input capacitor CIN and CD, as in Figure 3. Briefly explain the function of CIN and CD in terms of frequency response. Hence choose appropriate capacitance value for CIN and CD so that the frequency response of the common source amplifier is unaffected at 5 kHz. (Note: Do not ground the other terminal of CD. Leave it floating at open circuit)

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013

Figure 3: Common Source Amplifier with Input and Drain Capacitor 9. Using the function generator, connect the input voltage VIN as in Figure 3. Set the input voltage to 20mV peak-to-peak, 5 kHz sine-wave. (Note: The oscilloscope has a function generator output, set the output to 50 ohm termination as supposed to the default Hi-Z). 10. Observe and compare the voltage waveform at VDS and VIN. Comment on reason of the phase difference of VDS and VIN. 11. Observe and sketch the voltage waveform at VDS and at VOUT, comment on the difference between the voltage at VDS and VOUT, hence explain the function of CD. 12. Increase the VIN input peak to peak voltage to the point the voltage at VDS clips. Observe and describe the waveform at VDS as the input peak to peak increases. Why does the voltage waveform at VDS clipped? 13. Does the gain stay the same with increase of peak to peak input voltage? Measure the gain at 20mV, 30mV, 50mV, 70mV, 100mV and 200mV of input peak to peak voltage. 14. Observe the voltage waveform at VOUT as the input peak to peak voltage increases. Sketch the output voltage VOUT, just before the voltage starts to clips and after the voltage clipped. Compare with the input voltage and comment in terms of linearity and distortion. (Hint: An undistorted sine wave signal should produce more or less identical or symmetrical positive and negative voltage swing).

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013

Part B: Unguided (Mark: 40%) 1. Explain the distortion observed in A.14. (Hint: Use small signal analysis to assist you with the explanation). 2. Suggest and make modification to the circuit built as in Figure 4, to reduce the distortion at high input peak to peak voltage. Explain how the modified circuit reduces the distortion. (Hint: again, use small signal analysis to assist you with the explanation). 3. If relevant, briefly comment on the drawbacks of the implemented design. 4. Show the workings and calculations to justify the selection of components value. 5. Show that the new design reduces distortion at high input peak to peak voltage. (Sketch the output voltage VOUT, just before the voltage starts to clips and after the voltage clipped. Compare with the input voltage and comment in terms of linearity and distortion.) 6. The design should follow the following specification: Monday: Vcc = 10V Gain = 5 Middle Frequency Range: 100Hz to 15 kHz Vcc = 10V Gain = 10 Middle Frequency Range: 200Hz to 25 kHz Vcc = 10V Gain = 15 Middle Frequency Range: 500Hz to 50 kHz

Tuesday:

Thursday:

7. Draw the full circuit diagram; obtain the frequency response of the circuit through the Bode Plot on a semi log graph. (Note: the Y-axis should be in decibel unit) Hints: The desired frequency response could be obtained by modifying the circuit to include low pass filter and high pass filter. Obtaining gain within 25% of the desired gain is acceptable. Make sure that full working is shown. Take into consideration the absolute maximum rating of 2N7000 MOSFET. Do not damage the MOSFET by operating it at the exceeded manufacturer rating. It is recommended that the amplifier topology is limited to common source topology. Do not ground the other terminal of CD.

KL2152 Semester 1/2013 Prepared by: Radin Zaim bin Radin Umar Email: radin@eng.ukm.my

October 2013