VLSI DESIGN

UNIT-II
Part A

MOSFET TRANSISTORS

1. What is MOSFET? What are their advantages? Metal Oxide Semiconductor Field Effect Tran i tor !MOSFET" #ro$ide all of t%e &itc%in' and am#lification in t%e (MOS inte'rated circuit ) T%e #eed of a di'ital c%i# i directl* related to t%e electrical c%aracteri tic of t%e tran i tor + &%ic% are in turn function of t%e la*out and #roce in' tec%nolo'*) 2. What are the different operating regions foes an MOS transistor? (utoff re'ion+ Non- Saturated Re'ion+ Saturated Re'ion

3. What is surfa e geo!etr"? T%e current flo& t%rou'% a MOSFET i controlled ,* t%e $olta'e +,ut t%e urface 'eometr* #la* a ma-or role in %o& muc% current t%e de$ice can conduct) (%annel &idt% !." i t%e mo t im#ortant dimen ion) #. Write the e$uation for devi e trans ondu tan e and pro ess trans ondu tan e.

.%ere

- De$ice conductance and %a unit of A/V0 - 1roce conductance and %a unit of A/V0 - Oxide ca#acitance+ .-c%annel &idt%+ L-c%annel

- Mo,ilit*+ len't%

%. What is !o&i'it" ratio?

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VLSI DESIGN T%e ratio of #roce called mo,ilit* ratio!r")

UNIT-II

MOSFET TRANSISTORS

conductance e3uation of n and # de$ice i

4r ,. What is o!p'e!entar" pair? In (MOS lo'ic nFET and #FET are u ed in #air &it% a common 'ate in#ut &%ic% i 5no&n a com#lementar* #air)

-. What is s$uare 'a. !ode'? S3uare la& model i t%e im#le t anal*tical model of MOSFET &%ic% i u ed to com#ute current from de$ice $olta'e u in' clo ed-form e3uation ) /. What are the t"pes of regions avai'a&'e in s$uare 'a. !ode' ana'"sis? (utoff re'ion+ Triode re'ion and Saturation re'ion)

0. What are parasiti o!ponents? 1ara itic com#onent are ome un&anted com#onent i)e)+ tran i tor + re i tor + ca#acitor t%at are formed durin' t%e fa,rication of a de$ice)

11.

2ra. the ir uit of a *MOS inverter.

11. 3ive the *MOS inverter 2* transfer operating regions

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hara teristi s and

VLSI DESIGN

UNIT-II

MOSFET TRANSISTORS

12. What are the different regions of operation of a MOS transistor? a) (ut off re'ion 67ere t%e current flo& i e entiall* 8ero !accumulation mode" ,) Linear re'ion6 It i al o called &ea5 in$er ion re'ion &%ere t%e drain current i de#endent on t%e 'ate and t%e drain $olta'e &) r) to t%e u, trate) c) Saturation re'ion6 (%annel i tron'l* in$erted and t%e drain current flo& i ideall* inde#endent of t%e drain- ource $olta'e ! tron'-in$er ion re'ion")

13. 3ive the e4pressions for drain urrent for different !odes of operation of MOS transistor. a) (ut off re'ion6 ID 49 ,) Linear re'ion6 ID 4 5n :!VGS ; VT" VDS ; VDS 0/0< c) Saturation re'ion6 ID 4 !5n /0" !VGS ; VT"0 1#. What are the se ondar" effe ts of MOS transistor? T%re %old $olta'e $ariation +Source to drain re i tance+Variation in I-V c%aracteri tic + Su,t%re %old conduction+(MOS latc%u#)

1%.

2efine Thresho'd vo'tage in MOS? T%e T%re %old $olta'e+ VT for a MOS tran i tor can ,e defined a t%e $olta'e a##lied ,et&een t%e 'ate and t%e ource of t%e MOS tran i tor ,elo& &%ic% t%e drain to ource current+ IDS effecti$el* dro# to 8ero) What is 5od" effe t?
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1,.

VLSI DESIGN

UNIT-II

MOSFET TRANSISTORS

T%e t%re %old $olta'e VT i not a con tant &) r) to t%e $olta'e difference ,et&een t%e u, trate and t%e ource of MOS tran i tor) T%i effect i called u, trate-,ia effect or ,od* effect) 1-. What is *hanne'6'ength !odu'ation? T%e current ,et&een drain and ource terminal i con tant and inde#endent of t%e a##lied $olta'e o$er t%e terminal ) T%i i not entirel* correct) T%e effecti$e len't% of t%e conducti$e c%annel i actuall* modulated ,* t%e a##lied VDS+ increa in' VDS cau e t%e de#letion re'ion at t%e drain -unction to 'ro&+ reducin' t%e len't% of t%e effecti$e c%annel) 2efine !o&i'it" variation 789. >4

1/.

10.

What is 'at hup?

In (MOS circuit t%e un&anted #ara itic com#onent &ill 'i$e rai e to #ara itic circuit effect called ?latc%u#@) T%e re ult of t%i effect i %ortenin' of VDD and VSS line + u uall* re ultin' in c%i# elf de truction) 21. :o. 'at hup an &e prevented? Latc%u# can ,e #re$ented ,* t%e follo&in' te# a) A* increa in' u, trate do#in' le$el &it% a con e3uent dro# in t%e $alue of R u, ) ,) A* reducin' Rn&ell ,* control of fa,rication #arameter and en urin' a lo& contact re i tance to VDD) c) A* introducin' 'uard rin' )

1ART-A 2) De cri,e t%e S3uare la& model for $ariou re'ion in detail 7/ !ar;s+nov6 de 211/9. 0) Ex#lain t%e MOSFET &itc%in' model &it% uita,le dia'ram 7nov6de 21109. =) De cri,e t%e (MOS in$erter and it de 211/9. C) Ex#lain t%e conce#t of MOSFET #ara itic in detail) 7/ !ar;s9
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tructure in detail 7nov6de 21109. ar* dia'ram 7nov6

B) Ex#lain t%e Volta'e tran fer cur$e in detail &it% nece

VLSI DESIGN

UNIT-II

MOSFET TRANSISTORS

D) De cri,e t%e $ariou S1I(E model &it% nece

ar* dia'ram 7nov6de 211/9.

E) De cri,e t%e Latc% u# #ro,lem and it #re$ention met%od)

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