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Introduction

CS 355 Computer Architecture Introduction


Text: Computer Organization & Design, D A Patterson, J L Hennessy Chapter 1 except 1.4, 1.8-1.9 Objectives: The Student shall be able to: Define: ser er, superco!puter, e!bedded s"ste!, des#top. Define: asse!bler, bit, nibble, b"te, $ord, half $ord, double $ord. Define se!iconductor, transistor, %&SI, $afer, chip, "ield Define C'(, !ultiprocessor, !ulticore, core, D%D, D)*+, S)*+, ),+, cache, &*-, .*-, co!piler, instruction set architecture, !otherboard. Describe the !e!or" hierarch" fro! fast to slo$. Con ert bet$een nano, pico, !icro, !illi, #ilo, !e/a, /i/a, tera to sol e hard$are speed, ti!e, si0e proble!s. Describe the difference bet$een asse!bl" lan/ua/e in )ISC ersus CISC !achines, and e!bedded ersus traditional !achines. Class Ti!e: Intro to Class 1 S"llabus Co!puter T"pes, 'erfor!ance, 34. Inside a Co!puter &ab: Co!puter *rchitecture %ocabular" Intro to *sse!bl" &ab: 'erfor!ance 3o!e$or# &ab: Cross$ord 'u00le Total 2 hour 1 hour 1 hour 5 hour 5 hour 1 hour 2 hour 4 hours

Introduction

Introduction to Computer Architecture


Types of Computers Embedded Computer: 'erfor!s sin/le function on a !icroprocessor 6!bedded $ithin a product 7e./. !icro$a e, car, cell phone8 ,b9ecti e: &o$ cost Increasin/l" $ritten in a hard$are description lan/ua/e, li#e %erilo/ or %3D& 'rocessor core allo$s application-specific hard$are to be fabricated on a sin/le chip. Desktop Computer: Desi/ned for indi idual use *lso called personal co!puter, $or#station Server: )uns lar/e, speciali0ed pro/ra!7s8 Shared b" !an" users: !ore !e!or", hi/her speed, better reliabilit" *ccessed ia a net$or# usin/ a re:uest-response 7client-ser er8 interface 6xa!ple: ;ile ser er, Database ser er, .eb ser er Supercomputer: +assi e co!putin/ resources and !e!or" 3undreds to thousands of processors $ithin sin/le co!puter Terab"tes of !e!or" 'ro/ra! uses !ultiple processors si!ultaneousl" )are due to extre!e expense *pplications: .eather forecastin/, !ilitar" si!ulations, etc. .hat t"pes of applications are concerned about: +e!or"< 'rocessin/ speed< (sabilit"< +aintainabilit"< 3o$ can the follo$in/ i!pact perfor!ance< * selected al/orith!< * pro/ra!!in/ lan/ua/e< * co!piler< *n operatin/ s"ste!< * processor< I4, s"ste!4de ices< Co!puter *rchitect !ust balance speed and cost across the s"ste! S"ste! is !easured a/ainst specification

Introduction >ench!ar# pro/ra!s !easure perfor!ance of s"ste!s4subs"ste!s Subs"ste!s are desi/ned to be in balance bet$een each other

Introduction

Physical Hardware Semiconductor: Conducts electricit" poorl" Silicon Ingot: +ade of silicon: substance found in sand Wafer: In/ot is sliced into @.1-inch blan# $afers 'rocessin/: *dd !aterials to $afers: conductor, insulator, or transistors: 7on4off8 s$itch Diced: .afers are cut into s!aller co!ponents called dies or c ips !ield: .afers4dies are tested pro idin/ a A success rate. ;ailures are discarded "onding: The chip is connected to the input4output pins of a pac#a/e Integrated Circuit # c ip: * de ice containin/ up to !illions of transistors $er% &arge Scale Integrated Circuit '$&SI(: * de ice containin/ hundreds of thousands to !illions of transistors Co!puter chassis ocabular": )ot erboard: 3olds the processor, s"ste! bus, arious interfaces and connectors Daug ter card: S!all printed circuit board, often contains !ultiple !e!or" chips. Cage or C assis: 3olds !ultiple boards "ackplane: Contains bus interface for boards to co!!unicate ?D 'ac#a/in/: Transistors interconnect abo e, beside, belo$ 7?D8 Inside a Computer Co!puter co!ponents include: Input: #e"board, !ouse, net$or#, dis# ,utput: printer, ideo screen, net$or#, dis# +e!or": re/isters, cache, D)*+, !a/netic dis#, optical dis# 'rocessor: Intelli/ence: Includes Datapath and Control

Introduction *rocessor Central *rocessing +nit 'C*+( or *rocessor: Intelli/ence Data *at : .or#er: 'erfor!s arith!etic operations usin/ re/isters Control: Intelli/ence: Directs flo$ of infor!ation throu/h the processor 1 !e!or" +ultiple processors no$ re:uired to increase processor speed )ultiprocessor: +ultiple 'rocessors in sa!e co!puter )ulticore: +ultiple 'rocessors 7or cores8 in sa!e chip. 6./., :uadcore B4 cores 're iousl" co!puter en/ineers !ade processors 7hard$are8 faster -o$ pro/ra!!ers !ust !a#e soft$are processin/ faster 7 ia parallel processin/8

"us: Connects the C'(, +e!or", I4, De ices >its are trans!itted bet$een the C'(, +e!or", I4, De ices in a ti!eshared $a" Serial buses trans!it one bit at a ti!e. 'arallel buses trans!it !an" bits si!ultaneousl": one bit per line ,ne bus s"ste!: +e!or", C'(, I4, Subs"ste! on sa!e bus T$o bus s"ste!: ,ne bus: C'(+e!or" ,ne bus: C'(I4, Subs"ste! 6xa!ple: (ni ersal Serial >us 7(S> =.@8 3ot-plu//able: can be plu//ed and unplu//ed $ithout da!a/e to the s"ste! ,perates at @.=, 1.C or D@ +>4sec Can interface to printer or other slo$ de ices

Introduction )emor% ,ierarc %: C'( re/isters Cache +ain +e!or" +a/netic Dis# Tape

;ast, expensi e, olatile

Slo$, cheap, non- olatile

Secondar% )emor%: -on olatile !e!or" used to store pro/ra!s and data $hen not runnin/ -on olatile: Does not lose data $hen po$ered off Includes: +a/netic Dis#: *ccess ti!e: C-1C !s Tape: So!eti!es used for bac#up ,) duplicated dis# ,ptical Dis#: CD or D%D ;&*S3: )e!o able !e!or" cards attach ia (S> ;lopp" and Eip: )e!o able for! of !a/netic dis# )agnetic Disk: +o able ar! !o es to concentric circle then $rites Dis# dia!eter: 1 to ?.C inches &atenc": +o in/ head to Fc"linderG or concentric trac# )otation Ti!e: )otatin/ c"linder to correct location on Ftrac#G Transfer Ti!e: )eadin/ or $ritin/ to dis# on Ftrac#G: C4@@-1C# re olutions4!in. *ccess ti!e: C-=@ !s Optical Disk: &aser uses spiral pattern to $rite bits as pits or flats, 1 !icron. Co!pact Disc 7CD8: Stores !usic Di/ital %ersatile Disc 7D%D8: +ulti-/i/ab"te capacit" re:uired for fil!s >lu-)a" Dis# 7>D8: next /eneration technolo/" )ead-$rite procedure si!ilar to +a/netic Dis# 7but optical $rite, not !a/netic8 -las )emor%: Se!iconductor !e!or" is non olatile +ore expensi e than dis#, but also !ore ru//ed and faster latenc". Hood for 1@@,@@@-1+ $rites. Co!!on in ca!eras, portable !usic pla"ers, !e!or" stic#s *rimar% or )ain )emor%: 'ro/ra!s are retained $hile the" are runnin/. (ses: D"na!ic )ando! *ccess +e!or" 7D./)8 >uilt as an inte/rated circuit, e:ual speed to an" location in !e!or" *ccess ti!e: C@-I@ ns. SI)) 7Sin/le In-line +e!or" +odule(: D)*+ !e!or" chips lined up in a ro$, often on a dau/hter card DI)) 'Dual In-line +e!or" +odule8: T$o ro$s of !e!or" chips .O) 7)ead ,nl" +e!or"8 or E*.O) 76rasable 'ro/ra!!able ),+8

Introduction

Cac e: >uffer to the slo$er, lar/er !ain !e!or". (ses: Static )ando! *ccess +e!or" 7S./)8 ;aster, less dense and !ore expensi e than D)*+ (ses !ultiple transistors per bit instead of the sin/le transistor for D)*+ .egisters: ;astest !e!or" $ithin the C'(. Input0Output +ouse: 6lectro!echanical: )ollin/ ball indicates chan/e in position as 7x,"8 coordinates. ,ptical: &6D li/hts up surface belo$ !ouse. Ca!era sa!ples 1C@@ ti!es per second. ,ptical processor co!pares i!a/es and deter!ines distance !o ed. Displa"s: )aster )efresh >uffer or ;ra!e >uffer: 3olds the bit!ap or !atrix of pixel alues. +atrix of 'ixels: lo$ resolution: D4@ x 48@ pixels to hi/h resolution: =CD@ x 1D@@ pixels >lac# 1 .hite: 1 bit per pixel Hra"scale: 8 bits per pixel Color: 7one !ethod8: 8 bits each for red, blue, /reen B =4 bits &i1uid Cr%stal Displa% '&CD(: &CD pixel control or bends the li/ht for the displa". Color acti e !atrix &CD: Transistor s$itch per pixel controls current -et$or#in/: Co!!unications bet$een co!puters &ocal /rea 2et3ork '&/2(: * net$or# $hich spans a s!all area: $ithin a buildin/ .ired: T"picall" 1@@ +bps 7!illion bits per second8 to 1@ Hbps 7/i/abits4second8 .ireless: 1-1@@ +bps Wide /rea 2et3ork 'W/2(: * net$or# $hich extends hundreds of !ilesJ t"picall" !ana/ed b" a co!!unications ser ice pro ider ,ptical fiber /i es hi/hest data rates

Introduction Introduction to Performance -or!al (sa/e: 'o$er of 1@ 'o$er of T$o (sa/e 1@1= B 1,@@@,@@@,@@@,@@@ =4@ B 1,@99,C11,D=I,IID 1@9 B 1,@@@,@@@,@@@ =?@ B 1,@I?,I41,8=4 D 1@ B 1,@@@,@@@ ==@ B 1,@48,CID 1@? B 1,@@@ =1@ B 1,@=4 @ 1@ B 1 =@ B 1 1@-? B .@@1 1@-D B .@@@,@@1 1@-9 B .@@@,@@@,@@1 1@-1= B .@@@,@@@,@@@,@@1

Tera 7T8 Hi/a 7H8 +e/a 7+8 Kilo 7K8 +illi 7!8 +icro 7L or u8 -ano 7n8 'ico 7p8

(sa/e: 'o$ers of 1@: Data co!!unications, ti!e, cloc# fre:uencies 'o$er of =: +e!or": dis#, D)*+, etc. +e!or" units: "it 7b8: 1 binar" di/it 2ibble: 4 binar" di/its "%te 7>8: 8 binar" di/its Word: Co!!onl" ?= binar" di/its 7but !a" be D48. ,alf Word: 3alf the binar" di/its of a $ord Double Word: Double the binar" di/its of a $ord Co!!on (se: 1@ +bps B 1@ +b4s B 1@ +e/abits per second 1@ +> B 1@ +e/ab"tes 1@ +I'S B 1@ +illion Instructions 'er Second )oore4s &a3: Co!ponent densit" increase per "ear: 1.D 'rocessor perfor!ance increase: 1.C4"earJ since =@@= M 1.=4"ear +e!or" capacit" i!pro e!ent: 4x4?"ears: 1.?? per "ear /ro$th Tradeoffs in 'o$er ersus Cloc# )ate ;aster Cloc# )ate B ;aster processin/ B +ore po$er +ore transistors B +ore co!plexit" B +ore po$er &o$er %olta/e: C%-N1% B &ess po$er Co!puter re:uire ?@x !ore po$er at hi/her speeds

Introduction

6xa!ple 'roble!s: * dis# operates at I=@@ )e olutions per !inute 7)'+8. 3o$ lon/ does it ta#e to re ol e once< I=@@ )e s B 1 )e D@ seconds x secs I=@@4D@ x B 1 1=@x B 1 x B 141=@ B @.@@8?? second B 8.??!illiseconds or 8.?? !s * dis# holds D@@ H>. 3o$ !an" b"tes does it hold< D@@ H> B D@@ x =?@ B D@@ x 1,@I?,I41,8=4 B D44,=4C,@94,4@@ * &*- operates at 1@ +bps. 3o$ lon/ $ill it ta#e to transfer a pac#et of 1@@@ b"tes< 7,pti!isticall" assu!in/ 1@@A efficienc"8 1@ +b B 8 bits 1@ +b B 8@@@ 1 sec x sec 1 sec x sec 1@,@@@,@@@x B 8 x B 841@,@@@,@@@ B @.@@@,@@@,8 B 8@@ns 1@@@ x 8@@ ns B 8@@us 1@,@@@,@@@x B 8@@@ x B 8@@@41@,@@@,@@@B841@,@@@ x B @.@@@8 B 8@@us

Introduction What is Assembly Language? 3i/h &e el pro/ra!!in/ lan/ua/e: double total B @J for 7int 9B@J 9MnrOite!sJ 9PP8 Q total PB ite!R9SJ T double tax B @.@IJ total PB tax U totalJ S"ste!.out.println7VWour total is XY P total8J * compiler con erts the hi/h le el lan/ua/e into assembl% language: +I'S 8@x8D *)+ Corex-+? l$i X1C, @ !o eax,@ C>E )1,:uit l$ X14,ite! lea ebx,*rra" &D) )?,R)=,Z@x18S loop: !o ecx,nbr6lts TST )?,Z@x8@ add X1C,X14 9ecx0 :uit >E :uit addi X14,4 add eax,RebxS &D)> )?,R)@S,Z1 [ [ [ The co!piler calls an assembler5 $hich con erts asse!bl" lan/ua/e into mac ine language 7to store in a binar% object file8: @1@1@@@11@@1@1@@11@1@1@@@1@1@1@@ 1@@11@@1@@@1@1@@11@@11@@1@@1@@1@ 11@@11@11@@@11@@@@@@@11@111@@@@@ [

1@

Co!piler *d anta/es: *llo$s pro/ra!!er to $or# in a !ore natural lan/ua/e: 6n/lish 1 !athe!atics I!pro es pro/ra!!er producti it" * oids hard$are 7or processor8 specific pro/ra!!in/: Co!pilers are portable Therefore: 'ro/ra!!in/ in *sse!bl" is rare toda". Instruction Set /rc itecture 'IS/(: Interface bet$een the hard$are and lo$-le el soft$are *bstraction: &a"ers build on other la"ers 'ro/ra!!er deals $ith hi/h-le el lan/ua/e Co!puter Desi/ner deals $ith IS*, !ultiplexers, decoders, re/isters. &o/ic Desi/ner deals $ith the /ate le el: \,), *-D, -*-D, flop-flops, etc.

Introduction Performance E ercise! ;or each of the follo$in/ :uestions, pro ide ans$ers usin/ !etric notation.

11

18 * s"ste! re:uires 1.Cus to process each 1=8-b"te data record in a database. 3o$ lon/ $ill it ta#e to process a database containin/ 1@@ x 1@I records< 3o$ !uch dis# space is re:uired to store the database<

=8 .hat is the ti!e inter al bet$een successi e sa!ples of an optical !ouse ca!era operatin/ at 1C@@ pictures a second<

?8 * hi/h resolution screen has 19=@ x 1=8@ pixels and uses an 8-bit /ra"scale displa" techni:ue 7i.e., 1 pixelB1b"te8. 3o$ !an" b"tes !ust the raster refresh buffer hold< 3o$ fast !ust the line bet$een the co!puter and the displa" be to send a co!plete displa" in =C@ !s< 'ro ide "our second ans$er in bps.

48 * &*- operates at 1@@+b4s 7bits per second8. 3o$ lon/ does it ta#e to trans!it one pac#et containin/ 1# bits< 3o$ !an" pac#ets can be trans!itted in 1 second< In one !inute<

Introduction

1=

C8 If a !a/netic dis# is rotatin/ at 1@,@@@ )e olutions per +inute 7)'+8, ho$ lon/ does it ta#e for the dis# to rotate once< 3int: Con ert to )'S 7)'Second8. *ssu!in/ it ta#es half a re olution to access the desired data, $hat is the a era/e rotation ti!e<

D8 * D%D dri e operates in Constant &inear %elocit" !ode 7or at a constant speed8 at 1.?C +> per second. .hen readin/ at the center of the dis#, the dis# rotates at 1D@@ re olutions per !inute 7)'+8. .hen readin/ at the far ed/e of the dis# the rotation speed is CI@ )'+. 3o$ !an" b"tes of data can the center and outside circle hold<

I8 3o$ !an" C@@+> tapes $ill be re:uired to bac# up a 1=@H> hard dri e< 3o$ lon/ $ill it ta#e to bac# up the hard dri e if the tape dri e operates at 1@@+> per !inute< *ssu!e no ti!e to chan/e the tapes.

88 The 'o$er'C D@1 processor addresses a !axi!u! of =?= b"tes of !e!or". If a !achine instruction is al$a"s ?= bits lon/, ho$ !an" instructions can be stored in !e!or"<

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