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International Journal of Electronics and Communication Engineering & Technology (IJECET),

ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 36












A Current Injection Folded-Switch Mixer for Direct Conversion
Receiver

R Raja
1
, B Venkataramani
2


1
Research Scholar,
2
Research Supervisor
Electronics and Communication Engineering, National Institute of Technology Tiruchirapalli, India

1
nitt.raja08812@gmail.com,
2
bvenki@nitt.edu

ABSTRACT: In the literature, a Folded Switch Mixer (FSM) which uses self-bias current reuse
technique at the transconductance stage is proposed and implemented in TSMC 90 nm CMOS
process, for achieving high Conversion Gain (CG), good linearity and low Noise Figure (NF). In
order to increase the CG and reduce the NF of FSM further, a Dynamic Current Injection FSM
(CI-FSM) is proposed in this paper. For the purpose of comparison, FSM and CI-FSM are
implemented in UMC 180 nm CMOS process and studied through simulation at 2.4GHz. From
the study, it is found that the CG of CI-FSM is higher by 2dB and NF of CI-FSM approximately
lower by 1.0dB compared to that of the FSM. But CI-FSM has maintain near same linearity
(4dBm) compared to FSM (6dBm) at the cost of increase in area.

KEYWORDS: Current Injection, Double-Balanced Mixer, Flicker noise, Folded Switch
Mixer, Inductive Decoupling.

I. INTRODUCTION

Advancement in wireless communication technologies enabled the development of wireless
sensor networks (WSNs) and wireless body area networks (WBANs). WSNs and WBANs are
employed in a wide variety of applications including health care and industrial automation due
to their reliability, accuracy, flexibility, cost effectiveness and ease of deployment. Since
majority of the nodes in the WSN are battery operated, the power consumed by the individual
node should be reduced in order to enhance its life. Hence, designing the RF front-end blocks of
WSN nodes with low power in the transceiver architecture becomes important. However,
direct conversion architectures suffer from some drawbacks, the most important being DC-
offset, local oscillator (LO) leakage and flicker noise. Generally BJT based transceivers used for
GSM and WCDMA applications, and CMOS transceivers for wireless LANs, that use direct
conversion, have been reported [1]. Zigbee standard is proposed for low power and low bit
rate applications. Hence, this standard is assumed for the transceiver architecture in this
paper. Radio frequency (RF) mixer is one of the important blocks in the RF front end which is
used to either up-convert the signal to RF band or down-convert to base-band. Double-
balanced mixer (DBM) topology is widely used for realizing down conversion mixers in direct
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ISSN 0976 6464(Print)
ISSN 0976 6472(Online)
Special Issue (November, 2013), pp. 36-44
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IJECET
I A E M E
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 37

conversion receiver architecture (DCR). Since DBM provides, high port-to-port isolation, high
CG and lower dc-offset in DCR, this topology is preferred for transceivers using various
wireless standards [2]. Hence, it is chosen for implementation in this paper. Gilbert cell
topology may be used for realizing the DBM. However, it has a lower output swing due to
stacking of transistors [3]-[5]. To overcome this, an ac-coupled folded switch mixer (FSM) with
self-bias current reuse topology is proposed in [6]. This requires lower supply voltage and
power consumption. But it has higher Conversion Gain (CG), Linearity (IIP3) and good port to
port isolation. In order to increase the CG and linearity of the DBM using Gilbert Cell, current
injection (CI) technique is proposed in [7]-[8]. This is at the cost of increase in the noise figure.
To reduce the noise figure of DBM, CI with inductive decoupling is proposed in [10]-[11]. A
dynamic current injection (DCI) scheme with tuned inductor is also proposed in [7] for
reducing noise figure. In this paper, CI-FSM is proposed. This paper is organized as follows. An
overview of dynamic current injection technique and ac-coupled Folded Switch Mixer are given
in section II and section III respectively. Section IV presents the details of the proposed CI-FSM.
Section V gives the implementation details and Simulation results of the Mixers. Section VI
presents the conclusion.

II. DYNAMIC CURRENT INJECTION TECHNIQUE

The double balanced Gilbert mixer (DBM) consists of trans-conductance (RF), Local Oscillator
(LO) switch and Intermediate Frequency (IF) stages respectively. The flicker noise of the LO
switch stage in Double Balanced Mixer (DBM) is the dominant source which degrades the
Noise Figure (NF). For an output current I, the output noise current io,n due to flicker noise
voltage Vn can be expressed as [8],

i
o,n
=
4IV
n
ST
(1)

Where T is the LO signal period and S is the slope of the LO signal at the switching instant.
From (1), it may be noted that the output noise current can be reduced either by increasing S
or by decreasing the Vn. Since, decreasing Vn requires larger device size, S has to be
increased to reduce io,n. This in turn reduces the noise periodt given by,

t =Vn(t)/ S (2)

To reducet, the dynamic current injection (DCI) technique is proposed for DBM in [8] and
the circuit for DCI is shown in fig. 1. In Fig. 1, the current source ID and the switches achieve
the dynamic current injection. The voltages at the nodes A and B of fig.1 turn the switches ON
and OFF. Since the LO amplitude is large, the voltages at nodes A and B are as shown in Fig. 2.
The switches turn ON when the voltage reaches a minimum level or zero crossing point and
thus, the current Is1 and Is2 are injected to nodes A and B. This effectively reduces height of
the noise pulses at the output to zero as shown in Fig. 2 and eliminates the flicker noise. When
no current is injected, the mixer operates normally. In the fixed current injection scheme [8]
shown in fig. 3, current IF is always injected to the common source node of LO stage. But in DCI
scheme, when the LO differential pair is balanced, the current is injected dynamically and DCI
switches do not add noise at the output, since they are ON only at the switching instants.

International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 38


Fig. 1: Dynamic current injection technique for DBM


Fig. 2 Local oscillator common source node voltage waveform of DBM (i.e @ node A and B)

III. AC COUPLED FOLDED SWITCH MIXER

The conversion gain and linearity of double balanced mixer are enhanced in [6] by modifying
the RF transconductance stage with a self-bias current reuse technique. This mixer is termed as
ac-coupled folded switch mixer (FSM) and is shown in fig. 4. In fig. 4 M1, M2 form the RF
transconductance stage. M3, M4 form the self-bias current reuse circuit.

The transistors M5M8 form the pMOS Local Oscillator (LO) folded switch cores which are
used to reduce the contribution of flicker noise at the output. In this FSM, two ac-coupling
capacitors, two LC tanks and two IF loads (Rload) are used. To prevent the signal leakage
through the power supply, the values of Lg and Cg in fig.4 are chosen such that they resonate
at the required operating frequency.
From [6], it may be noted that the conversion gain (CG), IIP3 and NF of the FSM are given by

CG = 20log(2( g
mn
+ g
mp
)R
Ioad
) (3)

I
F
output
LO+ LO
+

LO
--

RF+
-

RF--
Cp
Cp
ID
I
S1

IS2
A B
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 39


Fig. 3 Current injection technique for DBM

IIP3=10log (A2IIP3/ 1mW*2*50) (4)

NF =10log

1+
V
on,
1
I
---
2
+ V
on,ThcrmaI
---
2
V
on,sourcc
---
2

(5)

Where g
mn
, g
mp
are the transconductance of nMOS and pMOS transistors in the self-bias
current reuse circuit, A is Peak-Peak of LO signal, I
on,
1
]
---
2
is flicker noise and I
on,1hcmuI
---
2

,
I
on,soucc
---
2
are thermal noise and source noise of the LO switch pair respectively.

IV. DYNAMIC CURRENT INJECTION FOLDED SWITCH MIXER

Dynamic current injection scheme using a pMOS Switch with tuned inductor Ls
is proposed in the literature [10]-[11] for DBM to avoid the flicker noise during the ON/ OFF
transition of LO switch. This scheme is adapted for the folded switch mixer in this paper and is
termed as current injection FSM (CI-FSM).

The circuit diagram of the CI-FSM is shown in Fig. 5. In CI-FSM, the dynamic current injection is
realized using a current source M11 and two cross coupled pMOS transistors M9 and M10,
whose gates are connected to node X and Y through tuned inductors. The non linear
capacitances of the pMOS device produce harmonics and form leakage paths for injection
current. This may be minimized by using a series tuned inductors Ls1 and Ls2 to resonate with
parasitic capacitances at both pMOS switch pair and LO switch source at the second harmonic
of the LO frequency (2f0).
I
F
output
LO+ LO
+

LO
--

RF+
RF--
Cp
Cp
I
F

I
F+iRF

A B
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 40


Fig. 4 The ac-coupled folded switch mixer



Fig. 5 Schematic diagram of proposed CI-FSM

The proposed CI-FSM circuit effectively monitors the zero-crossing at the LO Common source
node and efficiently injects the small aperture current in the transconductance stage to further
improve the transconductance without affecting the bias current of switching stage. Thus the
flicker noise is reduced at the output of the FSM. Sizes of pMOS switches are chosen to avoid
the parasitic effect in the source terminal of LO switch pair.

International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 41

V. SIMULATION RESULTS

The FSM and the proposed CI-FSM are implemented in 0.18-m CMOS process and simulated
using the Cadence SpectreRF Simulator. For the purpose of comparison, FSM and CI-FSM are
designed for same bias current of 3.5mA and supply voltage of 1.8V. The inductor values Ls1

,
Ls2 in CI-FSM are 11.6nH and layout area for this inductor in 180nm technology is
453x453m
2
. The mixer is designed to operate between 2.4 2.48GHz with a local oscillator
(LO) power of 15dBm and IF of 5MHz. For different RF and LO frequencies, the performance
metrics such as Conversion gain (CG), Linearity (IIP3), Noise figure (NF) and port-port
isolation etc. are computed for FSM, and CI-FSM are given in the table 1. Fig. 6 shows the
simulation results of LO power Vs Conversion gain for both FSM and CI-FSM. The CG of FSM
and CI-FSM computed at 2.4 GHz is found to be 13.2dB to 15.34dB respectively. The increase in
CG of CI-FSM is due to increase in the load resistance (Rload). The increase in Rload

is due to
same bias current (Ibias) without disturbing the operating voltages of the LO switching pair.

Fig. 7 shows the simulated noise (NF) of mixer for different IF up to 5MHz. The noise figure
(NF) of FSM and CI-FSM are found to be 9.06dB and 8.18dB respectively. From (5), it may be
observed that the decrease in Von,(1/ f) of the LO switch core leads to decrease in noise
figure(NF). This is achieved by DCI technique. Fig. 8 gives the plot of RF input power Vs IF
output power. From this figure, it can be noted that the third-order inter modulation input
intercept point (IIP3) of the FSM and CI-FSM are 4.08 dB and 6.19dB respectively. From the
table 1, it can be noted that both the FSM and CI-FSM provides the better RF-to-LO isolation,
LO-to-RF isolation, RF-to-IF isolation, and LO-to-IF isolation. For the purpose of comparison,
the figure of merit (FOM) is given by [6]-[7]

FOM =10log {((10 CG/ 20 *10 (IIP3-10) / 20 ) / (10 NF/ 10 * Pdc ))} (6)

is computed for different FSM and CI_FSM and is given in table. 1. Here the Pdc is the power
consumption. The FOM of CI-FSM is better and hence it may be preferred at the cost of increase
in area.




Fig. 6 Local oscillator power Vs Conversion gain

. FSM
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 42


Fig. 7 Variations of noise figure with IF

Table 1: Performance Summary of the FSM and CI-FSM
Parameters
Performance Metrics
FSM
CI-FSM
V
DD
(V)
1.8
1.8
I
D
(mA)
3.5
3.5
IF frequency (Hz)
5M
5M
Conversion Gain (dB)
13.2
15.34
NF (dB)
9.07
8.19
IIP3 (dBm)
6.19
4.08
IP1db (dBm)
-6.07
-7.7
RF-to-LO isolation (dB)
-53
-53
LO-to-RF isolation (dB)
-48
-46
RF-to-IF isolation (dB)
-108
-98
LO-to-IF isolation (dB)
-97 -95
Power Diss. (mW)
6.3
6.3
FOM
17.3
18.6



Fig. 8 RF-input power Vs IF-output power

. FSM
----CI-FSM
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 43

V. CONCLUSION

The ac-coupled folded switch mixer proposed in the literature and the CI-FSM proposed in this
paper are implemented in the UMC 180nm CMOS process and studied through simulation.
From this study, it is found that the CI-FSM has higher CG and lower NF. This is achieved at the
cost of minor degradation in IIP3 and increase in area. The CI-FSM has a better Figure of Merit
compared to FSM. The proposed FSM works satisfactorily at 2.4 GHz band and is suitable for
direct conversion receiver.

REFERENCES

[1] Danilo Manstretta, Rinaldo Castello, and Francesco Svelto, Low 1/ f Noise CMOS Active
Mixers for Direct Conversion, IEEE Transactions On Circuits And SystemsIi: Analog And
Digital Signal Processing, Vol. 48, No. 9, September 2001.
[2] V. Vidojkovic et al.,Mixer topology selection for a 1.8-2.5 GHz multi-standard front-end in
0.18m CMOS, in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 2, 2003, pp. 300-
303.
[3] Behzad Razavi, RF Microelectronics, Prentice Hall Communications Engineering and
Emerging Technology Series G
[4] Thomas Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge
University Press.
[5] Behzad Razavi, Design of Analog CMOS Integrated Circuits," 1st Ed., McGraw Hill, 2001
[6] Hwann-Kaeo Chiou, Member, IEEE, Kuei-Cheng Lin, Wei-Hsien Chen, and Ying-Zong Juang
A 1-V 5-GHz Self-Bias Folded-Switch Mixer in 90-nm CMOS for WLAN Receiver in IEEE
Tractions on Circuits and SystemsI: regular papers, vol. 59, no. 6, June 2012
[7] Jehyung Yoon, Student Member, IEEE, Huijung Kim, Changjoon Park, Student Member, IEEE,
Jinho Yang, Hyejeong Song, Sekyeong Lee, and Bumman Kim, Fellow, IEEE A New RF
CMOS Gilbert Mixer With Improved Noise Figure and Linearity IEEE Transactions on
Microwave Theory and Techniques, vol. 56, no. 3, March 2008.
[8] H. Darabi, Senior Member, IEEE, and J. Chiu, A Noise Cancellation Technique in Active RF-
CMOS Mixers IEEE Journal of solid state circuits, Vol. 40, No. 12, December 2005.
[9] Vojkan Vidojkovic, Johan van der Tang, Member, IEEE, Arjan Leeuwenburgh, and Arthur
H.M. Van Roermund, Senior Member, IEEEA Low-Voltage Folded-Switching Mixer in 0.18-
um CMOS IEEE Journal of Solid-State Circuits, Vol. 40, no. 6, June 2005.
[10] S. Douss, Farid Touati, Mourad LoulouA 3.1-4.8GHz CMOS Mixer Design Using Current
Bleeding Technique For UWB MB-OFDM Receivers 2007 IEEE International Conference
on Signal Processing and Communications (ICSPC 2007), 24-27 November 2007.
[11] Amir Hossein Masnadi Shirazi Nejad,"On The Design Of Low-Voltage Power-Efficient Cmos
Active Down- Conversion Mixers", The University Of British Columbia, Master's Thesis,
April-13.

BIOGRAPHY

B Venkataramani received his B.E. degree in Electronics and
Communication Engineering from Regional Engineering College,
Tiruchirappalli in 1979 and M.Tech. and Ph.D. degrees in Electrical
Engineering from Indian Institute of Technology, Kanpur in 1984 and 1996,
respectively. He worked as Deputy Engineer in Bharat Electronics Limited,
Bangalore, India, and as a research Engineer in Indian Institute of
Technology, Kanpur, each for approximately 3years. Since 1987 he has been
International Journal of Electronics and Communication Engineering & Technology (IJECET),
ISSN 0976 6464(Print), ISSN 0976 6472(Online), Special Issue (November, 2013), IAEME
International Conference on Communication Systems (ICCS-2013) October 18-20, 2013
B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 44

faculty member of National Institute of Technology (formerly Regional Engineering College)
Tiruchirappalli. Presently, he is working as Professor in the Department of Electronics and
Communication Engineering in National Institute of Technology Tiruchirappalli. He has
published two books and numerous journal papers and international conferences. His recent
research interests include Software Defined Radio; interconnect modeling and mixed-signal
Integrated circuits design.

R Raja received his B.E degree in Electronics and Communication Engineering
from Anna University, Chennai in 2005 and M.E from Anna University,
Coimbatore, India in 2010. He worked as a VLSI Design Engineer in India for a
period of 3 years and worked as a Faculty in Electronics and Communication
Engineering department for a period of one year. Presently, he is pursuing his
Ph.D in Department of Electronics and Communication Engineering, National
Institute of Technology Tiruchirappalli. His research interest includes
Analog/ RF IC design and design of Analog frontend modules for Wireless Communication
standards such as Zigbee, WLANs, PANs, CDMA/ GSM based transceivers.

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