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6) Counter Circuits:
Mod 4 Binary Up/Down Counter Example
Design a circuit to !uild a Mod 4, two bit binary up/down counter. "#e counter cycles from 0 1 2 3 0 1... w#en X=0 or 3 2 1 0 3 2... w#en X=1 "#is circuit can !e represented !y t#e $tate "ransition Diagram in fig. %.1 !elow.
!i . 6.1 "tate #ransition $ia ra% &or Counter Circuit
"#e $"&"E$ ' !inary num!er( are represented using ) flip*flops+ eac# flip*flop represents 1 binary di it. "#e flip*flops can remember what has happened in the past, or what value has been stored in them.
"#ere will !e one external input+ , w#ic# controls t#e direction of t#e count U- for ,./+ and D012 for ,.1. "#e state of the flip-flops, representing the 2-bit binary number 't#e count( will !e t#e only circuit output. 1e could design t#is circuit using 34+ D or " flip*flops+ !ut in t#is example we5ll use D flip*flops. 1#en we are finis#ed t#e circuit will loo6 somet#ing li6e t#is incomplete circuit
lig#ts X
D) Clc 7)5 7)
c'oc(
0ur tas6 is to design t#e circuit+ suc# t#at t#e flip flop inputs will produce t#e current )e*t "tate outputs. "#e design procedure we will follow for t#is pro!lem will !e $esi n +rocedure: 1. 0!tain t#e $tate "a!le from t#e pro!lem statement of from t#e $tate "ransition Diagram. ). Deri8e t#e flip*flop input e9uations from t#e next state conditions in t#e state ta!le. :. Use 4*maps to simplify t#e flip*flop input e9uations. 4. Draw t#e logic diagram wit# flip*flops and com!inational gates as specified !y t#e flip*flop input e9uations. 1e will illustrate t#e solution using !ot# D flip flops and 34 flip flops. $tarting wit# D flip flop solution.
+resent "tate ,nput )e*t "tate !'ip !'op ,nputs
-1
-2
-1
-2
$1
$2
"#e complete solution using 34 flip flops is s#own on t#e following page. +" )" . / input +resent "tate ,nput )e*t "tate !'ip !'op ,nputs 0* 0 0
-1 -2 X 0 1 0 1 0 1 0 1 -1 -2 .1 /1 .2 /2
0 1 1 0 1 1
1* *1 *0
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 1 0 1 0 0 1
1 1 0 0 1 1 0 0
0 1 1 0 d d d d
d d d d 0 1 1 0
1 1 d d 1 1 d d
d d 1 1 d d 1 1
Use t#e 34 Excitation ta!le 8alues to determine inputs to 34 flip flops+ w#ic# will cause correct transitions.
34 =;>- =;0- ?1 corresponds to most significant !it of t#e ) !it !inary num!er+ w#ile flip flop ?) represents t#e least significant !it.
C
-1-2 0 0 0 1 1 1 1 0
-1-2 0 0 0 1 1 1 1 0
-1-2 0 0 0 1 1 1 1 0
-1-2 0 0 0 1 1 1 1 0
0 1 d d
1 0 d d
d d 1 0
d d 0 1
1 d 1 d .2 = 1
1 d 1 d
d 1 d 1 /2 = 1
d 1 d 1
.1=-2C0 1 -20C = -2 C
/1 = -2C01-20C = -2 C
010
C=0
011
101
100
110
111
000
Unused $tates /+ % A 7
). =ill in t#e "tate #ab'e !elow+ for your se9uence+ using t#e 34 excitation 8alues in t#e small ta!le !elow. +" )" . / input =or now lea8e t#e rows associated wit# t#e unused num!ers 0d 0 0 empty for now. ;ater after we fill in t#e 4*maps we will come !ac6 and explore w#at #appens if t#e 1d 0 1 circuit e8er gets into one of t#ese states. d1 input 1 0 !'ip !'op ,nputs Present State Next State -1 -2 -3 C -1 -2 -3 .1 /1 .2 /2 1 .3 /3d 0 5 1
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 6 6 3 4 3 2 1 0
JK FLIP FLOP #1
-3C 0 0 -1-2 0 0 0 1 1 1 1 0 31 .
0 1
1 1
1 0
0 1
1 1
1 0
-3C 0 0 -1-2 0 0 0 1 1 1 1 0 .2 =
0 1
1 1
1 0
0 1
1 1
1 0
-3C -1-2 0 0 0 0 0 1 1 1 1 0 .3 =
0 1
1 1
1 0
-3C -1-2 0 0 0 0 0 1 1 1 1 0 /3 =
0 1
1 1
1 0
.1
-1 77 -1
.2
-2 77
.3
-3 77 -3
/1
/2
-2
/3