Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Summary
Application Note AP0138 (v1.2) March 10, 2008

Supporting the dynamic re-assignment of net names to the routing, Altium Designers pin and part swapping brings a new level of functionality to pin or part swapping during the board design process.

Pin and Part Swapping with Dynamic Net Assignment

Working in harmony with Altium Designers differential pair routing and BGA escape routing capabilities is the pin and part swapping capabilities. This feature provides all the benefits of traditional pin-swapping systems, but takes advantage of Altium Designer's intimate understanding of the net assignments in the design to lift pin swapping to a new level. During a pin swap operation Altium Designer analyses the net assigned to the chosen pin, and dynamically reassigns the net on any connected routing as well as the pin. This level of functionality means that partially routed nets and pre-routed multilayer escapes from complex BGA devices can be swapped. Differential pairs can also be swapped, taking advantage of the knowledge about differential pin-pairs on FPGAs. At the PCB level the system includes a powerful automatic optimizer that uses this information to dynamically re-assign nets to improve routability. For example, the system can perform a reconnect on multiple devices that have been escape routed on multiple layers. It will assign these based on matching escape route layers, shortest Manhattan routing distance, and minimum number of crossovers on each layer. The addition of partial routed net swapping, along with the automatic optimizer gives you the ability to adopt a hierarchical and iterative routing strategy, escape routing devices first, then routing to the edge of a given area, and then finally connecting these sections together. At any time, the automatic swapper can be re-run to re-optimize, based on the updated information provided by the partially routed nets.

Figure 1. The 2-stage automatic pin/net optimizer minimizes connection length and crossovers.

How it Works
Pin Swapping
A component pin is swappable with another pin in that component when it belongs to the same Pin Group (has the same Pin Group value). The Pin Group is a property of each pin in the component, its value can be any alphanumeric string. The Pin Groups for the entire component are set up in the Configure Pin Swapping dialog, as shown in Figure 2. Figure 2 shows the Configure Pin Swapping dialog for a quad resistor array, Figure 3 shows two suitable logical component symbols for that array.
Figure 2. Pin Groups defined for a quad resistor array. Note in Figure 2 how the pins in each resistor in the package belong to the same Pin Group. This definition, where each resistors pins have the same Pin Group value, and that value is different from the other resistors in the array, means that the pins belonging to each resistor can swap with each other, but not with any other resistor in the array. It is the Pin Group setting that determine if pins can be swapped between sub-parts, not the Part Group value, or the design of the schematic symbol. Or to say that another way, as long as two pins have the same Pin Group value they can be swapped, regardless of which sub-part in a multi-part component they are in.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment Figure 3 shows two versions of the logical symbol for a quad resistor array, one is a multi-part component and the other is a single part component. Even though the component symbols are different, both of these will have the same pin swapping configuration, as shown in Figure 2.

Part Swapping
As well as the Pin Group setting, each pin also includes a Part Group and a Part Sequence. The Part Group defines the swap-ability of the pins that belong to this subpart. A sub-part can be swapped with any other sub-part whose pins have the same Part Group value. Like the Pin Group, the Part Group is a text field. There is another criteria for swapping sub-parts, that is that each subpart is drawn as a separate part in a multi-part component symbol. This means that in Figure 3 the sub-parts in the left resistor array (RA3) can be swapped, but not those in the right resistor array (RA6).

Figure 3. Multi-part and single part symbols for the same type of quad resistor array.

The Part-Sequence defines the pin correspondence between sub-parts. This information is required so that the part swapper knows how to re-allocate the nets to each pin in the part when a swap is performed. Pins with the same field value, but in different sub-parts, are deemed to be matching. This is also a simple text field. Figure 8 shows an example of where this field would be used.

Controlling How the Swaps are Performed on the Schematic

In the PCB editor pin swaps are performed by simply swapping over the connection lines going to the two component pads and if necessary, updating the net name on any connected routing. Back on the schematic, there are two ways that a pin swap can be handled, either by swapping the pins on the component symbol, or by swapping net labels on the wires attached to the pins. Each approach has its advantages and disadvantages. Swapping the pins will always work on the schematic, but it may mean that this instance of the component symbol is no longer the same as it was defined in the library. In this situation it means the symbol cannot be updated from the library, and it also means that other instances of the same component in this design will have a different pin arrangement, a possible source of confusion to someone reading the schematic. This approach is ideal for simple components, such as a resistor array. Performing the swap on the schematic by swapping net labels can only be done if the connectivity is established through the net labels, that is, if the pins are not hard-wired together. The advantage of this approach is that the component symbol does not change, and can be updated from the library at a later date. This approach is the best choice for a complex component, such as an FPGA, where physically moving two pins on the symbol could result in an I/O bank-based symbol presenting incorrectly. Selecting which of these two approaches is used is determined by the Allow Pin Swapping Using these Methods options in the Options for Project dialog, as shown in Figure 4. Whenever you select one of the pin or part swap commands these settings are checked, if Changing Schematic Pins is enabled then this approach will always be used. If Adding/Removing Net Labels is the only option enabled, then when you select a pin or part swap command you will only have access to pins that are connected via net labels, to ensure that the changes can be successfully passed back to the schematic.

Figure 4. Select which technique is used to perform the pin swapping on the schematic.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Configuring Pin and Part Swapping

Pin and part swap-ability settings are stored in the schematic components pins, while the option to allow pin or part swapping on a specific component is enabled in the PCB editor, and stored in the PCB component. Pin swap settings can be configured in the schematic and schematic library editors, or the PCB Editor, look for a Configure Pin Swapping command in the Tools menu of each editor. Selecting this will open the Swap Manager dialog. Figure 5 shows the PCB Editor Swap Manager. The Swap Manager lists all components used in the design (or library), with their current swap settings. The PCB editor Swap Manager includes additional columns for enabling/disabling swapping on each component on the board. The Swap Manager includes a powerful right-click menu, making it very easy to quickly copy the settings from one component to another, or enable/disable multiple components in a single click. Double clicking on a component in the Swap Manager will open the Configure Pin Swapping dialog for that component, where you can define the swap setting for pins and for parts.

Figure 5. Use the Swap Manager to configure and manage pin swapping for all components in the design.

Configuring Pin and Part Swapping for a Specific Component

To directly access the Configure Pin Swapping dialog for a specific component, right click on the component on the schematic or the PCB, where you will find a Configure Pin Swapping option in the Part Action (Schematic Editor) or Component Action (PCB editor) sub-menu. To enable or disable pin and/or part swapping for a specific PCB component, click once to select it then press F11 to open the PCB Inspector panel, where both pin and part swapping can be enabled/disabled.

Figure 6. Right click on a component to configure pin and part swapping for that component. Use the PCB Inspector to enable pin and part swapping for an individual component.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Examples of Setting the Pin and Part Swapping

The basic rule of swap-ability is that if they share the same swap value, then they can be swapped. Consider the simple examples shown below, the pin swapping configuration for a quad OR gate (Figure 7), and a quad op-amp (Figure 8).

Figure 7. Pin/part swap settings for a quad OR gate, note that the 2 input pins on each gate can swap with each other, and also the four sub-parts can be swapped.

Figure 8. Pin/part swap settings for a quad op-amp, note that none of the sub-parts permit pin swaps, but the sub-parts can be swapped with each other, and the pins must be correctly sequenced during a part swap.

From the two previous figures the following can be observed: Within each of the four gates in the quad OR gate (Figure 7), the two input pins can be swapped with each other, but the output pin has no pin with a matching swap value within that part. On the other hand, the quad op-amp (Figure 8) has no pins that can be swapped with other pins. The Part Group column defines the swap-ability of the part that that pin belongs to. Note that it does not define which part the pin belongs to, that is defined by the way the component was created in the schematic library. All four parts in both quad devices are swappable. Pins with no Pin Group swap value are not swappable. Pins with no Part Group swap value means that the part they belong to is not swappable. The Part-Sequence defines the pin correspondence between parts. This information is required so that the part swapper knows how to re-allocate the nets to each pin in the part when a swap is performed. Note that for the quad OR gate (Figure 7) either input pin can map to either input pin when a part swap occurs. Note that for the quad op-amp (Figure 8) the net on a negative input pin must go to another negative input pin when a part swap occurs.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Interactive Pin Swapping

Once pin swapping has been enabled, select Interactive Pin/Net Swapping from the PCB editors Tools Pin/Part Swapping sub-menu to perform a pin swap. Note that the menu entry says Pin/Net Swapping, this is because the swapping feature supports more than just pins, it also supports swapping a partially routed net. This is ideal if you are working on a dense board and escape routing from the components at both ends of a connection. When you perform a pin swap any connected routing is also swapped to the target net. After selecting the Pin/Net Swapping command everything in the PCB workspace is masked (faded), except those pins that are swappable. Keep an eye on the Status line, it will prompt you for the next action, to choose a sub-net to move. After clicking on Figure 9. Swappable pins are highlighted (upper image). After clicking the first a swappable pin, you will be prompted to choose pin during a pin swap, possible target pin(s) are highlighted (lower image). target net for sub-net to swap with. Figure 9 shows this for a quad resistor array, for a pin-swap the target net is the resistors other pin. Click on the target pin to complete the swap action. You will then the ready to perform another pin swap, if required.

Interactive Part Swapping

Interactive part swapping operates in the same way as interactive pin swapping, select the command, choose the first part, then choose the second part to swap with. After selecting the Part Swapping command everything in the PCB workspace is masked (faded), except those pins that belong to swappable parts. Keep an eye on the Status line, it will prompt you for the next action, to choose first sub-part to swap. After clicking on any pin in the swappable part, you will be prompted to choose a different sub-part from ABC, where ABC is the designator of the component you are swapping parts in. Figure 10 shows this for a quad resistor array, for a part swap the three other resistors in the array are available for swapping. Click on a pin in the target part to complete the swap action.

Pins will be swapped between the source and target parts in accordance with the defined Part Sequence settings, if no part sequence is defined they will be allocated in a random fashion.

Figure 10. After clicking a pin in the part to be swapped, the pins in possible target parts are highlighted.

Differential Pair Swapping

Differential pair swapping works like single pin swapping. The requirements for successful differential pair swapping include: 1. Differential pairs are defined for the board, set the PCB panel to Differential Pair Editor mode to examine differential pairs. The Pin Groups are defined for the pair pins, an example is shown in 2. Figure 11.
Figure 11. Define the swappable differential pairs in the Configure Pin Swapping dialog.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment It is not necessary to define Part Sequence values for differential pair pins, the differential pair definition details which is the positive pin in the pair, and which is the negative pin. To perform a diff-pair swap select Tools Pin/Part Swapping Interactive Differential Pair Swapping from the menus. Everything in the design will be masked (fade) except differential pair pins that are available for swapping. The Status bar will instruct you to Choose First Differential Pair to Swap, click on either pin in a pair, the status bar will then instruct you to Choose a different Differential Pair from FirstPair[ComponentDesignator], click on either of the pins in the second pair to complete the swap, as shown in Figure 12.
Figure 12. To swap, click on one pin in the first pair, then click on one pin in the second pair.

Automatic Pin/Net Optimizer

The Automatic Pin/Net Optimizer is a two-stage tool. Select Tools Pin/Part Swapping Automatic Pin/Net Optimizer from the menus to perform an automatic optimization. The Automatic Pin/Net Optimizer first runs a fast single-pass optimizer that attempts to minimize cross overs and connection lengths, but may actually increase them. When this is complete you will be asked if you want to run the iterative optimizer. The iterative optimizer will perform multiple passes in an attempt to reduce the number of cross overs and connection lengths.

Passing the Changes Back to the Schematic

When you configure the settings in the Configure Pin Swapping dialog the edits you make are immediately applied to the schematic components, regardless of which editor was active when the command was launched. Design changes that are a result of you performing a pin or part swap in the PCB editor are propagated back to the schematic using the standard Design Update process.

Pushing the Changes from the PCB to the Schematic

Pin and part swaps are passed back to the schematic in the same way that other design changes are transferred by selecting Design Update from the menus. Depending on how the Allow Pin Swapping options are configured, pin swaps will be performed as: Change Pin Names this change will move the pins on the symbol. The pins are not actually moved on the symbol, internally the definition of the two pins are swapped over, however, visually it will appear that the two pins have moved, swapping locations. Move Pins to Different Nets this change will swap the net labels on the attached wires Change Sub-Part ID this change will simply change the sub-part index when a part swap is performed.
If the schematic does not update to show swapped pins or parts, press the END key to refresh the display.

Figure 13. The image on the left shows a pin swap implemented by changing the pin names. This is not always the best solution, for an FPGA moving the pins to a different net by moving the net labels is a better solution, as shown in the image on the right.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Taking Advantage of the New Pin/Part Swap System

Other than the obvious advantages that intelligent pin and part swapping provides, the ability to swap partially routed sub-nets brings a new dimension to swapping, that is ideal for working with large capacity FPGAs. The dynamic net re-assignment allows you to use a multi-stage design process, with progressively refined pin/net assignments.

Initial I/O Assignment

In this stage the FPGAs and other device pins have their net assignments setup in whatever way is easiest at the schematic level. Usually this means just adding net labels in numeric bus order to the pins on the FPGA. The Smart Paste feature in the Schematic Editor is ideal for doing this.

Initial Connection Optimization

The design can be transferred to PCB layout, where there will be a lot of connection crossovers because of the random assignment at the schematic level. Running the Automatic Net/Pin Optimizer command will quickly provide a large reduction in the number of crossovers. The result does not need to be ideal yet, it is just to make things a more visually manageable at the PCB level.

Escape Routing
Fanout and Escape routing can now be performed on large devices on the PCB (right-click on the component to selectively perform fanout/escape routing). This may worsen the previously optimized assignments, but that does not matter at this point.

Escaped Connection Optimization

Run the automatic optimizer again, this time it will take advantage of the pre-routed sections of fanout/escape routing.

Manual Routing
You can now treat the ends of the escape routes as targets to route towards. Ignoring the actual connection lines, you can route from the other ends of the nets toward the nearest escaped I/O route (spatially and by layer) on the PCB, rather than the one that is on the same net. The connections will not line up, instead you will end up with a series of small gaps between the escape routing from the FPGA I/O pins and your routing coming from other parts of the PCB. Figure 14 shows a simple example of this.

Final optimization
Run the automatic optimizer again and it will assign the routed subnets to the closest possible escaped Figure 14. Ignoring the connection lines, used pins are routed from either end, as shown in the image on the left. The optimizer will then tidy this up, including the net I/O pin. This will leave you with a set of very short naming on the routing, as shown in the image on the right. connections to complete. The automatic optimizer has special routines to produce a good result in this case. These can now be interactively or automatically routed.

Manual Pin Swaps

Use the interactive swapper to perform any specific pin swap changes that you need.

Propagate Changes Back to Schematic

When you are ready to propagate these pin assignments back to the schematic, it is a good idea to disable pin changes on the schematic symbols. This is because FPGAs are often presented as multi-part components, with each bank of pins being a separate schematic part. Moving pins from one part to another would result in these symbols becoming logically incorrect, as the bank symbol would include pins that did not belong in that bank. In this situation performing pin swaps by changing net labels is the correct approach.

Repeat as Often as Required

This process can actually be run as many times as required, and at any time during the design process.

AP0138 (v1.2) March 10, 2008

Legacy documentation refer to the Altium Wiki for current information

Pin and Part Swapping with Dynamic Net Assignment

Revision History
Date 21-Dec-2005 15-Jun-2006 10-Mar-2008 Version No. 1.0 1.1 1.2 Revision New release for Altium Designer 6.0 Figures 7 updated to show correct pin group naming. Converted to A4.

Software, hardware, documentation and related materials: Copyright 2008 Altium Limited. All rights reserved. You are permitted to print this document provided that (1) the use of such is for personal use only and will not be copied or posted on any network computer or broadcast in any media, and (2) no modifications of the document is made. Unauthorized duplication, in whole or part, of this document by any means, mechanical or electronic, including translation into another language, except for brief excerpts in published reviews, is prohibited without the express written permission of Altium Limited. Unauthorized duplication of this work may also be prohibited by local statute. Violators may be subject to both criminal and civil penalties, including fines and/or imprisonment. Altium, Altium Designer, CAMtastic, Design Explorer, DXP, LiveDesign, NanoBoard, NanoTalk, Nexar, nVisage, P-CAD, Protel, CircuitStudio, Situs, TASKING, and Topological Autorouting and their respective logos are trademarks or registered trademarks of Altium Limited or its subsidiaries. All other registered or unregistered trademarks referenced herein are the property of their respective owners and no trademark rights to the same are claimed.

AP0138 (v1.2) March 10, 2008