Mips Instruction Set Version 5.

MIPS Programmer Accessible Registers and Memory

The MIPS contains the following: A program counter register that contains the address of the instruction to be executed. P ! PC(31..0) "# general purpose "# bit registers. $P% ! $P%&'.."1( ! PR(0..31! 31..0) A byte addressable memory with "# bits of address. M) ! M)&'..'********+ ( ! M"(0..0########$! %..0) ertain special purpose registers including: ,- ! ,-&"1..'(. +I ! +I&"1..'(
1

*or con/enience we will define the following registers and 0e0or1 in ter0s of the abo/e. Ri & PR(i)' 2ote: R0 0 2ote: In place of %i the MIPS asse0bler uses 3i. Thus. to add the contents of %4 to %5 and put the result in %1' the asse0bl1 language instruction is: add 31'.34.35 M$(n0) & M$(n0! 1(..0) & M"(n0)))M"(n0*1) where ' n' '*******6+ and n0 is e+en. M(n00) & M(n00! 31..0) & M"(n00)))M"(n00*1)))M"(n00*,)))M"(n00*3) where ' n'' '******* + and n00 is a multiple o- . &i.e. n'' addresses a word boundar1(. A detailed description of the asse0bl1 language instructions can be found in the MIPS %7''' Microprocessor 8ser9s Manual a/ailable at http:::www.0ips.co0:publications:index.ht0l. MIPS instruction for0at I ; T1pe instruction "1 < 5 5 1< ' -pcode rs rt n:offset % ; T1pe < 5 5 5 5 < -pcode rs rt rd sha0t func = ; T1pe < #< -pcode raddr
# 1 #

+ is for hexadeci0al. ) for binar1. These 5 bits specif1 which register is rs.

>efinitions: '1< n 11<. '1< ofst 11<. '5 sa 15. '#< addr 1#< rd. rs. rt &3'.?.3"1( 2otation Interpretation 6xa0ple 1@ @ bits of 1 1" ! 111 '@ @ bits of ' '7 ! '''' n&@( The @ th bit of n if n ! 1'''+ then n&1#( ! 1 AA concatenation '#AA1"AA'7 ! ''111'''' 1< n&15( AAn i.e. n sign extended to "# bits. B<57+ ! ''''B<57+. n 4<57+ ! ****4<57+ 2otes: 8nless specified differentl1 P P C7 for each instruction. 3' ' e/en if written to. To be co0patible with SPIM we assume branc/es are not delayed. Arith0etic and ,ogical Instructions. 6xceptions add rd.rs.rt rd rs C rt If io/ rd rd addi rt.rs.n rt rs C n If io/ rt rt addiu rt.rs.n rt rs C n none addu rd.rs.rt rd rs C rt none and rd.rs.rt none rd rs D rt 1< andi rt.rs.n rt rs D ' AAn none di/ rs.rt ,- Int&rs:rt(. +I rs E rt none di/u rs.rt ,- Int&rs:rt(. +I rs E rt none 0ult rs.rt +IAA,- rs x rt none 0ultu rs.rt +IAA,- rs x rt none nor rd.rs.rt none rd F&rs A rt( or rd.rs.rt none rd rs A rt 1< ori rt.rs.n rt rs A ' AAn none sa sll rd.rt.sa rd rt&"1;sa..'(A' or rd rt GG sa none sll/ rd.rt.rs sa0e as sll with sa ! rs&7..'( none sra rd.rt.sa rd rt&"1(saAArt&"1.."1;sa( none sra/ rd.rt.rs sa0e as sra with sa ! rs&7..'( none sa srl rd.rt.sa rd ' AArt&"1.."1;sa( none srl/ rd.rt.rs sa0e as srl with sa ! rs&7..'( none sub rd.rs.rt rd rs ; rt If io/ rd rd subu rd.rs.rt none rd rs H rt xor rd.rs.rt none rd rs I rt or rd rs rt 1< 1< xori rt.rs.n none rt rs I ' AAn or rt rs ' AAn
" 7 5 < B

Integer o/erflow rs and rt are treated as #9s co0ple0ent integers. The Juotient is placed in ,- and the re0ainder in +I. 5 rs and rt are treated as unsigned integers. The Juotient is placed in ,- and the re0ainder in +I. < rs and rt are treated as #9s co0ple0ent integers. B rs and rt are treated as unsigned integers.
" 7

Constant0Manipulating Instructions lui slt sltu slti sltiu beJ bgeK bgeKal bgtK bleK bltKal bltK bne rt.n rd.rs.rt rd.rs.rt rt.rs.n rt.rs.n rs.rt.ofst rs.ofst rs.ofst rs.ofst rs.ofst rs.ofst rs.ofst rs.rt.ofst onstant;Manipulating Instructions rt nAA'1< o0parison Instructions If rs G rt then rd 1 else rd ' If rs G rt then rd 1 else rd ' if rs G n then rt 1 else rt ' if rs G n then rt 1 else rt ' "ranc/ Instructions if rs ! rt then P P C 7 C ofstAA'' else P P C7 if rs&"1( ! ' then P P C 7 C ofstAA'' else P P C7 3"1 P L. if rs M ' then P P C 7 C ofstAA'' else P P C7 if rs&"1( ! ' and rs '"# then then P P C 7 ofstAA'' else P P C7 if rs ' then then P P C 7 C ofstAA'' else P P C7 3"1 P . if rs ' then then P P C 7 C ofstAA'' else P P C7 if rs G ' then then P P C 7 C ofstAA'' else P P C7 if rs rt then then P P C 7 C ofstAA'' else P P C7 1ump Instructions P P &"1..#4(AAaddrAA'' 3"1 P C7. P P &"1..#4(AAaddrAA'' 3"1 P C7. P rs rd P C7. P rs P rs
4 5 1' 11

6xceptions none none none none none none none none none none none none none

N Nal Nalr Nalr Nr

addr addr rs rd.rs rs

none none none none

rs and rt are treated as signed integers. rs and rt are treated as unsigned integers. 1' rs and n are treated as signed integers. 11 rs and n are treated as unsigned integers.
4 5

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lbu lb lhu lh lw lwl

rt.ofst&rs( rt.ofst&rs( rt.ofst&rs( rt.ofst&rs( rt.ofst&rs( rt.ofst&rs(

lwr

rt.ofst&rs(

sb sh sw swl

rt.ofst&rs( rt.ofst&rs( rt.ofst&rs( rt.ofst&rs(

swr

rt.ofst&rs(

0fhi 0flo 0thi

rd rd rs

2oad and Store Instructions rt '#7AAM)&rs C ofst( or rt M)&rs C ofst( rt M)&rs C ofstOB(#7AAM)&rs C ofst( or rt M)&rs C ofst( rt M+&rs C ofst( rt M+&rs C ofst( rt M&rs C ofst( let /a ! rs C offst and assu0e )ig;endian if /a&1.'( ! '' then rt M&/a( if /a&1.'( ! '1 then rt M)&/a(AAM)&/aC1(AAM)&/aC#(AArt&B..'( if /a&1.'( ! 1' then rt M)&/a(AA M)&/aC1(AArt&15..'( if /a&1.'( ! 11 then rt M)&/a(AA rt&#"..'( let /a ! rs C offst if /a&1.'( ! '' then rt rt&"1..4(AAM)&/a( if /a&1.'( ! '1 then rt rt&"1..1<(AAM)&/a(AAM)&/aC1( if /a&1.'( ! 1' then rt rt&"1..#7(AAM)&/a(AA M)&/aC1(AAM)&/aC#( if /a&1.'( then rt M&/a;"( M)&rs C ofst( rt&B..'( M+&rs C ofst( rt&15..'( M&rs C ofst( rt let /a ! rs C offst and assu0e )ig;endian if /a&1.'( ! '' then M&/a( rt if /a&1.'( ! '1 then M)&/a(AAM)&/aC1(AAM)&/aC#( rt&"1..#7( if /a&1.'( ! 1' then M)&/a(AA M)&/aC1(AArt&15..'( rt&"1..1<( if /a&1.'( ! 11 then M)&/a( rt&"1..#7( let /a ! rs C offst if /a&1.'( ! '' then rt rt&"1..4(AAM)&/a( if /a&1.'( ! '1 then rt rt&"1..1<(AAM)&/a(AAM)&/aC1( if /a&1.'( ! 1' then rt rt&"1..#7(AAM)&/a(AA M)&/aC1(AAM)&/aC#( if /a&1.'( then rt M&/a;"( rd hi rd lo hi rs

1es 1es 1es 1es 1es 1es

1es

1es 1es 1es 1es

1es

0tlo

rs

lo rs