Code: 9A04306

1
DIGITAL LOGIC DESIGN
(Computer Science and Engineering)

B.Tech II Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14

Time: 3 hours Answer any FIVE questions All questions carry equal marks *****
1 (a) Convert the following numbers: (i) (41. 6875)10 to hexadecimal number. (ii) (11001101. 0101)2 to base -8 and base 4. (iii) (4567)8 to base 10. Add and multiply the following numbers without converting them to decimal: (i) Binary numbers 1011 and 101. (ii) Hexadecimal numbers 2E and 34. Simply the following Boolean expressions to minimum number of literals: + + . ( + )( + )( + + ). + + . ) ( + )( + ) ( + ) ( +

Max Marks: 70

(b)

2 (a) (b) (c) (d) (e) 3 (a) (b) 4 (a) (b)

Simplify and implement the following SOP using NOR gates f(A, B, C, D) = (0, 1, 4, 5, 10, 11, 14, 15). Reduce the following function using K-map technique f (A, B, C, D) = (0, 2, 3, 8, 9, 12, 13, 15).

5 (a) (b) 6 (a) (b) 7 (a) (b)

Implement BCD to 7-segment decoder for common anode using 4:16 decoder. + + + Implement the following Boolean function using 8:1 multiplexers F(A, B, C, D) = .

Draw the circuit diagram of clocked D-flip flop with NAND gates and explain its operation using truth table. Give its timing diagram. Draw the logic diagram of a JK flip flop and explain. Explain synchronous and ripple counters. Compare their merits and demerits. Design Mod-10 counter using T-Flip flop. Give the comparison between PROM, PLA and PAL. A combinational circuit is defined by the functions 1 (, , ) = (3, 5, 6,7) 2 (, , ) = (0, 2, 4, 7) Implement the circuit with a PLA having three inputs, four product terms and two outputs. Explain the salient features of ASM chart. Draw the ASM chart for weighing machine and explain.

8 (a) (b)

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Code: 9A04306 B.Tech II Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14

DIGITAL LOGIC DESIGN

(Computer Science and Engineering)

Time: 3 hours Answer any FIVE questions All questions carry equal marks *****
1 (a) (b) Subtract (111001)2 from (101011) using is complement. Convert the following numbers: (i) (2 C6B. F2)16 to octal. (ii) (26153. 7406)8 to binary (iii) (1001001. 011)2 to decimal. Simplify the following Boolean expressions to minimum number of literals: + + . (ii) ( + ) ( + ) (A+B+ ). (iii) ( (i) + ) ( + ). (iv) + ( ). Simplify the following Boolean function in SOP form ( , , , ) = + + + + .

Max Marks: 70

(a) (b)

(a) (b)

(a) (b)

Reduce the following function using K-map in SOP form ( , , , ) =(0, 1, 2, 4, 5, 8, 9, 12, 13, 14). Simplify the Boolean function using K-map. + + + Implement with NAND gates. (, , , ) = Design and implement a 4-bit combinational circuit of binary to gray code.

Implement the full adder with a decoder and two OR-gates.

(a)

(b)

Determine a minimal state table equivalent to the state table given below. PS NS Z J1 J2 1 2, 0 4, 1 2 7, 0 1, 0 3 4, 0 2, 1 4 7, 0 1, 0 5 4, 0 1, 1 6 5, 1 6, 1 7 4, 1 4, 1 Design a sequential circuit specified by the state diagram in figure using JK-flip flop.

oo

o o
6 (a) (b) 7 (a) (b) 8 (a) (b)

o
1

Design a 4-bit binary synchronous counter with D-flip flop. Design a converter with the following repeated binary sequence: 0, 1, 2, 4, 6. Use D-flip flops. Implement the following using PLA: ( , , ) = (1, 2, 4, 6), ( , , ) = (0, 1, 6,7), ( , , ) = (2, 6). Obtain the 15-bit hamming code word for the 11-bit data word 11001001010. Obtain the ASM chart for the following state transactions if = 0, control goes from state 1 to state 2 . If = 1 generate a conditional operation and go from 1 2 . How do you indicate moore outputs and Melay outputs in an ASM?

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Code: 9A04306

3
DIGITAL LOGIC DESIGN
(Computer Science and Engineering)

B.Tech II Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14

Time: 3 hours Answer any FIVE questions All questions carry equal marks *****
1 (a) (b) (c) 2 (a) (b) Convert the following numbers in decimal: (i) (10110. 0101)2 (ii) (16. 5)16 (iii) (26. 24)8. Perform (15)10- (28)10 in complement representation. Find the 16s complements of AF3B and convert AF3B to binary.

Max Marks: 70

Convert the following to the other canonical form: (i) F(x, y, z) = (1, 3, 7) (ii) F (A, B, C, D) = (0, 1, 2, 3, 4, 6,12). State and prove the following theorems: (i) Demorgans theorem. (ii) Conserver theorem. (iii) Shanons expansion and reduction theorem. Simplify the following Boolean function for minimal POS form using K-map: (, , , ) = (4, 5, 6, 7, 8, 12) + (1, 2, 3, 9, 11, 14) implement with NOR gates. Reduce the following function using K-map in SOP form. F(w, x, y, z) = (0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14). Realize the following Boolean expression using a 8 1 multiplexer: + + + . = Construct a 5 to 32 line decoder with four 3-to-8 line decoders with enable and a 2 to -4 line decoder. Use block diagrams for the components. A sequential circuit with two D-flip flops, A and B, two inputs , and one output z, is specified by the following next state and output equations: ( + 1) = 1 + ( + 1) = 1 + = . Draw the logic diagram of the circuit. List the state table for the sequential circuit. Draw the corresponding state diagram. Design a serial 2s complementor with a shift register and a flip flop. The binary number is shifted out from one side and its 2s complement shifted in to the other side of the shift register. Show that a BCD ripple counter can be constructed using a 4-bit binary ripple converter with asynchronous clear and a NAND gate that detects the occurrence of count 1010. Tabulate the truth table for an 8 4 ROM that implements the Boolean functions: (, , ) = (1, 2, 4, 6), ( , , ) = (0, 1, 6, 7), (, , ) = (2,6), (, , ) = (1, 2, 3, 5, 7). Considering now the ROM as a memory, specify the memory contents at addresses 1 and 4. Tabulate the PLA programming table for the four Boolean functions listed in above problem. Draw an ASM chart and stage table for a 2-bit up-down can be having mode control input, M= 1: up counting , M = 0 down counting: The circuit should generate an output 1 whenever count becomes minimum or maximum. Draw the ASM chart for weighing machine and explain.

3 (a) (b)

4 (a) (b)

(a) (b) (c) 6 (a) (b)

7 (a)

(b) 8 (a) (b)

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Code: 9A04306

4
DIGITAL LOGIC DESIGN
(Computer Science and Engineering)

B.Tech II Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14

Time: 3 hours Answer any FIVE questions All questions carry equal marks *****
1 (a)

Max Marks: 70

(b)

The state of a 12-bit register is 100010010111. What is its content if it represents: (i) Three decimal digits in BCD. (ii) Three decimal digits in the excess -3 code. (iii) Three decimal digits in the 8421 code. (iv) A binary number. Convert decimal 9126 to both BCD and ASCII codes. For ASCII, an add parity bit is to be appended at the left. Given the Boolean function = + 1 1 + 1 : (i) Implement it with AND. OR and inverter gates. (ii) Implement it with OR and inverter gates. (iii) Implement it with AND and inverter gates. Obtain the dual of the following Boolean expressions: . + + (ii) + + (i) A

2 (a)

(b)

3 (a) (b) 4 (a) (b) 5

Simplify the following Boolean function by using a Quline-McCluskey method: (, , , ) = (0, 2, 3, 6, 7, 8, 10, 12, 13). Find the reduced SOP form of the following function F (A, B, C, D) = m (1, 3, 7, 11, 15) + d (0, 2, 4). Design and implement a 4-bit combinational circuit of binary to gray code. Implement the full adder with a decoder and two OR-gates. A sequential circuit has two JK flip-flops A and B two inputs , and one output 2. The flip flops input equations and circuit output equation are = +1 1 = 1 1 1 = = + 1 . Draw the logic diagram of the circuit. Tabulate the state table. Derive the state equations for A and B. Design a counter with the following repeated binary sequence: 0, 1, 2, 3, 4, 5, 6. Use JK-flip flops. What is the difference between serial and parallel transfer? Explain how to converter serial data to parallel and parallel data to serial. What type of register is needed? Design a combinational circuit using a ROM. The circuit accepts a 3- bit number and generates an output binary number equal to the square of the input number. Implement the following two Boolean functions with a PLA: 1 (, , ) = (0, 1, 2, 4), 2 (, , ) = (0, 5, 6, 7).

(a) (b) (c) 6 (a) (b)

7 (a) (b)

8 (a) (b)

Explain how the ASM chart differs from a conventional flow chart. Show the difference in interpretation using one example. Obtain ASM chart for the following state transitions if = 0. Control goes from state 1 to state 2 , if = 1 generate a conditional operation and go from 1 2 . *****