16 Kay 1977 <'

" BDM/A-77-07t-TR
BY
D.R. R.J. AHTINONE.
THE BOM CORPORATION
AND
OR. SANDIA LABORATORIES
SPICE2 MOS MODELING HANDBOOK
.;..:": .
BDM/A--77-071-TR
DEB6 007556
ABSTRACT: THEMOS (METAL OXIDE SEMICONDUCTOR) TRANSISITOR HODEL UTILIZED
IN THE SPICE2 CIRCUIT ANALYSIS CODE IS DESCRIBED. PAttAHETRiC SrUt)lS ARE
INCLUDE.O TO DEMONSTRATE THE INFLUENCE OF PARAMETRIC VARIATIONS MODEL
PREDICTIONS.
*. , ,.9 .'
THE 80M CORPORATION
FOREWORD
This report, BDM/A-77-071-TR, was prepared by The BDM Corporation.
2600 Yale Blvd., S.E., Albuquerque, New Mexico 87106 for Sandia Labora-
tories, Albuquerque, New Mexico 87115 under contract 03-5961.
DISCLAIMER
This report was prepared as an account of work sponsored by an agency of the Unite<! State,
Government. Neither the United Slates Government nor any agency thereof. nor any of thr.ir
employees. makes any warranty. express or implied. or assumes any legal liability or responsi.
bility ior the accuracy, completeness, or usefulness of any information. apparatus. product, or
process disclosed, or represents that its use would no! infringe privately owned rights. Refer
ence herein to any specific commercial product, process, or service by trade name. trademark.
manufacturer. or otherwise does no\ necessarily constitute or imply its endorsement, recom-
mendation. or favoring by the United States Government or any agency thereof. The views
and opinions of authors expressed herein do not necessarily state or renect those of the
United Stales Government or any agency thereof.
Ii
THE 80M CORPORATION
Chapter
I 1
III
TABLE OF CONTENTS
INTRODUCTION
MODEL PARAMETER DEFINITIONS
Page
'-I
11- t
A. VTO - ZERO BIAS THRESHOLD VOLTAGE 11-1
B. KP - INTRINSIC TRAHSCONDUCTANCE 11-6
C. GAHIiA - BULK THRESHOLD PARAMETER I 1:'7
D. PHI - SURFACE AT STRONG ,NVERSION 11-8
E. LAMBDA - CHANNEL LENGTH MODULATION PARAMETER 11-8
F. RD AND RS - ORAl NAND SOURCE OHMI CRE.S t STANCE 11'-9
G. CGS A.ND CGD -SOURCE AND DRAIN OVERLAP CAPACITANCE 11-9
H. CGB - GATE BULK OVERLAP CAPACITANCE 11-10
I. CSD AND CBS - ZERO BIAS SUBSTRATE - DRAIN AND SUB-
STRATE - SOURCE JUNCTION CAPACITANCE 11-10
J. TOX - OXIDE THICKNESS II-It
K. PB - BULK JUNCTION POTENTIAL 11-11
l. JS - BULK JUNCTION REVERSE SATURATION CURRENT 11-t1
M. HSUB - EFFECTIVE SUBSTRATE DOPING CONCENTRATION 11-12
N. HSS - EFFECTIVE SURFACE STATE DENSITY 11-12
O. HFS - EFFECTIVE FAST SURFACE STATE DENSITY 11-13
P. XJ - METALLURG 1 CAL JUNCTI ON DEPTH I 1-13
Q. LD - LATERAL DIFFUSION COEFFICIENT II-I)
R. NGATE AND TPS - POLYSILICON GATE DOPING AND TYPE OF
POLYSILICON 11-14
s. UO, UCRIT. UNEXP.AND UTRA - SURFACE HOBILITY.
CRITICAL E fiELD. VARIABLE MOBILITY EXPRESSION
EXPONENT, AND TRANSVERSE FIELD COEFFICIENT 11-15
T. KF AND AF - FLICKER NOISE COEFFICIENT AND FLICKER
NOISE EXPONENT 11-15
u. FC - FORWARD BIAS NONIDEAL JUNCTION CAPACITANCE
COEFFICIENT 11-16
IMPLEMENTATION OF FIRST AND SECOND ORDER ELECTRICAL
EFFECTS IN THE SPtCE2 HaS HODEL
A. INTRODUCTION
8. SUBSTRATE BIAS EFFECTS
C. TWO-DIMENSIONAL EFFECTS ON THRESHOLD VOLTAGE
D. WEAK INVERSION EFFECTS
E. CHANNEL LENGTH MODULATION
F. VAil tABLE MOB I LI TV EFFECTS
G. TEHPERATURE EFFECTS
H. VARIABLE CAPACITANCE EFFECTS
iii
fIt -1
II 1-1
111-2
111-7
111-9
111-14
111-18
f 11-25
111-25
THE 80M CORPORATION
Chapter
IV
A
TABLE OF CONTENTS (Concluded)
PARAMETERIZATION FROM INVERTER OUTPUT CHARACTERISTICS
REFERENCES
APPENDIX
SPICE2 MODEL CHANGES
iv
PaQe
-
"IV-l
IV-3
A-I
,TIJE 80M CORPORATION
LIST OF ILLUSTRATIONS
Figure
1-1 SPICE2 HOSFET Hodel
1-2 Simplified Flowchart o.f HOS Hodel Relationship to
SP reE2 Program
(11-l(a) NMOS Draln Characteristics Demonstrating Substrate
Bias Effects
111-1 (b) PMOS Drain Characteristics Demonstrating Substrate
Bias Effects
111-2(a) NMOS Drain Conductance CharacterIstics Demonstrating
Substrate Btas Effects
111-2(b) PMOS Drain Conductance Characteristics Demonstrating
Substrate Bias Effects
111-, Development of Two-Dimensional Effects on Threshold
Vol tage
111-4{a) NMOS Drain Conductance Characteristics Demonstrating
Two-Dimensional Threshold Voltage Effects
111-4(b) PMOS Drain Conductance Characteristics Demonstrating
Two-Dimensional Threshold Voltage Effects
"1-5 Description of Weak Inversion Effects
111-6(a) NMOS Drain Conductance Characteristics Demonstrating
Weak Inversion Effects
111-6(b) PMOS Drain Conductance Characteristics Demonstrating
Weak Inverstion Effects
111-7 FinIte Saturation Conductance Due to Channel Length
Hodu I a t i on
111-8(a) NMOS Drain Characteristics Demonstrating Channel
Shortening Effects
PMOS Characteristics Channel
Shortening Effects
111-9 Parametric Analysis of Variable Mobility Equation
111-I0(a) NMOS Drain CharacteristIcs Demonstrating Variable
Hobility Effects
v
Paqe
-
1-3
1-4
111-4'
111-5
111-6
111-8
111-10
I I I -1 1
111-12
111-15
111-17
111-19
111-20
I 1 ( -2:2
111-2:3
THE BDM CORPORATION
LIST OF ILLUSTRATIONS (Concluded)
Fioure
.
Ill-l0{b) PHOS Drain Characteristics Demonstrating Variable
Habill ty Effects
III-Il(a) NMOS Drain Characteristics Demonstrating Temperature
Effects
III-II (b) PHQS Oratn Charactel"istics Demonstrating Temperature
Effects
111-12{a) NMOS Drain Conductance Characteristics Oemonstl"ating
Temperature Effects
111-12(b) PHOS Ol"aln Conductance Characterlstics Demonstl"lting
Temperatul"e Effects
111-13
IV-J
Gate Capacitance Variations
CHOS Inverter Output Characteristics Plotted for
SPICE2 Inverter ModeJ
vi
1 1 1 2 ~
111-26
111-27
111-28
111-29-
, '-30
IV-Z
/:tHE 8DM CORPORATION
CHAPTER I
INTRODUCTION
The model1ng techniques incorporateq in the SPICE2>1 COInputer
code represent a sIgnificant ImproVelhent over the mod1!ls Included in
earl ier verstons of SpreE and most other computer ,lldeddesign t.odes.
In order to successfully utt1 Ize the models, the desJgnermust befamitiar
wtth the model formulation and the parameterization procedures requited
for model spec if I eati on.. Th i 5 report p resents thedesigl"le I" > wfth t:l
description of thmodel topology, the model parameterS, and the
physical basis forthemathemat ica 1 formulation,
The spa CE2 HOS model described here fs appropriate for tneversion
of the Code maintained &t SandiaL.aboratorJes, Albuquerque,NewHexieo.
Readers who are using other versions of the code shouldreferto the
update cards in appendix A to insure that the code modifications indicated
there have been Incorporated In their version.
TheSP I CE2HOS model has been designed for a max r mum of par arne te r"
izatlon flexibility. Conceptually, that flexIbility can bestbere-
fleeted by considering a separation of the model into an analytical
section and an empirical section. These two sections can be IJsed
.
separately or in various combinations. Tncdistlnction between the two
sections is made purely to facilItate disClJssion a
difference in model util izationora rigId boundary betw.een the two.
The analytical model re:1ies heavily on p:-ocessing parameters to predict
the e lectr I ca lcharacterl st i cs. The des r gner speel fiesva 1 uesfor
background dopingconcentration . surface state density. hst sur.hce
state density, etc., and the code calculates values for threshold
voltage. drain currer:t. etc. Tneaccuracy of .themodel depends on
the appropr'i aleness of the mathe:matt cal formulation and tneaccuracy
of the input data.
The empirical model simulates the electrical characteristics of the
HaS transiStor by using parameters based .00 measured operational character-
istics. For example, the empirical model uses a measured value for the
threshold voltage. The accuracy of the model is based on the abilltyof
1-1
THE 8DM CORPORATION
the designer to match the electrical characteristics of the component in
question with the model parameters available. The empirical model is
very similar to the model used In the original Berkeley version of
SPICE2..
SPICE2.'s use of the empirical or analytic31 model is determined by
the parameters specified. If the substrate doping concentration is
included In the model variable list',the analytical model witl be
utilized even though a val ue for threshold vol may have been speci-
fled inadvertantly. Some mixing of the models Is possible in that.
under certain circumstances, a required parameter value be calculated
for use in the empirical model if a parameter based on measured data is
not available. Also, some empirical model parameters will override
analytical parameters if both are specified. (Note that an empirical
value for threshold voltage will not override the analyti=atly calculated
value If substrate doping is specified.) In general, SPICE2. strives to
attain a consistent set of model parameters. As a last resort, it will
revert to a table of default parameter values if the required input data
not supplied. The default values have been chosen to produce a
computable MOS model. They are not necessarily represe"tative of a
particular device or a particular MOS technology.
Figure 1-1 is a diagram of the MOS model topology used in SPICE2.
The polarity indications represent the convention for forward bias. For
example, a positive drain-to-substrate voltage tends to turn on the
drain-to-substrate diode. The diagram is for an NMOS transistor. The
polarity conventions are reversed for a PMOS device. SPICE2. performs
ali with sign conventions appropriate for N channel devices
and then reestablishes the proper direction of current flow In PMOS
devices. For this reason, all the equations In subsequent chapters wilt
carry signs appropriate for NMOS. The model is perfectly bilateral,
hence, It requires no rigid dIstinction between the source and drain
terminals in applying It to a circuit analysis.
Figure 1-2 presents a simplified flowchart of the relationship of
the MOS model to the SPICE2 program. The model parameters from an Input
deck are initially processed by the MODCHK subroutine which performs
several preliminary calculations and prints out a device model summary.
,1-2
tHE 8DM CORPORATION
G
\V
GS
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+
+ C
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GS
C
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Fj gure I-I. SP I CE2 HOSFET l'Iode I
/-3
THE 80M CORPORATION
1/
-
MODL CARDS
I
MODCHK
SPICE2
t

MOSFET
....
ONE TIME I
MODEL PARA
CONTROLS C
MOS DEVICE
FETLTM
PNJLIM
MOSEQN
MOSCAP
lifiGR8
NPUT PROCESSING OF
METERS
Of1PUTAT I ON OF
S
LIMITS CHANGE IN NONLINEAR
!='ET VOLTAGES
LI"ITS CHANGE IN NONLINEAR
JUNCTION VOLTAGES
IMPLEMENTS MOS EQUATIONS
COMPUTES MOS OVERLAP CAPACITANCE
AS A FUNCTION OF VOLTAGE
NUMEP..I CAL I ::TEGRAT I
Figure 1-2. Sinptified FlowchClrt of MOS :1odel Relacionsnlp to SPICE2 ?rogr'';
/-l,
THE 80M CORPORATION
After the initial parameter processing. control of the KOS model passes
to the executive subroutine HOSFET. It interfaces with the main SPICE2
program, insures the correct current and voltage polarities for both
HMOS and PMOS mode 1s
t
and calls other sub rout I nes associ ated wJth the'
KOS model. The functions of the other subroutines are indh:ated In
figure 1-2. The MOSEQH subroutine imptementsthe model equatioM for
calculating drain current In each region of operation (i .e., cutoff,
subthreshold, linear, and saturued).
In chapter II, deflnitlons are provided for all parameters used in
the empirical and analytical models. The deflnltionsln::lude the units
in which the parameter must be specified and Identify whether the
analytical or empirical parameter overrides If both are spec.ifled
. Chapter t f I contains a discussion of the physical characteristlc:.s which
the analytical model attempts to predict and the empirical model attempts
to simulate. Emphasis is placed on providing the designer with some
physical l.nsight Into the impact of Individual parameters on model
currt.nt/vol tage character ist ic:s. Chapter IV demonstrates the impact
of selected parameter variations on the prediction of output char-
acteristics of CMOS inverter.
THE 80M CORPORATION
CHAPTER II
HODEL PARAMETER DEFINITIONS
A total of 29 parameters can be specified by the designer Ir.
variable list of the HOS model. Some of these parameters are used
solely with the empIrical model and others are used solely with the
analytical model. In some cases, one parameter overrides another or 15
redundant if another Is specified. Table 11-1 provides a listing of
possible parameters and which model uses them. The table also Indicates
when a parameter Is overridden and gives the value. The fol-
lowing paragraphs give a brief discussion of each line entry in the
table and refer the desIgner to the appropriate section of chapter III
for further Information on the parameter's Impact on model character-
Istlcs.
A. VTO - ZERO BIAS THRESHOLD VOLTAGE
.
The threshold volnge specified as VTO will only be used if the
background doping concentration is not 5peclfied. It should be speci-
fied if the designer wIshes to use the empirical model. In addition to
determining the boundary between the off region and the linear region of
transistor operation, the value of VTO is used in calculation of sub-
strate bias effects, weak inversion effects. mobility degradation, and
temperature effects. A d!scuss ion of these effects may be found in
chapter III, sections St 0, F, and G.
If a value for VTO is not specified and NSUB is specified (the
model). the thresh01d voltage Is calculated from equation
11-1.
where
/ q.N
VTO V + 2, +2 v S I SUB f
FB f C
QSS
V
FB
- flatband voltage 'ms - -C--
ox
11-1
ox
(Eq. 11-1)
-f
:r
m
TABLE If-I. SPICE2 II00El PARAI1ETERS
OJ
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0
YOl1A&( Oil DEfAULT
If NSUI IS SI'[(lfl[O
:D
VTO V
r

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0
2 V'" 'l>IICSUB:'-
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INUIIISlC usn sPtClfl[o usn Sl'fOrl[O S,tttfltD VAlot [oS AKAllTltAt
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TAbLE II-I. SPICE2 HODEl PARAHETERS (Cont I nued)
!:
0
0
P.UAMUU !
DE'AUlT
:n
[11f" II I CAL ttOO[L
I
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MAttl I)(SUI'"OIf AHAl niCAl "OOEl OY[I\I\'DIIIC
I
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(ea CATt-IUU.
usn S'ECfFlD USO 51'(Cfrln SI'CI'IEO VAlur OY[ftl\IDis flc", 0.0
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OV[I\tA' [AI'ACITAHt( 01\ D(rAULT Olt OHAUtT

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lUoIlASSUlSTMf(- usn $,tI rI [0 USEI\ S'ECU'rEO SI'[CIF'EO VALUE Oy(I\I\IO S rIc. 0.0
SOUI\I:' [ JUII(11011 (AI' A-
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C IfAIICf'(Il c",l or
JUNCTlOIf MtA
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10 -5 AlfAUtlCAl
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TYP Of 'OU-
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flOIIllTT
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TABLE "-I. SPICE2 HOOEl PARAMETERS (Continued)
("" I I CAL l10DH
US [1\ SI'(C .," I)
OlOHAuLT
USEII SI'[IUIEO
011 DEFAULT
ItOT Il[QOIlO
DEfAUlt
1I0T IlEQOIII[O
USR 51'(CfflO
CONSISHNl \11TH
1\1' 011 HAULT
SPEC" 1(0
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UHII SP(CIfIEO
Oil DEFAULT
US [II !i!'(t I f 1(0
UII DEfAIlLT
ANALYTICAL ..col
USEII S'C If I I)
OR DEfAULT
USR 51'[C"IO
Oil DEfAUlt
US(II src" I [0
OR DEfAULT
USU SrClfIU
+1 1'0lAIIITT OI'I'OSltE

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SUaUItAH
011 DEfAULT
USII SI'(ClrtU
(ONSISHNT \lItH
KI' 011 DEfAULT
ustR srClfID
Oil DEfAUlT
usn S'[CIFI(O
DEFAULT
U'>lk SI'(IFID
Oil OEfAULT
OVIII110IHC flOOEl UNITS
S'Clfl(O VALUE OVIII110(S
Sl'[(I'I[O VALUE OV[AAIOES;
I'AlM[TEl UNUSED IN [tIP,-
R /CAl flOOll
SPECIFI(O VALUE OVIIIIID[5
'AlMEIEII UNUSED IN (tIP,-
A teAl fIOOl
S'((IFI[O YAlUS or 1\1'
O'/HRlDS uo
SP[CIrifO VALUE OV[IIlIO(S Y/ca
spEClrl(O VALUE OY(R"IO(S
VAlUE OYI""'U(S
OHAULT
VALUE
0.0 100 'ALU(
HlflUIATU
LAHUL
OlfrUSION (FrItts
0.0 IUO ,Atut
(L ""IIA T SLAT[ IIAt
OlfrUSION (fr[CTS
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TADLE It-I. SPICE2 flOOEt PARAt'ETERS (Concluded)
[""IAItAl fIOon AHAUT 1 tAL !'IOOU OVEARIDING ~ [ l
USEIl SOI'I'llUl OStll SI'rtlf 10 S'(ClflO vAtOE OYERltlDtS
011 DEFAULT OItO(fAULf
US[I\ 5'(( If 10 UHII SI'retFlU Sl'tClfltO vAlur OY(IIIt'O(S
Olt O[fAOll 01\ OHAOlT
usn S'[ClrtEO UStft "I'[(1f 1[0
Oft otAUlt 011 OHAUlT
UlCITS
DrUUlT
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(LU"MAn
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THE BDM CORPORATION
E
'ms

t\eta 1 semiconductor work function
'm - SO
_ ....2_
'f 2q


Hetat gate work function (specified internal to SPICE as 1>2-. v)
Clss
Oxide
charge N *q
55
C Oxide capacitance
ox

SI-Si02. work function (specified internal to SPICE as 3.25 V
Silicon bandgap internal to SPICE2. as 1.12 V at
27.C)
kT
Bulk Fermi level - 11'\
q
k Boltzman's constant
T - Temperature OK

-
"f - Intrinsic carrier concentration (specified internal to SPICE as
1.45 x 10
10
em-
3
at 27C}
N
SUB
Substrate doping concentration
e
si
Permittivity of silicon (specified internal to SPICE as
11.7 x 8.854 x 10.
14
Flam)
The SPfCE2 empirical model assumes that a specified value of VTO is
also described by equation II-I. To insure proper operation of the 'nOdel.
VTO should be determined from an extrapolation of the drain conductance
versus gate voltage curve to zero conductance. The experimental data
should be taken wi th zero substrate-source bias. Note that the thresh-
old voltage is temperature dependent due to variations in n
f
E
g
, and
T.
B. KP - I NTR I NS I C TRANS CONDUCTANCE
The intrinsic transconductance. KP, maybe specified for either
the or analytical model. A specified value overrides any'
calculation or default value in either model. failure of the
user to define a value results In a default value in the empirical
11-6
THE 80M CORPORATION
mod!l, but It results in either a calculated default value In the
model. If positive, nonzero values for mobility (UO) and
oxide thickness (TOX) are specified, the analytical model will determine
KP from equation 11-2.
UO*C UO* cox
ox rex
CEq. 11-2)
If zero or negative values are specified for UO and TOX then the default
values of these parameters will be used In equation 11-2 to yIeld the
analytical default values listed in table II-t. If a value is specified'
for KP, any subsequent value specified for the nondegraded surface
mobility, UO. will be ignored by SPICE2. When usIng the analytical
model, the designer should usually specify UO and TOX and eliminate KP
from the variable list. For the empirical model, KP is the experimental
transconductance Jivided by the width to length ratio (aspect ratio).
I L
It shoul d be deternli ned from the s lope of the curve of 0
VOSW
versus V
GS
for small v.lues of VOS and zero V
BS
' A further discus-
sion of KP as influenced by mobility degradation effects is included in
chapter III.F.
C. GAtiMA - BULK THRESHOLD PARAMETEr.
Gamma may be specified for either the empirical or analytical
model. It is the coefficient of the tenms accounting for substrate bias
effects in the equation for drain current originally developed by Ihantola
2
and given in equation 3 below.

{ VOs[VGS
VDSJ
- 2. - V - - -
f Fe 2
(Eq. 11-3)
.. _....;;. .... (vos + 2.( - vet2 - (2.( - V
es
) 3/2] }
GAMMA
11-7
THE 8DM CORF>;RATION
In the analytical model, the designer will usually not specify a value
for GAMMA, since SPICE2 will calculate a value from other parameters.
In the empIrical model, the value ofG.tIJiI1A should be determined from the
stope of a plot of threshold voltageversus.jv
eS
-2'f xpe rt men tal
determination of GAMMA may be difficult for short channel devices.
Chapter 111.e contains a more complete discussion of the Influence of
short channel effects on GAMMA.
o. PHI - SURFACE POTENTIAL AT STRONG INVERSION
The surface potentIal at strong lnversion, PHI. may be specified for
either the empIrical or the analytical model. If the value is specified,
it is assumed to equal twice the Fermi levet. -In the analytical model,
a value for PHI will not usually be speclf!ed, since It is calculated
from equation II-It if no value is indicated in the variable list.
PHI. 2+( t,o (Eq. I H)
The analytical model uses half of the specified or calculated value of
PHI for the Fermi level in subsequent calculations. In the empi rical
model. failure to specify PHI results in a default value of 0.6 volts.
The values of the quantities PHI, N
SUB
' GAMMA, and VTO are math-
ematically combined at several points in the SP1CE2 implementation of.
the analytical and empirical models . Therefore, the user should
cise care to insure that these parameters are conststent with each
other. Note that PHI is temperature dependent through variations in T
and Nt'
E. LAMBDA - CHANNEL LENGTH MODULATION PARAMETER
The channel length modulation parameter, l..AI'tBOA, may be specified
for either the empirical or analyttcal model. A specrffedvalue will
take precedence in either the empirkal model or the analytical model.
Lambda must be specified tn the empirical model If channel length modula-
tion Is to be included. For the analytical model. if no value or a zero
11-8
THE 80M CORPORATION
value is specified,
will c.lculate LAMBDA from the equation If-5.
_ t i
ts'
(Vos - V
OSAT
+ v.+(VOS-VOSAT)2 )112
o VOS qN
SUB
It 4
(Eq. 11-5)
Lambda Is used to calculate the effective channel length as the depletion
regIon spreads Into the channel. The expression used for the effective
channel length Is
L - AL o .
Any specIfied value of A must be consistent with thIs equation. For a
more complete description of the effect of A on channel length modulation
effects see chapter III.E.
F. RO Aim RS - DRAIN AND SOURCE OHMIC RESISISTAUCE
The draIn and source ohmic resistance RD and RS, may be specified
for either the analytical or empirical model. If they are not specified,
they are defaulted to zero values for both models.
G. CGS AND CGO - SOURCE ANO DRAIN OVERLAP CAPACITANCES
The and gate-to-drain capacitances, CGS and CGO, may
be specified in either the empirical or analytical modei. Failure to
specify the parameter results in a zero value. If values are specified,
they must be in units of farads per em of channel width since SPICE2
multiplies the quantities by the channel width to determine total capacitance.
The overlap capacitance represented by CGS or eGO Is a fixed value.
SPICE2 automatically attributes a variable percentage of the gate-to-
channel capacitance to the gate-to-drain and gate-to-source.capacitances.
Th!! percentage depends on the operatIng region of the HOS transIstor. A
more complete explanation of the capacitance calculation procedures is
contained in chapter III.H

11-9
THE BOM SORPORATION
H. eGa - GATE BULK OVERLAP CAPACITANCE
The gate bulk overlap capacitance, eGa, may be specified for either .
the empiric:.11 or analytical model. Fatlure to specify the parame.ter
results in a zero value. If the value is specified, it must be in units
of farads per cm of channel length. SPICE% multiplies the quantity by
the channel length to determl ne tota J capac t tance. The CGa term represents
a fixed value of capacItance.
I. caD AND cas - ZERO BIAS SUBSTRATE - DRAIN AND SUBSTRATE - SOURCE
JUNCTION CAPACITANCE
The zero bias substrate-drain and substrate-source capacitance may
be'specifled In either the empirical or analytical model. Failure to
specify the quantity results tn a zero value. CBO and CBS must be
specified In units of farads/cm
2
SPlCE2 multiplies the values by the
drain or source area as appropriate. CBO and CBS are used with the
parameters PB and FC In the voltage variable junction capacitance equa-
tions indicated below.
CBSTOTAL -
(Eq. I I-G)
FOl"'Wa rd Bias
CBSTOTAL -
+ VBS]
2PB
(Eq. 11-7)
The reverse bias equation is the familiar form associated with the
capacitance of a step Junction. The forward bias equatton Is reminiscent
of a dlffusfon capacitance equation that has been formulated to insure
continuity with the reverse bias equation and to prevent any possibility
of a division by zero. When the default values of Fe (.5) and PB (.C)
are'used, almost perfect continuity is achieved between the two equations.
11-10
THEBOM CORPORATION
J. TOX'" OXIOE THICKNESS
The. gate oxide thickness, Tox' may be specIfied for either the
empt.ricat or analytical 'model. If no vatue Is speclfted, the analytical

model defaults lto. value of 1000 At and the empirical model effectively
ox
defaults it to a value of Infinity (actually the value of C is set to
ox
zero). An Infinite value of Tox (Cox Q) enmln.tes substrate bias
effects, weak. Inverston effects, and variable mob' Itty effects from the
model.
K. PB - BULK JUNCTION POTENTIAL
The bulk. Junction potential, PB
t
may be specified for ei ther the
empirical or analytical model. If not specified. it assumes the default
value of .8 volts in both models. The parameter represents the PH
Junction contactpotentJal for the source-tosubstrate and drain-to-
substrate Junctions. It Is used In the CBOand CBS Junction capacftance
equations. The designer should refer to subsectlon I of this chapter
for a discussion of those equations.
L. JS" BULK JUNCTION SATU.R.ATION CURRENT
The Junction reverse saturation current, JS, may be specified in
either the empirical or analytIcal models. If not specified, it assumes
the default value of 10 nA/cm
2
in both models,. The parameter represents
the coefficient of the diode equation whfch simulates the current/voltage
charactedstics of the drain-tosubstrate and source-tosubstrate diodes.
ft must be speCified in units ofA/cm
2
slnceSPIC:2 wit I automatically
scale it by the appropriate. dra.in or soure.eJunctlon area. The diode
equatIon used in SPICE2 hglven below
where
SS JS[ .. 1] (Eq. If -3)
yr.!!.
q
... THE 80M CORPORATION
The substrate-to-source and substrate-to-drain diode modals contain a
resistance In parallel with the current generator described above. This
shunt resistance has a value of 10
12
ohms. It prevents current source
cut sets from occurring in some model conffguratlons.
H. . .. SUB - EFFECT I VE SUBSTAATEDOPI NG CONCENTAATION
The effective substrate doptng concentration,NSUB, should only be
specified If the analytical model Is desired. The speetflcation of NSUS
will cause the analytIcal model to override the empirical model. If
neither a value for VTO nor NSUB Is specified, the default value of VTO
will be assigned, and the empirIcal model will be used. The equation
used to calculate the thresheld voltage if NSUB is specified was given
previously in section A of thIs chapter. Although the SPlCE2 User's
Hanual Indicates that NSUB Is the effective substrate doping concentra-
tion, there is no need to specify a value other than the actual substrate
doping. The analytical model Is formulated to simulate the two-dimensional
effect on threshold voltage In short channel devices. In less sophisticated
models a value of effective doping concentration must be specified to
correctly simulate the threshold voltage as a function of backgate bias.
A more complete discussion of the calculation of threshold voltage in
the analytical model is included in chapter III, sections Band t.
N. NSS EFFECTIVE SURFACE STATE DENSITY
The effective surface state density, NSS, should only be specified
if the designer wishes to use the analytical model. No errors wIll
resul t if NSS is spec i fled in the emp i ri cal mode', but NSSwi 11 not be
used in any of the calculations, and it couid lead to some confusion if
it Is needlessly specIfied. In the analytical model, NSS is used in the
calculation of V
TO
discussed previously In section II.A.
1'-12
THE 80M CORPORATION
O. NFS - EFFECTIVE FAST SURFACE STATE DENSITY
The effective fast surface state density, NFS, may be specified for
either the empirical or analytical model. If not specified, a zero
def.ult value is assigned. The parameter is used In both models for the
weak Inversion characteristics. If'NFS equals zero, the weak inversion
effects of the model is bypassed. A nonzero value of NFS
produces some dratn current for ,values of Ves < V
TO
' A complete
discussion of the weak inversion characterlstfcsof the iOOdeTTs--::-ln-c"'7
1
-
u
-:"ded
in section 111.0.
P. - METALLURGICAL JUNCTION DEPTH
The metallurgical junction depth, XJ, may be specified for either
the empirical or analytical model. If not specified, a zero value is
assigned. The value of XJ is used in conjunction with the lateral
diffusion coefficient. LO, to determine the effective channel length.
where
L -2*LO*XJ
M
Lo Effective channel length
LM Mask defined channel length
LO Lateral diffusion constant
XJ - Metallurgical Junction depth
(Eq. 11-9)
The effective channel length is used in atl calculations requiring the
wiqth-to-length ratio. Failure to specify either XJ or LO results in
the use of the m.sk defined channel length throughout the model.
Q. LO - LATERAL DIFFUSION COEFFICIENT
The lateral diffusion coefficient, LO, may be specified for either
the analytical or empirical model. As discussed in the section above.
11-13
THE 8DM CORPORATION
LO is used in conjunction with XJ to define the effective length.
Failure to specify either LO or XJ results In the USe of the mask defined
channel length throughout the model. It should be noted that the default'
value of tD has been changed from 0.8, as specified In the SPlCE2
manua I, to zero.
R. NGATE AND TPS - POLYSILICON GATE DOPING AND TYPE OF POtYSlllCON
The polyslltcon gate dopIng, NGATE, and the type of poiystl1con,
TPS, should be specIfied only If the analytical model isused. Specifica-
tion of these parameters In the empirical model w111 not result in an
error, but they witt not be used in Iny calculations. For the empirical
model, the value of VTO will not be modified further bytne specification
of NCATE and TPS. In the analytlcal model, these parameters are used to
calculate the metal/semIconductor work function from equation 11-10.
where
* - - TPS (FERHIG) - (FERHIS)
'ms
TPS - + I for NGATE opposite doping from NSUB
- - I for NGATE same doping as NSUB
(Eq. I 1- J O)
Thus, the two fermI levels are additive if the gate doping is of opposite
poladty to the substr7ate, and they aresubtracti\.le if the gate and
substrate are of the same doping polaricy. The value for 'msls updated
for variations specified wlth a TEMP card.
11-14
s. UO, UCRIT,UEXP,AND UTAA - SURFACE MOBILITY, CRITICAL E FIELD.
VARIABLE totOSILITY EXPRESSION EXPONENT, AND TRANSVERSE FIELD
COEFFICIENT
-The surface mobility, UO
t
and the other parameters assoctated wIth
the vartable mobility modeling capability of SPICE2 may be specIfied for
use with either the analytical or empirical model. If both KP and UO
are specifted, KPwtt1ause UO to be Ignored. If neither KP ncr UO are .
specified a default value of 700 em
2
/V-S Is assigned for both MHOS and
PMOS transistors.
The equation for mobil tty varIation Is given In equation 11-11.
IJ UO .
[
UCRIT*C
S1
.] UEXP
5 Cox (Ves - VON - UTRA*V
DS
)
(Eq. 11-11)
If values for UCRIT, UEXP, and UTAA are unspecified, default values of
I x 10
4
v/em, 0, and 0 are respectively assigned. A zero value for UEXP
effectively removes all variable mobility effects from the model. No
variable mobil ity effects are simulated untl I the value of the denominator
of equation II-II exceeds that of the numerator. A more thorough discussion
of the variable mobility model is provided in chapter 111.F.
T. KF and AF - FLICKER NOISE COEFFICIENT AND FLICKER NOISE EXPONENT

oj The flicker noise coefficient and the flicker notse exponent are
used in conjunction with ac analysis portion of SPICE2. In using this
capability to characterhe the noise performance, a current generator Is
connected between the drain and source with a value defined by equatIon
11-12.
(Eq. 11-12)
t 1 .. 1 S
THE 80M CORPORATION
where
"-
10 drain current
9 small signal transconductance
m
f frequency
U. Fe - FORWARD BIAS tlOHIDEAL JUUCTION CAPACITANCE'COEFFICIENT
The forward bias nonldeal Junction capacitance coefficient, FC, may ,
be specified in i t h ~ r the empirical or analytical model. Along with
PS, it determines the transition between the use of the reverse bias
Junction capacitance equation and a forward bias diffusion capacitance
equation. The appropriate equations were previously given in section 1
of this chapter. If no value is specified the default value of 0.5
is used. For most eases the default will give satisfactory performance.
11-16
THE 80M CORPORATION
CHAPTEI\ I I I
IHPLEHENTATION OF FII\ST AND SECOND ORDER EFFECTS
IN THE SPICE2 HOS HODEL .
A . INTI\ODUCTION
In chapter II, a brief description was gIven of each of the parameters
Involved In utrlizlng the SPICE2 HOS model. The material In this chapter.
describes the relationship between these parameters and the Implementation
of the major first and second order electrical effects In the model.
The purpose of the chapter Is to foster a quantitative appreciation of
the influence of parameter values on HOS transistor characteristics.
The descriptIon is divided into discussions of: (1) substrate bias
effects, (2) two-dimensional effects on threshold voltage, (3) weak
inversion effects, (4) channel length modulation effects, (5) variable
mobility effects, (6) temperature effects, and (7) variable capacitance
effects. Wherever appropriate, parametric studies are presented to
I
demonstrate the Influence of Incremental parameter variations on tran-
sistor electrical characteristics. These studies are performed with the
analytical model. Table 111-1 provides a list of parameter values which
serve as the starting point for all examples. The parameter values were
devetoped for the simulation of a particular CHOS inverter. They are
used here for illustrative purposes and are not necessarily advocated as
"typical" values.
TABLE 111-1. EXAMPLE NHOS AND PMOS
TRANSISTOR ANALYTICAL HODEL PARAMETERS
NHOS
-
RS-.769 n
F/em
2
JS-3.82XIO-
tl
A/cm
2
XJ-2XIO-
4
em
UEXP-.l
CGS-9.0SXIO-
12
F/em
CBS-S.43Xl0
8
F/em
2
NSUa-2Xlo
I6
em-)
LO-O.O
UTRA-.3
111- t
-12
CGD-9.0SXIO F/em
-6
TOX-7.0Xl0 em
NSS-IXIO
ll
cm-
2
2
UO-700 em IV-S
Fe-.s
CGa-o.o F/cm
PB-.9 V
NFS_1Xl0
11
em-
2
UCRIT-1Xl0
4
V/cm
1\0-.769 n
THE BOM CORPORATION
PMOS
-
R.S-9.74 ohms
-8 2.
CBO-l.86x10 F/cm
JS-;.82X10
11
A/cm
2
.. 4
XJ-2X)0 em
UEXP-.241 5
CGS-t4.76XIO-
J2
F/cm tGD-14.76Xl0-
12
F/cm CGS-D.O F/em
CBS-l.86XI0
B
F/cm2. TOX-7XI0-
6
cm PS-.9 V
NSUB-2X10'5 em-; NSS_IX10
11
cm-
2
NFS_IX10
11
cm-
2
Lo-O.O UO-166 emZ/V-S UCR.IT-jXI0
4
V/cm
UTR.A-.3 FC-.S R.0-9.74 ohms
8. SUBSTR.ATE BIAS EFFECTS
Consider the HOS transistor as a four terminal device with a reverse
biasIng potential between the source and substrate (VBS). The effect of
this voltage is to increase the arrount of charge stored in the depletion
region. It resut ts In a decrease in the drain current for a fixed gate-
to-source voltage. The substrate bias effect ts included in the SPICE2.
model by adding VBS to the quanttty 2.tf as shown in equation 111-1 which
defines drain current in the triode region of operation.
10 . e {(VGS - V
rB
- 2'f - V ~ s ) VOS
(2'f -v
es
) 31Z 1 t
Yo [<2'f .. Vas + V
os
)3/2
(Eq. III-I)
For r\lverse bias ing potent ia Is between source and substrate, Ves and
2t
f
add In an absolute value sense. The net effects of source to sub-
strate bias on transistor electrical characteristics are shown in fig-
ures 111-1 and 111-2. Figure 111-1 is a plot of drain characteristics
with 10.0 volts gate to source bias and. variety of source-to-substrate
biases. Figure 111-2 isa plot of dratn conductance versus gate-to-
source voltage with VOS- 2..0 V and a variety of source-to-substrate
biases. These plots were generated wi th the parameters given in
table "I-t. Since substrate bias effects are built Into the model,
they can only be eliminated by a short circuit connection between the
substrate and source or by setting the parameter GAKHA to Zero.
111-2.
r
_ .. NHOS OUTPUT CHARACTERISTICS F(VBS) .-.
I I I I I
V 0.0 V
8S
-
......
V
2.0 V
V V
/
85 I I
I
I I I I I
-
."
Q.
~
~
...... I!
~
I
I
, V ".0 V
85
1/
,
I
...
z
w


:J
u
1/ I I I
/
'"
y 6.0 y
'(
II
8S
S!"
. - !--
-
-
J V Y 8.0 y
/ II / /'
IS A-
I
V
Y
IS
10.0 V
J J I I .;'"
Z
.'.'H
I I V
-
,
-c
"'"

II I II V
/
I
/ L"
a
IIIJ I
"
J
~
'/ V
......
III
,,/
'/
3
'lJ 11/,
I'll, II/
WI(
'''(11
...... 'I. '(f
fI
Yes 10.0 Y
f-
W
2.0" 11111
t-
f-
lo 0.2 Mil
f-
......
I
, .
f-j
t-
" -



t.a .... .. .. .. .. ..

L
D. A IN Y D L T A. r (VOL fs) ".J
Figure III-I(a). HHOS Drain Characteristics Demonstrating Substrate Bias Effects
f
::r:
m
m
o
~
n
o
:0
""0
o
:0
!i
o
z

.f:-
r
.......
VI
A-
x:
0(
.......
...
:If
III
.:
.:
!)
u
:If
...
-c
.:
a
.-
.......
I .......
.H ....
.H''''
}A
';I-
.... H

'S
.H'"
"

1..1
f
......

I
I
I
,
I
, t
, ..
PHOS OUTPUT CHARACTERISTICS FCVBS) I
...,...

...-::
.

E:=:ii
p-
vas - 0.0
iI'\:
v
If"
I\- vIIS 2.!0 V
r-

::::;
:::oil! .".
\ I
::;.::
\
'-
iI
,
ves It.
) V
IIJ'
\ I I
[.d;
\ 1\
,
.
6.0 v
I a
\ \
. .
Vas b.O V
i
'"
--Vas 10.0 V
J

J'
;
16

,

'L
r
I
,
f
-r-
J
ves IQ.O V - -
f-
f---
W 11111
-
_.
J
. -
-
La 0.2 ",II
l.
-
.. -. ,-
_. -
-l-I- -

.. - -.
. '-.
_ ..
. -
...... . .
-- - -
.-
- - -. i--
.. ,

.. .. .. ..
-
...L

,
D IN VDLT.I' (VOLTS)

figure III-I(b). PHOS Drain CharacteristIcs Demonstrating Substrate Bias Effects
-f
I
m
CD
o

n
a
:D
-u
a
:D
!i
a
2
r
"
....
<It
0
::I:
x:
...
U
Z
'" ...
U
::J
a
z
0
I
VI
U
Z
-
'" Ie
a
: .
NHOS DRAIN CONDUCTANCE F(VBS)
'-,
.......
OS ::: /i
-f.-
l 0.2 mil
V +2.
0
V
'-" u " ',0 .11
'- j
, I
.......
7
'- J
.-...
7
J
/ I


't '7_
.......
t-
...... / 'L-
/ j
, / 7 7
II' J 7
/ 17
7
' /
._1 ..
......


7 l/ /
/ 7 J /
:/ I It j.(
" V" -V ()" ()
, I 7," V. "'.",/' ."
V,,"O,OV V 7
7
,.:)"", ......
I -..1--+--+- ,. --. "" ;7 .- -:....1--i
..-
- ... - . .
I- .-1- .
I.'
'ATf VOLTA'f (VOLTS)
-,
Figure ",-2(a). NHOS Drain Conductance C ...... racterlstlcs Demonstrating
Substrate Bias Effects
-f
::t:
m
OJ
o
s:
n
o
:::0
'1)
o
:::0

o
z
r
w
u
:z
<C
...
U
::t
a
:z
0
u
:z
,

-<C

a
L
M ....
PttOS ORA I N CONOUCT ANCE F (VSS)
'-,
t ttl I I
- Vos 2.0 V
-w
2.0 mil
/
-- Lo 0.2 mIl
j I
I

V
J L
I(
'/
,HlMM I / II,
'(Ii
Jh W
I
1/
'//'
I ,
'h
W
,_ ...
I 1/ I
rh'
J
j
'/J
If
'I
rlJ/
I I /J W
I
I
if,
II.
Vas 10.0 V
h
/ / Vi
Vas 8.0 V -
r...
'/.

.......
. . .
K
'I,

V
Vas 6.0 V ..,
I 'L A
Vas
[h
'#
Vas 2.0 V /

Vas .' 0.0 V '"'
/
v
v


-
........ I
.
t

'A'I VOL' A"-
Figure 11I-2(b). PHOS Oraln Conductance Cnaracteristlcs DemonstratIng
Substrate Bias Effects
VI
{J.

V

-i
I
m
m
o

n
o
:n
"
o
::x:a

o
2
""YE 8DM CORPORATION
C, TWO-DIMENSIONAL EFFECTS ON THRESHOLD VOLTAGE
As the length of an MOS transistor is shortened to less
than 5 the amount of depletion layer charge which is effective in
terminating the E field lines due to the gate-to-substratepotential is
significantly decreased. The result is a lower threshold voltage and a
softer characteristic than would normally be expected. The
simple one-dimensional analysis, which is the usual basis for MOS models,
is not sufficient to predict the varIation of threshold voltage with
channel length. However, Pocn
3
has developed an analytical expression
which can be used to modify the usual expression for threshold voltage
to account for two-dimensional effects.
The basis of Pocn's analysis is shown in figure 111-3. He assumes
that only the charge contained within trapezoid ABCD is effective in
terminating the gate to substrate E field lines. He also assumes that
the width of the depletion regton under the source and drain is the same
as that under the channel. The ratio of the area of trapezoid ABeD to a
rectangle wtth sides of length Wand L gives the percentage of the
substrate charge 'which influences the threshold voltage. Figure 111-3
gives a summary of the mathematics.
The resultant expression for threshold voltage as implemented in
the SPICE2 MOS model is given in equation 111-2.
V
T
V
FB
+ + f (V BS)

(Eq. 111-2)
- C-
ox
or
where
W -
depletion width -
111-7
THE 8DM CORPORATION
----- ... .--
\
)--
I B
/
GATE
SUBSTRATE
(X+X.)2.
J
x Xj (R -)
(/lJ
0.' \,/:':
B
[ L - Xj (M -)]
[
X . . ~
I - r V I + Xj -
)]
..... - -
Figure 111-3. Development of Two-Dimensional Effects on
Threshold Voltage
111-8
THE 80M CORPORATION
\
l
i
i
I
\
Ie
The modification of the depletion region charge by f(V
as
) is carried
through expressions for the drain cur:'ent in all regions of operation.
that the quantity
J 2tS i qllsu a
c
ox
is the parameter GAMMA, and tne
quantity X
J
Is the parameter XJ In the MOS model variable list. The two-
dimensional effect on threshold voltage can be eliminated by spectfylng
either CAKKA or XJ as zero.
The effect of the modeled two-dImensional effect on turn-on character-
Istics is shown in figure A series of drain conductance curves is
displayed for MOS transistors with the same aspect ratio (W/LoIO) but
different values of channel length. All other model parameters are the
same as these given in table 111-1.
O. WEAK INVERSION EFFECTS
Host HOS models assume that conduction begins abruptly once the
gate voltage exceeds the threshold voltage. The threshold voltage is
calculated for a surface potential. 's. which is equal to twice the bulk
Fermi level (+,. 2+
f
). This is the classic strong approxima-
tion. It results in a drain conductance versus gate voltage characteristic
such as that shown by the solid curve in figure 111-5. In actuality,
some conduction occurs in the weak inversion region ('s < 2+
f
).
Swanson and have developed a technique for simulating performance
in this region. The dashed curve In figure 111-5 qualitatively describes
the relationship between the classic model and the weak Inversion model.
Conduction begins below the threshold voltage and drain conductance
increases exponentially with gate voltage unttl it
I Proper s i mu 1 al
tion of weak Inversion characteristics can be of'sTgw"Tficant importance/
I
IA modeling devices whose threshold voltage has been lowered by ion /
tmplanfation and in modeling devices where surface state density hal
been Increased by ionizing radiation. "%/////1
I
\',

I r r-9
r
.......
'"
0

w
u
z
oC
...
U
::J
a
z
a

-
u
0
z
-oC

a
L
.......
NHOS DRAIN CONDUCTANCE FCll
, -,
Vos .. 2.0 V
.....
Yes
0.0 v
\lILo to.O V
Lo 0.2 111'.1
"
I I I IV
iJl.
Lo mil ""\
i I I' I
IVI
L
o .;. 0.8-1.2-1.6-2.0 m" ""\
i'
(J
.-..
"
I
VI.
,VI
h
,.,
'/J
......
' .
f
'(I
1/1.
,f/l
17.
.,
rn
. -..
/. rI
iJA
/, r

/ r
.. _.


/.. ".
rI

. ...: 'I'
._It I



II
...... iI"

........
........
,

- -
.. - .
IATt: fOLTA.t: tvoL1\f
Figure NMOS DraIn Conductance Characteristics Demonstrating
Two-Dimensional' 'eshold Vo1tage Effects
.,.
'-, .
,
II

'{I
.
.
4
I
m
CD
a
s:
n
o
:n
"'0
o
:n

o
'2
r
-- CIt
0
~
"-"
...
u
z
'"
..
U
:::J
a
-
z
I a
u
z
-
'"
It:
a
L
.........
.--11"
/0
.'M,,_
(;;;r
.... H


..... !,
,-",
V
DS

2.0 V
WlLo
lu.o V
Vas
0.0 V
PHOS DRAIN CONDUCTANCE FCll

I
It
l
I
I
II
I
Lo 0.2 mil ~ I
'.I
lp - 0." mil
~
,
o 0.a-I.2-1.6-2.0 mil
'/\1
11\
.
I
J
I ~
1/
I
'{j
J
[/j
II.
,
rIJ
Ih
,
~
~
~
. i
t
2 ~ c >
.A Tf VOL T A, (VOLTS)
Figure 111-4(b). PMOS Drain Conductance Characteristics Demonstrating
Two-Dimensional Threshold Voltage Effects
'-,
T .
6
_I
-t
:z:
m
CD
o
~
n
o
:D
""0
o
:D
~
o
z
THE 80M CORPORATION
90S
VO"
"
Figure 111-5. Description of Weak Inversion Effects
80M CORPORATION
To implement the weak inversion model SPICE2 defines a turn on
voltage. VON' as shown In equation 111-3.
. \/2'f
kT
(
QN
FS
YO
.J
VON,
V
FB
+
.f + YO
- Vas
+
-
+- +
q
Cox
2 2'f
......
V.
..".
Classica 1 Threshold Vol tage
(Eq. 111-3)
VON corresponds to the point of intersection between the exponential
curve and straight line in figure 111-5. Its dependence on temperature.
number of fast.surface states. and substrate bias is readily apparent
from an examination of the equation. For atl gate to source voltages
less than VON' the drain current is given by the expression
2
VDS -"3 YO
[
(
2, - V + V ) V2
f BS OS
(Eq.III-4)
EXP
coefficient of the exponential term has been chosen to insure
continuity between the current predicted in the weak Inversion region
and that predicted in the linear region. The expression for the linear
region drain current is
111-13 '
10 B l['!CS -V
FB
- 2.
f
-
-(2.
f
- Yes r/2] ]
(Eq. It 1:"5)
The portIon of the ft'IC::>4el simulating weak inversion is only IncJuded
when both TOX and NFS have been speC:ifted. If NFS is specified both the .
caTaria the empi ri ca 1 model wi 11 exhibit conduction below the
threshold voltage.
The result of the weak inversion effects in the SPICE2 I10S :node!
can be seen 1 n f r gure 111-6 where the d ra I n conductance versus gate
voltage Is plotted for a variety of fast surface state densities.
E. CHANNEL LENGTH HOOULATION
HOS transistors with relatively shortehannel lengths 10.0 wn) often
exhibit finite drain-to-source conductance an imperfoect satura-
tion characteristic) for drain-tosource voltages greater than pinchoff.

d with a subsequent shortening of
Figure 111-7 gives a schematic demon-
stration of this effect. To determine the effective channel length if
the parameter LAMBDA is not specified. the depletion layer width around
the drain Is calculated from equation 111-6.
to
L

TERM 1
..--...-
TERM 2

v :::1 I-Y
OS
Yom + [I +(VO\- VOSAT) Tn
(Eq. 111-6)
The second term tn the equation is a departure from the usual method of
calculating the drain depletion width which would use (Vas - V
OSAT
)1/2.
r
I
-
Vl
NHOS GO F(NFS)
.-,
-- VI
0

w
u
z
-<
...
U
:::J
0
z
0
U
Z
-
-<
Ie
0
..... ".
VPS + 2.0 V
Yes. 0.0 v
w 2.0 ",II
..... '"

Lo" 0.2 mil n
_,- II
.......
.......
.......

.......

1
IJ
J
1/
IJ
II

II
II
II.

'I

1/ 1/
'I
1.4
II
-+-+-+-1 HFS , X 10 13
V V
M 1/
. _ ,_ '-_1_ .- f- L..--r1' "\ -h,fll+-HH-+H++-l--I-4-.J-I-+.+
\ 0 V
. - - - _ ......... po -:s" \ ....
... , .... \'. I LJ..1"'1 I - ..
"/",-6- . /. -2- /,," Y
aATI VOLTAa, (VOlfS)
____ 00._- ... __
Figure 111-6(a). NHOS Drain Conductance Characteristics Demonstrating
Weak Inversion Effests

_ t'r

i
m
CO
o

n
o
::n
"'0
o
::n

o
z
r
--
11'1
0
~
--
w
u
Z
<C
...
U
:;)
a

z
....
~
0
u
z
-<C
It
0
J
.....
,
r- vos - -2.0 V
- Vas - 0.0 V
-w 2.0 nil 1
.....
~ L o 0.2 nlll
-
.HH I
.. -
I
..-
I

I
.H' I

.....
,
PHOS GO F(NFS)
}
r J
/1
f
7 7
I
V
/ I
1/
'/
HFS x .0')
V
'I
V
1/ .....
I
..;....-r.,
HFS x lo" /
j).
A Tr VOL T A.r (VOLTS
I
I
,
I
1/
r
figure 111-6{b). PHOS Drain Conductance CI.aracterlstlcs Demonstrating
Weak Inversion effects
.
'-,

o _.
}-f
::r:
m
OJ
o
~
n
o
:0
."
o
:0
~
:::j
o
2
THE 80M CORPORATION
This formulation has been chosen to insure a smooth transition in current
between the linear and saturated regions of operation. However, note
that for values of VOS approaching zero and small values of V
OSAT
'
V
OSAT
- Vc - V
T
, a significant value of AL can be calculated by the
model. For example, if VOS - .1 V, V
T
- 2 V.and Ves - 3 V'Jthe value
AL Is 1.0 for a background doping concentration of I x 10 S em-
3

This aspect of the model could cause a problem for the user simulating a
circuit where the device experiences low voltages and low drain to
source voltages simultaneously.
The channel shortening effect is implemented by multiplying the
t
aspect ratio by I-LAMBDA*VOS The following equation shows the
result of the multiplication
IJ [ 1
Lo I-LAMBDA*V
DS
(Eq. 111-7)
Note that if LAMBDA is specified it must be defined as the ratio of the
depletion width to the channel length times the drain to source voltage.
If LAMBDA is specified, It is not varied as a function of V
BS
'
The channel shortening effect cannot be eliminated tn the analytical
model by specifying LAMBDA as zero. If a value for NSUB is specified, a
value for LAMBDA will be calculated by SPICE2. If the user wishes to
eliminate the effect he should specify a small value (.001) for LAMBDA.
Figure 111-8 shows the channel shortening effect on the drain char-
acteristics with the parameters except LAMBDA taken from table III-I.
The upper curves were generated with LAMBDA calculated by the SPICE2
model, and the solid curves were generated with LAMBDA - .001 (i.e.,
channel Shortening effects eliminated).
F. VARIABLE MOBILITY EFFECTS
The surface mobility, which appears as a term tn the current
expression for the subthreshold. linear, and saturated regions of
operation is not equal to the mobility in the bulk material. In fact.
111-18
r
......
Oft
A.
x;

...
:It
W

Ie
::J
U
:II!
-
\.0
oC

a

,0
7
...
# (;>,
.M
,0

1
0
...
,0
tt
,0
...

()
(
..
b

5

fI

::1,

,Dq;t
...
,
,00
I

vas' '0.0 v '
w
2.0 IIJI
Lo 0.2 mil
11
V/
if
"
VI
I
"
r

I
IL
j
1
1--
II
t-.
-
-.....
l
I.

-
..

,
t
V
..
t-

, ..
),0
,.
NHOS OUTPUT CHARACTERISTICS I
I I I I 1 J
IIJlll
A CALCULATED .-
.1 I I
Ves 10.0 Y ,::
t-1 . , .
H
l .001
V"
V
IL
IL
I
j
'/
I
L
1'1.
lIJ
rL
-
I-t-
A CALCULATED
. .. ...L
Ves 5.0 V'_
r-
.,.
A .001
. ..
I .1
I I J 1.
..
- -f- r- r-
I I I I
..
r A - CALCULATED
2.0 V
f-..
t-
- ..
1--
I ...l ...l ...l -1 .1 ..
.1 __ .-
. l .001
...

I . .... .. ...
t
'1.0 (",0
OltAIN
YO L T A' r (VOLTS) . ,
'1;0
D. () 1 7 , () 1)(0 v
Figure II'-O(a). NHOS Drain Characteristics Demonstrating
Channe1 Shortening Effects
1
,
:::r:
'm
m
o

n
o
:n
"'0
o
:n

o
z
r
.......
1617

I- Ves 0.0 v
w
2.0 III' f
.......
- L
_ 0 0.2 mil
dYe.
I I I
-
.......
..-.
,OIY
'"
0-
x: --
(
.....
t-
.......
:It
, oil.
w
iIC
Ie
:J
U
.......
,0 II)

N
0
Z
-<C
Ie
....... I
a
,00'1
,
I /
....... 111
,0 t>(
,fJ
rl
I)
.......
"
;00"/
"
_I,
- ,
....... I
""''''
,.00 ).

-
,

.0lil


,-

l d.(j
figure 11I-3(b).
PHOS OUTPUT CHARACTERISTICS F(LAHBOAj-'
I I I I r
-

-t
I
I :\t,,1
-
.,
,.
..,
1.,...0
.1 ' tt-\.t\)\} "'"
'-
l-'" '-
.,.V
i.--'"
I
t--
I r
1/
V S 10.0 V
W
/'
I
/
I
'"1
/
1
-I
I
J /
,
/'
r--
1/
./
/
-
1 1/
I
-1
-1
-1
-
--I
-1
I
-i
...,
1, I CA,lCUlATED
: .1
I , I J -t
Ves 5.0 V'--l
Ves 2.t? V
1 CALCULATED
I I I 1
.
-
f.'

.. .. .. .. ....
"

6.0 a.AIM YOLTAI' (VOLTS)
8,0 !'C/o /.7.0 1<1.0
PHOS Drain Characteristics DemonstratIng
Channe1 Shr Effects
. ,
/6.0
-i
I
m
m
o

n
o
:n
-0
o
:n

o
2
.. 1E 80M CORPORATION
~ s is a function of gate-to-source voltage. substrate to source voltage.
and drain to source voltage. The theoretical relationship between
surface mobility and the E fields resulting from these applied voltages
is n ~ t well defined. Therefore. the SPICE2 model utilizes an empirical
relationship which is sufficiently flexible to simulate the results of
mobility var!ation. The equation implementing variable mobility is
shown below:
UEXP
us -
(Eq. III-b)
The transition to the variable mobility expression is not made until
(V
GS
- VON - UTRA* VOS) is greater than
UCRIT*t .
_ ~ __ S;..f. "
Figure 111-9 is a plot of the
llS I
Cox [ UCRIT*t
S
J
ratio UO versus C (Y -Y -UTRA*V
ox GS ON OS
with UEXP as a variable. It should prove useful in selecting values of
UEXP to give desired variations in mobility. Clearly, specification of
UEXP - 0 eliminates all variable mobility effects. The influence of
transverse E fields on mobility degradation has been reported to be as
percent effect for HOS transistors with channel lengths in the vicinity of
5.0 ~ 5 Therefore. the parameter UTRA should normally be used in fine
tuning the variable mobility simulation. The parameter UCRIT is effective
(n determining "the va.lue of V
GS
where variable mobility effects are
initiated in the model.
Figure 111-10 compares the drain characteristics of an NHOS and
PHOS transistor with and without yariable mobility included in the model.
The upper curves represent a constant U which was achieved by setting
s
UEXP - O. The lower curves represent the results achieved with the mobility
parameters given in table 111-1.
111-21
THE a'OM CORPORATION
c:
0 0
.
....
""
::l
C'"
IoU
0"1
>-
....
C)
-
.0
c.n
0
0
:::
>
:-::
CJ
-
......
!<
.0
r:l
-
a:::
11'1 l- I..
IoU :::l
II:
>
..0
ott
...
"-
z:
0
\.. 0
1.1> 11'1
:::l
U'\
11'1
>- .
c.n
<.:l
"'
> c:
><
<
-
0
1.1
\..I
:..
....
M

is
:..
"'
c..
N .
C"\
I
4J
I..
o ...... U'\
.
.:r
.
N
.
:I
C'I
w..
on
Tn
111-22
r:-
.....
VI
Q.

...
Z
III


:J
U
I
Z
N
W
--c

a
L
......
-01).
l vas 0.0 v
......

,0/1) )
,
......
,ooi
..... I
. 00(,

I
r.:P If
I ......
,0
0
).
" 2.0 11111
Lo 0.2 11111
II
J
i/
1 II
I
I
I
II
I J
11
if
1/
V
h
I

V
J

I
j
'/
V
V
NHOS OUTPUT
I
CHARACTERISTICS FJUEXP)
!
!
UEXP 0
I
i
V-
I-'
I
/
ves 10; V
V I
I
UEXP .1
:
!
V "
"
1/
UEXP 0
UEXP .1 ViS 5.0 v
'-,
UEXP 0 ,
. . V
es
2 .0 V

e . .. ...

.. ..

:1..0 "/,0 UEXP , a_A I N VOL r A.I (VOLTS)
b.
O
0 10, D I 2.., D ! Y. 0
Figure "'-IO(a). NHOS Drain Characteristics Oemonstratln:J VarIable
Hobl J I ty Effects
.. .

-,
.()
-i
:r
m
co
o
s:
(")
o
:n
"'0
o
:n

-i
o
Z
......
VI
Q.

...
Z
W


:;)
U

N
Z
.t:-
--c

a


,DOl'
......
,003
......
,oo;!.
......
100/

Vas 0.0 V
--
i-
W 2.0 ",II
l
o 0.2 ",I'
-
1--
>- 1-. f-
-
o-
r-
-- -
--
fo- 1--
f0- r-
- l- i-- f--
-
---' -..
i
f- I-I- f-
1/
r-
-
f-
--
I-
I

- -
-.
-
- ...
....-
r- f-
V
. -.
-
.
-.
-
>-
1-.... - -.
-. -
. . - r- ....
- --
Vf-'
. I --
1/


.1- -
, ..
, '
t

'}.,o
Figure 111-IO(b).
, -
PMOS OUTPUT CHARACTERISTICS FCUEXP)
f- f-
-- f-
,-
-

r-

....
-

UEXP 0.0
L
.,..
/
,....
.....
:,...- t-"'"'
V

V
/
Ves 10.0
1/
J
1/
-
-
UEXP
....
po-
t-

f-

......
........
.
[....00'
I-'" '-
f- .-r-
'"
V
f- r-
v
I
v
,-
r- -
t-r-
.-
r- UEXP 0.0
-,
- ._-
1
_UEXP 21tIS_
Ves -S.o-
.... -I-
r- -- r-
.....
-- - r- '-I- - --r-
...
.-
I-t-
.....
t- r-
.. "T f
. -
t- . .- .. - - ._ .
t-
.- .. tVes .':';
.OV

.. .. It .. .. II

. I 7':0 '-co ORAIN YOLTAef:(vOLTS)
8', 0 I 0, 0 I t) / y: Cl / 0
PHOS Drain Characteristics Demonstrating Variable
Hob IIlty E H,
-f
I
m
OJ
o

n
o
:0
-U
o
:0

o
z
THE 80M CORPORATION
C. TEMPERATURE EFFECTS
The temperature of MOS transistor characterIstics is
Included in the SPICE2 model through appropriate variations in the
quantity VON' VON was dIscussed previously under the sections on weak
inversion and variable mobility. A detal1ed examination of its defining
equation reveals the appropriate temperature dependencies.
(Eq. 111-9)
All_.terms in the equation Including the Fermi level are updated for
temperature dependence. Naturally all terms multiplied by !I are also
q
updated. For silicon gate devices, the silicon gate work function (the
term'm in aluminum gate devices) is aiso updated for temperature effects.
Figure III-II shows a comparison of drain characterists at 12SC.
2SC, and -55-C. Figure 111-12 shows a comparison of drain conductance
plots over the same temperature range.
H. VARIABLE CAPACITANCE EFFECTS
Figure 111-13 shows five capacitive elements associated with the MOS
model topology. The capacitances Cas and CaD are standard voltage
variable Junction These were discussed sufficiently in
chapter 11.1. The remaining three elements represent various gate
and contain both fixed and variable terms. The fixed terms
are specified as the parameters CGS. eGo. and eGe in the model variable
list. They represent metallization ovedap capacitances. A variable
portion of the gate-to-channel capacitance is added to each of these
fixed va.1ues depending on the region of transistor operation. The
values of each of the capacitances in each region of operation is illus-
trated quat itatively in figure 111-1,3. In the region below cutoff. the
entire gate-to-channel capacitance is assigned to e
Ge
" As the device
11/-25

N
a-
r.
........
VI
0
:r
~
W
U
Z
<C
...
U
!:)
a
Z
a
u
Z
-<C

a
L
........
.0001
0
._11
I
f . ooocJD

. .-..
,0000(;,
. .-.. I
.OOOd
r
I
.-..
.0000" l

0,0
......... I
0000;>'
....

. ~
,If
NHOS ORA IN CONDUCTANCE
'-,
-55, 'I
I } ~
+25
J/I
c
I
I
I
I L
..
25c
, '
if L/
I It'
~
I
If"
I ~
,
'/
i/
"
I/,
/
/'
~
'I
l...-
'"
J''''
I
....
.,.
V
/
/
.... ~ .....
,.,..
"
-

-'
....
.-
"'"
~
. ... .... , .... I., .. I ... . ... . .... to ...
,/.. eAT' VOLTAe, (VOLTS) -.J
1.0 J / ~ 1.'1 II&. /11 p,e>
,g-
Figure "'-II(a). NIIOS Drain Charart.eristics Demonstrating Temperature Effects
(
~
I
m
CD
o
~
n
o
JJ
"'0
o
JJ
~
o
z
t
U
......
r
........
.0001.>)'
.' , , .
l f- V05 "2 .OV
vas O.OV
.. ""...... _-- f- \I_ 2.- III' h
. i-'"-tc;'" 0.2 III' 's
....
..
'"
(;)
:t:
t::
-
III
U
I
Z
c
.......

...
u
,000::)
I
=-
Q
:II':
Q
U
Z
-
C
Ie
Q

..
-
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,
L-.. ObOOI
PHOS DRAIN CONDUCTANCE
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.
..
.

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.. 'zsoc
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t---
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-
1,1 I

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figure "'-II(b). PHOS Drain CharacterIstics DemonstratIng Temperature Effects
(
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m
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,010

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a
......
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-
W 2.0 mils
- Lo 0.2 mIls
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NHOS OUTPUT CHARACTERISTICS
-,
I/i""
V
/
J
,.,.
l/
V
10- r-

1.,.-1-'
I .....
.....

YrO
6-0
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.. ..
-SSoC
t2S0c
+12SoC
-SSoC
J '.'
J+2SoC
.... ..
It.'
.. 1--
.. ..
VI eS-IO.Ov
ves
5.0 V
ves

2.0V

oaAI .. VOLTA.f(VOLTS) _.
. a /0, 0 I J, a I Y. 0 I I 0
Figure tl'-12(a).
",IOS Drain Conductance Characteristics Demonstrating Temperature EFfects
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l
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to ,()
Figure 111-12(b).
PHOS Drain Conductance Characteristics Demonstrating Temperature Effects
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---
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\
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ll'IEAR
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+
%
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eGO
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SATURATION

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3 OX
2
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3 OX
1 WfrL*C + C
CS 2 OX

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lW*l*C
3 OX
""-_____ 1- C
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'..tEAK CUTOFF'
ItIVERSION
C
ea
Figure 111-13. Cite Capacitance Variations
111-)0
THE 80M CORPORATION
operation transitions into the saturated region, up to two-thirds of the
channel capacitance is transferred to C
GS
' The equation governing the
transition is
(Eq. 111-10)
The transition from saturated into linear operation is governed by the
equat ions
2
- -
3
(Eq.III-11)
The transition points between the capacitance equations in the four
regions of transistor operation are shown in figure 111-13.
The discussion of capacitance variations concludes the description
of the physical characteristics s.mulated by the model.
111-31
.IE t::H)f\:l COHPOHAJ lur I
CHAPTER IV
PARAMETERIZATION FROM INVERTER OUTPUT CHARACTERISTICS
In some cases, the analyst may be confronted with a lack of parameter-
Ization data. If he does not have access to individual HOS transistor
terminals, the output characteristics of lin inverter may be beneficial in
estimating parameter values. In figure IV-I, a series of CMOS Inverter
output characteristics have been plotted for. SPlCE2 Inverter model based
on the parameter values previously specified in table Ill-I. Indtvlduar----
parameters have been varied to.demonstrate their Influence on the shape and
magnitude of the predicted output characteristics. The data points (+)
were taken from a CMOS inverter and are presented for comparison purposes.
With appropriate variations in parameter values, the analyst can closely
simulate experimental data with the SPICE2 model.
IV-l
....
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+ + + HEASURED OUTPUT CHARACTERISTICS
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7
<D
SPICEZ OUTPUT FOR TABLE 111-1 PA
i--'
....
V
Q)
HHOS - NSS - 5 x lOll PHOS - HS5 .....
V
V CD
HHOS - UEXP - .5 PHOS - un
RAHETERS
-5)(10"
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HHOS - UO 1000 PHOS - UO
,
550
V

G) HHOS - UCRIT 1.&IE5 PHOS - UC. IT 1."5[1.
-

....
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I.
TRAN.I,TOR ORAIN TO
figure IV-I. CHOS Inverter Characteristics Plotted for SPICE2
Inverter Hodel
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REFERENCES
1. Cohen, E. "Program Reference for SPICE2," Electronics Research
Laboratory Memorandum, University of California, Berkeley, June 14,
1976.
2. Ihantola, H. K. J. "Design Theory of a Surface Field Effect
Transistor," Stanford Sol id State Electronics Lab., Stanford Univer-
sity, Tech Rpt 1661-1, September 1961.
3. Poon, H. c., L. D. Yau, and R. C. Johnston. "D.C. Hodel for Short-
Channe 1 I GFET IS," Abstracts of tnternat i ona 1 So 1 I d State C i rcu its
Conference, 1973.
4. Swanson, Richard H. and J. D. Heindl. ilion-Implanted Complementary
HOS Transistors in Low Voltage Circuits," IEEE Journal of Solid State
Circuits, vol. SC-7, no. 2, AprIl 1972, pp. 146-153.
5. Herckel, Gerard, J. Borel, and N. Z. Cuplez. "An Accurate Large-
Signal MOS Transistor Hodel for Use In Computer Aided Design." IEEE
Transactions on Electron Devices, vol. EO-19. no. 5. Hay 1972.
681-690.
IV-3
fHE 80M CORPORATION
APPENDIX A.
SPICE2 MODEL CHANGES
c .. n IS IHPOItUNT TO HOTE THAT fHIS IS '40T A ... UPDATE OECI{.: IT; IS '
CO .. LY'A LIST'OF CHAHGrS T",AT 'HAVE iE;:" IUOE TO S'ICCYS'ZO;Z'''--
IOEHT SINDrA .
DE LE TE" "!:IS EQ!{;l" f.--.. .-.-.. -.-.-... .---. .. --.. ----... --.-.-- .... -...... _ ... .
C PREiENT ERttOR MtsS1C[ "liEN 'ReEl" IS Y!RT. LUGE AND HEGATIVE.
'IET A'Tii'I)
IF IARCEXP.GT.t-SO'.)) 8ETlZ BETll.EXPtARG!XPJ
. "Co. ......... ..... ............................................................... --..... ----.......... -........ -.............. ...
OELETE NOSCON.36
C . COq:tECT "OBIlITY' DEGUnutoNHobEt.:'Slr"n Ir'A}fuHcnO{("ar-_-'
c THQSHOln VOLTAGE [NSTEID OF Yet.
--YGST.-vtf=VOH
c
DELE T HOS C A";t .. .... - - -
c ERROR IN MOSCAP 8Y CaVLGS lNO CDVLCO
, .. '" . SUOl:tOUTIH HOSCAf" (VGS. veo' .COVL.e S ,COVlt:;O, C OVLI;B'CC s. a'w-----
c
...,t.,.orlld------------------------
c THE HOSHT 11001. I..IST SO THE OF THRESHOLD
C VOLTAGE PRINT[O OUT tS THE
IF CVALUEI!.OCV"U.NE.J.GI I(PRHY-l
-1NSEII'T HOOCHI(.ZIrtS ., . . ..... _. _ ..... _ .. __ u ...
IF _RITE".999)
999 FOt!1U' 1s IHc:Jt;SlsrNT TO'"$l'E'cn"i'VTowHli"1iSuQ t
SPtCIFIED. VTO IS CAlCUlATtO 6Y
2 SlH ... TtI1S CALCULATED VAL.UE: IS S .. OWH IN THE ABOVEU81.E:."f' .
DELETE
VALI)E (LOeV.l' -VALUE (LOCV" J .TypE VAt,.'utU:OCV'::U _
1 SQRTlVALUEllOCV.""
C
-DELETE
C ALLJW VALUES OF TPS &tiD NSS: .................................... .
s; IF IVALtJflLOCV+U.LToIQ.OJ, GO TO 51
"l"lStIlT M"OCIoII(.1 .. 3 ." .................................. ..
C
57 IF T.o. ... __ . __ .... _.
OELETE MODCHK.5.
C OEFAUI. T Tloit f'!OSF!:r PA:tAIiET'.t LD TO U:oto ..
2 " ..
C
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C PREvitlT ERROR H::SSAGE (lRc;!"ANO Ntnmt-:--
- eVGS-VON)/V'ACT
"OS. o.
C
IF (ArcG""" .er. t"'5 Ool.) I,. GOS-:3EU lItGrtNT L ............................ .
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C PRE'IElJT 'f'lESSACE'WHEH AI\CHNl-rs 'lEU
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ExprDI't .. :.
IF XPfRH [XP(IRGHf'
V1L!JEtlOCV+1,) Y1,+'VZ-V1J-'1.'-EXPTR"' ..................... -........ ---............ .
S'RUPU.85.S0RUPO."
ARCl'1T.t. 'a'll-TIMEt) I TAiJ 1-
ARCl'1TZ ITZ-TIHE1./TAUZ
EXPTRI'I1 G.' . ........................................................... .
EXPTJ"H2 .. O.
IF (&P.CHT1.GE.(-$OO;,' ExPUtl1 - EXP(lRCHT1r ....... ................ ..
IF XP(ARGrtTll
ltrVAL"'U ftOCViLl V1+ cvz.;vn- U.t-txPilHI1 h (Vr=V2T'"'tr.r-.CYI:rTlurzr--
C
c IN HOISE HODEL FOR
-INSERT
... ,.. ......... -.... - .. '''.
A-I
'HE 80M CORPORATION

XW-vALUE Cl.OCVtZ) .. ... . ...... ; ............................. --.. -..
COX-VALUECLOCKtll,
C ox XL X w- COX. XL -XM .. -. -- -.. -.... --.. -.-.-. -..
-OELErE HoISE.301
----VNa ItTKHH ravTE:HP'-Fmt- CP.CTT7 [ FR::. C ont .... I'rJ'wTI-------
C
- tDENT CO::tTUPD ., .......... - -.-.--.. , . -.- - -...
C IN SUS.tOUTItlt! T"PUPO ASSOCUTO WInt re:..pERITUR!
C" . COl1ltENSA T [ ON EFFECT ............ _-.-.
OELETE "OOCH(.69
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DELETE r"PUPO.77
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PBRAr VALUEClOCV+6'/OLDP8
.. VAl.UE' LOCV+1Z' VALUE' LOCVtUJ -PORiT"''- . - -.- ---.-.--.
VALU[CLOCV+13'
DEl.ETE T:1PUPO.1 a 5 .,. . . ... ---.-.. - -.----..... -----. - .
C COHP!HS.TIOH OF' IN eIPCLAR
,--- - ----
VAl.U[CLOCY+Z8'
VALUE (LilCY+l91 VAl.UE:(l.OCY+Z9' .Piuur--- . -----.------ .... - .. --.. ---.-
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PBiUT .... -.... -....... """.--"--.".'-'
VALUfCLOCV+JZ, VALU!(LOCv+JZ'-PBRAr
... r----------------
-OEL!Tt
C COHPENS.1TtOH OF' .... ' ..
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VALU[CLoeV+llJ VALU:;ILCCV+1J)-PSRAT
RAT IOZ - 1./P9RAT " . -- - --------
RATIOl SQRTCRATIOZI
VALUC(l.OCY+o, YAl.uEU.ocv+o,.RATIOl ............................

CELETr ...... ......
C COMPENSATION OF' IN HODEL.
PClo{AT 1.11/RA TIOZ - - .. _. ... - '-_ .... _. _._. -_.
VAI.JC(LOCV+Z91 a
VA L!.IE (L OCY.3 t, - VA I.U! ( L oev JO, PtUtAT ...........................
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C COiVtECT COI1PEtlSA lION OF Voe.. TACE.
TY?!
rp:o. V4LUECLCCY+ZZI _.- - .. _._.- -'-- -
VF'! ,
VF".ti .,TypE-OLOPH! ". . ....... _-.-...... -....... --.. -.
IF GO TO .15
VST'!IP .. VSTRIP+O .5- (Ol.Oe:Ci-EGFET, .. , ................. -.-. -. ,.
GO TO .Z'
----------------------------------------
OLOCiAT OI.DVT-,LOCeVAI.UECLJCV+Z1J/0l.OXHr,
'ATNE" VT-'1.0CiCVAI.U!(LOCV+ZU IXHU . - - -- - -.-
VSTlIP VSTRIP+TYPE-TPS-COI.OCAT-GATHEW'
IoZ0 CONTINuE' . . ... . . .......
VFS VsrRtp-:.5-TYP-PWI
(LOeV'.)., '.- VFS+TYPPP'iiI
VALUElLOCV+1)
-rCENT PLr.aZa .. ..... . ......
-INSERT OVTPVT.2G
A-2
THE 80M CORPORATION
DIMENSION YARR.,(a,
. - INSERT 011 T PI! r;.3 .......
WRITE (1,%1%' ATITLE
Z1Z Foct:tA T !X .15Aa, ...... - .
-INSERT

Z3S elI10)
DO 219 1.1.NPOIN" .. .. - .............. .
NLOt;ATaLOCY
DO 216 ;".1 KHTR ........ ---.-. ---- -- --.
VALUECNLOClr.I,

216 CONTINUE
. "'RITE C 7 ;Z1ar"YALUE (LOCUlr,lURRlYlJ) ;';{.i,;iiCHTIU"''-'''--'''
Z19 CONTINUE .
. ZlS FOIt!1AT fKiS;4f .. .. ---- ..... - _- - _-_
-OELETE UP01.Z
-_ .. - PROGP.AH-S'P1C-(f'I'R'l'Ur"ZJ1 .oorpor. Z t fI"P, .. INP!) f 'tlpE6. OUTpUT. TlpEn
-cELETE UP01.:S
CA T 1 IF A "",&,101'0:1 oa"'" .................................. _ ...... .
A-3