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http://www.c-jump.com/CIS77/ASM/Assembly/lecture.html
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43. RCL and RCR, Rotate With Carry 44. EQU directive 45. EQU Directive Syntax
3. Here is why...
I just don't consider a utility program that's 4 megabytes big, and contains all sorts of files that the author didn't create, to be really great software. Do you? Steve Gibson, Gibson Research Corporation. Assembly language programs contain only the code that is necessary to perform the
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given task. Assembly gives direct and complete control over system hardware: Writing device drivers. Operating system design. Embedded systems programming, e.g. aviation industry. Writing in-line assembly (mixed-mode) in high-level languages such as C/C++, or hybrid programming in assembly and C/C++.
5. Why MASM ?
The "granddaddy" of all assemblers for the Intel platform, product of Microsoft. Available since the beginning of the IBM-compatible PCs. Works in MS-DOS and Windows environments. It's free: Microsoft no longer sells MASM as a standalone product. Bundled with the Microsoft Visual Studio product. Numerous tutorials, books, and samples floating around, many are free or low-cost. Steve Hutchessen's www.masm32.com
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MASM32 development environment incorporates MASM assembler and Win32 API tools.
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Development Kit (DDK), which contains both assembler and linker. Also, download Microsoft's Debugging Tools for Windows 32-bit Version. Take a look at Sivarama P. Dandamudi textbook info, Introduction to Assembly Language Programming , From 8086 to Pentium. Homepage includes free downloadable Microsoft assembler, MASM , and student slides. Last, but not least, Microsoft Macro Assembler Reference MSDN resource.
Intel Architecture Software Developer's Manual 1. 2. 3. Volume 1 , Intel Basic Architecture: Order Number 243190 , PDF, 2.6 MB. Volume 2 , Instruction Set Reference: Order Number 243191 , PDF, 6.6 MB. Volume 3 , System Programing Guide: Order Number 243192 , PDF, 5.1 MB.
It is highly recommended that you download the above manuals and use them as a reference.
Introduction to 80x86 Assembly Language and Computer Architecture by Richard C. Detmer, Professor of Computer Science at Middle Tennessee State University, Tennessee. Jones and Bartlett Publishers 2001 (499 pages) ISBN-13: 9780763717735 ISBN-10: 0763717738 Hardcover, 512 Pages 2001 Excellent book for beginners
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The Intel Family Of Microprocessors: Hardware and Software Principles and Applications (Hardcover) by James L. Antonakos ISBN: 1418038458 Date: 2006 Pages: 640 Solid book, covers Pentium CPUs
Professional Assembly Language by Richard Blum Publisher: Wrox Date: 2005 Pages: 567 ISBN: 0764579010 Covers Linux Programming
PC Assembly Language Free book online by Paul A. Carter November 11, 2003
Free online tutorial Win32 Assembler Coding For Crackers Author: Goppit. "First go away and learn assembler, then come back and read this." An introduction to Win32 Assembler programming aimed at filling the gap between the complete beginner and the advanced.
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Size: 11.31 MB
Introduction to Assembly Language Programming: For Pentium and RISC Processors by Sivarama P. Dandamudi Publisher: Springer; 2nd ed. edition Date: 2004 Pages: 696 ISBN: 0387206361 Highly recommended, in depth coverage of concepts.
Use google to search for "MASM programmer's guide chm". by Microsoft, 1992, covers Assembly Version 6.1
Assembly Language for Intel-Based Computers by Kip R. Irvine Publisher: Prentice Hall; 4th Edition, 2002 Pages: 700 ISBN: 0130910139 Excellent book, lots of sample code, in-depth coverage of BIOS, Win32, MS-DOS.
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32/64-bit 80x86 Assembly Language Architecture by James Leiterman Publisher: Wordware Publishing, Inc. Date: 2005 Pages: 450 ISBN: 1598220020 Online resources: James Leiterman Advanced book for game and graphics programmers.
9. Fundamental Concepts
CPU registers Memory addressing Representation of data: numeric formats character strings Instructions to operate on 2's complement integers Instructions to operate on individual bits Instructions to handle strings of characters Instructions for branching and looping Coding of procedures: transfer of control parameter passing local variables
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.386 ; Tells MASM to use Intel 80386 instruction set. .MODEL FLAT ; Flat memory model option casemap:none ; Treat labels as case-sensitive .CONST .STACK 100h .DATA .CODE _main PROC ret _main ENDP END _main ; Constant data segment ; (default is 1-kilobyte stack) ; Begin initialized data segment ; Begin code segment ; Beginning of code
; Marks the end of the module and sets the program entry point label
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http://www.c-jump.com/CIS77/ASM/Assembly/lecture.html
Flag register is used to convey the condition test result. For example:
cmp je . . done: ax, bx done
The EAX, EDX, ECX, EBX, EBP, EDI, and ESI registers are 32-bit generalpurpose registers, used for temporary data storage and memory access. The AX, DX, CX, BX, BP, DI, and SI registers are 16-bit equivalents of the above, they represent the low-order 16 bits of 32-bit registers. The AH, DH, CH, and BH registers represent the high-order 8 bits of the corresponding registers.
Since the processor accesses registers more quickly than it accesses memory, you can make your programs run faster by keeping the most-frequently used data in registers.
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Similarly, AL, DL, CL, and BL represent the low-order 8 bits of the registers.
Register EAX EBX ECX EDX EBP ESP ESI EDI EIP EFLAGS
Size
Typical Uses
32-bit Accumulator for operands and results 32-bit Base pointer to data in the data segment 32-bit Counter for loop operations 32-bit Data pointer and I/O pointer 32-bit Frame Pointer - useful for stack frames 32-bit Stack Pointer - hardcoded into PUSH and POP operations 32-bit Source Index - required for some array operations 32-bit Destination Index - required for some array operations 32-bit Instruction Pointer 32-bit Result Flags - hardcoded into conditional operations
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Two index registers ESI (source index) and EDI (destination index) can be used as 16-bit or 32-bit registers Also in string processing instructions In addition, ESI and EDI can be used as generalpurpose data registers
Two pointer registers ESP (stack pointer) and EBP (base pointer) 16-bit or 32-bit registers Used exclusively to maintain the stack.
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Note: the above operand combinations are valid for all instructions that require two operands.
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"instruction operands must be the same size" "instruction operands must be the same size" "invalid instruction operands" "invalid instruction operands"
The above MOV instructions are ambiguous. Not clear whether the assembler should use byte or word equivalent of 100. Better:
mov mov mov mov EBX, ESI, WORD BYTE OFFSET table1 OFFSET status PTR [EBX], 100 PTR [ESI], 100
Semantics:
destination = destination +/- 1
The destination can be 8-bit, 16-bit, or 32-bit operand, in memory or in register. No immediate operand is allowed. Examples:
inc dec BX [value] ; BX = BX + 1 ; value = value - 1
Semantics:
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Examples:
add add ebx,eax [value], 10h
is better than
add eax, 1
INC takes less space. Both INC and ADD execute at about the same speed.
Semantics:
destination = (destination) - (source)
Examples:
sub sub ebx, eax [value], 10h
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is better than
sub eax, 1
DEC takes less space. Both execute at about the same speed.
Semantics:
(destination) - (source)
The destination and source are not altered. Useful to test relationship such as < > or = between the two operands. Used in conjunction with conditional jump instructions for decision making purposes. Examples:
cmp ebx, eax je done .. done: .. ; jump if equal
Semantics: Execution is transferred to the instruction identified by the label. Infinite loop example:
mov eax, 1 inc_again:
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Semantics: Execution is transferred to the instruction identified by label only if condition is met. Testing for carriage return example:
; Assume that AL contains input character. cmp al, 0dh ; 0dh = ASCII carriage return je CR_received inc cl .. CR_received:
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Semantics: Decrements ECX and jumps to target, if ECX > 0 ECX should be loaded with a loop count value before loop begins. Loop 50 times example:
mov ecx, 50 repeat: ; loop body: .. loop repeat ..
Equivalent to:
mov ecx, 50 repeat: ; loop body: .. dec ecx jnz repeat ..
Surprisingly,
dec jnz ecx repeat
Semantics: Perform the standard bitwise logical operations. Result goes to the destination. TEST is a non-destructive AND instruction:
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TEST performs logical AND but the result is not stored in destination (similar to CMP instruction.)
where count is an immediate value. Semantics: Performs left/right bit-shift of destination by the value in count or CL register. CL register contents is not altered.
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Bit shifted out goes into the carry flag CF. Zero bit is shifted in at the other end:
Specification of count greater than 31 is not allowed. If greater, only the least significant 5 bits are actually used. CL version of shift is useful if shift count is known at run time, e.g. when the shift count is a parameter in a procedure call.
Only CL register can be used. Shift count value should be loaded into CL:
mov shl cl, 5 ax, cl
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1. Rotate without carry: ROL (ROtate Left) ROR (ROtate Right) 2. Rotate with carry: RCL (Rotate through Carry Left) RCR (Rotate through Carry Right) Rotate instruction operand is similar to shift instructions and supports two versions: Immediate count value Count value is in CL register
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No reassignment is allowed. Only numeric constants are allowed. Defining constants has two main advantages: 1. Improves program readability 2. Helps in software maintenance.
mov ecx, 90 ; HARDCODING is less readable and harder to maintain
Multiple occurrences can be changed from a single place The convention is to use all UPPER-CASE LETTERS for names of constants.
Assigns the result of expression to name. The expression is evaluated at assembly time. More examples:
NUM_OF_ROWS NUM_OF_COLS EQU EQU 50 10
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ARRAY_SIZE
EQU
NUM_OF_ROWS * NUM_OF_COLS
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