Sunteți pe pagina 1din 51

DIGITAL CONTROL CASE STUDY

----- Bi-wing Aircraft

Name: WEI XIAO Student Number: 4187962 Date: 12/1/2012

Introduction

In this report we will design a controller to control the heading of a traditional bi-wing aircraft. The transfer function of the system with the heading angle of the aircraft as output is given by:

G s

4000 s s 10 s 20

This third order transfer function will be used for the design and evaluation of a controller.

Part 1 Continuous-time control


1. Make the system controller with a feedback controller. Design a controller to track a set-point step with the following objectives 1 Minimal settling-time 2 Overshoot < 5 % 3 Steady-state error = 0

r + -

C(s) D(s)

y G(s) G(s)

First we check the bode plot of the plant:

Figure 1 Bode Plot of Plant

From the bode plot of the plant, we found the gain margin is 3.52, phase margin is11.4, and the bandwidth is 11.4. The closed loop of the system is stable. The following figure is the plot of the step response without controllers.

Figure 2 Set-point Step Response

From the step response we find the steady-state error is 0. Since in this case the loop transfer function contains as many poles of zero value (integrators) are in the Laplace transform of the reference signal. So we do not need add integrator into the controller. The system is fast enough, but the overshoot and the oscillation is large. So we should decrease the gain and increase the phase margin. Based on the reasons illustrated previously, we decide to introduce the PD controller. Firstly considering about the ideal PD controller, which the transfer function () = 1 + . The ideal PD regulator cannot be realized, since the degree of the denominator is less than the degree of the nominator. So here we introduce the approximating realizable form 1 + () = 1 + = + Here Td > T, tau is the time constant of the differentiation channel. We define T and Td to make the breakpoint frequency between 1/Td and 1/T. It will improve the phase margin, which will results a faster settling process. But we should pay attention that there is a limit for choosing time constant T. since Td/T is the value of the over excitation. Increasing will make the system faster, but it may lead the system unstable. The following figure is the bode plot of the PD controller.

Figure 3 PD controller

According the rules introduced previously, we tune the parameters of the PD controller: = 0.4 = 0.1 = 0.01 So the PD controller: 1 + 0.1 = 0.4 1 + 0.01 The following figure is the bode plot of the open loop transfer function with PD controller.

Figure 4 Bode Plot Of Open Loop


4

From the bode plot of the plant, we found the gain margin is 23.5, phase margin is65.2, and the bandwidth is 7.47. The closed loop of the system is stable. Now the phase margin is much larger which will reduce the overshoot and oscillation of the step response. Now we check the step response. The following two figures is the step-point step response and the control signal effort.

Figure 5 Set-point Step Response

Figure 6 Control Signal

As we can see from the figure, the steady-state error is equal to 0, the overshoot is 3.75% which is smaller than 5% and the settling time is 0.482s which is quite small. So with a PD controller, the step response satisfies with the control objects. But we should pay attention to the control signal; it cannot too large since the limit of the actuator.
5

2. Instead of the set-point change a step is set at the input of the system as a load disturbance q (r=0). The objectives are: 1) Minimal amplitude of the system output y caused by disturbance q. 2) Minimal duration of the disturbance (within 1% of maximal value) 3) No off-set caused by the disturbance

q r + C(s) + + U G(s) G(s) y

1. From the block diagram, we have from disturbance to output, the closed-loop transfer function will be = 1 +

First we will check the disturbance rejection with the PD controller which is designed in 1. The following figure is the disturbance rejection with the PD controller.

Figure 7 Disturbance Rejection with PD Controller

From the figure, it is obviously not satisfy with the requirement. There exists a large off-set.
6

In order to achieve the third objective, we have to introduce integrator term to eliminate the disturbance steady-state error. Here we compare two situations: 1. PI controller. 2. PID controller First consider PI controller:

Figure 8 PI Controller

PI controller brings the high gain in the low frequency domain. Since there exists an integrate term, it will remove the steady-state error. After tuning the parameters of the PI controller, we get the function of the controller: + 0.4 Cpi = 0.83 The following figure is the bode plot of the controller and open loop transfer function

Figure 9 Bode Plot

It can be seen from the figure, the bandwidth of the open loop is 10.3. The phase margin is 14.7, the gain margin is 4.6. Now we can check the performance of the step response.

Figure 10 Disturbance Rejection

As it can be seen from the figure, the peak amplitude of the system output y caused by disturbance is 1.9. The settling time is 8.55. And the steady-state error is 0. And then we introduce the PID controller:

Figure 11 PID Controller

PID controller can increase the static accuracy of the control system and accelerate the system. The cut-off frequency can be placed to a higher value, which can fast the system. Tuning rules: Proportional gainAp : increase the bandwidth of the system, but it cannot be too large. We should make sure that the system is stable. Integrate time constantTI: equal to the largest time constant of the process. Differentiate time constantTD : equal to the second largest time constant. Parameter T: T = TD / , where is the pole placement ration. The larger is, the faster the
8

system will be. But it need large control signal. In order to compare the PID controller with PI controller, we set the bandwidth of the open loop with PID controller is same as with PI controller. So here we set the Bandwidth of the open loop is around 10.3 rad/s. Tuning the parameter based on the rules, the PID controller is designed as: (S + 3)(S + 4) CPID = 116 S(S + 1600) The following figure is the bode plot of the controller and open loop transfer function

Figure 12 Bode Plot

It can be seen from the figure, the bandwidth of the open loop is 10.3. The phase margin is 69 the gain margin is inf. Now we can check the performance of the step response.

Figure 13 Disturbance Rejection

As it can be seen from the figure, the peak amplitude of the system output y caused by disturbance is 1.54. The settling time is 1.62. And the steady-state error is 0. Compare with the system with PI and PID controller 1) Compare the Nyquist plot

Figure 14 Nyquist Plot


10

2) Compare the step disturbance response

Figure 15 Compare the step disturbance response

3) Compare control signal

Figure 16 Compare control signal


11

Conclusion : 1) the peak amplitude of the system output y caused by disturbance with PID controller is smaller than with PI controller 2) the settling time of the step disturbance response with PID controller is smaller than with PI controller 3) there is no oscillation with PID controller, contrarily there exists a big oscillation with PI controller 4) consider about the control signal, the amplitude, settling and the oscillation with PID controller is much better than with PI controller The PID controller perform much better than the PI controller in this case. So we choose the PID controller (S + 3)(S + 4) CPID = 116 S(S + 1600)

12

Part2 Discrete-time control


3. From the continuous-time transfer function 400 ( + 10)( + 20) With the MATAB command tf2ss, we can get its state-space notation: = + = + 1 With = [ 2 ] 3 () = 30 200 0 = [ 1 0 0] , 0 1 0 1 = [0] 0

= [0 0 4000] , = 0 As we know the position of the head of the Bi-wing aircraft is the output of the system,3 represents the position of the head of the Bi-wing aircraft, 2 = 3 means 2 represents the speed of head of the Bi-wing aircraft and 1 = 2 means 3 represents the head of the Bi-wing aircraft. Before transform the continuous-time form into the discrete-time description, we need to select an appropriate sampling time at first. The main rule for the choice is due to the matching between the step response of the continuous-time and the dstep response of the discrete-time. Tr Nr = 4 10 accresponds to h = [0.1,0.6] h For good sampling, here we choose h = 0.15 Since there are two situations, one is for set-point step tracking and the other one is for disturbance rejection. 1) Set-point tracking: 0.15 h= = 0.02 s 2) Disturbance rejection 0.15 h= = 0.014 s For simplification, both of these two situations we can chooseh = 0.015 s.And then with the c2d command, we have the discrete-time description, that is, 0.6187 2.4267 0 0.8089 = [0.0121 0.9818 0] , = [ 00061 ] 0.0001 0.0149 1 0.0000 = [0.0027 0.4459 60.000] , = 0.0014

13

4. Map Continuous-time controller into Discrete-time controller Use MATLAB command c2d with sampling timeh = 0.015 s and algorithm tustion to map the continuous-time controller into Discrete-time controller. Here we should consider the following two situations. 1) Set-point step tracking We have the practical PD controller in the continuous-time form of 1 + 0.1 1 () = 0.4 1 + 0.01 Then we have its discrete-time form of 2.457 2.114 1 () = 0.1429 The closed-loop step response and control signal with this discrete-time controller is shown in the following figures together with the continuous-time controller.

Figure 17 Set-point Step Response

14

Figure 18 Control Signal

It can be seen from the figures, the performance of the two controllers are almost same. The overshoot is same and the settling time is smaller in discrete time.And the control signal is much smaller in discrete time. The discrete time controller works quite well. 2) Disturbance rejection We have the practical PID controller in the continuous-time form of (S + 3)(S + 4) C2c (s) = 116 S(S + 1600) Then we have its discrete-time form of 9.398 2 17.83 + 8.461 2 0.1538 0.8462 The closed-loop step response and control signal with this discrete-time controller is shown in the following figures together with the continuous-time controller. 2 () =

15

Figure 19 Disturbance Rejection

Figure 20 Control Signal

It can be seen from the figure, there is no significant difference between two controllers. The discrete-time controller works well.

16

5. Apply a discrete pole placement method to control the system and construct a servo tracking controller Using state feedback, the poles or the eigenvalues of the system can be assigned subject to system-dependent limitations. This is known as pole placement.

For the open-loop transfer function (), with discretization, we have the description which has been got in the 3th question +1 = + = + With 0.6187 2.4267 0 0.8089 = [0.0121 0.9818 0] , = [ 00061 ] 0.0001 0.0149 1 0.0000 = [0.0027 0.4459 60.000] , = 0.0014 The admissible controller is U(k) = Lx(k) We can use pole placement method with state method to control the system. To solve the pole-placement problem, we should use the MATLAB code ctrb to check if the system is reachable. We can check the poles of the origin system: P = [1.0000 0.8605 0.7391] To achieve the objectives, we should place the poles in a suitable position. But we should pay attention to the trade-off between the speed of the response and the control magnitude. We should consider two tasks. The first one is for set-point step tracking; the second one is for disturbance rejection. To make it simpler, here we introduce the two-degree-of-freedom controller.

17

It can solve both servo and disturbance rejection problem. The advantage is that the servo and disturbance rejection problems are separated. The feedback controller Hfb is designed to obtain a closed-loop system that is insensitive to process disturbance. The feedforward Hff is designed to obtain the desired servo properties. 1) Set-point step tracking We introduce a feed forward controller eliminate the nonzero steady state error. So the control law: () = () is replaced by () = () + () Where is reference gainequal to 1/ (gain of the system). The system state-space equations become: ( + 1) = ( L)() Lc () () = [; ]() + [D; Lc ]() Then we will check the performance of the set-point step tracking with different poles location i. Place poles at [0.3, 0.4, 0.5] Check the time sample, h = 0.015 is suitable. Use MATLAB command place, we have a relevant gain = [1.1563 67.8783 1153.8333] The set-point step response and the control signal is shown in the following figure

Figure 21 Set-point Step Response

It can be seen from the figure, there is no overshoot for the response. The settling time of the response is 0.128s. The peak amplitude of the control signal is 18.7 and the settling time of the control signal is 0.0645s. ii.
18

Place poles at [0.7, 0.8, 0.9]

Check the time sample, h = 0.015 is suitable. Use MATLAB command place, we have a relevant gain = [1.1563 67.8783 1153.8333]

Figure 22 Set-point Step Response

It can be seen from the figure, there is no overshoot for the response. The settling time of the response is 0.691s. The peak amplitude of the control signal is 0.549 and the settling time of the control signal is 0.401s. 2) disturbance rejection Now we consider about the rejection of load disturbance. The system state-space equations become: ( + 1) = ( L)() () ( + 1) = [; ]() [D; 0]() i. Place poles at [0.3, 0.4, 0.5] Check the time sample, h = 0.015 is suitable. Use MATLAB command place, we have a relevant gain = [1.1563 67.8783 1153.8333] The disturbance rejection and the control signal is shown in the following figure

19

Figure 23 Disturbance Rejection

It can be seen from the figure, there is no overshoot for the response. The settling time of the response is 0.128s. The peak amplitude of the control signal is -1.4 and the settling time of the control signal is 0.0645s. But there exists a very small off-set 0.0534.

ii.

Place poles at [0.7, 0.8, 0.9] Check the time sample, h = 0.015 is suitable. Use Matlab command place, we have a relevant gain = [1.1563 67.8783 1153.8333] The disturbance rejection and the control signal is shown in the following figure

20

Figure 24 Disturbance Rejection

It can be seen from the figure, there is no overshoot for the response. The settling time of the response is 0.691s. The peak amplitude of the control signal is -1 and the settling time of the control signal is 0.401s. But there exists a big off-set 1.82. Conclusion: (1) The poles arecloser to the origin, the faster the system will be. (2) For the disturbance rejection, the closer to the origin, the smaller offset it will be. But we cannot eliminate the offset, unless we introduce the integral action. (3) In the other hand, the poles is closer to the origin, more control effort it needs. It is a tradeoff between the speed of the system and the control effort we need. So it is quite important to choose the proper poles according to the requirement and the practice. 6. Add a discrete-time dynamic observer to estimate the state of the system It is unrealistic to assume that all the states of the system can be measured. So we should use the observers to determine the states of the system from available measurements and a model. First we should make a state reconstruction based on a model ( + 1) = () + () ( + 1) = () + () + [() () () = ()

21

Use the same pole locations for the control as in the previous question. So in this case the gain L is same as the 5th question. Here we should use MATLAB code place to place the observer poles. We still divide the problem into two parts: set-point step tracking and disturbance rejection 1) Set-point step tracking We introduce a feed forward controller eliminate the nonzero steady state error. So the control law: () = () is replaced by () = () + () The system state-space equations become: ( + 1) () [ ]=[ ][ ] + [ ] ( + 1) () D () () = [ ][ ] + [ ] () 0 Place poles of controller at [0.3, 0.4, 0.5] Place poles of observer at [0.8, 0.7, 0.9] Check the time sample, h = 0.015 is suitable. The comparison between the set-point step response of the system controller with an observer and without an observer is in the following figure.

i)

Figure 25 Set-point Step Response

ii)

Place poles of controller at [0.3, 0.4, 0.5] Place poles of observer at [0.2, 0.3, 0.4] Check the time sample, h = 0.015 is suitable. The comparison between the set-point step response of the system controller with an observer and without an observer is in the following figure.

22

Figure 26 Set-point Step Response

iii) Place poles of controller at [0.7, 0.8, 0.9] Place poles of observer at [0.8, 0.7, 0.9] Check the time sample, h = 0.015 is suitable. The comparison between the set-point step response of the system controller with an observer and without an observer is in the following figure.

Figure 27 Set-point Step Response

iv) Place poles of controller at [0.7, 0.8, 0.9] Place poles of observer at [0.2, 0.3, 0.4]
23

Check the time sample, h = 0.015 is suitable. The comparison between the set-point step response of the system controller with an observer and without an observer is in the following figure.

Figure 28 Set-point Step Response

Conclusion: (1) there is no significant difference between the response of the system controlled with an observer and without an observer using a set-point. (2) the difference between the system with an observer and without an observer is bigger when applying a faster controller.(i.e. The difference in (i) and (ii) is bigger than (iii) and (iv)). (3) the observer does not influence the speed and accuracy of the system.

2) Disturbance A step disturbance is on the plant output. The closed loop function is: 1 Gd = 1 + Since there exists an integrator in the plant, hence there do not need add integral action The system state-space equations become: ( + 1) () 0 [ ]=[ ][ ] + [ ] ( + 1) () K

24

i)

() 1 ][ ] + [ ] () 0 0 Place poles of controller at [0.3, 0.4, 0.5] Place poles of observer at [0.8, 0.7, 0.9] Check the time sample, h = 0.015 is suitable. The following figure is the disturbance response of the observer-based pole-placement design with integral action. () = [

Figure 29 Disturbance Rejection

ii)

Place poles of controller at [0.3, 0.4, 0.5] Place poles of observer at [0.2, 0.3, 0.4] Check the time sample, h = 0.015 is suitable. The following figure is the disturbance response of the observer-based pole-placement design with integral action.

25

Figure 30 Disturbance Rejection

iii) Place poles of controller at [0.7, 0.8, 0.9] Place poles of observer at [0.8, 0.7, 0.9] Check the time sample, h = 0.015 is suitable. The following figure is the disturbance response of the observer-based pole-placement design with integral action.

Figure 31 Disturbance Rejection

iv) Place poles of controller at [0.7, 0.8, 0.9] Place poles of observer at [0.2, 0.3, 0.4]
26

Check the time sample, h = 0.015 is suitable. The following figure is the disturbance response of the observer-based pole-placement design with integral action.

Figure 32 Disturbance Rejection

Conclusion : (1) there exists big difference between the response of the system controlled with an observer and without an observer using disturbance rejection. (2) since we introduce the integral action, the steady state error with observer is zero. (3) the poles of the observer close to origin, the observer become fast, however the control signal is large. 7. Apply a discrete-time LQ controller for the optimal control of the system First let us play with the weighting matrices: 1 0 1) = [0 1 0 0 0 0] R=1 1

Check the time sample, h = 0.015 is suitable. The following figure is the set-point step tracking and disturbance rejection

27

Figure 33 Set-point Step Response

Figure 34 Disturbance Rejection

1 0 2) = [0 1 0 0

0 0 ] R=1 5000

Check the time sample, h = 0.015 is suitable.

28

Figure 35 Set-point Step Response

Figure 36 Disturbance Rejection

29

1 0 3) = [0 1 0 0

0 0 ] R=1000 5000

Check the time sample, h = 0.015 is suitable.

Figure 37 Set-point Step Response

Figure 38 Disturbance Rejection

As we see from the figures, (1) increasing Q, will make the system faster, decrease the off-set of the disturbance rejection and decrease the control signal for the tracking. (2) increasing R, will make the system slower, increase the off-set of the disturbance rejection
30

and decrease the control signal for the tracking. Conclusion: Q is the emphasis is put on the state and R is the emphasis on the control input.Large Q or R penalize the state or control input heavier. Smaller Q or R allow for larger deviations of state from zero or for larger action of control input. One of the more practical aspects of control is that in many cases the physical components of the real system (actuators) will imit the performance of the controllers. For this reason, we should investigate the effects of the maximum value or amplitude of the control signal on the performance of the control loop. 8. Calculate the input signal sent to the the system by the controller during the execution of the set-point step and during the disturbance step. We should pay attention in the following questions that we should limit this controller output value to a maximum of 1. 9. Let us recosider about the discrete-time controller in the 4th problem. 1) Set-point tracking We have the practical PD controller in the continuous-time form of 1 + 0.1 1 () = 0.4 1 + 0.01 Then we have its discrete-time form of 2.457 2.114 1 () = 0.1429 Let us look at the figure that we have got in the 4th question.

Figure 39 Set-point Step Response

31

Figure 40 Control Signal

For the set-point step the performance achieves the objective. But the peak amplitude of the control signal is over the limit. So we should change the controller to make it satisfy with requirement of the control signal limit. First we check the bode plot of the previous open loop and the controller in discrete domain

32

Figure 41 Bode Plot

As it can be seen from the bode plot. The bandwidth of the open loop is 7.47, the phase margin is 65.2. In order to decrease the control signal, we can decrease the bandwidth of the open loop. Meanwhile we should keep the phase margin, since small phase margin will bring overshoot, oscillation and increase the settling time. After tuning, we design a new discrete PD controller: 1.257 1.054 () = 2 1.1429 We can check the bode plot of the open loop and controller now

33

Figure 42 Bode Plot

As it can be seen from the figure, the bandwidth is 4.48, which is smaller than previous one. However the phase margin is 67.1, which is nearly unchanged. It means this controller can achieve the objectives. Now we can check it for the set-point step response and the control signal.

Figure 43 Set-point Step Response

34

Figure 44 Control Signal

We can see from the figures that the performance is satisfied with the objectives, although the settling time becomes a litter larger (from 0.48 to 0.70). Meanwhile the overshoot decreases and the control signal are under the limit. 2) Disturbance rejection We have the practical PD controller in the continuous-time form of (S + 3)(S + 4) C2c (s) = 116 S(S + 1600) Then we have its discrete-time form of 9.398 2 17.83 + 8.461 2 0.1538 0.8462 Let us look at the figure that we have got in the 4th question. 2 () =

35

Figure 45 Disturbance Rejection

Figure 46 Control Signal

As it can be seen from the figures, the performance of the step response achieves the objectives and the control signal is under the limit. It is quite lucky that it does not need to redesign the PID controller.

36

10. Tune the discrete-time pole placement controller within the set limits. First we check the poles that we have placed in the 5th questions. 1) Set-point step tracking As we find that when the poles at [0.3, 0.4, 0.5], the control input is over the limit. So we should make the poles far away from the origin. After tuning, place poles at [0.8, 0.81, 0.72] Check the time sample, h = 0.015 is suitable.

Figure 47 Set-point Step Response

As it can be seen from the figure that the steady state error is 0, the settling time is 0.462s and the overshoot is 0. The performances of the set-point track achieve the objectives well. In the other hand, the control signal is under the limit. So the controller is good for the system. 2) Disturbance rejection We can check the disturbance rejection with the same controller just design for the reference tracking.

37

Figure 48 Disturbance Rejection

As we can see from the figure that the off-set of the disturbance rejection is quite large. However the control signal is under the limit. So we can place the poles closer to the origin. After tuning we choose the poles at [0.73, 0.83, 0.7]. we should check Check the time sample, h = 0.015 is suitable.

Figure 49 Disturbance Rejection

As it can be seen from the figure that the settling time decrease, the off-set of the
38

disturbance rejection decrease and the control input is under the limit. Then we check the poles that we have placed in the 6th questions. (state feedback with an observer) 1) Set-point step tracking As we find that poles of controller at [0.3, 0.4, 0.5] and poles of observer at [0.2, 0.3, 0.4], the control signal is too large. We have to change the pole locations. After tuning we find the poles of controller at [0.73, 0.83, 0.7] and poles of observer at [0.3, 0.2, 0.4] Check the time sample, h = 0.015 is suitable.

Figure 50 Set-point Step Response

As it can be seen from the figure that the steady state error is 0, the settling time is 0.437s and the overshoot is 0. The performances of the set-point track achieve the objectives well. In the other hand, the control signal is under the limit. So the controller is good for the system. 2) Disturbance rejection We can check the disturbance rejection with the same controller and observer just design for the reference tracking.

39

Figure 51 Disturbance Rejection

As we can see the control signal is over the limit. So we have to change the pole locations. After tuning, we make the poles of the controller at [0.73, 0.83, 0.7] and poles of the observer at [0.65; 0.75; 0.73] Check the time sample, h = 0.015 is suitable.

Figure 52 Disturbance Rejection

As it can be seen from the figure that there is no off-set of disturbance and the settling time is quite small and the control signal is under the limit. So this controller and observer is good in this case.

40

11. Tune the LQ controller to make the control signal is within the specified limit. 1) Set-point step tracking 1 0 After tuning we choose Q = [0 50 0 0 0 0 ] R=1 8000

The following figure is the set-point step response and the control signal Check the time sample, h = 0.015 is suitable.

Figure 53 Set-point Step Response

As we can see from the figure, the settling time of the response is 0.42s, the overshoot is 1.34 and the steady state error is 0. In the other hand the control input is within the limit This LQ controller achieves the set-point tracking objectives 2) Disturbance rejection 0.1 0 0 After tuning we choose Q = [ 0 80 0 ] R=0.08 0 0 3000 Check the time sample, h = 0.015 is suitable.

41

Figure 54 Disturbance Rejection

As it can be seen from the figure that the amplitude of the system output y caused by disturbance is small and the control input is within the limit. But there exists an off-set caused by the disturbance. The off-set problem will be solved in the 12th problem.

12. Sometimes a steady state error may occur in applying feedback control 1) For reference step response We should add a feedforward gain equal to the inverse of the dcgain. In the 5 th question we have use the feedforward controller.

Figure 55 Set-point Step Response


42

2) For disturbance rejection If there exists a steady error, we can solve it by introduce an integrate or create an error estimator to eliminate the off-set

Figure 56 Disturbance Rejection

13. One extra time step delay is introduced by the computer algorithm Frist we will change the sampling time as h = 0.06s. We will consider the influence of the time delay to the set-point step tracking and disturbance rejection separately. 1) Set-point step tracking Frist we will change the sampling time ash = 0.06s. We will compare the bode plot of the open loop with delay and without delay

43

Figure 57 Bode Plot

As it can be seen from the figure that the phase margin and the gain margin of the bode plot with delay is decreasing, which will bring negative influence to the system. So we should check the step response in time domain

Figure 58 Set-point Step Response

44

Figure 59 Control Signal

As we can see from the figure, both of the overshoot and settling time increase, which we should avoid. Method: We should redesign a controller to get rid of the bad influence. The main idea is that we can design from the bode plot of the open loop with delay and without delay. We should make the bandwidth equal to the situation without delay and increase the phase margin. In this case we should design a controller to increase the phase margin a bit. After tuning, we design the controller: 1.556z 1.084 1.447 + 0.7786 The following figure compares the open loop with delay using the new controller with the open loop without delay. C2c (z) =

45

Figure 60 Bode Plot

Now the bandwidth is still same, and the phase margin is much closer We can check the set-point step and control signal in the time domain

Figure 61 Set-point Step Response

46

Figure 62 Control Signal

As we can see from the figures, the performance now is much better than the previous and this controller achieves the objectives 2) Disturbance rejection Frist we will change the sampling time as h = 0.05s. We will compare the bode plot of the open loop with delay and without delay

Figure 63 Bode Plot

As it can be seen from the figure that the phase margin and the gain margin of the bode plot with delay is decreasing, which will bring negative influence to the system.

47

So we should check the step response in time domain

Figure 64 Disturbance Rejection

As we can see that there exists a off-set. The amplitude of the system output y caused by disturbance and the settling time is large. The method is same as the set-point step tracking.

Figure 65 Control Signal

As we can see that there exists a off-set. The amplitude of the system output y caused by disturbance and the settling time is large. The method is same as the set-point step tracking. The following figure compares the open loop with delay using the new controller with the open loop without delay.

48

Figure 66 Bode Plot

As we can see from the figure, we increase the phase margin by introducing the new controller Then we check the disturbance rejection in the time domain

Figure 67 Disturbance Rejection

49

Figure 68 Control Signal

As we can see from the figure that we decrease the amplitude of the system output y caused by disturbance, decrease the settling and eliminate the off-set. The control signal is within the limit. The new controller help us solve the delay problem. Overall Conclusion: (1) In this case study, we introduce three methods to design a discrete time controller: (a) first design a continuous time controller, and mapping to discrete time domain. (b) Design the controller directly in the discrete time domain. (3) Use state space model with pole placement method, (2) We should choose suitable sample time, which will make large influence to the system and it also depend on the cost. (3) We should pay attention to the control signal, since there is a limit for the actuator, which will influence the performance of the controller. (4) There is a tradeoff between increasing the speed of the system and decreasing the control effort. We should make a decision depend on the practice application. (5) When design a controller, sometimes we should take the time delay into consideration.

50