A CLAMPING CURRENT CONTROL TECHNIQUE, BASED ON ONE CYCLE CONTROL OCC

Alberto S. Lock1, Edison R. C. da Silva1, Malik E. Elbuluk2, Cursino B. Jacobina1

Departamento de Engenharia Eltrica/Universidade Federal de Campina Grande C.P. 10.105, Campina Grande, PB, 58109-970 Brasil. Tel.: +55(83) 3310-1407, Fax: +55(83) 33101418 e-mail: [alberto.lock, aluisio, edison]@dee.ufcg.edu.br University of Akron, Ohio, USA e-mail:melbulik@uakron.edu
1 2

Abstract This paper proposes a clamping phase technique that results in power factor control at the input of a controlled rectifier by means of a current control based on One Cycle Control (OCC) technique. It minimizes phase interference, fixes operation frequency as well as improves phase coordination. Control simplicity and voltage input sensor elimination is the feature of the proposed control. Theoretical background of the clamping phase technique as well as of OCC principle has been reviewed and analyzed. Simulated results confirm the proposed technique. Keywords - Power factor control, controlled rectifier, current control, one-cycle control. I. INTRODUCTION Nowadays, controlled rectifiers are present in most of electronic equipment containing dc/ac converters as a part of the power energy conditioner for ac mains. A commonly used control strategy for controlled rectifiers, is a cascade structure where an inner current control loop and an outer voltage loop are used [1]. Current control techniques can be divided into three main categories [2]: Linear control, Hysteresis control, and Predictive control. Linear controllers, including synchronous (dq frame) and stationary (abc frame) PI [3,4] controllers are based on PWM modulators. Linear controllers have a well defined harmonic spectrum and a fixed frequency operation, but they are load dependent and their dynamic response is considered inferior to that of hysteresis controllers [2,3]. Hysteresis current control (HCC) is an ON-OFF control system, which results in control simplicity, fast response and good accuracy; but its very wide operation frequency and its phase interferences random behavior are its two main drawbacks. None of the categories above has achieved the main goal of current controllers: a fast response in transient state and low harmonic content in steady state [2]. In this sense, to overcome implementation difficulties of HCC, two methods have been proposed: 1) to deal the phase switching as a whole, by means of a voltage or current vector, limiting current error tolerance inside a frame hexagon [5] or a square [6-8] and 2) to subtract for each phase current, a signal derived from the mean average value of phase interference voltage [9]. But first method does not solve phase co-ordination and second one needs full knowledge of inductor parameters (L-r); to minimize phase interference, an alternative approach has been proposed in [10] consisting on line current control, alternate clamping of each of the phase switches and control of the other two phases. However, for phase switching co-ordination, a Phase

Locked Loop (PLL) is added to, thus affecting hysteresis control simplicity. On the other hand, One-Cycle Control OCC, which is known by its simplicity, compares each phase current to a variable amplitude ramp carrier wave, controlled by the dc link voltage [11]. This paper proposes a clamping current phase technique similar to that introduced in [10] for input power factor control of a controlled rectifier. However, it deals with a current control OCC (for phase co-ordination), instead of a PLL, and clamping of phase currents as a function of homopolar currents [14] is utilized. Control and hardware simplicity, full co-ordination between phase switching as well as a rectifier input voltage sensorless control, are considered by the authors as an improvement in relation to previous reported works [10,15]. Simulation results validate the present study. II. THEORICAL BACKGROUND In order to describe the suppression of interference among phases for the three-phase controlled rectifier in Fig. 1, let us consider the following equation of electric system

Vg 0 = Vg rI g L

dI g dt

+ VON

(1)

where g can be any of phase currents (g=a, b, c), Vg is ac mains voltage, and Vg0 is pole voltage. If there exists a phase current reference Ig* then it exists a pole voltage reference Vg0*:

V =Vg rI L
Subtracting (2) from (1):

* g0

* g

* dIg

dt

* +VON

(2)

r g + L

d g dt

= (Vg*0 Vg0 ) (V0*N V0N )

(3)

Fig. 1. Three-phase Controlled Rectifier.

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where

and subtracting (8.a) from (8.c) it comes:

g = Ig Ig

(4)
r r + L

g is the current error, VON is the neutral voltage ac mains with respect to the middle point of capacitors DC link, and V0*N is the neutral reference voltage. These are given by
V0 N = 1 [Va0 + Vb0 + Vc 0 ] 3 1 V0*N = Va*0 + Vb*0 + Vc*0 3
(5)

d r = (Vr0 Vr*0 ) dt

(12)

Similarly, subtracting (8.b) from(8.c), d q r q + L = (Vq0 Vq*0 ) dt

(13)

(6)

To eliminate phase interference, only two phase currents r and q are controlled, while the remaining phase z is clamped to DC link voltage VC1 or VC2. Each of the non clamped phase reference current (r or q) is a function of remaining non clamped current and DC link voltage, as show in Fig.2. Therefore, equations (5) and (6) can be written as
V0 N = V0*N 1 Vr 0 + Vq 0 + Vz 0 3 1 = Vr*0 + Vq*0 + Vz*0 3

Expressions (12) and (13) show the essence of the method, which consists of clamping one phase current and controlling the two other remaining currents, thus eliminating common mode voltage, VON. Note also that from (11) d rrz + L rz = (Vr 0 Vr*0 ) dt (14) dqz rqz + L = (Vq0 Vq*0 ) dt and, therefore,
r(Vr 0 Vr*0 ) 1 + sTr r(Vq0 V )
* q0

(7)

rz = qz =

(15)

Note that clamped phase current Iz can not be controlled while non clamped currents Ir and Iq are sequentially controlled. Furthermore, if it is assumed that for phase z the pole voltage reaches its pole voltage reference , (Vz*0 Vz 0 = 0) equation (3) can be divided as d (8.a) r r + L r = (Vr*0 Vr 0 ) (V0*N V0N ) dt d q (8.b) r q + L = (Vq*0 Vq0 ) (V0*N V0N ) dt

Fig.2. Proposed control block diagram.

r z + L

d z = (V0*N V0N ) dt

(8.c)

1 + sTr where Tr=L/r is related to the cut-off frequency of a low pass filter. Equation (14) shows that in order to eliminate common mode voltage, only two line currents must be controlled sequentially, while equation (15) shows that the line current error is the mean average value of the pole voltage error. Hence line currents must be controlled to follow pole voltage-reference mean-value. However to re-construct phase and line currents, an appropriate sampled pieces joining sectors of line voltages must be considered. This is the reason for the right side of equations (14) and (15), and why current references are non-sinusoidal. An example of this are the phase current references shown in Fig. 3(a) obtained for the hysteresis control with Phase Locked Loop, PLL, as used in [10]. If each sector Sj (j = 1 to 6) is defined in the hexagon of Fig. 3(b) taking into account the electric angle = .t of ac mains. Then, from Fig. 3(a), r and q phase current references are given by 6 (16) I * = f (V ).S
q

k =1 6

qz

Substituting (7) into (8.a), d 4 1 r r + L r = (Vr*0 Vr 0 ) (Vp*0 Vp0 ) dt 3 3 and, substituting (7) into (8.b), d q 1 * 4 r q + L = (Vq*0 Vq0 ) (Vp 0 Vp0 ) dt 3 3 On the other hand, assuming that

I r* = g k (Vrz ).S k
k =1

(17)

(9)

where fk, gk are functions used to rebuild line Iqz, Irz from line voltages Vqz, Vqz, respectively. Sk are the sectors of the complex plane represented in Fig.3(b) i.e. if q=a, Sk=S3 when Va0 =VC1 and Sk=S6 when Va0 =VC2. III. PROPOSED CURRENT CONTROL The current control approach proposed is based on an alternative One-Cycle Control technique. Its block diagram is shown in Fig. 4. As it can be seen from that figure, the proposed technique uses a Lead-Lag compensator instead of the conventional Low Pass Filter (LPF) adopted in [11]

(10)

r = r z = rz q = q z = qz

(11)

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together with an input conductance controller. A multiplier is utilized but to realize the conductance control and not as a template of the input current to be obtained. Classical OCC compares a filtered input reference signal, related to input ac mains, to a carrier ramp signal controlled by output voltage DC link. Then it can be written
Rs .I gs = Vm (1 2d )
Vm = E 0 .R s .K 1 Re

LPF, can be achieved. For a linear system, phase current Ig and compensated phase current Igs can be in phase and, also, the instantaneous value of Igs is proportional to the instantaneous value of Ig. So, it can be written, from (20), as
K m .VC1 (1 2d ) (21) = I gs Re where Km is a constant. However, for a non linear system as in present case, lead lag compensator behaves as a low pass filter (due to abrupt slope changes in current reference as Fig. 3 (a) shows, derivative behavior of the compensator is not appropriate). This compensator characteristic must be taken into account for current control, as will be seen later. On the other hand, it can be noted from Fig. 4 that the triangular carrier waveform Itdv is controlled in magnitude by half of the DC link voltage VC1 (note that when the current flowing through the neutral point N is zero, in Fig.1, then VC1=VC2 in the DC link voltage) and input conductance Ge=1/Re in equation (21), which is controlled by a Proportional-Integral (PI) controller. Note also that G0 is a constant which helps input conductance Ge to behave as a positive value despite its output limiter. Although this conductance controller is, in principle, very similar to DC link voltage controller [11] its behavior is more consistent with the current control technique adopted.

(18) (19)

where, E0 = VC1 + VC 2 is the DC link voltage(see Fig. 1) d is duty cycle. Re is input ac main resistance. Rs is equivalent current sensing resistor Ig is phase current (g=a, b, c) Igs is average value of phase current

(a)

Fig. 4. Control system proposed

(b)
Fig.3. (a) Phase current references; (b) Hexagon in complex plane.

A. Current references analysis If a balanced system is considered, and neglecting phase and line current ripple, then the phase currents are given by (see Fig. 1) I a = I p Sin t (22) I b = I p Sin( t 120) I c = I p Sin( t + 120) where Ip is phase current magnitude. On the other hand, phase current references can be expressed as a function of normalized currents Ign=Ig/Ip (g=a, b, c) and a correction component Ihg
* Ia = ( I an + I ha ) I p * Ib = ( I bn + I hb ) I p

In this proposal, after being passed through a lead lag compensator, the phase current Ig is compared to a triangular carrier waveform, according to
I gs = G (1 + sT1 ) Ig (1 + sT2 )

(20)

(23)

where Igs is the compensated current. This way, an improved dynamic response, in relation to that obtained with the use of

I c* = ( I cn + I hc ) I p

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As conventional OCC does not use input voltage sensors, an alternative homopolar function ih can be defined as [14]

Taking into account (20) and making Ig =I*g in Fig. 4, compensated phase current references are given by
I gs = G (1 + sT1 ) * Ig (1 + sT2 )

i h ( ) = [(1 2 ) + i max + (1 )i min ]

(24)

(29)

where imax = max {I a , I b , I c }, i min = min {I a , I b , I c } , 0 1 is the zero vector apportioning ratio [12][14]. Then correction component Ihg can be expressed as
I ha = ih ( = 0 1) + iha I hb = ih ( = 0 1) + ihb I hc = ih ( = 0 1) + ihc

In order to achieve line and phase currents without distortion, Igs current slopes must match at some Sector boundaries according to (30) dI as dIas
dt
S1 30

(25)

dt

S2 30

=K

dIas dt

S4 210

dIas dt

S5 210

= K
=K

(31) (32) (33) (34) (35)

Equation (24) depends only on phase currents and is valid since for a Rectifier, power factor is the unity and ac mains voltage and input currents are in phase. In the ih ( = 0 1) function varies from 0 to 1, at beginning of sectors S1, S3, and S5, and from 1 to 0, at beginning of sectors S1, S3, and S5 (see Fig. 3(b)). Both of them are shown in Fig. 5(a). Then from (24) the ih ( = 0 1) function can be written as
ih ( = 0 1) = (S1 + S 4 ) Sin( t + 120) ( S 2 + S 5 ) Sin( t 120) ( S 3 + S 6 ) Sin t + S1 S 2 + S 3 S 4 + S 5 S 6

dIbs dI = bs S3 dt 150 dt

S4 150

dIbs dt
dI cs dt

S6 330

=
=

dIbs dt
dIcs dt

S1 330

= K
=K

S5 270

S6 270

dIcs dt

S2 90

dIcs dt

S3 90

=K

(26)

Note that Igs current slopes are given by

dI gs dt =G ( D + (T1 T2 ) D 2 T1T2 D3 ) * Ig (1 + 2T22 )

(36)

On the other hand, for = 0,5 the homopolar function ih(=0,5) is shown in Fig. 5(b), in which ih slopes can be approximated by
3 dih ( = 0,5) 2 , S k = S1 , S 3 , S5 = 3 dt , Sk = S2 , S4 , S6 2

where operator D=d/dt. Therefore, from (23)-(28) and from the above equation,
GI p dI as = [(S1 + S 4 ). F (1 ) + (S 2 + S 5 ). F ( 2 ) dt (1 + 2T22 ) + ( S 3 + S 6 ). F ( 3 ) + H ( 3 ) + 3 ( x1 S1 + x3 S 5 ) 2

(27)

(37)

3 ( x1 S 4 + x3 S 2 )] 2 GI p dI bs = [(S1 + S 4 ). F ( 1 ) + (S 2 + S 5 ). F ( 2 ) dt (1 + 2T22 )
3 ( x1 S 3 + x3 S1 ) 2

(38)

+ (S 3 + S 6 ). F ( 3 ) + H ( 2 ) + 3 ( x1 S 6 + x3 S 4 )] 2

GI p dI cs = [(S1 + S 4 ). F (1 ) + (S 2 + S 5 ). F ( 2 ) dt (1 + 2T22 )

Fig.5. Homopolar function ih (a) ih ( = 0 1) (b) ih ( = 0,5)

+ (S 3 + S 6 ). F ( 3 ) + H (1 ) + 3 ( x1 S 2 + x3 S 6 )] 2

3 ( x1 S 2 + x3 S 6 ) 2

(39)

Error components ihg are given by

iha ih (0,5)(S1 + S 4 ) ( S 3 S 6 ) ih (0,5)(S 5 + S 2 ) x1 i = i (0,5)(S + S ) (S S ) i (0,5)(S + S ) x 3 6 5 2 h 1 4 2 hb h ( 0 , 5 )( ) ( ) ( 0 , 5 )( i S S S S i S S i + + hc h 5 2 1 4 h 3 6 ) x3

(28)

F ( ) = (1 + 2 )Cos ( ) + 2 (T1 T2 ) Sin ( ) H ( ) = Cos ( ) 2 Sin ( ) 3 Cos ( )

(40)

with 1= t+120, 2= t-120, 3= t Then from (30) and (37) and approximating Igs to a sinusoidal waveform i.e. Ias=Ip Sin t for t=30

where ih (0,5) = ih ( = 0,5) ; x1, x2, x3 are values to be found.

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1 x = [ (T1 T2 ) 3 (1 + 2T1T2 )] 1 3G x3 = 2 ( 3 + (T1 T2 )) 3 2G

(41)

F (s) = G

(1 + sT1 ) (1 + sT2 )

(44)

Note that due of phase currents periodicity, substituting (31)-(35) into (37)-(39) will give the same result above. Note also from (37)-(39) that x2 value can not be found using the technique described above, however as phase voltages were already clamped to Sectors show in Fig. 3(a), in order to constrain this constant to clamping method adopted, let us assume that (42) x2=k1VC1 where 0>k1>-1. Hence, from (23), (24) and (27) current references can be written as
* I a Sin t 1 iha * Sin( t 120) + i (01)1 + i ) I I ( = b h hb p * I c ihc Sin( t + 120) 1

Transfer function of Fig. 7(b) can be written now as

1 (sL + r) = Re Vg 1+ F(s) (sL + r) Ig

(45)

Substituting (44) into (43) gives

1 ( sL + r ) = G Re (1 + sT1 ) Vg [1 + ] L (1 + sT2 ) r ( s + 1) r Ig

(46)

(43)

Note in above equation if T1=L/r, the zero of the lead lag compensator and pole of transfer function cancels each other, which yields

where ih (01) = ih ( = 0 1). To control phase currents by the proposed method, current references given by expressions (28), and (41)-(43) must be the input of the control circuit shown in Fig.4 providing that I*g=Ig. Note that for the proposed system, equations above mentioned as a function of homopolar currents, work as equations (14)-(15), and hence phase current references, as well as compensated phase currents, can not be sinusoidal, as shown in Fig. 6. B. Lead Lag compensator analysis Fig. 7. shows a behavioral average model of OCC [13]. Fig. 7 (a) indicates the dc link voltage as a function of ramp voltage, while Fig. 7(b) considers input current, inductor resistor r, and function F(s) classically regarded as a constant or a Low Pass Filter (Eo is DC link voltage). In order to impose that the input current Ig and the compensated current
Fig.7. OCC model (a) Large signal (b) Average model considering a inductor resistance.

1 (1 + sT2 ) (r + GRe ) (47) = srT sL Vg 2 (1 + )(1 + ) r (r + GRe ) Phase angle of transfer function is given by: r T2 L (48) ) g = atn(T2 ) atn( ) atn( r + GRe r Note that if 0 a tan( ) ( ) the above equation can be expressed as GRe L (49) g = T2 a tan( ) r + GRe r Ig

Phase angle g equals to zero when (r + GRe ) L (50) a tan( ) T2 = GRe r Fig. 8 shows the possibilities of zero and pole placement in the complex plane, in which
zO = 1 T2

Fig.6. Phase current references Igs are in phase, in this work the proposed function F(s) is a lead lag compensator, that is,

GR e 1 p1 = (1 + ) T2 r p2 = r L

(51)

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Note from last equation that pole p1 is always placed to the left of zero zO. Since is an imaginary quantity in the complex plane, Fig. 8 can be seen as a graphical interpretation of equation (48). Furthermore, Fig. 8 also analyzes the possible locations of p2 regarding the relative position of p1 and zO. As from (49) phase angle g can be zero only when phase angle of zero equals the sum of phase angles of poles, =1+2. This is not particularly true in case of Fig. 8(a) since < 2 <1+2, but can be satisfied in case of Fig. 8(b) and Fig. 8(c) because in these cases >2>1 and >1>2, respectively. As an example, let us examine a case when G = 1, r = 0.2 , L = 0.2 mH, Re =3 , T2 = 3 ms, T1= 1ms. The Bode diagram is shown in Fig. 9, in which lead phase angle is 6.06 for 59.6 Hz and phase margin is 106, thus showing that the system is stable.

V. CONCLUSION In this paper, it has been investigated a clamping phase technique for a power factor corrector (PFC) rectifier by means of a current control based on OCC. Theorical background has been reviewed as well as OCC principles. Analytical expressions for both clamping phase technique and proposed current control has been deduced and analyzed. Particularly it was shown that OCC can function as a current controller when it works with a Lead Lag compensator. Analysis of such compensator was described. On the other hand, it was shown that phase current clamping can be done using homopolar functions. Different apportioning ratios are used to describe both current references and error components. Simulation results validate the proposed technique. Experimental results are being provided.

Fig. 8. Graphical interpretation of g (a) Zero between poles. (b) Zero to right of poles p1<p2 (c) Zero to right of poles p2<p1.

Fig. 10. Phase input voltage (100V/div) and (x12) phase currents (100A/div), phase reference and compensated currents. Fig. 9. Control system, Bode diagram when G=1, r=0.2, L=0.2mH, Re=3 , T2 =3ms, T1=1ms.

ACKNOWLEDGEMENT Authors are very grateful to CNPq (Conselho Nacional de Pesquisa e Desenvolvimento) and FAPESQ (Fundao de Amparo Pesquisa Paraba) for their financial support. REFERENCES [1] J. R. Rodrguez, J. W. Dixon, J. R. Espinoza, J. Pontt, and P. Lezana PWM Regenerative Rectifiers: State of the Art IEEE Trans. on .Ind. Electron., Vol. 52, N1, 2005, pp. 5-22. [2] L. Malesani and P. Tomasin, PWM current control techniques of voltage source convertersA survey, in Conf. Rec. IEEE IECON93, pp. 670675.

IV. SIMULATION RESULTS A PSCAD.4.2.0 was used for simulation of the circuit shown in Fig. 1 using the control circuit of Fig. 4. (I*g=Ig) with L=7mH, r =2 , C1=C2=800 F, RL=100 . Fig. 10 shows phase input voltages, phase currents, phase reference and compensated currents, while Fig. 11 shows the line voltage and currents, phase reference and phase compensated currents. Note from these figures that the current distortion is small. Fig. 12 shows the phase current transition when a load of 60 is added do DC link. Note in this case that sinusoidal waveforms as well as power factor are maintained along the transient.

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Fig.11. Line voltage (100V/div) and (x12) line currents (100A/div), phase reference and phase compensated currents (per phase).

[3] M. P. Kazmierkowski and L. Malesani, Current control techniques for three-phase voltage-source PWM converters: A Survey IEEE Trans. on Ind. Electron., Vol. 45, 1998. pp. 691703. [4] J. Holtz. Pulsewidth modulation electronic power conversion Proc. of the IEEE. pp. l194 - 1214. Aug. 1994. [5] D. M. Brod and D. W. Novotny, Current control of VSIPWM inverters, IEEE Trans. on Ind. Appl., Vol. IA-21, pp. 562570, 1985. [6] M. P. Kazmierkowski, M. A. Dzieniakowski and W. Sulkowski: "Novel current regulators for VSI-PWM inverters". EPE'98 Conf. Rec., Aachen 1989. pp. 23-28. [7] A. Ackva, H. Reinold and R. Olesinski: "A simple and self-adapting high-performance current control scheme for three-phase voltage source inverters". IEEE PESC'92 Cod. Rec., Toledo, 1992, pp. 435-442. [8] D. Wuest and F. Jenni: "Space vector based current control schemes for voltage source inverters". IEEE PESC'93 Cod. Rec., Seattle, 1993, pp. 986-992. [9] L. Malesani and P. Tenti: "A novel hysteresis control method for current controlled VSI PWM inverters with constant modulation frequency". IEEE Trans. on Industry Applications, Vo1.26, N. I, 1990, pp. 88-92. [10] L. Malesani, P. Tenti, E. Gaio, R. Piovan: "Improved current control technique of VSI PWM inverters with constant modulation frequency and extended voltage range". IEEE Trans. on Ind. Appl. Vol. 27, pp. 365369, 1991. [11] C Qiao and K Smedley. Unified constant-frequency integration control of three-phase standard bridge boost rectifiers with power-factor correction IEEE Trans on Ind. Electr., Vol. 50, N. 1, Feb. 2003, pp. 272-277. [12] V. Blasko. Analysis of a hybrid PWM based on modified Space-Vector and triangle-comparison methods. IEEE Trans. on Ind. Appl., Vol. 33, N. 3, May./June 1997, pp. 756-764. [13] S. Ben-Yaakov and I. Zeltser The Dynamics of a PWM Boost Converter with Resistive Input IEEE Trans. on Ind. Electr., Vol. 46, N. 3, 1999, pp. 613-619. [14] A. M. Bento, E. R. da Silva. One Cycle Control Strategy of Three-phase Inverters Proc of CBA08Congresso Brasileiro de Automatica, 2008. CDROM. [15] H. Mao; Boroyevich, D.; Ravindra, A.; Lee, F.C. Analysis and design of high frequency three-phase boost rectifiers. APEC '96. Conference Proceedings., pp. 538 544, vol. 2, 1996.

Fig.12. Line voltages (100A/div) and currents (x12) when an additional load resistor of 60 is added to DC link, on t=120 ms.

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