Thesis &pport$nity

LIRMM Laboratory - Montpellier 2 University ' UMR C(RS ))*+, ))*+ FranceResearch Team : SYSMIC Title : Statistical energy study in 2M6S Integrated 2ircuits : caracterisation and optimisation. Thesis Director : Nadine AZEMARD (a,emard7lirmm.fr%' ( ' 8IRMM. Thesis Co-Director : Gilles Ducharme (ducharme7math.uni* ducharme7math.uni*+montp9.fr% Institute of Mathematics and Mathematical Modelling of Montpellier Montpellie + I:M + ( MR !"#$% Financin : MR& Allocation Montpellier 9 ni*ersity !ey"or#s : SS&A (Statistical Static &iming Analysis%' (o)er analysis' energy *ariations' delay+po)er po)er optimi,ation' process *aria-ility. S$b%ect Description : /ith ith the 0 More Moore 1 and lo) po)er trends' optimi,ing or only )ell predicting the final performances of digital circuits -ecome more and more difficult. Indeed' *aria-ility and hardness to model accurately transistor -eha*ior impede the dimension scaling -enefits. 2urrent design methodologies methodologi generally use guard margins to pre*ent from the incertitude generated -y these limits and to guarantee functional yield. 3ut )ith the nanometer era' the use of margin is not efficient anymore' -ecause of an increasing o*er+design' o*er limiting optimi,ations and decreasing -oth parametric and functional yield. Many research teams are currently )or4ing on de*eloping statistical tools to e*aluate statistically the performance of integrated circuits. ;o)e*er' this emerging research a5is' commonly called statistical timing analysis' analysis constitutes only one of the stages of the de*elopment of statistical design flo). flo) &he second step is to de*elop characteri,ation and statistical optimi,ation methods to manage the circuit energy )hile allo)ing to control manufacturing yields. yields

&he o-<ecti*e of this thesis is to de*elop e*aluation and statistical design flo)s allo)ing the designer to define realistic energy *ariations to ensure a correct circuit operation at the lo)est cost. &his thesis )ill propose and *alidate such methods. &his de*elopment is -ased on the e5perience on the characteri,ation of timing circuit performance' -ut also on the )or4 already done in the team on the de*elopment of statistical e*aluation methods of these timing performances' in colla-oration )ith the mathematical statistics team of Montpellier. &his )or4 )ill -e made in colla-oration )ith Gilles Ducharme from the mathematical statistics team of Montpellier' )ith Marc 3elle*ille from the 2EA+ 8eti Greno-le and )ith Ro-in /ilson from S& Microelectronics Greno-le. 3y this )ay' this thesis )ill -e -ased on recent 2M6S technologies and li-raries )ith strong lin4s -et)een academy and industry. Can#i#ate pro.ile : A 4no)ledge in statistic mathematics' in modelisation and design of integrated circuits is re=uired. Thesis be innin : 6cto-er 9>": Thesis #$ration : : years Contact : Nadine A,emard a,emard7lirmm.fr Gilles Ducharme ducharme7math.uni*+montp9.fr