Digital Systems

Logic Circuits
vital for todays engineers Key components in computers, household appliances, Large systems: equipments for television and telephone networks Implemented using transistors on an IC chip Complex and large logic circuits handled by highly organized design techniques

WHY ICs?

Why ICs?
Integration reduces manufacturing costs (almost) no manual assembly Mass production System level reduction in cost

Integration improves Size Speed Power Reliability Modern technology: Possible to fabricate chips that contain tens of millions of transistors E.g.: computer processor

Performance measures of IC
Cost Speed Area Power Consumption Functionality Testability Manufacturability Reliability Time-to-market

Digital Hardware
Until 1960s: bulky components, transistors and resistors came as individual parts Advent of integrated circuits: number of transistors and thus an entire circuit on a single chip ICs manufactured on a silicon wafer Wafer cut to produce individual chips Individual chips places inside a special type of chip package By 1970: all circuitry needed to realize a microprocessor on a single chip Early microprocessors information processing revolution affordable personal computers

Silicon Wafer
Silicon wafer Single die Packaging Integrated Circuit

Moores Law
Gordon Moore, Chairman of Intel Corporation "The number of transistors incorporated in a chip will approximately double every 24 months. --Gordon Moore, Intel co-founder SIA roadmap Size of transistor measured by its gate length

Moores Law

Moores Law
Transistor size and structure are at the very center of delivering the benefits of Moore's Law to the end user. The smaller and more power efficient the transistor, the better. Intel continues to predictably shrink its manufacturing technology
45nm with high-k/metal gate in 2007 32nm in 2009 and now 22nm with the world's first 3-D transistor in a high volume logic process in 2011

With a smaller, 3-D transistor, can design even more powerful processors with incredible power efficiency. Until now, transistors, the core of microprocessors, were 2-D (planar) devices. 3-D Tri-Gate transistor mark a dramatic change in the fundamental structure of the computer chip Next Generation: 14nm technology

Implementation Options
Most digital hardware products: build logic circuits from scratch Digital hardware designed and implemented On a single chip Number of chips placed on a PCB Realization: Standard parts Application Specific Integrated Circuits E.g.: A design may require A P to perform arithmetic operations Memory chips to provide storage capability Interface chips to connect input and output devices

Implementation Options
Digital Systems

Standard Components

ASIC

TTL, CMOS

Semi Custom

Full Custom

Programmable

Cell Based

Gate Array

PAL

CPLD

FPGA

Standard Components
Circuits realized on readily available ICs They conform to an agreed upon standard in functionality and physical configuration Small circuitry (<100 transistors) & performs simple functions Designer chooses ICs that perform whatever functions are needed and defines how these ICs should be interconnected Popular until early 1980s

Inefficient to use valuable space on PCB for ICs with low functionality Functionality of each IC is fixed & cannot be changed

ASIC Design Flow

Programmable Logic Devices

ICs that can be configured by the user to implement a wide range of different logic circuits Have a very general structure Include programmable switches Allows internal circuitry of the device to be configured in many different ways Designer can implement whatever functions needed by choosing appropriate configuration of the switches Switches programmed by end-user rather than when manufactured Most PLDs can be programmed multiple times

Programmable Logic Devices

Reprogramming may be necessary While developing prototype of a product, PLD can be programmed to perform some function If a designed function is not as intended or if new functions are needed or while prototype hardware is being tested we can make corrections by reprogramming FPGA: Field Programmable Gate Array is a sophisticated type of PLD Drawback of PLDs: programmable switches consume valuable chip area Hence, limit the speed of operation of implemented circuits In some cases, PLDs may not meet the desired performance or cost objectives

Custom Designed ICs

IC designed from scratch
Logic circuitry that must be included on the chip is designed first Appropriate technology is chosen to implement the IC IC is manufactured by a fabrication Approach is full-custom or semi-custom designed ICs Intended to use in specific applications: ASICs

Advantage of custom IC
Design can be optimized for a specific task leading to better performance Possible to include larger amount of logic circuitry in a custom IC Though the cost of producing such ICs is high, if used in a product that is sold in large quantities then the cost per IC would become less Smaller area is needed on the PCB that houses the IC in the final product further reduction in cost

Custom Designed ICs

Disadvantages Manufacturing Delay: Manufacturing a custom chip often takes a considerable amount of time on the order of months

Comparison of ASIC design flow

Semi Custom
Design time is less Less prone to errors Lower knowledge is required Less compact, slow

Full Custom
Design time is more More prone to errors Better knowledge is required More compact, faster

Advantages of ASIC Design

Reduces the system size by reduction in number of chips Low system cost Higher performance Addition of extra function is easy and hence costs less Confidentiality

Domains and Levels of Modeling

Structural
Functional
high level of abstraction low level of abstraction

Geometric

Y-chart due to Gajski & Kahn

Domains and Levels of Modeling

Structural
Functional
Algorithm (behavioral) Register-Transfer Language Boolean Equation Differential Equation

Geometric

Y-chart due to Gajski & Kahn

Domains and Levels of Modeling

Structural
Processor-Memory Switch

Functional

Register-Transfer
Gate

Transistor

Geometric

Y-chart due to Gajski & Kahn

Domains and Levels of Modeling

Structural
Functional

Polygons Sticks Standard Cells Floor Plan

Geometric

Y-chart due to Gajski & Kahn

Domains and Levels of Modeling- Top Level

Functional
Algorithm(behavioral)
Function of the entire system as an algorithm

Structural
Processor-Memory Switch
Interconnection of processors, memories, input-output devices

Floor Plan

Geometric

Schematic representation of tentative placement of its major functional blocks

Domains and Levels of Modeling- Level II: describes data storage and transformations
Structural
Processor-Memory Switch

Functional
Algorithm(behavioral) Register-Transfer Language
RTL used to specify operation of a system Storage of data: register variables Transformations: arithmetic and logical operators

Register-Transfer
Data path: data storage registers, data transferred through transformation units Control section: sequences operation of data path components

Standard Cells Floor Plan

Geometric
Standard library cells used to implement registers and data transformation units; placed in the area allocated in floor plan

Domains and Levels of Modeling- Level III

Functional
Algorithm(behavioral) Register-Transfer Language Boolean Equation

Structural
Processor-Memory Switch

Register-Transfer
Gate

Sticks

Standard Cells Floor Plan

Geometric
Geometry modeled as stick diagrams/ notations

Domains and Levels of Modeling- Level IV: Most detailed

Structural
Processor-Memory Switch

Functional
Algorithm(behavioral) Register-Transfer Language Boolean Equation Differential Equation Polygons Sticks

Register-Transfer
Gate

Transistor

Standard Cells Floor Plan

Geometric

Design Abstraction Levels

SYSTEM

MODULE +

GATE

CIRCUIT

DEVICE

G
S n+ D n+