MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Dual A/D Converter MC1650
The MC1650 and the MC1651 are very high speed comparators utilizing differential amplifier inputs to sense analog signals above or below a reference level. An output latch provides a unique sample-hold feature. The MC1650 provides high impedance Darlington inputs, while the MC1651 is a lower impedance option, with higher input slew rate and higher speed capability. The clock inputs (Ca and Cb) operate from MECL III or MECL 10,000 digital levels. When Ca is at a logic high level, Q0 will be at a logic high level provided that V1 V2 (V1 is more positive than V2). Q0 is the logic complement of Q0. When the clock input goes to a low logic level, the outputs are latched in their present state. Assessment of the performance differences between the MC1650 and the MC1651 may be based upon the relative behaviors shown in Figures 4 and 7.

MC1651

L SUFFIX CERAMIC PACKAGE CASE 62010

LOGIC DIAGRAM
V1A 6 V2A 5 CA 4 V1B 12 V2B 11 CB 13 + D Q 2 Q0

PIN ASSIGNMENT
Q 3 Q0 GND + D Q 14 Q1 Q0 Q0 Q 15 Q1 CA V2A VCC = +5.0 V = PIN 7, 10 VEE = 5.2 V = PIN 8 GND = PIN 1, 16 V1A VCC VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 GND Q1 Q1 CB V1B V2B VCC NC

PD = 330 mW typ/pkg (No Load) tpd = 3.5 ns typ (MC1650) = 3.0 ns typ (MC1651) Input Slew Rate = 350 V/s (MC1650) = 500 V/s (MC1651) Differential Input Voltage: 5.0 V (30C to +85C) Common Mode Range: 3.0 V to +2.5 V (30C to +85C) (MC1651) 2.5 V to +3.0 V (30C to +85C) (MC1650) Resolution: 20 mV (30C to +85C) Drives 50 lines

Number at end of terminal denotes pin number for L package (Case 620).

TRUTH TABLE
C H H L V1 X

u V2 V1 t V2
X

V1 , V2

Q0n + 1 H L Q0n

Q0n + 1 L H Q0n

3/93

Motorola, Inc. 1996

4334

REV 5

MC1650 MC1651
ELECTRICAL CHARACTERISTICS
Test Limits 30C Characteristic Power Supply Drain Current Input Current Input Leakage Current Clock Input Current Output Voltage Output Voltage Threshold Voltage (Note 2.) Logic 1 Logic 0 Logic 1 Positive Negative MC1650 MC1651 MC1650 MC1651 Symbol ICC IE Iin IR IinH VOH VOL VOHA 1.045 1.890 1.065 0.875 1.650 0.960 1.850 0.980 Min Max Min +25C Max 25* 55* 10 40 7.0 10.0 350 0.810 1.620 0.890 1.830 0.910 1.555 0.700 1.575 Vdc Vdc Vdc Vdc Min +85C Max Unit mAdc Adc Adc

Threshold Voltage (Note 2.) Logic 0 VOLA 1.630 1.600 1. All data is for 1/2 MC1650 or MC1651, except data marked (*) which refers to the entire package. 2. These tests are done in order indicated. See Figure 5. 3. Maximum Power Supply Voltages (beyond which device life may be impaired): |VEE| + |VCC| 12 Vdc. 4. All Temperature MC1650 MC1651 VA3 +3.0 +2.5 VA4 +2.98 +2.48 VA5 2.5 3.0 VA6 2.48 2.98

MECL Data DL122 Rev 6

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MC1650 MC1651
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)

@ Test Temperature 30C +25C +85C

VIHmax

VILmin

VIHAmin

VILAmax

VA1

VA2

VA3

VA4

VA5

VA6

VCC3.

VEE3.

0.875 0.810 0.700

1.890 1.850 1.830

1.180 1.095 1.025

1.515 1.485 1.440

+0.02 +0.02 +0.02 +0.02 +0.02 +0.02 S Note See N 4 4.

+5.0 +5.0 +5.0

5.2 5.2 5.2

TEST VOLTAGE APPLIED TO PINS LISTED BELOW Characteristic Symbol VIHmax VILmin VIHAmin VILAmax VA1 VA2 VA3 VA4 VA5 VA6 (VCC) Gnd

Power Supply Drain Current Input Current

Pos Neg MC1650 MC1651

ICC IE Iin IR IinH VOH

4,13 4,13 4 4 4 4,13 13 13 13

6,12 6,12 12 12 6,12 6,12 5,11 6,12 6,12 5,11 5,11 6,12 6,12 5,11 5,11 5,11 6,12 6 6

1,5,11,16 1,5,11,16 1,5,11,16 1,5,11,16 1,5,11,16 1,5,11,16 1,6,12,16 1,16 1,16 1,5,11,16 1,6,12,16 1,16 1,16 1,5,11,16 1,6,12,16 1,16 1,16 1,5,11,16 1,6,12,16 1,16 1,16 1,5,16 6 6

Input Leakage MC1650 Current MC1651 Clock Input Current Output Voltage Logic 1

Output Voltage Logic 0

VOL

4,13 5,11

6,12 5,11 6,12 5,11 6,12 5,11 5,11 6,12 6,12 6,12 5,11

Threshold Voltage Note 2. Threshold Voltage Note 2.

Logic 1

VOHA

13

4 4 4 4

6 6 1,5,16 6 6 6

Logic 0

VOLA

13

4 4 4 4

1. All data is for 1/2 MC1650 or MC1651, except data marked (*) which refers to the entire package. 2. These tests are done in order indicated. See Figure 5. 3. Maximum Power Supply Voltages (beyond which device life may be impaired): |VEE| + |VCC| 12 Vdc. 4. All Temperature MC1650 MC1651 VA3 +3.0 +2.5 VA4 +2.98 +2.48 VA5 2.5 3.0 VA6 2.48 2.98

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50ohm resistor to 2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.

MOTOROLA

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MECL Data DL122 Rev 6

MC1650 MC1651
CIRCUIT SCHEMATIC 1/2 of Device Shown A VCC 7, 10 A B V1 6 C 2Q 3Q V2 5 D E MC1651 Inputs A

MC1650 Inputs

(Both Devices)

Gnd 1

Gnd 16

B C

B C V1 6 V2 5 D E

RP 8 VEE 4 Clock

SWITCHING TEST VOLTAGE VALUES @Test Temperature 30C +25C +85C (Volts) VR1 +2.0 +2.0 +2.0 VR2 VR3 VX +1.04 +1.11 +1.19 30C Characteristic Ch i i Switching Times Propagation Delay (50% to 50%) V-Input Clock2 Clock Enable3 Clock Aperture3 Rise Time (10% to 90%) Fall Time (10% to 90%) Symbol S b l tpd 2.0 2.0 tsetup tap t+ t 1.0 1.0 5.0 4.7 3.5 3.0 2.0 2.0 2.5 1.5 1.0 1.0 5.0 4.7 3.5 3.0 2.0 2.0 1.0 1.0 5.7 5.2 3.8 3.3 ns ns ns ns Min Max VXX +2.0 +2.0 +2.0 +25C Min Max VCC1 +7.0 +7.0 +7.0 VEE1 3.2 3.2 3.2 +85C Min Max Unit U i ns Conditions (See Figures 13) VR1 to V2, VX to Clock, P1 to V1, or, VR2 to V2, VX to Clock, P2 to V1, or, VR3 to V2, VX to Clock, P3 to V1. VR1 to V2, P1 to V1 and P4 to Clock, or, VR1 to V1, P1 to V2 and P4 to Clock. VR1 to V2, P1 to V1, P4 to Clock Clock P1 to V1. VR to V2, VX to Clock,

S N See Note 4

NOTES: 1. Maximum Power Supply Voltages (beyond which device life may be impaired: VCC + VEE 12 Vdc. 2. Unused clock inputs may be tied to ground. 3. See Figure 3.

4.

All Temperatures MC1650 MC1651

VR2 +4.9 +4.4

VR3 0.4 0.9

MECL Data DL122 Rev 6

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MC1650 MC1651
FIGURE 1 SWITCHING TIME TEST CIRCUIT @ 25C
Vin to Channel A VCC = + 7.0 Vdc 0.1 F 10 P1 P2 P3 VX P4 + D C VEE 0.1 F VEE = 3.2 Vdc
Note: All power supply and logic levels are shown shifted 2.0 volts positive. 50 ohm termination to ground located in each scope channel input. All input and output cables to the scope are equal lengths of 50 ohm coaxial cable.

VXX = + 2.0 Vdc 0.1 F Coax

Vout to Channel B

VR1, VR2, VR3

16 7 1 VCC Gnd D Q

Q Q

FIGURE 2 SWITCHING AND PROPAGATION WAVEFORMS @ 25C

The pulse levels shown are used to check ac parameters over the full common-mode range.

CLOCK TO OUTPUT V INPUT TO OUTPUT Vin 50% tpd Q t+ 50% tpd 90% 10% t
Test pulses: t +, t = 1.5 0.2 ns (10% to 90%) f = 5.0 MHz 50% Duty Cycle

50%

VIH VR VIL

P1 Vin 30 ns 40 ns

50% 30 ns 40 ns 30 ns 30 ns

VIH + 2.1 V VR + 2.0 V VIL + 1.9 V

+1.11 V +0.31 V

P4 C

50% tpd 50% tpd

P4: t +, t = 1.5 0.2 ns.

TEST PULSE LEVELS P1 MC1650 VIH VR VIL +2.1 V +2.0 V +1.9 V MC1651 +2.1 V +2.0 V +1.9 V MC1650 +5.0 V +4.9 V +4.8 V P2 MC1651 +4.5 V +4.4 V +4.3 V MC1650 0.3 V 0.4 V 0.5 V P3 MC1651 0.8 V 0.9 V 1.0 V

MOTOROLA

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MECL Data DL122 Rev 6

MC1650 MC1651
FIGURE 3 CLOCK ENABLE AND APERTURE TIME TEST CIRCUIT AND WAVEFORMS @ 25C
Vin to Channel A VCC = +7.0 Vdc 0.1 F 10 Vin VR + 7 1 16 VCC Gnd D Q Q VXX = +2.0 Vdc 0.1 F Vout to Channel B

C +

Q 50 Q VEE 8

VEE = 3.2 Vdc

0.1 F
50 ohm termination to ground located in each scope channel input. All input and output cables to the scope are equal lengths of 50 ohms coaxial cable.

ANALOG SIGNAL POSITIVE AND NEGATIVE SLEW CASE

Vin Negative Vin Positive C 50% Clock Aperature Time tpd 50% Q Positive Q Negative 50% tpd V V Clock Enable Time

VR + 100 mV = +2.1 V VR = 2.0 V VR 100 mV = +1.9 V VIH = +1.11 V

VIL = +0.31 V

1 0 1 0

Clock enable time = minimum time between analog and clock signal such that output switches, and tpd (analog to Q) is not degraded by more than 200 ps. Clock aperture time = time difference between clock enable time and time that output does not switch and V is less than 150 mV. Note: All power supply and logic levels are shown shifted 2.0 volts positive.

MECL Data DL122 Rev 6

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MC1650 MC1651
FIGURE 4 PROPAGATION DELAY (tpd) versus INPUT PULSE AMPLITUDE AND CONSTANT OVERDRIVE
TEST CIRCUIT Vin Vref VIH 50 Vref = Gnd POSITIVE PULSE DIAGRAM Positive Overdrive Vref Vin Vin Vref tpd Q 50% Q
Input Switching time is constant at 1.5 ns (10% to 90%).

Q 50 50

1/2 Device C Q

2.0 V

NEGATIVE PULSE DIAGRAM Negative Overdrive

PA

PB tpd

PROPAGATION DELAY versus PULSE AMPLITUDE 5.0 PROPAGATION DELAY INCREASE (ns)

4.0

Overdrive Constant @ 100 mV Positive Going Pulse Negative Going Pulse

3.0

MC1650 MC1651

2.0

1.0 tpd referenced to PA, PB = 20 mV 0 0.01 0.02 0.05 0.1 0.2 0.5 1.0 PULSE AMPLITUDE PA, PB (VOLTS) 2.5 10

PROPAGATION DELAY versus OVERDRIVE PROPAGATION DELAY INCREASE (ns) PA, PB, Constant @ 100 mV Positive Overdrive (PA) Negative Overdrive (PB) tpd is measured from Vref on the input to 50% on the output.

2.0 MC1650

1.0

MC1651

tpd is referenced to 2.5 V overdrive. 0 0.01 0.02 0.04 0.07 0.1 0.2 0.3 0.5 0.7 1.0 OVERDRIVE (VOLTS) 2.5 10

MOTOROLA

4340

MECL Data DL122 Rev 6

MC1650 MC1651
FIGURE 5 LOGIC THRESHOLD TESTS (WAVEFORM SEQUENCE DIAGRAM)
+0.02 V Vin 0.02 V VIHA C VILA

1 Q 0 1 Q 0

Sequential Test Number (See Test Table)

FIGURE 6 TRANSFER CHARACTERISTICS (Q versus Vin)

+ Differential Input Vin TEST CONFIGURATION

+ D Q 1/2 Device

VIH

50

Vref

2.5 Vdc

p Vref p +2.5 Vdc

2.0 Vdc

TYPICAL TRANSFER CURVES 0

Q. OUTPUT VOLTAGE (VOLTS)

Resolution

Logic 1 1.0

Logic 0 2.0 20 15 5.0 10 Vref Vin, DIFFERENTIAL INPUT VOLTAGE (mV) 10 5.0 15 20

MECL Data DL122 Rev 6

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MC1650 MC1651
FIGURE 7 OUTPUT VOLTAGE SWING versus FREQUENCY

(A) TEST CIRCUIT V1 V2 VIH

Q 50 50

1/2 Device C Q

2.0 Vdc

(B) TYPICAL OUTPUT LOGIC SWING versus FREQUENCY

MC1651 0.85 PEAK-TO-PEAK OUTPUT (VOLTS)

0.65

0.45

0.25 50 0.05 10 20 30 50 70 FREQUENCY (MHz) 100 75 100 200 1000 Input Voltage mV Peak-to-Peak 200 300

MC1650 0.85 PEAK-TO-PEAK OUTPUT (VOLTS)

0.65

0.45

0.25 50 0.05 10 20 30 50 70 FREQUENCY (MHz) 100 75 100 200 1000 Input Voltage mV Peak-to-Peak 200 300

MOTOROLA

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MECL Data DL122 Rev 6

MC1650 MC1651
FIGURE 8 INPUT CURRENT versus INPUT VOLTAGE
TEST CIRCUIT VCC +5.0 Vdc 0.1 F 7 VCC + D 10 VCC 50 Q 2.0 Vdc C VIH Q 50

V1 V2

Iin Vin

C VEE 8 Gnd 1

Q Gnd 16

0.1 F

VEE 5.2 Vdc

Typical MC1650 (Complementary Input Grounded) 30 5 I in , INPUT CURRENT ( A) 30C +25C 25 I in , INPUT CURRENT ( A) 20 15 10 5 0 5 2.5

Typical MC1651 (Complementary Input Grounded)

30C +25C

+85C

+85C

2.5

1 0 +1 Vin, INPUT VOLTAGE (VOLTS)

+2

+2.5

1 0 1 Vin, INPUT VOLTAGE (VOLTS)

2.5

MECL Data DL122 Rev 6

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MC1650 MC1651
OUTLINE DIMENSIONS
L SUFFIX CERAMIC DIP PACKAGE CASE 62010 ISSUE V
9

A
16

B
1 8

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01

T
SEATING PLANE

N E F D G
16 PL

K M J
16 PL

0.25 (0.010)
M

T B

0.25 (0.010)

T A

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 18004412447 Mfax: RMFAX0@email.sps.mot.com TOUCHTONE 6022446609 INTERNET: http://DesignNET.com

JAPAN: Nippon Motorola Ltd.; TatsumiSPDJLDC, 6F SeibuButsuryuCenter, 3142 Tatsumi KotoKu, Tokyo 135, Japan. 038135218315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 85226629298

MOTOROLA 4344

*MC1650/D*

MC1650/D MECL Data DL122 Rev 6