St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

rTIME RESPONSE OF SECOND ORDER SYSTEM AIM: To determine time domain specifications of second order system. APPARATUS S.NO 1 2 3 PROCEDURE 1. Choose a second order system configuration 2. Apply 1volt (p-p) square wave input and trace the output waveform for different values of K, obtain peak overshoot, settling time, rise time and steady state error TABULAR FORM GAIN K %Mp TD TR TP TS n NAME OF THE EQUIPMENT Time response kit C.R.O Patch cards QUANTITY 1 1

FRONT PANEL DIAGRAM

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

RESULT:

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

EFFECT OF FEEDBACK ON DC SERVO MOTOR AIM: To determine the characteristics of a DC servomotor APPARATUS S.NO 1 2 Procedure 1. Before switch on the instrument see that the armature control potentiometer and field control potentiometer are at minimum position 2. Switch on the instrument, observe the field on indication LED glows, if field ON indication LED off then immediately switch off the circuit 3. Connect a digital multi meter across the armature voltage terminal and field voltage terminal 4. Adjust armature control potentiometer Va=10v&Vb=20v note down T1,T2,N&Ia. 5. Continue the same for Va=15, Va=20. OBSERVATIONS R=3.5cms,Vb=20v,Va=10v,15v,20v S.NO T1 T2 T=T1-T2 Torque=TR (gm-cm) N rpm Ia (amps) NAME OF THE EQUIPMENT DC Servo motor Digital multi meter QUANTITY 1 1

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PRECAUTIONS: 1. Before switch ON the instrument check whether the armature potential knob at zero position or not. 2. Readings are taken without parallax error. Model graph

RESULT:

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

TEMPERATURE CONTROLLER SYSTEM AIM: To study the performance of various types of controllers used to control the temperature of an oven.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PROCEDURE 4.1 Identification of Oven Parameters 1. Keep switch S1 to 'WAIT', S2 to 'SET' and open 'FEEDBACK' terminals. (refer panel drawing) 2. Connect P output to the driver input and switch ON the unit. 3. Set P potentiometer to 0.5 which gives Kp=10. Adjust reference potentiometer to read 5.0 on the DVM. This provides an input of 0.5 V to the driver. 4. Put switch S2 to the 'MEASURE' position and note down the room temperature. 5 Put switch S1 to the 'RUN' position and note temperature readings every 15sec., till the temperature becomes almost constant. 6.Plot temperature-time curve on a graph paper. Referring to Fig. 10, calculate T1 and T2 and hence write the transfer function of the oven including its driver as G(s) = K exp(-sT2)/(1+ sT1), with T in 0C. 4.2 ON-OFF Controller 1Keep switch S1 to 'WAIT' position and allow the oven to cool to room temperature. Short 'FEEDBACK' terminals. 2Keep switch S2 to the 'SET' position and adjust reference potentiometer to the desired output temperature, say 60.0C , by seeing on the digital display. 3.Connect R output to the driver input. Outputs of P, D and I must be disconnected from driver input. Select 'HI' or 'LO' value of hysteresis. (First keep the hysteresis switch to LO). 4.Switch S2 to 'MEASURE' and S1 to 'RUN' position. Read and record oven temperature every 15/30 sec., for about 20 minutes

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

5.Plot a graph between temperature and time and observe the oscillations (Fig. 15) in the steady state. Note down the magnitude of oscillations. 6.Repeat above steps with the HI setting for hysteresis and observe the rise time, Steady-state error and percent overshoot. 4.3 Proportional Controller 1.Ziegler and Nichols suggest the value of KP for P-Controller as

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

2.Starting with a cool oven, keep switch S1 to 'WAIT' position and connect P output to the driver input. Keep R, D and I outputs disconnected. Short 'FEEDBACK'terminals. 3.Set P potentiometer to the above calculated value of Kp, keeping in mind that the maximum gain is 20. The measurement and interpretation of Kp and P-control potentiometer setting needs some explanation here. The formula for Kp above is for an unity feedback system and has the dimension of Volts/C. In the present unit a temperature sensor having sensitivity of 10mV/C (0.01V/C) is

used between oven output and controller input. Thus, the Kp calculated above will need to be divided by 0.01 to obtain the P-control potentiometer setting. KD and KI have dimensions of sec. and sec-1 respectively hence do not require any further consideration. These values may be set directly on the respective potentiometers. 4. Select and set the desired temperature to say 60.0C. 5. Keep switch S1 to 'RUN' position and record temperature readings as before. 6. Plot the observations on a linear graph paper and observe the rise time, steady state error and percent overshoot. 4.4 Proportional-Integral Controller

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Starting with a cool oven, keep switch S1 to 'WAIT', connect P and I outputs to driver input and disconnect R and D outputs. Short feedback terminals. 1. Set P and I potentiometers to the above values of KP, and KI respectively, keeping in mind that the maximum value of KP is 20 and that of KI is 0.024. 2. Select and set the desired temperature to say 60.0C.

3. Keep switch S1 to 'RUN' position and record temperature readings as before.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

4. Plot the response on a graph paper and observe the steady state error and percent overshoot. 4.5 Proportional-Integral-Derivative Controllers

1. Starting with a cool oven, keep switch S1 to 'WAIT' position and connect P, D and I outputs to driver input. Keep R output disconnected. Short feedback terminals. 2. Set P, I and D potentiometers according to the above calculated values of KP, KI and KD keeping in mind that the maximum values for these are 20, 0.024 and23.5 respectively. 3. Select and set the desired temperature, say 60.0C. 4. Switch S1 to 'RUN', and record temperature-time readings. 5. Plot the response on a linear graph paper and observe the rise time, steady state error and percent overshoot.(See Fig. 14) 6. Compare the results of the various controller options.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

CHARECTERISTICS OF SYNCHROS AIM: To draw the characteristics of synchros. APPARATUS: S.NO 1 2 3. PROCEDURE For Exp(a) 1. Connections are made as per the circuit diagram 2. Set the angular position to zero and take the supply. 3. The values of V12,V23,V31andS1,S2,S3 are taken at different angular position in between 00and 3600using multi meter. For Exp(b) 1. Connections are made as per the circuit diagram 2. Set the angular position to zero and take the supply. 3. Take the values of angular position of rotor by viewing directly on kit OBSERVATIONS S,NO Angular position V12 V23 V13 S1 S2 S3 NAME OF THE EQUIPMENT Synchros kit Multi meter Patch careds QUANTITY 1 1 some

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

MODEL WAVEFORMS Line to line voltage

Phase voltage

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

CIRCUIT DIAGRAM

CIRCUIT DIAGRAM-II

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PSPICE simulation of Op-Amp based Differentiator Circuit AIM: PSPICE simulation of Op-Amp based Differentiator Circuit CIRCUIT DIAGRAM:

Program:

VIN 1 0 PWL (0 0 1M 1 2M 0 3M 1 4M 0) R1 1 2 100 RF 3 4 10K RX 5 0 10K RL 4 0 100K C1 2 3 0.4U XA1 3 5 4 0 OPAMP .SUBCKT OPAMP 1 2 7 4 RI 1 2 2.0E6 GB 4 3 1 2 0.1M R1 3 4 10K C1 3 4 1.5619U EA 4 5 3 4 2E+5

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

RO 5 7 75 .ENDS OPAMP .TRAN 10U 4M .PLOT TRAN V (4) V(1) .PROBE .END

Theory: An op-amp may be modeled as a linear amplifier to simplify the design and analysis of op-amp circuits. The linear models give reasonable results, especially for determining the approximate design values of op-amp circuits. The simulation of the actual behavior of opamp is required in many applications to obtain accurate responses for the circuits. PSpice does not have any model for op-amps. An op-amp can be simulated from the circuits arrangement of the particular type of the op-amp. The uA741 type of op-amp consists of 24 transistors and it is beyond the capacity of the student version of PSpice

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VOLTAGE INPUT

VOLTAGE OUTPUT

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Result: A program is written for the simulation of operational amplifier using PSPICE and corresponding voltage, current and resistance values are noted.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PSPICE Simulation of Op-Amp Based Integrator Circuit

AIM: PSPICE simulation of Op-Amp based Integrator Circuit Circuit Diagram:

Program: VIN 1 0 PWL(0 0 1N -1 1M -1 1.0001M 1 2M 1 2.0001M -1 3M -1 3.0001M 1 4M 1) R1 1 2 2.5K RF 2 4 1MEG RX 3 0 2.5K RL 4 0 100K C1 2 4 0.1U XA1 2 3 4 0 OPAMP .SUBCKT OPAMP 1 2 7 4 RI 1 2 2.0E6 GB 4 3 1 2 0.1M R1 3 4 10K C1 3 4 1.5619U EA 4 5 3 4 2E+5

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

RO 5 7 75 .ENDS OPAMP .TRAN 50U 4M .PLOT TRAN V (4) V(1) .PROBE .END Theory: An op-amp may be modeled as a linear amplifier to simplify the design and analysis of op-amp circuits. The linear models give reasonable results, especially for determining the approximate design values of op-amp circuits. The simulation of the actual behavior of opamp is required in many applications to obtain accurate responses for the circuits. PSpice does not have any model for op-amps. An op-amp can be simulated from the circuits arrangement of the particular type of the op-amp. The uA741 type of op-amp consists of 24 transistors and it is beyond the capacity of the student version of PSpice. a macro model which is a simplified version of the op-amp and requires only two transistors is quite accurate for many applications and can be simulated as a sub circuit or library file.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VOLTAGE INPUT

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VOLTAGE OUTPUT

Result:

A program is written for the simulation of operational amplifier using PSPICE

and corresponding voltage, current and resistance values are noted.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

EXP.NO: TRANSFER FUNCTION OF DC GENERATOR AIM: Determination of the transfer function of DC Generator APPARATUS: S.L.NO 1. 2. 3. 3. 4. 5. METER Ammeter Voltmeter Voltmeter Tachometer Rheostat Fuse TYPE MC MC MC MC MI Analog WW TCC RANGE QTY 1 1 1 1 1 1 2 10cms MAKE,S.NO

CIRCUIT DIAGRAM:

NAME PLATE DETAILS: STARTER HP Volts Amperes S.NO Make : : : : : D.C.MOTOR K.W Armature volts : Armature amps Speed Field volts Field amps Insulation class Make : : : : : : : D.C.GENERATOR K.W Armature volts Armature amps Speed Field volts Field amps Insulation class Make : : : : : : :

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PROCEDURE: 1. Connections are made as per the circuit diagram. 2. Keeping the motor field rheostat in minimum resistance position and generator field rheostat in maximum resistance position supply is taken. 3. The motor is started with the help of starter and its field rheostat is adjusted such that rated speed of the generator is obtained. 4. The generator field rheostat is obtained such that the field current is varied in steps of amps and corresponding volt meter readings are noted up to the rated voltage.

OBSERVATIONS:

S.L NO 1. 2. 3. 4. 5. 6.

Field current If (Amps)

O.C Volts Voc (Volts)

Speed NI (r.p.m)

MEASUREMENT OF FIELD RESISTANCE:

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PROCEDURE 1. Connections are made as per the circuit diagram 2. put the potential divider in minimum output position 3.switch on the DC supply and by varying the potential divider take four or five readings 4.again put the potential divider in minimum output position ,switch off the supply OBSERVATIONS S.NO VOLTAGE(V) CURRENT(I) RESISTANCE

MEASUREMENT OF IMPEDANCE OF FIELD WINDING

CIRCUIT DIAGRAM

PROCEDURE 1. Connections are made as per the circuit diagram 2. put the VARIAC in minimum output position 3.switch on the AC supply and by varying the VARIAC, take four or five readings

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

4.again put the VARIAC in minimum output position ,switch off the supply

OBSERVATIONS

S.NO

VOLTAGE(V) CURRENT(I) RESISTANCE

MODEL GRAPH:

PRECAUTIONS: 1. Connections must be tight. 2. Meter readings are taken without parallax error. 3. Before making or breaking connections the power must be switched OFF.

MODEL CALCULATIONS

Ksg=Slope of tangent

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Tsg=L/R L=Inductance of field winding R=resistance of field winding

TRANSFER FUNCTION= Ksg/(1+ TsgS)

RESULT: Thus the transfer function of DC generator is ----------------------------

MAGNETIC AMPLIFIER AIM: - To draw the characteristics of the magnetic amplifier. APPARATUS: S.NO 1 2 3 NAME OF THE EQUIPMENT Magnetic amplifier kit Patch cards Load (100W bulb) QUANTITY 1 Required 1

PROCEDURE:

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

1. For series and parallel magnetic amplifier, keep the switch in position D saturated magnetic amplifier keep the switch position in E 2. Keep the control and load setting knob in its extreme left position, which ensures zero. Connections for SERIES a) Connect A1 to AC b) Connect B1 to A2 c) ) Connect B1 to L PARALLEL Connect A1 to AC Connect A1 to A2 Connect B2 to L Connect B2 to B1 SELF SATURATED a) Connect A3 to B3 b) Connect B3 to L c) Connect AC to C1

a) b) c) d)

4. Connect 100w bulb in lamp holder. 5. Switch on the unit. Now gradually increase the control current by control knob in the clock wise direction in steps and note down the readings.

PRECAUTIONS:1. While doing the experiment do not touch the front panel of the kit. 2. Note down the readings without parallax error and avoid loose connections.

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

S.NO

Controlled current

Load current

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

ROOTLOCUS, BODE PLOT, NYQUIST PLOT FROM MAT LAB AIM: - To observe the root locus, bode plot, Nyquist plot from MAT LAB. BODE PLOT Y(S)/X(S)= K/S(S+2) (S+3) MATLAB PROGRAM num= [0 0 0 1]; den= [1 5 6 0]; x=tf(num,den); bode(x)

ROOT LOCUS Y(S)/X(S) = K/S3+5S2+6S+1 MATLAB PROGRAM num= [0 0 0 1]; den= [1 5 6 1]; x=tf(num,den); rlocus ( x)

NYQUIST PLOT Y(S)/X(S) = K/S(S+3) (S+1) MATLAB PROGRAM num= [0 0 0 1]; den= [1 4 3 0]; x=tf(num,den); nyquist (x)

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

LEAD-LAG COMPENSATION AIM: To draw the magnitude and phase plots of with and without compensation techniques. APPARATUS: NAME OF THE EQUIPMENT Compensation kit CRO 2 Register 10 k 3 Capacitor 0.22 4 Patch cords 5 CIRCUIT DIAGRAM: Required 1 2

S.NO 1

QUANTITY 1 1

PROCEDURE: WITHOUT COMPENSATION: 1. Connections are made as per circuit diagram. 2. Keeping the minimum position of the frequency knob, and supply is taken. 3. Using the CRO in X-Y mode, give input of the network to x-input of CRO and output of the network to Y-input of CRO. 4. Set the sine wave amplitude at 3 volts. 5. To connect without load and without amplifier, Now vary the frequency corresponding readings are noted. 6. Calculate the gain and phase difference from the readings. WITH COMPENSATION: 1. Connections are made as per circuit diagram. 2. Keeping the minimum position of frequency knob, maximum position of amplifier

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

knob and supply is taken. 3. Select the components R1=10k=R2, C1=.22f. 4. Using the CRO in X-Y mode, give input of the network to X-input of CRO and output of the network to Y-Input of CRO. 5. Set the sine wave amplitude at 3volts. 6. To connect with load and with amplifier, Now vary the frequency corresponding readings are noted. 7. Calculate the gain and phase difference from the readings. OBSERVATIONS: S.NO A B X0 Y0

WITHOUT COMPENSATION

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

WITH COMPENSATION

MODEL GRAPH:

RESULT: Magnitude and phase plots of the with and without compensations are drawn

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

STATE SPACE MODEL FOR CLASSICAL TRANSFER FUNCTION USING MATLAB VERIFICATION

AIM: To verify the state space model to the given transfer function using MATLAB TRANSFER FUNCTION Y(S)/X(S) =10S+5/S3+5S2+6S+10 MATLAB PROGRAM num=[0 0 10 5]; den=[1 5 6 10]; [A B C D]=tf2ss(num,den)

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

EFFECT OF PID CONTROLLER ON SECOND ORDER SYSTEM AIM: To study the performance characteristics of analog PID controller APPARATUS S.NO 1 2 3 PROCEDURE: 1. Make the connections as shown in figure ,with proportional, integral and derivative block 2. Set input to 1v peak to peak and frequency at low value Kc=0.6,Ki=54.8(scale setting of 0.06)and Kd=0 3. Record the peak overshoot and steady state error 4. Repeat the above steps for a few non zero values ofKd 5. For Kc=0.6, adjust Ki and Kd by trial and error to obtain the best overall response. record the values of Ki ,Kc and Kd OBSERVATIONS S.NO Kd X Y ESS= (P-P)I/P(X/(P-P)I/P) %Peak overshoot= Y-X/X*100 NAME OF EQUIPMENT PID CONTROLLER KIT CRO Patch cards QUANTITY 1 1 some

PRECAUTIONS 1) Connections should be proper 2) Records are taken without parallax error

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

FRONT PANEL DIAGRAMS P-CONTROLLER

PID CONTROLLER

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

PROGRAMMABLE LOGIC CONTROLLER AIM: To study and verification of truth tables of logic gates, simple Boolean expressions and also speed control of motor APPARATUS: S.NO 1 2 3 4 PROCEDURE: 1. AS DOX-MINI software works only on MS-DOS mode restarts the system in DOS mode. 2. Open DOX-MINI software menu 3. Press ALT-F to open the file menu, select write to file. 4. Write the desired program in the blank space by using keys which are shown in the window. 5. After writing the program press F3for saving program instructions to execute the program 6. Go to ON line menu by pressing ALT+O, select down load PC+PLCoption, press enter key. 7. It displays download successful. put PLC in run mode, press yes. 8. Next it displays PLC in RUN mode. Press ok. 9. Execution is ended. 10. The program which is compiled after completion of the program. it automatically creates asn and cmt files which helps to execute and run the program from PC to PLC. 11. The files which are in ASCII characters can be copied from PC to hard disc and can be stored in another PC which can execute. PRECAUTIONS: 1. Apply high or low to input terminals. 2. Dont give any external power supply to the input. 3. Dont make short any interconnection between high (+24) and low (ground). NAME OF THE EQUIPMENT PLC Kit Computer system System software Patch cards QUANTITY 1 1 SOME

St ANNS COLLEGE OF ENGINEERING AND TECHNOLOGY:CHIRALA DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

BLOCK BIAGRAM OF PLC

Front panel diagram

RESULT: