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VoltageSourceConverter(VSC) IEEEWebinarTutorial June20,2013

RandyWachal 211CommerceDrive Winnipeg,ManitobaCANADA rww@hvdc.ca

Acknowledgements
NSERCPowerSystemSimulationChair ProgramatUniversityofManitoba MHRCStaff
Dr.Farid Mosallat andJuanCarlosGarcia

CIGREDCGridWorkingGroups B455,56,57,58,59,and60 ABBSiemensandAlstomGrid

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WhyUseDCTransmission
HVDCHistoryLinecurrentcommutated(LCC)1954(Gotland) MatureWorldwideTechnologyin201354 MorepowertransferinequivalentRightofWayArea
Smallertower/2versus3conductors

DChaslowertransmissionLossesandlongerdistancespossible thanACtransmission ControlofPowerFlowDirectly(dialinpowerrequired) ConnectAreaswithdifferentfrequencyorsameFrequency butlargePhasedifferences(BacktoBackDCSystem) Control/StabilitycanhelpACsystemsinfaultconditions SeparationofAreasintoRegions.

USAEasternblackout2003 didnotimpactQuebec

30005000MWACDC

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VSCTutorialOutline
VSCConverterTheoryBasics VSCControlandModeling VSCSystemSimulations Startup;DCFault DCGridTestCaseCIGREB457/58

IntroductoryBasics:LCCSingleLine

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VSC:SingleLineDiagramFormat

SymmetricalHVDCMonopole

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VSC:UnsymmetricalMonopole

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VSC:Bipole Configuration

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LCC VSCComparison
LCCHVDC
MatureTechnology RequiresstrongACsystem Lowerlosses0.8%perconverter Requires60%reactivepower ACDCsysteminteractions Harmonics Commutationsfailure SpecialTransformers Multiterminaloperationpossiblebut complex ControlledDCCurrenttozero(Idref=0) DCvoltage+to asalphachanges rectifiertoinverter

VSCHVDC
Rapidgrowth HelpsACsystem Controlrealandreactivepower independently Lossesreducing1.1 1.2%per converter NoCommutationfailure LessSpecialTransformers FlexibleDispatch HarmonicswithMMCnoissue DCvoltageisaconstantpolarity DCGrid(multiterminal)possible DCLinefaults(overheadlines)are problematic

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MultiTerminal
ForLCC:
Rect <90Vdc +ve INV>90Vdc ve TochangeConv 2from Rectifer toInvertoryou mustflipthethyristor
S3
f f f

S1

S4

S2

ForVSC:
PowerFlowiscontrolledby controlsignalsonly

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VSCTechnologyisVeryFlexible
VSCtechnologycancontroltwovariablestogetherand independently
Realpowerandreactivepower

VSCcangenerateanACWaveform
Blackstartorislandmodepossible

Manydispatchoptionsavailable:
RealPowersetpoint:inorout,+or UsepowertocontrolDCvoltageVDC Inislandmode:usepowertocontrolfrequency ReactivePowerQsetpoint:inorout,+or UseQtocontrolVac magnitude:GridorislandedMode

Othercontroltargetsarepossible

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VSCOperation

ForLCCwetendtothinkfromACsidetorectifierandgenerateDCvoltage. ForVSC,IsuggesttothinkfromtheDCside:AssumethattheDCCapacitorsare charged.Thecapacitorvoltage(s)areusedtopiecewisebuildACvoltageinsteps (MMC).WehavetheACvoltagewaveformfromtheVSCandtheACsystemvoltage TransferenergytochargeDCcapacitor(s)

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TransferP&QAcrossReactor
UseDCcapacitorvoltage(Ud) tobuildanACVoltage waveformUc ExchangePbasedon PintoConverterUd PfromConverterUd ExchangeQbasedon|Uc| |Uc|Qflowsintosystem |Uc|Qflowsfromsystem

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HistoryofVSCDevelopment: ABB,SiemensandAlstomGrid
VSCisgrowingrapidlyandcontinuestochange Manyprojectsbutfewprojectshavethesamedesign AnMMCtypeconfigurationappearstobethe winnerbutmanymarketplaceshavevariations
NotunlikeLCCtechnology25yearsago

ThefinalVSCconfigurationisnotdecided
Andmayneveroccur

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HVDCLight
HistoricalReview,19972001

ABB Reference

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HVDCLight
HistoricalReview,20022004

ABB Reference

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PWMBasedVSC
HistoricalReview,20052009

ABB Reference

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BridgeMultiModuleConverter MMC2009

Siemens Reference

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HVDCLight201112
Generation4

ABB Reference

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FullBridgeMMC

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OnePossibleHybridConfiguration

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VSCControlandModelling
Controlsystemorganization Lookatimpactofdiodeinconfiguration HighLevelControl
DQcontrollerdevelopment DevelopmentofVoltagereferencesignalsbasedondispatchedorders

LowerLevelControl
Valvefirepulses(IGBTfiringpulses) Capacitorenergybalancing

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ModelsforVSCMMCSystem
EMTandRMS(DynamicandLoadflow)type modelsarerequired LotsofVSCconfigurationstoconsider
PWMbased(allseriesdevicesinValveswitchtogether) bridgeMMC bridgeMMCwithPWM(cascadedtwolevelconverterCTLC) FullbridgeMMC Hybridmixturesofseriesvalves,andfullbridges

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ControlHierarchy
NaturalseparationoccursHigherLowerlevel Controls RegardlessofDispatchOrdersHigherLevel controlsdevelop Vref AVref BandVref Coutputs Regardlessofconvertervalve implementationLowerLevelcontrolsusethe VREFinputstogeneratethegatepulsesto produce Va Vb andVc Lowerlevelcontrolsareuniqueforvalve topologyandwillhaveancillarycontrol Capacitorbalance Circulatingcurrentsuppression

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ImpactforVSCSystemModels
DispatchandHigherLevelsControlsremainsameregardlessofConverter implementation
Genericorpublicdomainmodels Vendorspecific(IP)models

LowerLevelControlsuniquefordifferenttypesofconverters
DifferentPowerelectronicsandcontrolalgorithm DifferentCapacitorbalancealgorithm DifferentCirculationCurrentsuppressionalgorithm Genericorpublicdomainmodels Vendorspecific(IP)models Differentlevelofdetailsforeachlowerlevelmodels FullEMT,detailedequivalent,firingpulseRMS

FromaSimulationStudyPointView

ChoosetheappropriateLowerLevelModelforyourstudy

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ControlModels:UpperLevel
UpperLevelControlSelection
VDC ref
VDC

VDC
Controller

Pref
P

P
Controller

VAC ref
VAC

VAC
Controller

Qref
Q

Q
Controller

vd ref vabc ref vDC, vAC, iAC, id ref Limiter Decoupled -1 Converter P, Q dq Current system iq ref Controller and lower vq ref level vd,q controls id,q
Selectors

dq

iac vac

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ControlModels:UpperLevel
UpperLevelControlFeatures
Vdc voltagedroop(Vdc controlmode) ACvoltagedroop(Vac controlmode) Frequencydroop(islandedmode) DCVoltagedroop
vDC max VDC vAC max VAC vAC min fmax f fmin P

(a)

iDC (b)

(c)

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ControlModels:UpperLevel
UpperLevelControlFeatures
DCcurrentlimiting(VectorsumofId&Iq) ThirdharmonicadditiontoACvoltage DCundervoltagelimiting DCovervoltagelimiting Powerreferencecurtailment
Pref

ref

VDC

+ V

VDC max

VifV>0 0ifV<0 V<0

PI
Controller

Reset

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LowerLevelControls
AcceptVacb referencesandgeneratetheIGBT firingorderstogeneratetheACvoltagewhile balancingcellcapacitorvoltages.Lowerlevels controlsarepowerelectronictopology dependent

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StartUpConcerns
InitialEnergization
Transformer MMCCapacitors(Prechargecapacitorsto1.35*ELLvia diodes) DCLineorDCCable

Usestartupresistortolimitcurrent. Shortresistorwithbypassswitch Deblock pulsesConv 1andthenConv 2 Ramppowertodesiredsetpoints

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VSCSystemStartUp
T1
1000 km P=900 MW
Z Z

T2
P=966 MW

SCR: 2.5

SCR: 2.5

P control
@ 900 MW

Vdc control
@ 640 kV

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VSCSystemStartUp
Deblock Terminal1 Close ACbrk Bypass PreR Deblock Terminal2
Start up sequence 10.0 Iac T2 (Sending end)

Rampup

(kA)
-10.0 700 E dc2 (+) (Vdc control end)

(kV)
-100 7.0 Idc 2 -> 1

(kA)
-1.0 1.00k (-) P1 P2

(MW)
-0.10k [s] 0.00 0.50 1.00 1.50 2.00 2.50

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SummaryIssuesVSCStartup
Duringstartupenergization ofbothtransformers andallcapacitorsthereforeLargerInrush Inrushresistorcommonlyaddedwithbypassswitch Diodes:withnofiringpulseanddiodeswillconduct resultinginaDCvoltage VDC=1.41peakofVac LL
(chargecapacitorsandline(orCable)

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DCLineFault
VSCschemewithoverheadline(basedonCaprivi)
noDCFast(4msec)breakerinstalled ResonantDCBreaker(5075msec installed)

OnDCfault..Blockfiringpulse..MMCcapacitorscannot dischargeintolinebutdiodeswillcontinuetocommutate andfeedDCfault(as6PLCCrectifier) OpenACbreaker,remove6prectifierdiodecurrent DClinewilldischargeslowlybasedontheR/LcircuitoftheDC linewillkeepthepostfaultDCcurrentpresentforsecondsup toacoupleofminutes. ADCswitchingactionisrequiredtoallowDCfaultrecovery

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DCLineFault Restart
Fault detection Valve blocking AC Brk open Fault clearing (MRTB) MRTB reclose AC Brk close Valve deblock Ramp up

Main : Graphs 10.0 Iac T2 (Sending end)

(kA)
-10.0 14.0 Total DC fault current

(kA)
-2.0 700 Edc2 (+) (Vdc control end)

(kV)

-200 7.0 Idc 2 -> 1

(kA)

-1.0 1.2k (-) P1 (Receiving end) P2 (Sending end)

(MW)
x

-0.6k 1.90 2.00 2.10 2.20 2.30 2.40 2.50 2.60

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SummaryforVSCDCLineFaults
PulseBlockingremovesdischargeofcapacitorsquickly ACbreakerisrequiredtoopentoremove6Pdiode current. ForaweakACsystem,DCfaultdrawsfaultcurrentfrom ACbus.DCfault=ACfault PostfaultresidualDCcurrentrequiresresonantDC breaker Forrecoveryinrush,MMCcapacitorsarealreadycharged PowerramprateisdeterminedbyACsystemstrength notDCcontrols

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Thank you! Questions?

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