NTD40N03R Power MOSFET

45 A, 25 V, NChannel DPAK
Features

Planar HD3e Process for Fast Switching Performance Low RDS(on) to Minimize Conduction Loss Low Ciss to Minimize Driver Loss Low Gate Charge Optimized for High Side Switching Requirements in HighEfficiency DCDC Converters These are PbFree Devices

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45 AMPERES, 25 VOLTS RDS(on) = 12.6 mW (Typ)

NCHANNEL D Unit Vdc Vdc C/W W A A A C/W W A C/W W A C C 1 2 G S 4 4

MAXIMUM RATINGS (TJ = 25C unless otherwise specified)

Parameter DraintoSource Voltage GatetoSource Voltage Continuous Thermal Resistance JunctiontoCase Total Power Dissipation @ TC = 25C Drain Current Continuous @ TC = 25C, Chip Continuous @ TA = 25C, Limited by Wires Single Pulse (tp 10 ms) Thermal Resistance JunctiontoAmbient (Note 1) Total Power Dissipation @ TA = 25C Drain Current Continuous @ TA = 25C Thermal Resistance JunctiontoAmbient (Note 2) Total Power Dissipation @ TA = 25C Drain Current Continuous @ TA = 25C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/8 in from case for 10 seconds Symbol VDSS VGS RqJC PD ID ID ID RqJA PD ID RqJA PD ID TJ, Tstg TL Value 25 20 3.0 50 45 32 100 71.4 2.1 9.2 100 1.5 7.8 55 to 175 260

CASE 369AA DPAK (Surface Mount) STYLE 2

CASE 369D DPAK (Straight Lead) STYLE 2

MARKING DIAGRAM & PIN ASSIGNMENTS

4 Drain YWW T40 N03G 4 Drain YWW T40 N03G 3 Source 1 Gate 2 Drain 3 Source = Year = Work Week = Device Code = PbFree Package Publication Order Number: NTD40N03R/D

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 0.5 sq. in pad size. 2. When surface mounted to an FR4 board using minimum recommended pad size.

1 Gate

2 Drain

Y WW T40N03 G

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

Semiconductor Components Industries, LLC, 2010

July, 2010 Rev. 7

NTD40N03R
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Characteristics OFF CHARACTERISTICS DraintoSource Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 150C) GateBody Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static DraintoSource OnResistance (Note 3) (VGS = 4.5 Vdc, ID = 10 Adc) (VGS = 10 Vdc, ID = 10 Adc) Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 10 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 4) TurnOn Delay Time Rise Time TurnOff Delay Time Fall Time Gate Charge (VGS = 4.5 Vdc, ID = 10 Adc, VDS = 10 Vdc) (Note 3) SOURCEDRAIN DIODE CHARACTERISTICS Forward OnVoltage (IS = 10 Adc, VGS = 0 Vdc) (Note 3) (IS = 10 Adc, VGS = 0 Vdc, TJ = 125C) VSD 0.85 0.71 20.4 8.25 12.1 0.007 1.2 mC Vdc ns (VGS = 10 Vdc, VDD = 10 Vdc, ID = 10 Adc, RG = 3 W) td(on) tr td(off) tf QT Q1 Q2 4.5 19.5 16.7 3.5 5.78 2.1 2.5 nC ns (VDS = 20 Vdc, VGS = 0 V, f = 1 MHz) Ciss Coss Crss 584 254 99 pF VGS(th) 1.0 1.7 18.6 12.6 20 2.0 23 16.5 Vdc mV/C mW V(br)DSS 25 28 1.0 10 100 Vdc mV/C mAdc Symbol Min Typ Max Unit

IDSS

IGSS

nAdc

RDS(on)

gFS

Mhos

Reverse Recovery Time (IS = 10 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 3) Reverse Recovery Stored Charge 3. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 4. Switching characteristics are independent of operating junction temperatures.

trr ta tb QRR

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NTD40N03R
20 ID, DRAIN CURRENT (AMPS) 16 12 8 4 0 10 V 8V 6V 4V 3.5 V 20 ID, DRAIN CURRENT (AMPS) 3.4 V VDS 10 V 16 12 8 4 0 TJ = 25C

3.2 V

3V 2.8 V VGS = 2.6 V 0 2 4 6 8 10

TJ = 125C 0 1 2

TJ = 55C 3 4 5

VDS, DRAINTOSOURCE VOLTAGE (VOLTS)

VGS, GATETOSOURCE VOLTAGE (VOLTS)

Figure 1. OnRegion Characteristics

RDS(on), DRAINTOSOURCE RESISTANCE (W) 0.040 VGS = 10 V 0.032 RDS(on), DRAINTOSOURCE RESISTANCE (W) 0.040 0.032 0.024 0.016 0.008

Figure 2. Transfer Characteristics

TJ = 150C TJ = 125C TJ = 25C TJ = 55C

0.024 TJ = 150C TJ = 125C TJ = 25C TJ = 55C 0 4 8 12 16 20 0.016

0.008 0

VGS = 4.5 V 0 0 4 8 12 16 20

ID, DRAIN CURRENT (AMPS)

ID, DRAIN CURRENT (AMPS)

Figure 3. OnResistance versus Drain Current and Temperature

RDS(on), DRAINTOSOURCE RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1 0.8 0.6 50 100 ID = 10 A VGS = 10 V IDSS, LEAKAGE (nA) 10,000

Figure 4. OnResistance versus Drain Current and Temperature

VGS = 0 V

TJ = 150C 1000

TJ = 125C

25

25

50

75

100

125

150

10

15

20

25

TJ, JUNCTION TEMPERATURE (C)

VDS, DRAINTOSOURCE VOLTAGE (VOLTS)

Figure 5. OnResistance Variation with Temperature

Figure 6. DraintoSource Leakage Current versus Voltage

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NTD40N03R
VGS, GATETOSOURCE VOLTAGE (VOLTS)

1000 800 600 400 Ciss Crss

VDS = 0 V VGS = 0 V

TJ = 25C

8 VGS QT 4

C, CAPACITANCE (pF)

Ciss

Q1

Q2

Coss 200 0 Crss 10 5 VGS 0 VDS 5 10 15 20

2 ID = 10 A TJ = 25C 0 2 4 6 8

GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (VOLTS)

Qg, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation

Figure 8. GatetoSource and DraintoSource Voltage versus Total Charge

20 IS, SOURCE CURRENT (AMPS) 18 16 14 12 10 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1.0 VGS = 0 V TJ = 25C

100

VDS = 10 V ID = 10 A VGS = 10 V tr td(off)

t, TIME (ns)

10 td(on) tf

10 RG, GATE RESISTANCE (W)

100

VSD, SOURCETODRAIN VOLTAGE (VOLTS)

Figure 9. Resistive Switching Time Variation versus Gate Resistance

100 I D, DRAIN CURRENT (AMPS)

Figure 10. Diode Forward Voltage versus Current

SINGLE PULSE VGS = 20 V TC = 25C

10 ms

100 ms 10 1 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 10 ms dc 100

10 1 VDS, DRAINTOSOURCE VOLTAGE (VOLTS)

Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com
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NTD40N03R
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED)

1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE t1 t2 DUTY CYCLE, D = t1/t2 0.001 0.01 t, TIME (s) 0.1 P(pk) RqJC(t) = r(t) RqJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t)

0.01

0.00001

0.0001

10

Figure 12. Thermal Response

ORDERING INFORMATION
Device NTD40N03R1G NTD40N03RT4G Package DPAK (Straight Lead) (PbFree) DPAK (PbFree) Shipping 75 Units/Rail 2500 Tape & Reel

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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NTD40N03R
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE) CASE 369AA01 ISSUE B
C A B c2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 0.040 0.155 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 1.01 3.93

E b3 L3
1 4

D
2 3

Z
DETAIL A

L4

b2 e

b 0.005 (0.13)
M

c C L2
GAUGE PLANE

H C L L1 DETAIL A
SEATING PLANE

A1

ROTATED 90 5 CW

SOLDERING FOOTPRINT*
6.20 0.244 3.00 0.118

STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN

2.58 0.102

5.80 0.228

1.60 0.063

6.17 0.243

SCALE 3:1

mm inches

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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NTD40N03R
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE) CASE 369D01 ISSUE B

B V R
4

C E Z

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93

S T
SEATING PLANE

A
1 2 3

F D G
3 PL

H
M

0.13 (0.005)

STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

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NTD40N03R/D