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S. Wallentowitz
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Cache coherency can either be snoopingbased or directory-based. Snooping adds 2 extra bits to the caches and the directory implementation requires 3 bits plus a bitvector.
7.1 a)
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Calculate the required memory bits for snooping- and directory-based coherency
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7.1 b)
Calculate the extra memory of an embedded system with 32 MB memory, 32 kB L1 cache and 256 kB L2 cache. The cache blocks are of 4 words.
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7.1 c)
Calculate the extra memory of a desktop system with 4096 MB memory, 512 kB L1 cache and 4 MB L2 cache. The cache blocks are of 8 words.
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Read Hit
Invalid
CPU Write Miss (Place write miss on bus) Write Miss (Write Miss)
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Read Miss
Modified
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Bus triggered
Events Cache actions
7.2 a)
t 0 (1) READ 1 (1) WRITE operation C0 I C1 I C2 I
7.2 a)
t 2 (0) READ 3 (2) WRITE operation C0 I C1 M C2 I
7.2 a)
t 4 (2) READ 5 (0) READ 6 (0) WRITE operation C0 I C1 I C2 M
7.2 b)
t 0
operation
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7.2 c)
According to you, what extensions does a bus need to support snooping-based cache coherency (write back caches)?
7.2 d)
For MSI and MESI sketch the valid state combinations for one entry in two caches.
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