BEE 332 Lab

Multi-Transistor Configurations

Groups Name 1 Abraham Asnashe

Lab1-Activity Collecting data & analysis, Graphing, Circuit construction, Answers to questions and Commenting Collecting data& analysis, Graphing, Circuit construction Answers to questions and Commenting Collecting data& analysis, Graphing, Circuit construction Answers to questions and Commenting

Monyrith Chhen

Retta Dechassa

Due Nov 2, 2012 Instructor: Lawrence Lam, PhD

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OBJECTIVE
In Multi-Transistor lab we experiment with several common multiple transistor circuits and observe their characteristics. Among these circuits are a current mirror, different current sources, and a differential amplifier. During this lab we also experiment with the design of a three-transistor circuit, attempting to fit given criteria. In addition we show how two transistors are used to achieve amplifiers with improved performance, we analysis also multiple transistor amplifiers using resistive loads and we continue to build the amplifier concepts necessary to consider integrated circuit amplifiers.

INTRODUCTION
This experiment are to examine the operating characteristics of several of the most common multi-transistor configurations, including current mirrors, current sources and sinks, and differential amplifiers.

EQUIPMENT AND MATERIALS USED:

Equipment name DC power supply Equipment/Materials image

DMM Volt-Meter Amp-Meter Power Generator Oscilloscope Breadboard CA3046 transistor

Resistors

100 k 5% 1/4 W

100 k potentiometer

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Procedure 1 Current mirror

Figure E3.1 Measurement-1 Set up

We connect PPS1 power supply to implement the VCC = +6.0 V. and we use PPS2 power supply to implement the VEE = -6.0 V DC power supply rails. And then we Adjust the R2 potentiometer to vary the collector voltage of Q2 from +6.0 V down to about 5.0 V. so we take pairs of readings of the current measured on one DMM versus the collector voltage measured on the other DMM or oscilloscope. The Suggested voltage values are +6 V, +3 V, 0.0 V, -3 V, and 5 V. Record these pairs of readings. Finally we record the DC voltages at the base and collector of Q1.Please sees the measurement-1 Data below

Measurement-1 Data
Suggested value is 100Kohms but actual measured value for R1 = 98.5kohms Table for the measured value for VC2 and IC2 at different voltages:

Voltage Value 6V 3V 0V -3 V -5 V

Measured Vc2 (V)

5.96V 3.02V 0.094.4 V - 3.02 V - 5.00 V

Ic2 (A) 133.37 uA 129.91 uA 125.84 uA 121.48 uA 117.81 uA

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Below are some screenshots for different voltage value(Vc2):

At 6V

At 3 V

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At 0 V

At -3 V

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At -5 V

We also measured Voltage at base and collector of Q1. Vbg1=Vcg1=-5.13V. Answer for Question-1 (a) Calculate the output resistance of this current source as Rout = V/I, taken from your recorded data. From our table results we can calculate the output resistance of the current sources or the current mirror. Rout= (Vc21-Vc22)/ (Ic21-Ic22) = (5.96 -3.02)/ (133.37 -129.91) A = 0.8497 M (b) Explain what purpose the connection between the base and collector of Q1 (pins 6 and 8) serves. The connection between the collector and the base of the Q1 serves to keep VBC1 at the value of zero this will keep Q1 at the Forward Active region since BE-junction would stay in a forward biased mode. The Value of Vbe1 Vbe1 = VB1-VE1= -5.13-(-6) = .87 V Vce1=Vbe1-Vcb1=0.87V-0V=0.87V > Vce1 Sat this insures Q1 is FAR. (c) Explain why the collector voltage of Q2 cannot be brought all of the way down to the lower power supply rail of VEE = -6.0 V.

The reason why Our Vc cannot go all the way to -6 because of the voltage drop on the Q2 itself i.e. VCE2.There is an Vbe,on voltage for the transistors 0.87V in our case so this prevent the transistors Vc to be at the same potential with Vee=-6V. (please see figure E3.1 above, page 3) (d) Explain if and how the current source is sensitive to the values of the power supply voltages.

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An Ideal current source would not be affected by the changes in the power supply, but in this case changing the value of the voltage caused a change in the output current even though the voltage on the base of Q2 remains constant. This change in the value of Ic is due to Early effect. The change of VCE value changes the value of Ic. However ,the change in collector current is minor and can be consider as constant current source.

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Procedure 2 Widlar current sources

Figure E3.2a Measurement Set up 2a:

First we verify that the two power supply rails are at 6.0 Volts. And Adjust the R2 potentiometer to vary the collector voltage of Q2 from +6.0 V down to about +5.0 V. and then we take pairs of readings of the current measured on the one DMM versus the collector voltage measured on the other DMM and record. Finally we record the DC voltages at the base and collector of Q1. Measurement Set up 2b: First we Turn the dual DC power supply OFF. And Replace R3 on the emitter of Q2 with a wire. Add a new resistor R3 in series with the emitter of Q1.Then we turn the dual DC power supply ON. Verify once more that the two power supply rails are at 6.0 Volts. Also we Adjust the R2 potentiometer to vary the collector voltage of Q2 from +6.0 V down to about -5.0 V. then we take readings only up to the point where Q2 saturates, probably around a collector voltage of 4.0 to 5.0 V. finally we take pairs of readings of the current measured on the one DMM versus the collector voltage measured on the other DMM or oscilloscope and record. And record the DC voltages at the bas

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Measurement-2a Ic1 = Vc1 / R1 = 11.43/100k = 114A Ic2 = 10 A R3 = (VT * ln (Ic1/Ic2)) / Ic2 = = (0.025 * ln (114A /10A) ) / 10 A = 6084 = 6.08k Pick R3 value = 5.08 k + 0.988 k = 6.068 k
Table for measured value for VC2 and IC2 at different voltages with R3 = 6.068 K-ohms:

Actual measured Vc2 (v) Ic2 (A) 6 5.99 V 10.88 uA 5.8 5.81 V 10.87 uA 5.6 5.60 V 10.85 uA 5.4 5.40 V 10.83 uA 5.2 5.20 V 10.81 uA 5 5.00V 10.79 uA Rout=change V/change I =(5.99V-5.00V)/(10.88uA-10.79uA)=11Mohms. Table for base and collector voltages with respect to ground at different voltages: The base and collector voltage with respect to ground at Q1 is remain almost constant for different values Vce2. Voltage Value Vc2 Vb1 (v) Vc1 (v)
6 5.8 5.6 5.4 5.2 5 -5.4 -5.39 -5.4 -5.4 -5.39 -5.39 -5.4 -5.39 -5.4 -5.4 -5.39 -5.39

Voltage Value Vc2

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Below are some screenshots for different voltage values: At 6 V

Below TEK machine graph show that we took At 5.8 V

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Below TEK machine graph show that we took At 5.6 V

Below TEK machine graph show that we took At 5.4 V

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Below TEK machine graph show that we took At 5.2 V

Below TEK machine graph show that we took At At 5 V

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Figure E3.2b Measurement-2b Ic1 = (Vc1 / R1 )= 11.43/100k = 114A; Ic2 = 1 mA R3 = [(VT * ln (Ic2/Ic1) ) / Ic1 ]= [(0.025 * ln (1mA/114uA) ) / 114A ]= 476.22 Pick resistor value = 470 ; Measured R3 = 458 Table for measured value for VC2 and IC2 at different voltages with R3 = 458 : Voltage value Vc2 (v) Ic2 (A)

5.77 678.4 uA 6V 4.98 676.7 uA 5V 4.00 674.9 uA 4V 3.09 673.3 uA 3V 2.01 674.1 uA 2V 1.08 672.19 uA 1V 0.140 670.1 uA 0V -1.04 666.36 uA -1 V -1.98 663.6 uA -2 V -3.02 662.7 uA -3 V -3.99 658.15 uA -4 V Table for base and collector voltages with respect to ground at different voltages: Voltage value Vb1 (v) Vc1 (v) 6 5 4 3 2 1 0 -1 -2 -3 -4 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35 -5.35
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BEE 332 Lab # 3 Multi-Transistor Configurations

Below are some screenshots for different voltage value: TEK machine graph show that we took At 6 V

Below TEK machine graph show that we took At 5 V

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Below TEK machine graph show that we took At 4 V

Below TEK machine graph show that we took At 3 V

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Below TEK machine graph show that we took At 2 V

Below TEK machine graph show that we took At 1 V

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Below TEK machine graph show that we took At 0 V

Below TEK machine graph show that we took At -1 V

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Below TEK machine graph show that we took At -2 V

Below TEK machine graph show that we took At -3 V

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Below TEK machine graph show that we took At -4 V

Answer for Question-2 (a) Calculate the output resistance of the reducing Widlar current source of Fig. E3.2a. Rout= (Vc21-Vc22)/(Ic21-Ic22) = (5.99-5.00)/(10.88-10.79) A = 11 M (b) Calculate the output resistance of the boosting Widlar current source of Fig. E3.2b. Rout= (Vc1-Vc2)/(Ic1-Ic2) = (5.77-4.98)/( 678.4-676.7) A = = 0.465 M In our circuit above the output resistance for the boost Widlar current source (c) Explain why the output resistance of the reducing Widlar current source is higher than for the boosting case.
The presence of a R3 in reducing Widlar circuit (please see figure E3.2a above, page 11) and an increase in current at Q2 increases creates an increase in voltage drop across R3 which in turn reduces a voltage drop across baseemittor of Q2 which in turn counteract the increase in current( contributes to the stability of the Q2) and hence, provides a negative feedback to the input loop and increases the output resistance. But we do not have this negative feedback in boosting widlar case at Q2. Therefore the output resistance is higher in reducing widlar compare to boosting Widlar.

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Procedure 3 Wilson current source

Measurement Set up 3: We Set PPS1 to +6.0 V and PPS2 to -6.0 V. And we verify that the two power rails are at 6.0 V. Adjust the R2 potentiometer to vary the collector voltage of Q2 from +6.0 V down to about -5.0 V. and then we take pairs of readings of the current measured on the one DMM versus the collector voltage measured on the other DMM or oscilloscope and record. Finally we record the DC voltages at the base and collector of Q1. Measurement-3 Table for measured value for VC2 and IC2 at different voltages: Suggested Actual measured CollectorCollector Current (IC2 A) Voltage value Emitter Voltage (VC2) 6V 4V 2V 0V -1 V -3 V -5 V 5.99 V 4.05 V 2.05 V 0.140 V -1.02 V -3.00 V -4.4 V 106.3 uA 105.6 uA 106.3 uA 105.1 uA 106.1 uA 104.8 uA 105.6 uA

Table for base and collector voltages with respect to ground at different voltages: Suggested Voltage value Base Voltage (VB1) Collector Voltage (Vc1) 6V 4V 2V 0V -1 V -3 V -5 V -5.4 V -5.4 V -5.4 V -5.4 V -5.4 V -5.4 V -5.4 V -4.72 V -4.72 V -4.72 V -4.72 V -4.72 V -4.72 V -4.72 V
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BEE 332 Lab # 3 Multi-Transistor Configurations

Below are some screenshots for different voltage value:At 6 V

Below TEK machine graph show that we took At 4 V

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Below TEK machine graph show that we took At 2 V

Below TEK machine graph show that we took At 0 V

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Below TEK machine graph show that we took At -1 V

Below TEK machine graph show that we took At -3 V

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Below TEK machine graph show that we took At -5 V

Answer for Question-3

(a) Using your measured data, calculate the output resistance for this Wilson current source. Your data may be such that you can only say that the output resistance is greater than a certain value. Output resistance:

V= V2-V1= I= I2-I1= Rout=V/I = (V2-V1)/( I2-I1 )=

(b) Design a current source for which the output current is exactly twice that of the reference current by using three of the BJTs on the CA3046 npn array. Explain in your lab notebook how this circuit achieves the factor of two scaling between the reference and output currents.
We modeled this circuit in Multisim. Through experiment we found that this circuit produced the desired output current of twice the reference current. The reference current is modeled by the multimeter XMM1, and the output current is XMM2. The output node in this circuit is the BEE 332 Lab # 3 Multi-Transistor Configurations Page | 24

collector of Q2.The chosen resistor value for R2 produces an output with an error of about 0.08%, which is less than that of the 5% tolerance resistors that we are using to construct out circuit; therefore I would deem this a sufficient model.

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Procedure 4 Differential amplifier

Verification: Vc1 = 3.386 V; Vc2 = 3.38 V Vc Should be around 3V, which is correct. VE1 = VE2 = -0.716 V, which means VBE = 0.716 V, therefore it is in forward active mode. VC1 sin wave is 180 degree shift. Measured output voltage 3.68 V Screenshot of the sin wave that shows 180 degree shift:

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VC2 sin wave is in phase, No shift: measure output voltage 3.52 V Screenshot of the sin wave that shows input and output are in phase:

Measurement-4 First part: Before the sin-wave starts to clip we measured Vout = 4.56 V and Vin = 160 mVpp. Therefore, Gain = Vo / Vin = 28.5 Screenshot of the sin-wave input and output before it start clipping:

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Calculating 70 % of the maximum voltage; 4.56 * 0.7 = 3.19 V After increasing the frequency until the output voltage reaches 3.19 V; we obtained 1.86 M-Hz. Screenshot of 70% of Vmax at 1.86 M-Hz:

Second part of measurement: (common-mode input signal) VC2 is out of phase 180 degree to the input voltage. Screenshot of the sin wave that shows 180 degree shift:
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Vc1 is out of phase by 180 degree to the input voltage. Screenshot of the sin wave that shows 180 degree shift:

We calculated the gain dividing output voltage by the input voltage and we expect to obtain a gain less than 1 in which is exactly what we got. Gain = Vout / Vin = 2.16 V / 3 V = 0.72 < 1 Then, we increased the amplitude until we reached the largest possible outpu Before the sin-wave starts to clip we measured Vout = 2.52 V and Vin = 5.23 Vpp.
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Therefore, Gain = Vo / Vin = 2.52 V / 5.20 V = 0.485 Screenshot of the sin-wave input and output before it start clipping:

Calculating 70 % of the maximum voltage; 2.52 * 0.7 = 1.76 V After increasing the frequency until the output voltage reaches 1.76 V; we obtained 0.99 M-Hz. Screenshot of 70% of Vmax at 0.99M-Hz:

Final part: Both input and output are in phase. Common-mode gain = Vo/Vin = 186mV/186mV = 1 Screenshot of the sin wave that shows input and output are in phase:
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DC Offset by 4V.

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Question-4 (a) Calculate the common-mode rejection ratio (CMRR), expressing it in both as a pure ratio and in decibels (dB). =

(b) Explain why the common-mode gain is approximately 0.5 and inverting when no DC offset is applied from the signal generator. The common-mode gain is and inverting because examining the circuit in the small signal model, we would see that the circuit is symmetrical due to the bases being shorted together. And Vbe=Vb- Ve=0-Ve ..Vb=0 since there is no dc offset. That is why the output would be less than the input (c) Explain why the common-mode gain jumps to approximately 1.0 and becomes noninverting when a positive DC offset is applied from the signal generator. This is a tricky question! But it represents a situation which often occurs in the lab and which confuses people. Try to figure this one out---it will add greatly to your ability to troubleshoot analog circuits. The common-mode gain would jump to 1 since now there will be an offset at Vb so then
Our interpretation would be that the transistors would share a gain of 1 now that there is an offset voltage and the transistors are now in the ON mode and ready to amplify. (d) Suggest a way to increase the CMRR of this differential amplifier. Hint: think about how ideal the current source RE is and how it might be improved. We believe by using the principle of the Wilson Current source we would be able to increase RE using the current source, maintaining the current, but also increasing the potential resistance using two additional transistors. We would like to increase all the resistors in order to create a proportional increase within the CMRR since they are all factored on the resistors.

CONCLUSION
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After we completing this experiment which is Multi-Transistor Configurations , we now have a much greater understanding of the uses and properties of multiple transistor circuits. We have reinforced our understanding of the qualities of an ideal current source and seen how to properly design a circuit to achieve a desired current output.

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