1

Index TermsBattery energy storage (BESS), control tech-

niques, custom power devices, distributed generation, distribution
static synchronous compensator (DSTATCOM).
I. INTRODUCTION
TILITY and customer-side disturbances result in terminal
voltage fluctuations, transients, and waveform distortions
on the electric grid. Just as flexible ac transmission systems
(FACTS) controllers permit to improve the reliability and
quality of transmission systems, these devices can be used in
the distribution level with comparable benefits for bringing so-
lutions to a wide range of problems. In this sense, FACTS-
based power electronic controllers for distribution systems,
namely custom power devices, are able to enhance the reliabil-
ity and quality of power that is delivered to customers [1].
A distribution static compensator or DSTATCOM is a fast
response, solid-state power controller that provides flexible
voltage control at the point of connection to the utility distribu-
tion feeder for power quality (PQ) improvements. It can ex-
change both active and reactive power with the distribution
system by varying the amplitude and phase angle of the con-
verter voltage with respect to the line terminal voltage, if an
energy storage system (ESS) is included into the dc bus. The
result is a controlled current flow through the tie reactance be-
tween the DSTATCOM and the distribution network. This en-
ables the DSTATCOM to mitigate voltage fluctuations and to

M. G. Molina and P. E. Mercado are with CONICET and the Instituto de
Energa Elctrica UNSJ, Av. L. G. San Martn Oeste 1109, J5400ARL,
San Juan Argentina (e-mails: mgmolina@ieee.org, pmercado@ieee.org).
correct the power factor of weak distribution systems in instan-
taneous real-time [2].
This paper discusses the dynamic performance of a
DSTATCOM with ESS for improving the power quality of
distribution systems. In this work, three modes of operation are
considered, i.e. voltage control, power factor correction and
active power control. Modeling and control approaches are
proposed, including a detailed modeling of the
DSTATCOM/ESS device. The multi-level control technique
proposed is based on the instantaneous power theory on the
synchronous-rotating dq reference frame. Validation of models
and control schemes is carried out through simulations by us-
ing SimPowerSystems of SIMULINK/MATLAB.
II. MODELING OF THE DSTATCOM/ESS
A DSTATCOM consists of a three-phase voltage source in-
verter shunt-connected to the distribution network by means of
a coupling transformer, as depicted in Fig. 1. Its topology al-
lows the device to generate a set of three almost sinusoidal
voltages at the fundamental frequency, with controllable am-
plitude and phase angle. In general, the DSTATCOM can be
utilized for providing voltage regulation, power factor correc-
tion, harmonics compensation and load leveling [3]. The addi-
tion of energy storage through an appropriate interface to the
power custom device leads to a more flexible integrated con-
troller. The ability of the DSTATCOM/ESS of supplying ef-
fectively extra active power allows expanding its compensat-
ing actions, reducing transmission losses and enhancing the
operation of the electric grid.
Control Design and Simulation of DSTATCOM
with Energy Storage for Power Quality
Improvements
M. G. Molina, Member, IEEE, and P. E. Mercado, Senior Member, IEEE
U
Fig 1. Basic circuit of a DSTATCOM integrated with energy storage
1-4244-0288-3/06/$20.00 2006 IEEE
2006 IEEE PES Transmission and Distribution Conference and Exposition Latin America, Venezuela
2
Various types of energy storage technologies can be incor-
porated into the dc bus of the DSTATCOM, namely supercon-
ducting magnetic energy storage (SMES), supercapacitores
(SC), flywheels and battery energy storage systems (BESS),
among others. However, lead-acid batteries offer a more eco-
nomical solution for applications in the distribution level that
require small devices for supplying power for short periods of
time and intermittently. Moreover, BESS can be directly added
to the dc bus of the inverter, thus avoiding the necessity of an
extra coupling interface and thus reducing investment costs.
The integrated DSTATCOM/BESS system proposed in
Fig. 2 is basically composed of the inverter (indistinctly called
converter), the coupling step-up transformer, the line-
connection filter, the dc bus capacitors, and the array of batter-
ies. Since batteries acts as a stiff dc voltage source for the in-
verter, the use of a conventional voltage source inverter ap-
pears as the most cost-effective solution for this application.
The presented VSI corresponds to a dc to ac switching
power inverter using Insulated Gate Bipolar Transistors
(IGBT). In the distribution voltage level, the switching device
is generally the IGBT due to its lower switching losses and re-
duced size. In addition, the power rating of custom power de-
vices is relatively low. As a result, the output voltage control
of the DSTATCOM/BESS can be achieved through pulse
width modulation (PWM) by using high-power fast-switched
IGBTs. This topology supports the future use of PWM control
even for higher power utility applications.
The VSI structure is designed to make use of a three-level
pole structure, also called neutral point clamped (NPC), in-
stead of a standard two-level six-pulse inverter structure This
three-level inverter topology generates a more sinusoidal out-
put voltage waveform than conventional structures without in-
creasing the switching frequency. The additional flexibility of
a level in the output voltage is used to assist in the output
waveform construction. In this way, the harmonic performance
of the inverter is improved, also obtaining better efficiency and
reliability respect to the conventional two-level inverter. A
drawback of the NPC inverters is that the split dc capacitor
banks must maintain a constant voltage level of half the dc bus
voltage. Otherwise, additional distortion will be contributed to
the output voltage of the DSTATCOM/BESS. In this work, the
use of battery energy storage in an arrangement with neutral
point (NP) permits to independently contributing to the charge
of the capacitors C
1
and C
2
, and thus to maintain the voltage
balance of the dc capacitors without using additional control
techniques.
The connection to the utility grid is made by using low pass
sine wave filters in order to reduce the perturbation on the dis-
tribution system from high-frequency switching harmonics
generated by PWM control. The total harmonic distortion
(THD) of the output voltage of the inverter combined with a
sine wave filter is less than 5 % at full rated unity power factor
load. Typically, leakage inductances of the step-up transformer
windings are high enough as to build the sine wave filter sim-
ply by adding a bank of capacitors in the PCC. In this way, an
effective filter is obtained at low costs, permitting to improve
the quality of the voltage waveforms introduced by the PWM
control to the power utility and thus meeting the requirements
of IEEE Standard 519-1992 relative to power quality.
III. CONTROL OF THE DSTATCOM/BESS
The proposed multi-level control scheme for the integrated
DSTATCOM/BESS device, consisting of an external, middle
and internal level, is based on concepts of instantaneous power
on the synchronous-rotating dq reference frame [4] as depicted
in Fig. 3. Rotating reference frame is used because it offers
higher accuracy than stationary frame-based techniques [5].
All blocks make use of control variables that are feasible to be
locally measured.
A. External Level Control
The external level control (left side in Fig. 3) is responsible
for determining the active and reactive power exchange be-
tween the enhanced custom power device and the utility sys-
tem. The proposed external level control scheme is designed
for performing three major control objectives, that is the volt-
age control mode (VCM), which is activated when switch S
1
is
in position a, the power factor control mode (PFCM), activated
in position b, and the active power control mode (APCM) that
is always activated.
The standard control loop of the external level consists in
controlling the voltage at the PCC of the DSTATCOM/BESS
through the modulation of the reactive component of the out-
put current [6]. To this aim, the instantaneous voltage at the
PCC is computed by using a synchronous-rotating orthogonal
reference frame. Thus, by applying Parks transformation, the
instantaneous values of the three-phase ac bus voltages are
transformed into dq components, v
d
and v
q
respectively. This
operation permits to design a simpler control system than us-
ing abc components, by employing PI compensators. A volt-
age regulation droop (or slope) R
d
is included in order to allow
the terminal voltage of the DSTATCOM/BESS to vary in pro-
portion with the compensating reactive current. In this way, a
higher operation stability of the integrated device is obtained
in cases that more fast-response compensators are operating in
the area. As a result, the PI controller with droop characteris-
tics becomes a simple phase-lag compensator (LC).
Fig. 2. Detailed model of the proposed STATCOM/BESS
3
The PFCM corresponds to a variation of the reactive power
control mode, being the last controller similar to the APCM
but changing active components by reactive ones. In the power
factor control mode, the reactive power reference is set to zero
in order to provide all the reactive power demand at the con-
sumer side and thus being able to maintain unity power factor.
The reactive power measurement is carried out at the customer
supply side and is used as a reference for the PFCM. A stan-
dard PI compensator is included to eliminate the steady-state
error in the reactive current reference computation. The inte-
gral action gives the controller a large gain at low frequencies
that results in eliminating the post-transient current offset.
The APCM allows controlling the active power exchanged
with the electric system. This control mode compares the ref-
erence power set with the actual measured value in order to
eliminate the steady-state active current offset via a PI com-
pensator. In this way, the active power exchange between the
DSTATCOM/BESS and the PS can be controlled so as to
force the batteries to absorb active power when P
r
is negative,
or to inject active power when P
r
is positive.
The active power limits have been established with priority
over the reactive power ones. In this way, P
max
and P
min
dy-
namically adjust in real-time the reactive power available from
the DSTATCOM/BESS device, through constrains Q
max
and
Q
min
. As during a fault or a post-fault transient of the electric
system, the instantaneous voltage vector in the PCC, v
d
may
greatly reduce its magnitude, the controllers will tend to raise
the output active and reactive currents. Therefore the current
ratings need to be independently restricted.
It is significant to note that as digital signal processing is
currently used to implement control techniques, anti-aliasing
filtering composed of analog 2nd order low-pass filters is in-
cluded in the measurement system in order to restrict the input
signals bandwidth and thus to approximately satisfy the Shan-
non-Nyquist sampling theorem.
B. Middle Level Control
The middle level control makes the expected output to dy-
namically track the reference values set by the external level.
In order to derive the control algorithm for this block, a dy-
namic model of the integrated DSTATCOM/BESS controller
needs to be set up. For this purpose, a simplified scheme of the
DSTATCOM/BESS equivalent circuit is used, that is depicted
in Fig. 4. The DSTATCOM is considered as a voltage source
that is shunt-connected to the network through the inductance
L
s
, accounting for the equivalent leakage of the step-up cou-
pling transformer and the series resistance R
s
, representing the
transformers winding resistance and VSI semiconductors con-
duction losses. The mutual inductance M represents the
equivalent magnetizing inductance of the step-up transformers.
In the dc side, the equivalent capacitance of the two dc bus
capacitors is described by C
d
/2 whereas the switching losses of
the VSI and power loss in the capacitors are considered by R
p
.
The BESS is represented by an ideal dc voltage source V
b
, and
a series resistance R
b
, accounting for the battery internal resis-
tance. The self-discharge and leakage as well as the capacity of
batteries are represented by a parallel combination of a resis-
tance and a capacitor [7]. Both values are included into R
p
and
C
d
/2, respectively.
The dynamics equations governing the instantaneous values
of the three-phase output voltages in the ac side of the
DSTATCOM and the current exchanged with the utility grid
are given by (1) and (2).
( )
(
(
(

+ =
(
(
(

(
(
(

c
b
a
c
b
a
inv
inv
inv
i
i
i
s
v
v
v
v
v
v
c
b
a
s s
L R , (1)
where:
dt
d
s = ,
(
(
(

=
s
s
s
R
R
R
0 0
0 0
0 0
R
s
,
(
(
(

=
s
s
s
L M M
M L M
M M L
s
L (2)
Fig. 3. Multi-level control scheme for the DSTATCOM/BESS compensator
4
Under the assumption that the system has no zero sequence
components, all currents and voltages can be uniquely trans-
formed into the synchronous-rotating dq reference frame.
Thus, the new coordinate system is defined with the d-axis al-
ways coincident with the instantaneous voltage vector (v
d
=|v|,
v
q
=0). Consequently, the d-axis current component contributes
to the instantaneous active power and the q-axis current com-
ponent represents the instantaneous reactive power. By apply-
ing Parks transformation [8] (1) and (2) can be transformed
into the dq reference frame as follows:
(
(
(

=
(
(
(
(

c inv
b inv
a inv
q inv
d inv
v v
v v
v v
v v
v v
v v
c
b
a
inv
q
d
s
K
0
0
,
(
(
(

=
(
(
(

c
b
a
q
d
i
i
i
i
i
i
s
K
0
(3)
Then, by neglecting the zero sequence components, (4) and
(5) are derived.
( )
(

+
(

+ =
(

(
(

d
q
s
q
d
q
d
inv
inv
i
i
i
i
s
v
v
v
v
q
d
L
0
0
L R
s s
e
e
, (4)
where:
(

=
(

=
(

=
M L
M L
L
L
R
R
s
s
s
s
s
s
0
0
0
0
L ,
0
0
R
s s
(5)
The STATCOM ac and dc sides are related by the power
balance between the input and the output on an instantaneous
basis, as described by (6) and (7).
dc ac
P P = (6)
( )
p
d d
d
d
d
d b
q inv d inv
R
V
dt
dV
V
C
R
V V
i v i v
q d
2
2 2
3

|
|
.
|

\
|
= + (7)
The VSI of the STATCOM basically generates the ac volt-
age (v
inv
) from the dc voltage (V
d
). Thus, the connection be-
tween the dc-side voltage and the generated ac voltage can be
described by using the average switching function matrix S
and the factor k
inv
, as given by (8) through (10).
d
q
d
inv
inv
inv
V
S
S
k
v
v
q
d
(

=
(
(

, (8)
with the factor:
a m k
inv
2
1
= , (9)
being,
m: modulation index, me [0, 1].
1
2
n
n
a =
: voltage ratio of the coupling step-up transformer
and the average switching factor matrix for the dq reference
frame,
(

=
(

o
o
sin
cos
q
d
S
S
, (10)
with:
: o phase-shift of the converter output voltage from the ref-
erence position
Essentially, (4) through (10) can be summarized in the
state-space as follows.
(
(
(

(
(
(
(
(
(
(
(

|
|
.
|

\
|
+

=
(
(
(

d
q
d
p b
p b
d
q inv
d
d inv
d
s
q inv
s
s
s
d inv
s
s
d
q
d
V
i
i
R R
R R
C
S k
C
S k
C
L
S k
L
R
L
S k
L
R
V
i
i
s
2 3 3


e
e
(
(
(
(
(
(
(
(
(

b
d b
s
V
C R
L
v
2
0

(11)
As can be observed, (11) defines the simplified state-space
model of the DSTATCOM/BESS controller in the dq refer-
ence frame. This model is used as a basis for designing the
middle level control, which is depicted in Fig. 3 (middle side).
Inspection of (11) shows a cross-coupling of both compo-
nents of the DSTATCOM/BESS output current (through ).
Therefore, in order to achieve a decoupled active and reactive
power control, it is simply required to decouple the control of
i
d
and i
q
. Thus, by generating the appropriate control signals x
1
and x
2
derived from setting to zero derivatives of currents in
the upper part (ac side) of (11), the middle level control algo-
rithms are obtained. In order to achieve this condition in
steady-state, conventional PI controllers with proper feedback
of DSTATCOM/BESS output current components are intro-
duced, yielding (12) as follows:
(

(
(
(
(

=
(

2
1

0
0

x
x
i
i
L
R
L
R
i
i
s
q
d
s
s
s
s
q
d
(12)
As can be noticed from previous equation, i
d
and i
q
respond
to x
1
and x
2
respectively with no crosscoupling. In this way, the
introduction of these new control variables allows to obtain a
full model (ac side) reduced to two first-order functions, which
considerably improves the control system performance. From
(11), it can be seen the additional coupling resulting from the
dc capacitors voltage V
d
, as much in the dc side (lower part) as
in the ac side (upper part). This difficulty demands to maintain
the dc bus voltage as constant as possible, in order to decrease
the influence of the dynamics of V
d
. The solution to this prob-
lem is obtained by using another PI compensator which allows
Fig 4. Simplified scheme of the DSTATCOM integrated with BESS
5
eliminating the steady-state voltage variations at the dc bus, by
forcing a small active power exchange with the electric grid.
C. Internal Level Control
The internal level is responsible for generating the switch-
ing signals for the twelve valves of the three-level VSI, ac-
cording to the control mode (sinusoidal PWM) and types of
valves (IGBTs) used. Fig. 3 (right side) shows a basic scheme
of the internal level control of the DSTATCOM/BESS. This
level is mainly composed of a line synchronization module and
a three-phase three-level PWM firing pulses generator for the
DSTATCOM VSI. The line synchronization module consists
mainly of a phase locked loop (PLL). This circuit is a feedback
control system used to automatically synchronize the
DSTATCOM/BESS device switching pulses; through the
phase
S
of the inverse coordinate transformation from dq to
abc components, with the positive sequence components of the
ac voltage vector at the PCC (v
q
). The design of the PLL is
based on concepts of instantaneous power theory in the dq ref-
erence frame. Coordinate transformations from abc to dq
components in the voltage and current measurement system are
also synchronized through the PLL.
In the case of the sinusoidal PWM pulses generator block,
the controller of the VSI generates pulses for the carrier-based
three-phase PWM inverter using three-level topology. Thus,
the expected sinusoidal-based output voltage waveform V
abc*
of the DSTACOM/BESS, which is set by the middle level con-
trol, is compared to two positive and negative triangular sig-
nals generated by the carriers generator for producing three-
state PWM vectors (1, 0, -1). These states are decoded by the
states-to-pulses decoder via a look-up-table that relates each
state with the corresponding firing pulse for each IGBT of the
four ones in each leg of the three-phase three-level VSI.
IV. TEST SYSTEM
The test distribution power system used to validate the pro-
posed models and control approaches is depicted in Fig. 5 as a
single-line diagram. Such a system implements a 100 MVA
substation represented by a Thevenin equivalent, which feeds a
distribution network operating at 25 kV/50Hz. The loads are
modeled by constant impedances and are grouped together at
bus 3. A 20 km distribution line modeled with parameters
lumped in PI sections links the loads to the substation. The
proposed DSTATCOM/BESS device is connected at bus 3.
This compensator includes a 25/2.4 kV Yg/ step-up trans-
former and a 2 Mvar inverter coupled with a 1.5 MW set of
batteries.
V. DIGITAL SIMULATION RESULTS
Performance of the models and control schemes is deeply
analyzed by computer simulation performed in SimPowerSys-
tems of SIMULINK/MATLAB [9]. A variable load is con-
nected at bus 3 and is changed during the simulation in order
to verify the dynamic response of the proposed compensator
under various conditions and control modes.
A. Base case
The topology presented in the test system without the con-
nection of the DSTATCOM/BESS, also called base case, is
used as a benchmark for the present studies. Under this sce-
nario, the distribution utility feeds a group of 2 MW/0.5 Mvar
variable loads. The supply voltages and currents are balanced
and in steady state. At t= 0.2 s, a set of loads equivalent to
0.25 Mvar are automatically disconnected and re-connected af-
ter 100 ms (i.e. at t= 0.3 s). Fig. 6 presents the response of the
system before, during and after the contingency described. As
can be seen, the reduction of the inductive reactive load pro-
duces an augment of the terminal voltage at bus 3 (from 0.96
to 0.98 pu), until the load is reconnected. Though the
DSTATCOM/BESS is not operating, i.e. not exchanging
power with the grid as can be seen from response of d and q
current components and from phase-a output current, the
DSTATCOM/BESS needs to generate an output voltage wave-
form accurately synchronized as much in amplitude as in phase
with the grid at the point of common coupling. For this, the
PLL design and parameters tuning is a critical issue.
B. Case a: Connection of DSTATCOM/BESS in Voltage Con-
trol Mode (VCM)
The impact of the inclusion of a DSTATCOM/BESS con-
troller at bus 3 operating in VCM can be analyzed by simula-
tion results of Fig. 7. The good performance of the voltage
regulator of the DSTATCOM device is evidently depicted by
the rapid compensation of reactive power, after connection
t= 0.1 s. As can be noted from actual and reference values of
i
q
, the reactive power exchange with the utility system, inde-
pendent of the active power, allows to quickly control the volt-
age level at 1 pu. The DSTATCOM/BESS provides near
0.85 Mvar of capacitive reactive power for improving the volt-
age profile. In this way the reactive power demanded from the
electric grid at the PCC changes from 0.5 Mvar in the base
case to -0.35 Mvar for the VCM. The power factor at the PCC
changes slightly since the net reactive power demanded from
the ac system mainly varies its sign in this case. The active
power demanded by loads is slightly enlarge by the improve-
ment of the voltage profile at bus 3.
C. Case b: Connection of DSTATCOM/BESS in Power Fac-
tor Control Mode (PFCM)
In case b, the main goal of the DSTATCOM/BESS com-
pensator is to maintain a unity power factor. For this, the
power custom device requires to supply all the reactive power
Fig 5. Single-line diagram of the test power system
6
demanded by loads. As can be derived from Fig. 8, at t= 0.1 s
begins the compensation of reactive power that rapidly pro-
vides a unity power factor independent of loads variations. In
these conditions, the terminal voltage level at PCC is also en-
hanced although at a smaller level that in the VCM case. The
reactive power demanded at PCC is fully compensated, main-
taining null its requirement from the utility grid. This condition
produces a small increase of the active power demanded by
linear loads.
D. Case c: Connection of DSTATCOM/BESS in Active Power
Control Mode (APCM)
In case c, which is presented in Fig. 9, the main goal of the
DSTATCOM/BESS compensator is to control the active
power flow absorbed/injected by the integrated controller. The
DSTATCOM/BESS is activated at t= 0.1 s, and provides an
output power of 0.8 MW, reducing the requirement from the
utility power system in the same quantity and thus reducing
losses in the distribution lines. It can be also noted that the
voltage profile is regulated at 1 pu by the VCM, but requiring
lower reactive compensation from the DSTATCOM/BESS. At
t= 0.4 s, the device changes from injecting power to absorbing
power from the grid. In such situation, the battery set changes
from discharging to charging mode, by slightly varying the dc
bus voltage respect the voltage of the string of batteries.
VI. CONCLUSION
Dynamic system simulation studies demonstrate the effec-
tiveness of the proposed multi-level control approaches in the
synchronous-rotating dq reference frame and the detailed
models presented. The improved capabilities of the integrated
DSTATCOM/BESS controller to rapidly control the active
power exchange between batteries and the utility system, si-
multaneously and independently of the reactive power ex-
change, permit to greatly enhance the operation and control of
the electric system. The fast response device shows to be very
effective in enhancing the distribution capacity control, voltage
control and power factor correction. Moreover, other power
quality issues as voltage and/or current harmonic distortion,
voltage sags and flicker could be successfully mitigated.
VSI output line voltage waveform
DSTATCOM/BESS output phase voltage and current, va - ia
Bus 3 voltage, vd
DSTATCOM/BESS actual and reference output current, id - idref
DSTATCOM/BESS actual and reference output current, iq iqref
Active and Reactive Power at PCC
Fig. 6. Simulation results for the base case
DSTATCOM/BESS output phase voltage and current, va - ia
Bus 3 voltage, vd
DSTATCOM/BESS actual and reference output current, id - idref
DSTATCOM/BESS actual and reference output current, iq iqref
Active and Reactive Power at PCC
Power Factor at PCC
Fig. 7. Simulation results for the case with the DSTATCOM/BESS
in voltage control mode (VCM)
7
VII. REFERENCES
[1] N. G. Hingorani, Introducing custom power, IEEE Spectrum, vol. 1,
no. 6, pp. 41-48, Jun. 1995.
[2] Y. H. Song and A. T. Johns, Flexible ac transmission systems (FACTS),
1st Ed. United Kingdom: IEE Press, 1999, pp. 39-49.
[3] N. G. Hingorani and L. Gyugyi. Understanding FACTS: Concepts and
Technology of Flexible AC Transmission Systems, New York: IEEE
Press, 2000, pp. 135-143.
[4] C. D. Schauder and H. Mehta, Vector analysis and control of advanced
static var compensators, IEE Proceedings-C, vol. 140, no. 4, pp. 299-
306, 1993.
[5] E. Acha, V. Agelidis, O. Anaya-Lara, and T. Miller, Power Electronic
Control in Electrical System, 1st Ed. United Kingdom: Newness, 2002.
[6] O. Anaya-Lara and E. Acha, Modeling and analysis of custom power
systems by PSCAD/EMTDC, IEEE Trans. on Power Delivery, vol. 17,
no. 1, pp. 266-270, Jan. 2002.
[7] Z. M. Salameh, M. A. Casacca, and W. A. Lynch, A mathematical
model for lead-acid batteries, IEEE Trans. on Energy Conversions,
vol. 7, no. 1, pp. 93-97, March 1992.
[8] P. C. Krause, Analysis of Electric Machinery, New York: Mc Graw-
Hill, 1992, pp. 133-163.
[9] SimPowerSystems Users Guide, Transnergie Technologies Inc, 2002.
Marcelo Gustavo Molina (M01) was born in San Juan, Argentina, on April
12, 1973. He graduated as Electronic Engineer from the National University
of San Juan (UNSJ), Argentina in 1997, and received the Ph.D. degree from
the UNSJ in 2004. Since 2004, Dr. Molina is an Associate Professor at the
UNSJ and Researcher of the Argentinean National Research Council for Sci-
ence and Technology (CONICET). He is a Member of the IEEE Power Engi-
neering Society and the Power Electronics Society. His research interests in-
clude simulation methods, power systems dynamics and control, power elec-
tronics modeling and design, and the application of energy storage in power
systems.
Pedro Enrique Mercado (M02, SM02) was born in San Juan, Argentina,
on August 26, 1953. He graduated as electromechanical engineer from the
UNSJ, and received his Ph.D. from the Aachen University of Technology,
Germany. Dr. Mercado is currently professor of electrical engineering at the
UNSJ and researcher of the CONICET. He is a Senior Member of the IEEE
Power Engineering Society. His research activities focus on dynamic simula-
tion, operation security, power electronics, economic operation and control of
electric power systems.
DSTATCOM/BESS output phase voltage and current, va - ia
Bus 3 voltage, vd
DSTATCOM/BESS actual and reference output current, id - idref
DSTATCOM/BESS actual and reference output current, iq iqref
Active and Reactive Power at PCC
Power Factor at PCC
Fig. 8. Simulation results for the case with the DSTATCOM/BESS
in power factor control mode (PFCM)
DSTATCOM/BESS output phase voltage and current, va - ia
Bus 3 voltage, vd
DSTATCOM/BESS dc bus voltage
DSTATCOM/BESS actual and reference output current, id - idref
DSTATCOM/BESS actual and reference output current, iq iqref
Active and Reactive Power at PCC
Power of Batteries
Fig. 9. Simulation results for the case with the DSTATCOM/BESS
in active power control mode (APCM)