INTERFACING ADC/DAC AIM: a) To interface the DAC unit to microprocessor and to write an ALP to convert the given digital

word to analog voltage and also to generate sawtooth, triangular and sinewaves. b) To interface ADC unit to microprocessor and to write an ALP to convert the given analog voltage to digital word. APPARATUS REQUIRED: 8085 microprocessor kit, ADC/DAC interfacing board, CRO probe, CRO, power supply(variable), digital multimeter and connecting wires. THEORY: DAC INTERFACE SECTION: DAC 0800 is a monolithic, high speed, current output D/A Converter. Its unique features are: Typical settling time of 100ns Complementary current outputs Differential output voltages of 20V peak to peak with simple resistor load 2-quadrant wide range multiplying capability The DAC interface section comprises of i. I/O Decoding ii. D/A conversion circuit

I/O DECODING: The ICs 74LS138 and 74LS00 form the address decoding logic in this interface board. The address lines A3, A4 and A5 are connected to pin 1, pin2 and pin3 of 74LS138 respectively. The address lines A6 and A7 are Nanded together and the Nand gate output is connected to pin 6 of 74LS138. Pin 4 is ground. Thus with A7 1 =C0(hex) A6 1 A5 0 A4 0 A3 0 A2 X A1 X A0 X

DAC1 is selected. D/A CONVERSION CIRCUIT: The design comprised of the latch 74LS273, DAC 0800 and the current to voltage converting circuitry using OPAMP-741. DAC 0800 is configured for bipolar output operation. Current to voltage conversion circuit is designed using OPAMP-741. This circuit converts the current output of DAC 0800 into equivalent analog voltage. Complimentary current outputs IOUT, IOUT are connected to inverting and non-inverting output of OPAMP-741. In order to have the output voltage variation from -5V to +5V, a 2.2 feedback resistor has been selected.

The DAC outputs are available at the 5 pin connector (P3). DAC output is terminated at pin 10 of the connector P3. ADC INTERFACE SECTION: ADC-0809 is a monolithic CMOS device, with an 8-bit A/D converter, 8channel multiplexer and microprocessor compatible control logic. The main features of ADC-0809 are, 1. 2. 3. 4. 5. 6. 8-bit resolution 100s conversion time 8-channel multiplexer with latched control logic No need for external zero or full scale adjustment Low power consumption 15mw Latched tristate output

I/O DECODING: The device contains 2-channel single ended analog signal multiplexer. A particular input channel is selected by using the address decoder. Table shows the input states for the address lines to select any channel. The address is latched into the decoder on the low to high transition of the address latch enable signal (ALE). The A/D converters successive approximation register is reset on the positive edge of the start conversion pulse. The conversion is begun on the falling edge of SOC. End of conversion will go low between 0 to 8 clock pulses after the rising edge of start of conversion. Selected analog signal IN0 0 ADD C 0 Address line ADD B 0 ADD A

IN1 IN2 IN3 IN4 IN5 IN6 IN7

0 0 0 1 1 1 1

0 1 1 0 0 1 1

1 0 1 0 1 0 1

A/D CONVERSION CIRCUIT: The channel select address pins ADD A, ADD B, ADD C and ALE of ADC0809 are connected to the Data bus through a latch 74LS174. The eight data outputs of ADC-0809 are connected to D0-D7 through a buffer 74LS244. Provision is also made to display the data output by means of LEDs, using a latch 74LS374. This latch is allotted by the End of conversion signal. Thus, after the conversion is completed, at the rising edge of EOC, the 74LS374 latches the digital output of ADC0809. The LEDs which are connected to output pins of the latch, display the digital data automatically. The EOC of ADC0809 can be connected to RST5.5 or RST6.5 or RST7.5. So the EOC output can be used to interrupt the CPU in turn, can input the digital data from ADC0809. Moreover the EOC output is connected to D0 through a tristate buffer 74LS125. Thus the transfer of data is also possible by means of polling. Start of conversion can be given externally using the SOC Switch available on board. SOC can also be controlled using the D flip flop 74LS74. PCLK available at the VXT Bus is divided by 2 by the D flip flop 74LS74 to provide a input clock of 750KHz to ADC.

The channel inputs (IN0-IN7) are terminated at a 12 pin header. A 1K trimpot can be used for demonstration purposes. It is connected to channel 0, however provision is also there onboard for connecting channel 1 to 7. A 3 to 8 decoder 74LS138 is employed to generate I/O decoding logic. Pin-1, Pin-2 and Pin-3 of 74LS138 are connected to address lines A3, A4 and A5 respectively. Thus, the buffer 74LS244 which transfers the converted data outputs to databus is selected when A7 1 =C8(hex) The I/O address for the latch 74LS174 which latches the databus to ADD0, ADD1, ADD2 and ALE is A7 1 =E0(hex) The start of conversion pulse can be given by means of software also. The flip flop 74LS74 which transfers the D0 line status to the SOC pin of the ADC0809 is selected, when A7 1 =D0(hex) A6 1 A5 0 A4 1 A3 0 A2 X A1 X A0 X A6 1 A5 1 A4 0 A3 0 A2 X A1 X A0 X A6 1 A5 0 A4 0 A3 1 A2 X A1 X A0 X

The EOC output of ADC0809 is transferred to the data line D0, when 74LS125 is selected with address, A7 1 =D8(hex) A6 1 A5 0 A4 1 A3 1 A2 X A1 X A0 X

PROGRAM-1: AIM: To obtain a output of 0 volts at DAC1. Since DAC0800 is an 8-bit DAC and the output voltage variation is between -5V to +5V. The digital data input and the corresponding output voltages are presented in the following table. Input Data in Hex 00 01 02 . . 7F . . FD FE FF Output Voltage -5.00 -4.96 -4.92 . . 0.00 . . 4.92 4.96 5.00

Execute the following program and observe that the output voltage at DAC1 is 0 volts.

MEMORY LOCATION 4100 4102 4104

OP-CODE 3E,7F D3,C0 76

LABEL

MNEMONICS ORG 4100H MVI A, 7F OUT C0H HLT

PROGRAM-2: AIM: To create a saw tooth wave at the output of DAC1.Output digital data from 00 to FF in constant steps of 01 to DAC1. Repeat this sequence again and again. As a result, a saw-tooth wave will be generated at DAC1 output. MEMORY LOCATION 4100 4102 4104 4105 4108 PROGRAM-3: To generate a triangular waveform at DAC1 output. The following program will generate a triangular wave at DAC1 output. OP-CODE 3E, 00 D3, C0 3C C2, 02, 41 C3, 00, 41 LABEL START L1 MNEMONICS ORG 4100H MVI A, 00 OUT C0H INR A JNZ L1 JMP START

MEMORY LOCATION 4100 4102 4103 4105 4106 4109 410B 410C 410E 410F 4112 PROGRAM-4: AIM:

OP-CODE 2E, 00 7D D3, C0 2C C2, 02, 41 2E, FF 7D D3, C0 2D C2, 0B, 41 C3, 00, 41

LABEL START L1

MNEMONICS ORG 4100H MVI L, 00 MOV A, L OUT C0H INR L JNZ L1 MVI L, FFH MOV A, L OUT C0H DCR L JNZ L2 JMP START

L2

To generate a sine-wave at DAC1 output. A lookup table is provided in the program for sine-wave generation. Output data continuously to DAC1 from this lookup table. Verify, using a CRO at DAC1 output, that the waveform is a sinewave. The data for lookup table is arrived by experiment. MEMORY LOCATION 4100 4103 4105 4106 4108 4109 OP-CODE 21, 10, 41 0E, 46 7E D3, C0 23 0D LABEL START LOOP MNEMONICS ORG 4100H LXI H, 4110H MVI C, 46 MOV A, M OUT C0H INX H DCR C

410A 410D LOOKUP:

C2, 05, 41 C3, 00, 41

JNZ LOOP JMP START

MEMORY LOCATION 4110 4114 4118 411C 4120 4124 4128 412C 4130 4134 4138 413C 4140 4144 4148 414C 4150 4154 PROGRAM-5: AIM:

DATA 7F, 8A, 95, A0 AA, B5, BF, C8 D1, D9, E0, E7 ED, F2, F7, FA FC, FE, FF, FE FC, FA, F7, F2 ED, E7, E0, D9 D1, C8, BF, B5 AA, A0, 95, 8A 7F, 74, 69, 5F 53, 49, 3F, 36 2D, 25, 1D, 17 10, 0B, 07,04 01, 00, 01, 04 07, 0B, 10, 17 1D, 25, 2D, 36 3F, 49, 53, 5F 69, 74

In a real-time application, input of data and processing of data are indispensable. The following programs initiate the conversion process, checks the EOC pin of ADC-0809 as to whether the conversion is over and then inputs

the data to the processor. It also instructs the processor to store the converted data at RAM location 4150 (hex). MEMORY LOCATION 4100 4102 4104 4106 4108 410A 410C 410D 410E 410F 4111 4113 4115 4117 4119 411C 411E 4121 OP-CODE 3E, 00 D3, E0 3E, 08 D3, E0 3E, 01 D3, D0 AF AF AF 3E, 00 D3, D0 DB, D8 E6, 01 FE, 01 C2, 13, 41 DB, C8 32, 50, 41 76 LABEL START MNEMONICS MVI A, 00 OUT E0 MVI A, 08 OUT E0 MVI A, 01 OUT D0 XRA A XRA A XRA A MVI A, 00 OUT D0 IN D8 ANI 01 CPI 01 JNZ LOOP IN C8 STA 4150H HLT

LOOP

Execute this program. Compare the data displayed at the LEDs with that stored at location 4150H.