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DATA SHEET
Philips Semiconductors
Philips Semiconductors
Preliminary specication
TDA6111Q
The TDA6111Q is a video output amplifier with 16 MHz bandwidth. The device is contained in a single in-line 9-pin medium power (DBS9MPF) package, using high-voltage DMOS technology, intended to drive the cathode of a colour CRT.
UNIT V V mA mA V V C C
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA6111Q DBS9MPF DESCRIPTION plastic DIL-bent-SIL medium power package with n; 9 leads VERSION SOT111-1
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
feedback output
7V MIRROR FOLLOWERS 7 cathode transient output cathode DC output black current measurement output MIRROR
8 3 1 DIFFERENTIAL STAGE
TDA6111Q
5
MIRROR
CURRENT SOURCE
MIRROR
2
MGA058
ground (substrate)
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
1 2 3 4 5 6 7 8 9
MGA057
TDA6111Q
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Voltages measured with respect to GND (pin 4); currents as specied in Fig.1; unless otherwise specied. SYMBOL VDDH VDDL VI VIdm Vom Voc Vfb Iin,Iip IocsmL IocsmH Ptot Tstg Tj Ves PARAMETER high level supply voltage low level supply voltage input voltage differential mode input voltage measurement output voltage cathode output voltage feedback output voltage input current low non-repetitive peak cathode output current high non-repetitive peak cathode output current total power dissipation storage temperature junction temperature electrostatic handling human body model (HBM) machine model (MM) HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices (see Handling MOS Devices ). QUALITY SPECIFICATION Quality specification SNW-FQ-611 part E is applicable, except for ESD Human body model see Chapter Limiting values, and can be found in the Quality reference handbook (ordering number 9398 510 63011). THERMAL CHARACTERISTICS SYMBOL Rth j-c Note 1. External heatsink is required. PARAMETER thermal resistance from junction to case (note 1) VALUE 12 UNIT K/W > 1500 > 400 V V ashover discharge = 100 C ashover discharge = 100 nC CONDITIONS 0 0 0 6 0 VDDL VDDL 0 0 0 0 55 20 MIN. MAX. 250 14 VDDL +6 VDDL VDDH VDDH 1 5 10 4 +150 +150 V V mA A A W C C V V V V UNIT
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
CHARACTERISTICS Operating range: Tamb = 20 to 65 C; VDDH = 180 to 210 V; VDDL = 10.8 to 13.2 V; Vip = 2.6 to 5 V; Vom = 1.4 V to VDDL. Test conditions (unless otherwise specied): Tamb = 25 C; VDDH = 200 V; VDDL = 12 V; Vip = 5 V; Vom = 6 V; CL = 10 pF (CL consists of parasitic and cathode capacitance); Rth-heatsink = 10 K/W; measured in test circuit Fig.3. SYMBOL IDDH IDDL Ibias Ioffset Iom(offset) PARAMETER quiescent LOW voltage supply current input bias current input offset current offset current of measurement output CONDITIONS Voc = 0.5VDDH Voc = 0.5VDDH Voc = 0.5VDDH Ioc = 0 A; 1.0 V < V13 < 1.0 V; 1.4 V < Vom < VDDL 10 A < Ioc < 3 mA; 1.0 V < V13 < 1.0 V; 1.4 V < Vom < VDDL Voc = 0.5VDDH V13 = 1 V V13 = 1 V MIN. 7.0 5.0 0 6 10 TYP. 9.0 6.8 0 MAX. 11.0 8.0 40 +6 +10 UNIT mA mA A A A
0.9
1.0
1.1
input offset voltage minimum output voltage maximum output voltage gain-bandwidth product of open-loop gain: Vfb / Vi, dm small signal bandwidth large signal bandwidth cathode output propagation delay time 50% input to 50% output
50
1.6 16 13 23
+50 20 29
VDDH 12
f = 500 kHz; VocDC = 100 V VocAC = 60 V (p-p); VocDC = 100 V VocAC = 100 V (p-p); VocDC = 100 V VocAC = 100 V (p-p); VocDC = 100 V square wave; f < 1 MHz; tr = tf = 22 ns; see Figs 4 and 5 13 10 17
tr
cathode output rise time 10% output to Voc = 50 to 150 V square 23 90% output wave; f < 1 MHz; tf = 22 ns; see Fig.4 cathode output fall time 90% output to 10% output settling time 50% input to (99% < output < 101%) Voc = 150 to 50 V square 23 wave; f < 1 MHz; tr = 22 ns; see Fig.5 VocAC = 100 V (p-p); VocDC = 100 V square wave; f < 1 MHz; tr = tf = 22 ns; see Figs 4 and 5 V13 = 2 V (p-p) square wave; f < 1 MHz; tr = tf = 22 ns
30
36
ns
tf
30
36
ns
ts
350
ns
SR
3000
V/s
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
SYMBOL Ov
CONDITIONS VocAC = 100 V (p-p); VocDC = 100 V square wave; f < 1 MHz; tr = tf = 22 ns; see Figs 4 and 5; note 1 f < 50 kHz; note 2 f < 50 kHz; note 2
MIN.
TYP. 9
MAX.
UNIT %
high supply voltage rejection ratio low supply voltage rejection ratio
85 70
dB dB
1. If the difference between VDDL and Vip is less than 7 V, overshoot cannot be specified. 2. SVRR: The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage. Cathode output The cathode output is protected against peak currents (caused by positive voltage peaks during high-resistance flash) of 5 A maximum with a charge content of 100 C. The cathode is also protected against peak currents (caused by positive voltage peaks during low-resistance flash) of 10 A maximum with a charge content of 100 nC. Flashover protection The TDA6111Q incorporates protection diodes against CRT flashover discharges that clamp the cathode output pin to the VDDH pin. The DC supply voltage at the VDDH pin has to be within the operating range of 180 to 210 V to ensure that the Absolute Maximum Rating for VDDH of 250 V will not be exceeded during flashover. To limit the diode current, an external 680 carbon high-voltage resistor in series with the cathode output and a 2 kV spark gap are needed (for this resistor-value, the CRT has to be connected to the main PCB). This addition produces an increase in the rise and fall times of approximately 5 ns and a decrease in the overshoot of approximately 4%. VDDH to GND must be decoupled: 1. With a capacitor >20 nF with good HF behaviour (e.g. foil). This capacitance must be placed as close as possible to pins 6 and 4, but definitely within 5 mm. 2. With a capacitor >10 F on the picture tube base print (common for three output stages). VDDL to GND must be decoupled: 1. With a capacitor >20 nF with good HF behaviour (e.g. ceramic). This capacitance must be placed as close as possible to pins 2 and 4, but definitely within 10 mm. Switch-off behaviour The switch-off behaviour of the TDA6111Q is defined: when the bias current becomes zero, at VDDL (pin 2) lower than approximately 5 V, all the output pins (pins 7, 8 and 9) will be high.
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
12 V C1 22 nF C3 3.9 pF C par C5 22 nF
200 V C6 100 nF
Vi C2 22 F R9 820 3 R1 50 1.4 mA 1
R10 68.1 k 9
C4 10 F
C7 10 F 2 6
TDA6111Q
4 5 8
7 Cn 560 pF
C8 6.8 pF
R3 20 M probe R2 1 M
MGA059 - 1
C9 136 pF
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
x Vi
0 t
Voc
100
60 50
t tr t pd
MGA974
Fig.4 Output voltage (pin 8) rising edge as a function of the AC input signal.
1995 Feb 07
Philips Semiconductors
Preliminary specication
TDA6111Q
x Vi
0 t
x ts
Fig.5 Output voltage (pins 8) falling edge as a function of the AC input signal.
1995 Feb 07
10
Philips Semiconductors
Preliminary specication
TDA6111Q
Pdyn = VDDH (CL + Cfb + Cint) fi Vo(p-p) CL = load capacitance. Cfb = feedback capacitance ( 150 fF). Cint = internal load capacitance ( 4 pF). fi = input frequency. Vo(p-p) = output voltage (peak-to-peak value). = non-blanking duty-cycle ( 0.8). With CL = 10 pF, Cfb = 0, Cint = 4 pF, fi = 8 MHz (simulation of worst-case noise), Vo(p-p) = 100 V and = 80% then Pdyn = 1.8 W The IC must be mounted on the picture tube base print to minimize the load capacitance (CL). The total power dissipation, Ptot = Pstat + Pdyn thus amounts to 3.6 W under given conditions. From Tj = Tamb + Ptot Rth j-a < Tj(max) = 150 C, Rth j-a of the package and heatsink together must be < 24 K/W.
1995 Feb 07
11
Philips Semiconductors
Preliminary specication
TDA6111Q
SOT111-1
D1 q P P1 Q A2
A3 q1 q2
L 1 Z b2 e b b1 w M 9
e2
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 18.5 17.8 A2 A3 max. 3.7 8.7 8.0 A4 b b1 b2 c D (1) D1 E (1) e e2 L 3.9 3.4 P 2.75 2.50 P1 3.4 3.2 Q q q1 4.4 4.2 q2 5.9 5.7 w 0.25 Z (1) max. 1.0
65o 55o
15.5 1.40 0.67 1.40 0.48 21.8 21.4 6.48 2.54 2.54 15.1 1.14 0.50 1.14 0.38 21.4 20.7 6.20
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT111-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
1995 Feb 07
12
Philips Semiconductors
Preliminary specication
TDA6111Q
Apply the soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 C, it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s.
This data sheet contains target or goal specications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains nal product specications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specication is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specication. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1995 Feb 07
13
Philips Semiconductors
Preliminary specication
TDA6111Q
1995 Feb 07
14
Philips Semiconductors
Preliminary specication
TDA6111Q
1995 Feb 07
15
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Philips Semiconductors
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