Analog Centric Mixed-signal Verification

Zhong Fan Engineering Director, Cadence Technology on Tour, Singapore July 25, 2013

Spectre Simulation Solution

One Solution Addressing Various Applications

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Uncompromised accuracy and scalable multi-core performance Production proven use model across all Spectre technology Integrated Mixed Signal Verification Common infrastructure and data base Integrated into Cadence application products
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Spectre Platform
Common Infrastructure
RC Reduction EM/IR Analysis Circuit Checks Multi-Core Support (not current focus)

SPICE Netlist

FastSPICE Core Engine

Event-Driven Multi-Rate

Partitioning

Partitioned Solve

RF SPICESpectre/APS RF Core Engine SPICE Engine Core Engine Core Engine

Unified Waveform Interface (UWI)

FastSPICE Core Engine

Simulation Front-End (SFE)

Waveform database

Spectre Netlist

Table Model

Measurement

DSPF/SPEF Common Model Interface (CMI VerilogA Engine

SPICE Model

Spectre Model

Proprietary Model

VerilogA Model

VerilogA Behavioral Model

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Manage and explore your design

Multi-test environment with multi-mode simulation

Use ADE to setup multiple testbenches and then to launch in-memory simulation for stellar performance across a variety of analyses

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Manage and document IP for Reuse

Use ADE to capture all of your waveforms, measurements and reports

Test Names
OpenLoopTest:2 OpenLoopTest:4 OpenLoopTest:4 OpenLoopTest:4 Closed_Loop_Test:1 Closed_Loop_Test:1 Closed_Loop_Test:1 Closed_Loop_Test:1 Closed_Loop_Test:1 CMRR_Test:1

Corner Temperature Specification

DC_Offset Max Mag GBP 3dB Max Mag GBP 3dB GainMargin PhaseMargin CMRR

Typ 27 C3TT
6.39 17,310 785,000 45.25 15.98 774,500 48,350 -39.99 90.49 136.10

Min 0 C137
-0.07 19,960 858,300 42.90 15.99 835,200 52,120 -38.34 90.25 216.20

Max 100 C214

-8.35 22,120 960,900 43.32 15.99 905,500 56,490 -40.55 90.09 305.40

Over all PVT runs OverAllMin

-0.06 17,310 785,000 42.90 15.98 774,500 47,350 -38.34 90.09 136.10

OverAllMax
9.10 24,150 990,300 45.25 15.99 925,500 57,790 -36.55 90.61 305.40

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Flexible simulation using AMS Designer

Unifying analog and digital engines ! AMS Designer is a single kernel mixed-signal simulator
! Flexible Use Model ( GUI / Command-line ) ! Choice of Analog solvers ( Spectre / Ultrasim / APS ) ! Configurable Interface Elements

AMS Designer
AMS-Ultra & AMS-Spectre AMS-APS

AMS-Analog Design Environment (Virtuoso GUI integration)

!AMS in Analog Design Environment !(OSS->UNL+irun)

AMS-irun (AIUM) (Incisive batch mode regression)

irun + amsd block

IC & IUS
6 2013 Cadence Design Systems, Inc. All rights reserved. Cadence Confidential

IUS only

2013 Cadence Design Systems, Inc. All rights reserved.

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