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NTD4969N Power MOSFET

30 V, 41 A, Single NChannel, DPAK/IPAK


Features

Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Three Package Variations for Design Flexibility These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant

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V(BR)DSS 30 V RDS(ON) MAX 9.0 mW @ 10 V 19 mW @ 4.5 V D ID MAX 41 A

Applications

CPU Power Delivery DCDC Converters


MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter DraintoSource Voltage GatetoSource Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 100C TA = 25C TA = 25C TA = 100C TA = 25C TC = 25C TC = 100C TC = 25C TA = 25C TA = 25C PD IDM IDmaxPkg TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 12.7 9.0 2.56 9.4 6.6 1.38 41 29 26.3 150 40 55 to +175 24 6.0 18 W A A C A V/ns mJ W A W A 1 2 3 4 Unit V V A G

S NCHANNEL MOSFET 4 4

CASE 369AA DPAK (Bent Lead) STYLE 2

2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK)

2 3

MARKING DIAGRAMS & PIN ASSIGNMENTS


4 Drain YWW 49 69NG 4 Drain YWW 49 69NG 4 Drain YWW 49 69NG

Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt

Single Pulse DraintoSource Avalanche Energy (TJ = 25C, VDD = 24 V, VGS = 10 V, IL = 19 Apk, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)

TL

260

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surfacemounted on FR4 board using 1 sqin pad, 1 oz Cu. 2. Surfacemounted on FR4 board using the minimum recommended pad size.

2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4969N G = Year = Work Week = Device Code = PbFree Package

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.

Semiconductor Components Industries, LLC, 2011

April, 2011 Rev. 1

Publication Order Number: NTD4969N/D

NTD4969N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter JunctiontoCase (Drain) JunctiontoTAB (Drain) JunctiontoAmbient Steady State (Note 3) JunctiontoAmbient Steady State (Note 4) 3. Surfacemounted on FR4 board using 1 sqin pad, 1 oz Cu. 4. Surfacemounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJCTAB RqJA RqJA Value 5.7 4.3 58.6 108.6 Unit C/W

ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)


Parameter OFF CHARACTERISTICS DraintoSource Breakdown Voltage DraintoSource Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 10 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V, ID = 30 A VGS = 0 V, f = 1.0 MHz, VDS = 15 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 30 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge GatetoSource Charge GatetoDrain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) TurnOn Delay Time Rise Time TurnOff Delay Time Fall Time 10 27 13.3 6.4 ns 837 347 180 9.0 1.42 2.8 4.8 16.5 nC nC pF VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 17 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit

GatetoSource Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient DraintoSource On Resistance

VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.5 1.8 4.5 6.9 6.9 13.6 13.2 36

2.5

V mV/C

9.0 mW

19

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils.

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NTD4969N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 6) TurnOn Delay Time Rise Time TurnOff Delay Time Fall Time DRAINSOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.91 0.82 20.8 9.8 11 8.0 nC ns 1.1 V td(ON) tr td(OFF) tf VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 6.5 20.2 17.2 4.2 ns Symbol Test Condition Min Typ Max Unit

Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance (Note 7) Drain Inductance, DPAK Drain Inductance, IPAK (Note 7) Gate Inductance (Note 7) Gate Resistance

2.85 0.0164 1.88 4.9 1.0 2.2

nH

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils.

ORDERING INFORMATION
Device NTD4969NT4G NTD4969N1G NTD4969N35G Package DPAK (PbFree) IPAK (PbFree) IPAK Trimmed Lead (PbFree) Shipping 2500 / Tape & Reel 75 Units / Rail 75 Units / Rail

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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NTD4969N
TYPICAL PERFORMANCE CURVES
70 60 ID, DRAIN CURRENT (A) 50 40 30 20 10 0 0 1 2 3 4 3.0 V 2.6 V 5 3.4 V TJ = 25C 3.8 V 70 VGS = 4.2 V ID, DRAIN CURRENT (A) 60 50 40 30 20 10 0 1 TJ = 25C VDS = 10 V

10 V thru 4.5 V

TJ = 125C 2

TJ = 55C 3 4 5

VDS, DRAINTOSOURCE VOLTAGE (V)

VGS, GATETOSOURCE VOLTAGE (V)

Figure 1. OnRegion Characteristics


RDS(on), DRAINTOSOURCE RESISTANCE (mW) 0.019 0.018 0.017 0.016 0.015 0.014 0.013 0.012 0.011 0.010 0.009 0.008 0.007 0.006 0.005 3.0 4.0 5.0 6.0 7.0 8.0 RDS(on), DRAINTOSOURCE RESISTANCE (mW) 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4

Figure 2. Transfer Characteristics

ID = 30 A TJ = 25C

TJ = 25C VGS = 4.5 V

VGS = 10 V

9.0

10.0

10

20

30

40

50

60

70

VGS, GATETOSOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

Figure 3. OnResistance vs. GatetoSource Voltage


RDS(on), DRAINTOSOURCE RESISTANCE (NORMALIZED) 1.7 ID = 30 A VGS = 10 V 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 50 25 0 25 50 75 100 125 150 175 10 1.8 10000

Figure 4. OnResistance vs. Drain Current and Gate Voltage

TJ = 150C IDSS, LEAKAGE (nA) 1000 TJ = 125C

100

TJ = 85C

VGS = 0 V 5 10 15 20 25 30

TJ, JUNCTION TEMPERATURE (C)

VDS, DRAINTOSOURCE VOLTAGE (V)

Figure 5. OnResistance Variation with Temperature

Figure 6. DraintoSource Leakage Current vs. Voltage

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NTD4969N
TYPICAL PERFORMANCE CURVES
1200 1100 1000 C, CAPACITANCE (pF) 900 800 700 600 500 400 300 200 100 0 0 5 Crss 10 15 20 25 30 Coss Ciss TJ = 25C VGS = 0 V 10 9 8 7 6 5 4 3 2 1 0 Qgs Qgd ID = 30 A TJ = 25C VDD = 15 V VGS = 10 A 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 QG, TOTAL GATE CHARGE (nC)

VGS, GATETOSOURCE VOLTAGE (V)

QT

VDS, DRAINTOSOURCE VOLTAGE (V)

Figure 7. Capacitance Variation

Figure 8. GatetoSource and DraintoSource Voltage vs. Total Charge


30 IS, SOURCE CURRENT (A)

1000 VDD = 15 V ID = 15 A VGS = 10 V t, TIME (ns) 100 tf td(off) tr

VGS = 0 V 25 20 15 10 5 0 0.4 TJ = 125C TJ = 25C

10

td(on)

10 RG, GATE RESISTANCE (W)

100

0.5

0.6

0.7

0.8

0.9

1.0

VSD, SOURCETODRAIN VOLTAGE (V)

Figure 9. Resistive Switching Time Variation vs. Gate Resistance


EAS, SINGLE PULSE DRAINTOSOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (A) 100 10 ms 10 1 0.1 0.01 0.01 0 V < VGS < 10 V Single Pulse TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 VDS, DRAINTOSOURCE VOLTAGE (V) 100 ms 1 ms 10 ms

Figure 10. Diode Forward Voltage vs. Current

dc

100

19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 25

ID = 19 A

50

75

100

125

150

175

TJ, STARTING JUNCTION TEMPERATURE (C)

Figure 11. Maximum Rated Forward Biased Safe Operating Area

Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature

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NTD4969N
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE) CASE 369AA01 ISSUE B
C A B c2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 0.040 0.155 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 1.01 3.93

E b3 L3
1 4

D
2 3

Z
DETAIL A

L4

b2 e

b 0.005 (0.13)
M

c C L2
GAUGE PLANE

H C L L1 DETAIL A
SEATING PLANE

A1

ROTATED 90 5 CW

SOLDERING FOOTPRINT*
6.20 0.244 3.00 0.118

STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN

2.58 0.102

5.80 0.228

1.60 0.063

6.17 0.243

SCALE 3:1

mm inches

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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NTD4969N
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD CASE 369AC01 ISSUE O
B V R C E

NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. DIM A B C D E F G H J K R V W INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25

A
SEATING PLANE

W F G

K J D H
3 PL

0.13 (0.005) W

IPAK CASE 369D01 ISSUE C


B V R
4

C E Z

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93

S T
SEATING PLANE

A
1 2 3

F D G
3 PL

H
M

0.13 (0.005)

STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD4969N/D