Sunteți pe pagina 1din 381

Colour Television

Chassis

Q552.1E
LA

18770_000_100210.eps
100210

Contents

Page

1.
2.
3.
4.
5.
6.
7.
8.
9.

Revision List
2
Technical Specifications, Diversity, and Connections2
Precautions, Notes, and Abbreviation List
11
Mechanical Instructions
15
Service Modes, Error Codes, and Fault Finding 35
Alignments
54
Circuit Descriptions
62
IC Data Sheets
75
Block Diagrams
Wiring diagram Rembrandt 32"
93
Wiring diagram Rembrandt 37" - 42"
94
Wiring diagram Van Gogh 32" - 52"
95
Wiring diagram Matisse 32" - 37"
96
Wiring Matisse 40" - 46"
97
Block Diagram Video
98
Block Diagram Audio
99
Block Diagram Control & Clock Signals
100
Block Diagram I2C
101
Supply Lines Overview
102
10. Circuit Diagrams and PWB Layouts
Drawing PWB
103103
A01 272217100965 PSU
A01 272217100966 PSU
104104
AL1 820400089786 AmbiLight Common
105112
AL2 820400089773 3 LED LiteOn
107112
AL2 820400089691 9 LED LiteOn
108112
AL2 820400089703 15 LED LiteOn
110112
AL1 820400090592 AmbiLight Common
113120
AL2 820400090611 3 LED Everlight
115120
AL2 820400090601 9 LED Everlight
116120
AL2 820400090621 15 LED Everlight
118120
B01 820400089943 Tuner, HDMI & CI
121
B02 820400089505 PNX85500
154
B03 820400089514 CLASS D
181
B04 820400089524 Analog I/O
205
B05 820400089535 DDR
220
B06 820400089572 LVDS Non DVBS
222
B07 820400089604 DVBS FE
234
B08 820400089624 DVBS Supply
236
Published by ER/TY 1361 TV Quality, the Netherlands

Contents

Page

B09 820400089822 DVBS Con.


B11 820400090693 TCON LGD
B13 820400090731 TCON AL CPLD
B14 820400090713 TCON SHARP
SRP List Explanation
310431363643 SSB Layout
310431363644 SSB Layout
310431363723 SSB Layout
310431363724 SSB Layout
310431364003 SSB Layout
310431364004 SSB Layout
310431364005 SSB Layout
310431364014 SSB Layout
310431364015 SSB Layout
310431364016 SSB Layout
310431364025 SSB Layout
310431364026 SSB Layout
310431364027 SSB Layout
310431364053 SSB Layout
310431364054 SSB Layout
310431364055 SSB Layout
310431364064 SSB Layout
310431364065 SSB Layout
310431364066 SSB Layout
310431364173 SSB Layout
310431364174 SSB Layout
11. Styling Sheets
Rembrandt 32"
Rembrandt 37" & 42"
Van Gogh 32" - 52"
Matisse 32" - 46"

239
240
264
269
293
294
298
302
306
310
314
318
322
326
330
334
338
342
346
350
354
358
362
366
370
374

Subject to modification

378
379
380
381

EN 3122 785 18778


2013-Jan-29

2013 TP Vision Netherlands B.V.


All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS Shield Emblem are used under license from Koninklijke Philips Electronics N.V.

EN 2

1.

Revision List

Q552.1E LA

1. Revision List
Manual xxxx xxx xxxx.0
First release.

310431364174, and 310431364066, including (where


applicable) new schematics.

Manual xxxx xxx xxxx.1


All chapters: Textual and graphical updates.
Chapter 2: Table 2-1 updated (added CTNs).
Chapter 3 and 4: Index hyperlinks recovered.
Chapter 4: packing instructions Yong panel (Rembrandt
styling) added.
Chapter 5: Figure 5-11 updated for TV550.
Chapter 6: Alignment values added.
Chapter 10: SRP list added.

Manual xxxx xxx xxxx.4


Chapter 2: Table 2-1 updated (added CTNs).
Chapter 4: Added specific mechanical information; see
section Additional instructions for 32PFL3x05H/12.
Chapter 6: New alignment values added.
Manual xxxx xxx xxxx.5
Chapter 6: Updated alignment values for 42" Matisse sets;
see Table 6-12.
Chapter 6: Alignment values for 52"van Gogh sets added;
see Table 6-15.

Manual xxxx xxx xxxx.2


Chapter 2: Table 2-1 updated (added CTNs with Italian
region; **PFL****M/08, MHEG).
Chapter 5: Paragraph 5.8.6 Exit Factory Mode updated.
Chapter 6: New alignment values added.
Chapter 10: New PWB layouts: 310431364004,
310431364054, 310431364173, and 310431364065,
including (where applicable) new schematics.

Manual xxxx xxx xxxx.6


Chapter 2: Table 2-1 updated (added CTNs).
Manual xxxx xxx xxxx.7
Chapter 2: Table 2-1 updated (added CTNs).
Chapter 5: added Software Upgrade Failure debug
instructions, see Trouble Shooting - Software Upgrade
Failure.

Manual xxxx xxx xxxx.3


Chapter 2: Table 2-1 updated (added CTNs).
Chapter 6: New alignment values added.
Chapter 10: New PWB layouts: 310431363644,
310431363724, 310431364005, 310431364016,
310431364026, 310431364027, 310431364055,

Manual xxxx xxx xxxx.8


Chapter 10: added Power Supply Unit diagrams, see 10.1
A01 272217100965 PSU and 10.2 A01 272217100966
PSU.

2. Technical Specifications, Diversity, and Connections

Index of this chapter:


2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview

2.1

Specifications are indicative (subject to change).

Technical Specifications
For on-line product support please use the CTN links in Table
2-1. Here is product information available, as well as getting
started, user manuals, frequently asked questions and
software & drivers.

Notes:
Figures can deviate due to the different set executions.
Table 2-1 Described Model Numbers and Diversity
10

CTN

Styling

32PFL3705H/12

Rembrandt 64025 2.3 4-1 4.5 4.5.9 7.2 7.4.1 11.1


64026 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-1 4.5 4.5.9 7.2 7.4.1 11.1


64026 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-1 4.5 4.5.9 7.2 7.4.1 11.1


64026 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.22 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-1 4.5 4.5.9 7.2 7.4.1 11.1


64026 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.24 10.26 -

10.35 10.41 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-1 4.5 4.5.9 7.2 7.4.1 11.1


64026 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.1 10.1 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-1 4.5 4.5.9 7.2 7.4.1 -

7.10 9.1 10.1 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

32PFL3805H/12

32PFL5405H/05

32PFL5405H/12

32PFL5405H/60

2013-Jan-29

back to
div. table

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

Wiring Diagram

Schematics

TCON

AmbiLight

Tuner

PSU

Descriptions

LCD Removal

Mechanics

Assembly Removal

Wire Dressing

Connection Overview

3104 313 xxxxx

SSB

Technical Specifications, Diversity, and Connections

32PFL5605H/12

32PFL5625H/12

32PFL6605H/12

EN 3

10

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64003 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

van Gogh
11.3

64173 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.19 10.23 10.25 -

10.42 10.47

64174 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.20 10.24 10.25 -

10.43 10.47

van Gogh
11.3

64003 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64025 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64026 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Matisse
11.4

32PFL6405H/12

Matisse
11.4

64027 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

32PFL6505H/12

Matisse
11.4

64027 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

32PFL6605H/60

Matisse
11.4

64026 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

64027 2.3 4-11 4.7 4.7.8 7.2 7.4.1 -

7.10 9.4 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

32PFL7605C/051 Matisse
11.4

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.23 10.24 10.25 -

10.38 10.42 -

Matisse
11.4

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

32PFL7605C/121 Matisse
11.4

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

32PFL7605H/05

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.44 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64015 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.30 10.32 -

10.37 10.44 -

64016 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.31 10.32 -

10.40 10.45 -

32PFL7605C/08

32PFL7605H/12

32PFL7605H/60

32PFL7605M/08

32PFL7665H/12

32PFL7665M/08

32PFL7675H/12

32PFL7675K/02

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

Wiring Diagram

Schematics

TCON

AmbiLight

Tuner

PSU

LCD Removal

Descriptions

2.

64003 2.3 4-4 4.6 4.6.8 7.2 7.4.1 -

van Gogh
11.3

32PFL5605M/08

Mechanics

Assembly Removal

van Gogh
11.3

Wire Dressing

Styling

32PFL5605H/05

Connection Overview

CTN

3104 313 xxxxx

SSB

Q552.1E LA

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

back to
div. table

2013-Jan-29

32PFL7685K/02

32PFL7685M/08

32PFL7695H/12

32PFL7695K/02

32PFL7695M/08

37PFL5405H/05

37PFL5405H/12

37PFL5405H/60

37PFL7515H/12

37PFL7605H/05

37PFL7605H/12

37PFL7605H/60

37PFL7605M/08

2013-Jan-29

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

10

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.34 10.42 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64015 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.30 10.32 -

10.37 10.44 -

64016 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.31 10.32 -

10.40 10.45 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64064 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.36 10.42 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

64015 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.30 10.32 -

10.37 10.44 -

64016 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.31 10.32 -

10.40 10.45 -

64065 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.13 10.17 10.19 10.22 10.25 -

10.37 10.42 -

64066 2.3 4-11 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8
10.4 10.9

10.15 10.18 10.21 10.24 10.25 -

10.38 10.42 -

Rembrandt 64025 2.3 4-11 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-11 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-11 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-11 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-11 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-11 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-2 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-2 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-2 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

64064 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.36 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

64064 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.36 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

64064 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.36 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

64064 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.36 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

back to
div. table

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

Wiring Diagram

Schematics

TCON

AmbiLight

Descriptions

Tuner

Mechanics

PSU

Matisse
11.4

LCD Removal

Styling

32PFL7675M/08

Assembly Removal

CTN

3104 313 xxxxx

SSB

32PFL7685H/12

Technical Specifications, Diversity, and Connections

Q552.1E LA

Wire Dressing

2.

Connection Overview

EN 4

Technical Specifications, Diversity, and Connections

37PFL7675K/02

40PFL5605H/05

40PFL5605H/12

40PFL5605K/02

40PFL5605M/08
40PFL5625H/12

40PFL5705H/12

40PFL5805H/12

2.

EN 5

10

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

TCON

Wiring Diagram

Schematics

AmbiLight

Tuner

PSU

Descriptions

LCD Removal

Mechanics

Assembly Removal

Matisse
11.4

Wire Dressing

Styling

37PFL7675H/12

Connection Overview

CTN

3104 313 xxxxx

SSB

Q552.1E LA

64064 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.36 10.42 -

64065 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.37 10.42 -

64066 2.3 4-12 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.38 10.42 -

64014 2.3 4-13 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.30 10.32 -

10.39 10.44 -

64015 2.3 4-13 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.5 10.10

10.30 10.32 -

10.37 10.44 -

64016 2.3 4-13 4.7 4.7.8 7.2 7.4.1 7.9 7.10 9.4 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.5 10.10

10.31 10.32 -

10.40 10.45 -

64003 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64003 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64053 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.17 10.19 10.22 10.25 -

10.30 10.32 -

10.44 10.48

64054 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.20 10.23 10.25 -

10.31 10.32 -

10.44 10.49

64055 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.21 10.24 10.25 -

10.31 10.32 -

10.45 10.49

van Gogh
11.3

64173 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.19 10.23 10.25 -

10.42 10.47

64174 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.20 10.24 10.25 -

10.43 10.47

van Gogh
11.3

64003 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-5 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64003 2.3 4-6 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-6 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-6 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64003 2.3 4-7 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.13 10.16 10.19 10.22 10.26 10.5 10.10

10.41 10.46

64004 2.3 4-7 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.14 10.16 10.20 10.23 10.26 10.5 10.10

10.41 10.47

64005 2.3 4-7 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.15 10.18 10.20 10.24 10.26 10.5 10.10

10.43 10.47

Matisse
11.4

van Gogh
11.3

van Gogh
11.3

van Gogh
11.3

van Gogh
11.3

van Gogh
11.3

40PFL6405H/12

Matisse
11.4

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.15 10.18 10.21 10.24 10.25 10.28 -

10.33 -

40PFL6505H/12

Matisse
11.4

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.15 10.18 10.21 10.24 10.25 10.28 -

10.33 -

40PFL6605H/12

Matisse
11.4

63643 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.13 10.17 10.19 10.22 10.25 10.27 -

10.33 -

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.15 10.18 10.21 10.24 10.25 10.28 -

10.33 -

40PFL6605H/60

Matisse
11.4

64173 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.14 10.17 10.19 10.23 10.25 -

10.42 10.47

64174 2.3 4-14 4.7 4.7.8 7.2 7.4.1 -

9.5 -

10.14 10.17 10.20 10.24 10.25 -

10.43 10.47

40PFL7605H/05

Matisse
11.4

63643 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-14 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

40PFL7605H/12

40PFL7605H/60

40PFL7605M/08

42PFL5405H/05

42PFL5405H/12

42PFL5405H/60

Matisse
11.4

Matisse
11.4

Matisse
11.4

Rembrandt 64025 2.3 4-3 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-3 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

Rembrandt 64025 2.3 4-3 4.5 4.5.9 7.2 7.4.1 11.2


64026 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.35 10.41 -

7.10 9.2 10.2 -

10.13 10.16 10.19 10.22 10.26 -

10.37 10.41 -

64027 2.3 4-3 4.5 4.5.9 7.2 7.4.1 -

7.10 9.2 10.2 -

10.15 10.18 10.21 10.24 10.26 -

10.38 10.43 -

back to
div. table

2013-Jan-29

10

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

TCON

Wiring Diagram

Schematics

AmbiLight

Descriptions

Tuner

Mechanics

PSU

LCD Removal

Assembly Removal

Styling

3104 313 xxxxx

SSB

CTN

Technical Specifications, Diversity, and Connections

Q552.1E LA

Wire Dressing

2.

Connection Overview

EN 6

42PFL7605C/051 Matisse
11.4

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

42PFL7605C/081

Matisse
11.4

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

42PFL7605C/121 Matisse
11.4

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

42PFL7655H/12

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63723 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.5 10.10

63724 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.5 10.10

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63723 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.5 10.10

63724 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.5 10.10

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63723 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.5 10.10

63724 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.5 10.10

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

63723 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.5 10.10

63724 2.3 4-16 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.5 10.10

63643 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.13 10.17 10.19 10.22 10.25 10.27 10.5 10.10

10.33 -

63644 2.3 4-15 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.5 10.10

10.33 -

42PFL7655K/02

42PFL7655M/08

42PFL7665H/12

42PFL7665M/08

42PFL7675H/12

42PFL7675K/02

42PFL7675M/08

42PFL7685H/12

42PFL7685K/02

42PFL7685M/08

42PFL7695H/12

42PFL7695K/02

42PFL7695M/08

46PFL5605H/05

46PFL5605H/12

46PFL5605M/08

2013-Jan-29

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

van Gogh
11.3

van Gogh
11.3

van Gogh
11.3

64003 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64003 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64173 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.19 10.23 10.25 -

10.42 10.47

64174 2.3 4-8 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.20 10.24 10.25 -

10.43 10.47

back to
div. table

Technical Specifications, Diversity, and Connections

46PFL7605H/05

46PFL7605H/12

46PFL7605H/60

46PFL7605M/08

46PFL7655H/12

46PFL7655K/02

46PFL7655M/08

46PFL7665H/12

46PFL7695H/12

46PFL7695K/02

46PFL7695M/08

52PFL5605H/12

52PFL5605M/08

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

Matisse
11.4

van Gogh
11.3

van Gogh
11.3

2.

EN 7

10

B14 (TCON-SHP)

B13 (TCON AL CPLD)

B11 (TCON-LGD)

B09 (non-DVBS-conn.)

B08 (DVBS-Supp.)

B07 (DVBS-FE)

B06 (non-DVBS-LVDS)

B05 (DDR)

B04 (I/O)

B03 (DC/DC / Class D)

B02 (PNX85500)

B01 (Tuner)

ALxx (Ambilight) Everlight

ALxx (Ambilight) LiteOn

A (Power Supply Unit)

TCON

Wiring Diagram

Schematics

AmbiLight

Tuner

PSU

Descriptions

LCD Removal

Mechanics

Assembly Removal

van Gogh
11.3

Wire Dressing

Styling

46PFL5805H/12

Connection Overview

CTN

3104 313 xxxxx

SSB

Q552.1E LA

64003 2.3 4-9 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.13 10.16 10.19 10.22 10.26 10.6 10.11

10.41 10.46

64004 2.3 4-9 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.14 10.16 10.20 10.23 10.26 10.6 10.11

10.41 10.47

64005 2.3 4-9 4.6 4.6.8 7.2 7.4.1 7.9 7.10 9.3 -

10.3 10.8 10.15 10.18 10.20 10.24 10.26 10.6 10.11

10.43 10.47

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63723 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.6 10.11

63724 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.6 10.11

63643 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63643 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.27 10.6 10.11

10.33 -

63644 2.3 4-17 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

63723 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.29 10.30 10.32 10.34 10.6 10.11

63724 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.29 10.31 10.32 10.34 10.6 10.11

63643 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.17 10.19 10.22 10.25 10.29 10.6 10.11

10.33 -

63644 2.3 4-18 4.7 4.7.8 7.2 7.4.1 7.9 -

9.5 -

10.3 10.8 10.15 10.18 10.21 10.24 10.25 10.28 10.6 10.11

10.33 -

64003 2.3 4-10 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.13 10.16 10.19 10.22 10.26 -

10.41 10.46

64004 2.3 4-10 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.16 10.20 10.23 10.26 -

10.41 10.47

64005 2.3 4-10 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.15 10.18 10.20 10.24 10.26 -

10.43 10.47

64173 2.3 4-10 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.19 10.23 10.25 -

10.38 10.47

64174 2.3 4-10 4.6 4.6.8 7.2 7.4.1 -

7.10 9.3 -

10.14 10.17 10.20 10.24 10.25 -

10.43 10.47

Notes:
1.) xxPFLxxxxC/xx - sets have a customised finishing. When
ordering a front cabinet, back cover, stand, or remote control,
specify the additional 4-digit Customiser Code -code that is
present on an additional product label on the set.
Not all (circuit-) descriptions and (block-) schematics in this
Service Manual apply to all sets. Use the hyperlinks in above
table to lead you through this manual.

2.2

Directions for Use


You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
back to
div. table

2013-Jan-29

EN 8
2.3

2.

Technical Specifications, Diversity, and Connections

Q552.1E LA

Connections

17
5

3
10

11

12

12

13

14

15

16

18771_001_100429.eps
100429

Figure 2-1 Connection overview


Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.1

5
6
7
8
9
10
11
12
13
14

Side Connections
1 - SD-Card: Secure Digital Card - In/Out (optional)
14
GND
WP

12

GND

11

CD

10

DAT1/IRQ

DAT0/D0

GND2

CLOCK

VDD

GND1

CMD/DI

DAT3/CS

DAT2/NC

2013-Jan-29

10000_022_090121.eps
090121

Figure 2-3 USB (type A)


1
2
3
4

Figure 2-2 SD-Card connector


Signal
Signal
Gnd
Supply

jk

3 - USB2.0

10000_049_100210.eps
100210

- DAT3/CS
- CMD/DI
- GND1
- Vdd

k
H
jk
jk
jk
j
H
j
H
H

Signal
Gnd
Signal
Signal
Signal
Signal
Gnd
Signal
Gnd
Gnd

2 - Common Interface
68p - See diagram B01F HDMI & CI

GND
13

1
2
3
4

- CLOCK
- GND2
- DAT0/D0
- DAT1/IRQ
- DAT2/NC
- CD
- GND
- WP
- GND
- GND

jk
k
H
k
back to
div. table

- +5V
- Data (-)
- Data (+)
- Ground

Gnd

k
jk
jk
H

Technical Specifications, Diversity, and Connections


4 - HDMI: Digital Video, Digital Audio - In
19
18

14 - Ground P50
15 - Video Red
16 - Status/FBL

1
2

10000_017_090121.eps
090428

17
18
19
20
21

Figure 2-4 HDMI (type A) connector


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
2.3.2

- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- Easylink/CEC
- n.c.
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground

Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Control channel

j
H
j
j
H
j
j
H
j
j
H
j
jk

DDC clock
DDC data
Gnd

j
jk
H
j
j
H

Hot Plug Detect


Gnd

Q552.1E LA

2.

Gnd
0.7 VPP / 75 ohm
0 - 0.4 V: INT
1 - 3 V: EXT / 75 ohm
Gnd
Gnd
1 VPP / 75 ohm
1 VPP / 75 ohm
Gnd

- Ground Video
- Ground FBL
- Video CVBS/Y
- Video CVBS
- Shield

7 - Service Connector (UART)


1 - Ground
Gnd
2 - UART_TX
Transmit
3 - UART_RX
Receive

2.3.3

EN 9
H
j
j
H
H
k
j
H

H
k
j

8 - EXT3: Cinch: Video YPbPr - In, Audio - In


Gn - Video Y
1 VPP / 75 ohm
Bu - Video Pb
0.7 VPP / 75 ohm
Rd - Video Pr
0.7 VPP / 75 ohm
Rd - Audio - R
0.5 VRMS / 10 kohm
Wh - Audio - L
0.5 VRMS / 10 kohm

jq
jq
jq
jq
jq

9 - Head phone (Output)


Bk - Head phone
32 - 600 ohm / 10 mW

ot

Rear Connections - Bottom


10 - EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out
See 6 - EXT2: Video RGB - In, CVBS - In/Out, Audio - In/Out

Rear Connections

11 - Cinch: S/PDIF - Out


Bk - Coaxial
0.4 - 0.6VPP / 75 ohm

5 - RJ45: Ethernet (optional)

kq

12 - HDMI 2 (& 3 optional): Digital Video, Digital Audio - In


See 4 - HDMI: Digital Video, Digital Audio - In
10000_025_090121.eps
120320

13 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/


Out

Figure 2-5 Ethernet connector


1
2
3
4
5
6
7
8

- TD+
- TD- RD+
- CT
- CT
- RD- GND
- GND

19
18

k
k
j

Transmit signal
Transmit signal
Receive signal
Centre Tap: DC level fixation
Centre Tap: DC level fixation
Receive signal
Gnd
Gnd

10000_017_090121.eps
090428

Figure 2-7 HDMI (type A) connector


j
H
H

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

6 - EXT2: Video RGB - In, CVBS - In/Out, Audio - In/Out


20

21

10000_001_090121.eps
090121

Figure 2-6 SCART connector


1
2
3
4
5
6
7
8

9
10
11
12
13

- Audio R
- Audio R
- Audio L
- Ground Audio
- Ground Blue
- Audio L
- Video Blue
- Function Select

- Ground Green
- n.c.
- Video Green
- n.c.
- Ground Red

0.5 VRMS / 1 kohm


0.5 VRMS / 10 kohm
0.5 VRMS / 1 kohm
Gnd
Gnd
0.5 VRMS / 10 kohm
0.7 VPP / 75 ohm
0 - 2 V: INT
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3
Gnd
0.7 VPP / 75 ohm
Gnd

1
2

k
j
k
H
H
j
jk

- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- Easylink/CEC
- ARC
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground

Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Control channel
Audio Return Channel
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd

14 - Cinch: Audio - In (VGA/DVI)


Rd - Audio R
0.5 VRMS / 10 kohm
Wh - Audio L
0.5 VRMS / 10 kohm

j
H
j

15 - Aerial - In
- - IEC-type (EU)

H
back to
div. table

Coax, 75 ohm

j
H
j
j
H
j
j
H
j
j
H
j
jk
k
j
jk
H
j
j
H

jq
jq

2013-Jan-29

EN 10

2.

Q552.1E LA

Technical Specifications, Diversity, and Connections

16 - VGA: Video RGB - In


1

7
8
9
10
11
12
13
14
15

5
10

15

11

10000_002_090121.eps
090127

Figure 2-8 VGA Connector


1
2
3
4
5
6

2.4

- Video Red
- Video Green
- Video Blue
- n.c.
- Ground
- Ground Red

0.7 VPP / 75 ohm


0.7 VPP / 75 ohm
0.7 VPP / 75 ohm
Gnd
Gnd

j
j
j

Gnd
Gnd
+5 V
Gnd

H
H
j
H

DDC data
0-5V
0-5V
DDC clock

j
j
j
j

17 - SAT - In (optional)
- - F-type
Coax, 75 ohm

H
H

Chassis Overview
Refer to chapter Block Diagrams for PWB/CBA locations.

2013-Jan-29

- Ground Green
- Ground Blue
- +5VDC
- Ground Sync
- n.c.
- DDC_SDA
- H-sync
- V-sync
- DDC_SCL

back to
div. table

Precautions, Notes, and Abbreviation List

Q552.1E LA

3.

EN 11

3. Precautions, Notes, and Abbreviation List


Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List

3.3.2

Schematic Notes

3.1

Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be


returned in its original condition. Pay in particular attention to
the following points:
Route the wire trees correctly and fix them with the
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage.
Check the strain relief of the Mains/AC Power cord for
proper function.
Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the on position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch off the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

3.2

3.3.3

3.3.4

Notes

3.3.1

General

BGA (Ball Grid Array) ICs


Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
Magazine, then go to Repair downloads. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.

3.3.5

Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
To reach a solder-tip temperature of at least 400C.
To stabilize the adjusted temperature at the solder-tip.
To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around
360C - 380C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch off unused equipment or
reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

All ICs and many other semiconductors are susceptible to


electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched on.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

3.3

Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.

Warnings

All resistor values are in ohms, and the value multiplier is


often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
Resistor values with no multiplier may be indicated with
either an E or an R (e.g. 220E or 220R indicates 220 ).
All capacitor values are given in micro-farads ( 10-6),
nano-farads (n 10-9), or pico-farads (p 10-12).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An asterisk (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed on the Philips
Spare Parts Web Portal.

Measure the voltages and waveforms with regard to the


chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

3.3.6

Alternative BOM identification


It should be noted that on the European Service website,
Alternative BOM is referred to as Design variant.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then

back to
div. table

2013-Jan-29

EN 12

3.

Q552.1E LA

Precautions, Notes, and Abbreviation List

result in sets which have the same CTN (Commercial Type


Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number 1
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a 2 (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.

AARA

ACI

ADC
AFC

AGC
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M.
code, digit 4 refers to the Service version change code, digits 5
and 6 refer to the production year, and digits 7 and 8 refer to
production week (in example below it is 2010 week 10 / 2010
week 17). The 6 last digits contain the serial number.

AM
AP
AR
ASF

ATSC

ATV
Auto TV

AV
AVC
AVIP
B/G
BDS
BLR
BTSC

10000_053_110228.eps
110228

B-TXT
C
CEC

Figure 3-1 Serial number (example)


3.3.7

Board Level Repair (BLR) or Component Level Repair


(CLR)

CL
CLR
ComPair
CP
CSM
CTI

If a board is defective, consult your repair procedure to decide


if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
3.3.8

3.4

CVBS

Practical Service Precautions

DAC
DBE

It makes sense to avoid exposure to electrical shock.


While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

DCM

DDC
D/K
DFI
DFU
DMR
DMSD
DNM

Abbreviation List
0/6/12

2013-Jan-29

SCART switch control signal on A/V


board. 0 = loop through (AUX to TV),

back to
div. table

6 = play 16 : 9 format, 12 = play 4 : 3


format
Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
Analogue to Digital Converter
Automatic Frequency Control: control
signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that
controls the video input of the feature
box
Amplitude Modulation
Asia Pacific
Aspect Ratio: 4 by 3 or 16 by 9
Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
Advanced Television Systems
Committee, the digital TV standard in
the USA
See Auto TV
A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
External Audio Video
Audio Video Controller
Audio Video Input Processor
Monochrome TV system. Sound
carrier distance is 5.5 MHz
Business Display Solutions (iTV)
Board-Level Repair
Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
Blue TeleteXT
Centre channel (audio)
Consumer Electronics Control bus:
remote control bus on HDMI
connections
Constant Level: audio output to
connect with an external amplifier
Component Level Repair
Computer aided rePair
Connected Planet / Copy Protection
Customer Service Mode
Color Transient Improvement:
manipulates steepness of chroma
transients
Composite Video Blanking and
Synchronization
Digital to Analogue Converter
Dynamic Bass Enhancement: extra
low frequency amplification
Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
See E-DDC
Monochrome TV system. Sound
carrier distance is 6.5 MHz
Dynamic Frame Insertion
Directions For Use: owner's manual
Digital Media Reader: card reader
Digital Multi Standard Decoding
Digital Natural Motion

Precautions, Notes, and Abbreviation List


DNR
DRAM
DRM
DSP
DST

DTCP

DVB-C
DVB-T
DVD
DVI(-d)
E-DDC

EDID
EEPROM
EMI
EPG
EPLD
EU
EXT
FDS
FDW
FLASH
FM
FPGA
FTV
Gb/s
G-TXT
H
HD
HDD
HDCP

HDMI
HP
I
I 2C
I2D
I2S
IF
IR
IRQ
ITU-656

Digital Noise Reduction: noise


reduction feature of the set
Dynamic RAM
Digital Rights Management
Digital Signal Processing
Dealer Service Tool: special remote
control designed for service
technicians
Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
Digital Video Broadcast - Cable
Digital Video Broadcast - Terrestrial
Digital Versatile Disc
Digital Visual Interface (d= digital only)
Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
Extended Display Identification Data
(VESA standard)
Electrically Erasable and
Programmable Read Only Memory
Electro Magnetic Interference
Electronic Program Guide
Erasable Programmable Logic Device
Europe
EXTernal (source), entering the set by
SCART or by cinches (jacks)
Full Dual Screen (same as FDW)
Full Dual Window (same as FDS)
FLASH memory
Field Memory or Frequency
Modulation
Field-Programmable Gate Array
Flat TeleVision
Giga bits per second
Green TeleteXT
H_sync to the module
High Definition
Hard Disk Drive
High-bandwidth Digital Content
Protection: A key encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a snow vision mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP software key
decoding.
High Definition Multimedia Interface
HeadPhone
Monochrome TV system. Sound
carrier distance is 6.0 MHz
Inter IC bus
Inter IC Data bus
Inter IC Sound bus
Intermediate Frequency
Infra Red
Interrupt Request
The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.

iTV
LS

LATAM
LCD
LED
L/L'

LPL
LS
LVDS
Mbps
M/N
MHEG

MIPS

MOP
MOSFET
MPEG
MPIF
MUTE
MTV
NC
NICAM

NTC
NTSC

NVM
O/C
OSD
OAD

OTC
P50
PAL

PCB
PCM
back to
div. table

Q552.1E LA

3.

EN 13

The SDI signal is self-synchronizing,


uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
Institutional TeleVision; TV sets for
hotels, hospitals etc.
Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
Latin America
Liquid Crystal Display
Light Emitting Diode
Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LG.Philips LCD (supplier)
Loudspeaker
Low Voltage Differential Signalling
Mega bits per second
Monochrome TV system. Sound
carrier distance is 4.5 MHz
Part of a set of international standards
related to the presentation of
multimedia information, standardised
by the Multimedia and Hypermedia
Experts Group. It is commonly used as
a language to describe interactive
television services
Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
Matrix Output Processor
Metal Oxide Silicon Field Effect
Transistor, switching device
Motion Pictures Experts Group
Multi Platform InterFace
MUTE Line
Mainstream TV: TV-mode with
Consumer TV features enabled (iTV)
Not Connected
Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
Negative Temperature Coefficient,
non-linear resistor
National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
Non-Volatile Memory: IC containing
TV related data such as alignments
Open Circuit
On Screen Display
Over the Air Download. Method of
software upgrade via RF transmission.
Upgrade software is broadcasted in
TS with TV channels.
On screen display Teletext and
Control; also called Artistic (SAA5800)
Project 50: communication protocol
between TV and peripherals
Phase Alternating Line. Color system
mainly used in West Europe (colour
carrier = 4.433619 MHz) and South
America (colour carrier
PAL M = 3.575612 MHz and
PAL N = 3.582056 MHz)
Printed Circuit Board (same as PWB)
Pulse Code Modulation
2013-Jan-29

EN 14

3.

PDP
PFC
PIP
PLL

POD

POR
PSDL
PSL
PSLS

PTC
PWB
PWM
QRC
QTNR
QVCP
RAM
RGB

RC
RC5 / RC6
RESET
ROM
RSDS
R-TXT
SAM
S/C
SCART

SCL
SCL-F
SD
SDA
SDA-F
SDI
SDRAM
SECAM

SIF
SMPS
SoC
SOG
SOPS
SPI

S/PDIF
SRAM
SRP
SSB
SSC
STB
STBY
SVGA
SVHS
SW

2013-Jan-29

Q552.1E LA

Precautions, Notes, and Abbreviation List

Plasma Display Panel


Power Factor Corrector (or Preconditioner)
Picture In Picture
Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set)
Power On Reset, signal to reset the uP
Power Supply for Direct view LED
backlight with 2D-dimming
Power Supply with integrated LED
drivers
Power Supply with integrated LED
drivers with added Scanning
functionality
Positive Temperature Coefficient,
non-linear resistor
Printed Wiring Board (same as PCB)
Pulse Width Modulation
Quasi Resonant Converter
Quality Temporal Noise Reduction
Quality Video Composition Processor
Random Access Memory
Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
Remote Control
Signal protocol from the remote
control receiver
RESET signal
Read Only Memory
Reduced Swing Differential Signalling
data interface
Red TeleteXT
Service Alignment Mode
Short Circuit
Syndicat des Constructeurs
d'Appareils Radiorcepteurs et
Tlviseurs
Serial Clock I2C
CLock Signal on Fast I2C bus
Standard Definition
Serial Data I2C
DAta Signal on Fast I2C bus
Serial Digital Interface, see ITU-656
Synchronous DRAM
SEequence Couleur Avec Mmoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
Sound Intermediate Frequency
Switched Mode Power Supply
System on Chip
Sync On Green
Self Oscillating Power Supply
Serial Peripheral Interface bus; a 4wire synchronous serial data link
standard
Sony Philips Digital InterFace
Static RAM
Service Reference Protocol
Small Signal Board
Spread Spectrum Clocking, used to
reduce the effects of EMI
Set Top Box
STand-BY
800 600 (4:3)
Super Video Home System
Software

SWAN
SXGA
TFT
THD
TMDS
TS
TXT
TXT-DW
UI
uP
UXGA
V
VESA
VGA
VL
VSB
WYSIWYR

WXGA
XTAL
XGA
Y
Y/C
YPbPr

YUV

back to
div. table

Spatial temporal Weighted Averaging


Noise reduction
1280 1024
Thin Film Transistor
Total Harmonic Distortion
Transmission Minimized Differential
Signalling
Transport Stream
TeleteXT
Dual Window with TeleteXT
User Interface
Microprocessor
1600 1200 (4:3)
V-sync to the module
Video Electronics Standards
Association
640 480 (4:3)
Variable Level out: processed audio
output toward external amplifier
Vestigial Side Band; modulation
method
What You See Is What You Record:
record selection that follows main
picture and sound
1280 768 (15:9)
Quartz crystal
1024 768 (4:3)
Luminance signal
Luminance (Y) and Chrominance (C)
signal
Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
Component video

Mechanical Instructions

Q552.1E LA

4.

EN 15

4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Rembrandt Styling
4.2 Cable Dressing Van Gogh Styling
4.3 Cable Dressing Matisse Styling
4.4 Service Positions
4.5 Assy/Panel Removal Rembrandt Styling
4.6 Assy/Panel Removal Van Gogh Styling
4.7 Assy/Panel Removal Matisse Styling
4.8 Set Re-assembly

4.1

Notes:
Figures below can deviate slightly from the actual situation,
due to the different set executions.

Cable Dressing Rembrandt Styling

18770_100_100211.eps
100211

Figure 4-1 Cable dressing 32PFL5405H/xx / 32PFL3x05H/12

back to
div. table

2013-Jan-29

EN 16

4.

Q552.1E LA

Mechanical Instructions

18770_101_100211.eps
100216

Figure 4-2 Cable dressing 37PFL5405H/xx

18770_102_100211.eps
100211

Figure 4-3 Cable dressing 42PFL5405H/xx

2013-Jan-29

back to
div. table

Mechanical Instructions
4.2

Q552.1E LA

4.

EN 17

Cable Dressing Van Gogh Styling

18770_103_100211.eps
100211

Figure 4-4 Cable dressing 32PFL5xxxX/xx

18770_105_100211.eps
100216

Figure 4-5 Cable dressing 40PFL5605H/xx without DVB-S

back to
div. table

2013-Jan-29

EN 18

4.

Q552.1E LA

Mechanical Instructions

18770_104_100211.eps
100211

Figure 4-6 Cable dressing 40PFL5605H/xx / 40PFL5705H/xx with DVB-S

18774_102_101103.eps
101103

Figure 4-7 Cable dressing 40PFL5805H/xx with Ambilight

2013-Jan-29

back to
div. table

Mechanical Instructions

Q552.1E LA

4.

EN 19

18771_100_100503.eps
100512

Figure 4-8 Cable dressing 46PFL5605H/xx

18774_103_101103.eps
101103

Figure 4-9 Cable dressing 46PFL5805H/xx with Ambilight

back to
div. table

2013-Jan-29

EN 20

4.

Q552.1E LA

Mechanical Instructions

18771_101_100503.eps
100512

Figure 4-10 Cable dressing 52PFL5605H/xx

2013-Jan-29

back to
div. table

Mechanical Instructions
4.3

Q552.1E LA

4.

EN 21

Cable Dressing Matisse Styling

18770_106_100211.eps
100211

Figure 4-11 Cable dressing 32PFL6xxxX/xx and 32PFL7xxxX/xx

18771_102_100503.eps
100503

Figure 4-12 Cable dressing 37PFL76x5H/xx (non-DVBS)

back to
div. table

2013-Jan-29

EN 22

4.

Q552.1E LA

Mechanical Instructions

18771_103_100503.eps
100503

Figure 4-13 Cable dressing 37PFL76x5K/xx (DVBS)

18770_107_100211.eps
100211

Figure 4-14 Cable dressing 40PFL6xxxX/xx and 40PFL7xxxX/xx

2013-Jan-29

back to
div. table

Mechanical Instructions

Q552.1E LA

4.

EN 23

18771_104_100503.eps
100503

Figure 4-15 Cable dressing 42PFL7xxxH/xx and 42PFL7xxxM/xx (non-DVBS)

18771_105_100503.eps
100503

Figure 4-16 Cable dressing 42PFL7xxxK/xx (DVBS)

back to
div. table

2013-Jan-29

EN 24

4.

Q552.1E LA

Mechanical Instructions

18771_106_100503.eps
100503

Figure 4-17 Cable dressing 46PFL76x5H/xx (non-DVBS)

18771_107_100503.eps
100503

Figure 4-18 Cable dressing 46PFL76x5K/xx (DVBS)

2013-Jan-29

back to
div. table

Mechanical Instructions
4.4

Service Positions

4.

EN 25

The stand and -subframe do not need to be removed for


removing the central subwoofer.
When defective, replace the whole unit.

For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.

4.5

Q552.1E LA

4.5.3

Mains Switch
The mains switch is mounted on the front bezel with one screw.

4.5.4

Assy/Panel Removal Rembrandt Styling

Main Power Supply


Refer to Figure 4-20 and Figure 4-21 for details.

The instructions apply to the 42PFL5405H/xx.

For the 32PFL3x05H/12, additional instructions apply. Refer to


subsection Additional instructions for 32PFL3x05H/12.

2
1

4.5.1

Rear Cover

With the Rembrandt styling, a new concept of housing has


been introduced, having consequences for Service when
opening the set.
Part of the back cover now forms one assy with the LCD
panel and will be swapped together with this panel. For
opening the set, only remove the smaller part of the rear
cover as described below!

2
2

18770_122_100212.eps
100216

Warning: The white round clips on the rear side of the LCD
panel secure the backlight units and should therefore NEVER
be released! Release will destroy the LCD Panel and voids
warranty!
Refer to Figure 4-31 for details.

Figure 4-20 Main Power Supply

Warning: Disconnect the mains power cord before you remove


the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.
Refer to Figure 4-19 for details.

18770_123_100215.eps
100215

Figure 4-21 Main Power Supply - back shielding


1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
When remounting, ensure that the back shielding plate is
positioned correctly.

18770_120_100212.eps
100216

Figure 4-19 Rear cover


1. Remove all screws of the rear cover; the part to be
removed [1] is indicated on Figure 4-19.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
4.5.2

Speakers
Tweeters
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Subwoofer
The central subwoofer is located in the centre of the set, behind
the stand and the -subframe, and is secured by two bosses.
back to
div. table

2013-Jan-29

EN 26
4.5.5

4.

Mechanical Instructions

Q552.1E LA

Small Signal Board (SSB)


Refer to Figure 4-22 and Figure 4-23 for details.

3
3

3
3

2
1

3
3

3
18770_125_100215.eps
100215

Figure 4-23 SSB - back shielding


18770_124_100215.eps
100217

1. Unplug all connectors [1] and [2].


2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit.
When remounting, ensure that the back shielding plate is
positioned correctly.

Figure 4-22 SSB

4.5.6

Front Bezel
Refer to Figure 4-24 for details.

2
2

18770_126_100215.eps
100215

Figure 4-24 Front Bezel


1. Remove the mains switch as described earlier [1].
2. Remove the clamps [2].
3. Remove the screws [3].
The front bezel will now be detached from the set, together with
the IR & LED- and Keyboard Control Panel.

2013-Jan-29

back to
div. table

Mechanical Instructions
4.5.7

Q552.1E LA

4.

EN 27

IR & LED Board


Refer to Figure 4-25 for details.

18770_127_100215.eps
100215

Figure 4-25 IR & LED board


18774_101_101103.eps
101103

1. Detach the front bezel from the set as described earlier.


2. Release the clips [1] that secure the IR & LED board in the
bezel and take the board out.
3. Unplug the connectors.
When defective, replace the whole unit.

Figure 4-27 Re-taping IR/LED module -2Two tapes (a horizontal and a vertical oriented one) should be
placed correctly as described below.
1. Paste the horizontal tape first. Press only on the
indicated area as highlighted in red [1]!
2. Paste the vertical tape.
3. Secure the vertical tape by folding it over the IR cable [2].

Additional instructions for 32PFL3x05H/12


32PFL3x05H/12 sets come with a Rembrandt styling but
without bottom flare.
Special attention is needed when remounting the set after an
IR/LED board swap.
Refer to Figure 4-26 and Figure 4-27 for details.

After the back cover has been re-assembled, the 2 white


connectors should not be visible through the bottom gap.
4.5.8

Keyboard Control Board


Refer to Figure 4-28 for details.

1
18850_104_100203.eps
100203

Figure 4-28 Keyboard Control board

18774_100_101103.eps
101103

1. Detach the front bezel from the set as described earlier.


2. Unplug the connector [1].
3. Release the clips that secure the board [2] and take the
board out.
When defective, replace the whole unit.

Figure 4-26 Re-taping IR/LED module -1-

back to
div. table

2013-Jan-29

EN 28
4.5.9

4.

Mechanical Instructions

Q552.1E LA

LCD Panel
Refer to Figure 4-29 and Figure 4-31 for details.

2
18770_128_100215.eps
100215

Figure 4-29 LCD board -1-

18930_107_100315.eps
100315

Figure 4-30 Vesa spacer


1.
2.
3.
4.
5.

Remove the SSB as described earlier.


Remove the PSU as described earlier.
Remove the stand support plate as described earlier.
Remove the bezel as described earlier.
Remove the Vesa spacer as shown in Figure 4-30 by using
a 10 mm wrench. Note that it has been secured with
Loctite 2440.
6. Lift the LCD Panel from the bezel.

2013-Jan-29

back to
div. table

Mechanical Instructions

Q552.1E LA

4.

EN 29

Do NOT release white clips !

18770_121_100212.eps
100407

Figure 4-31 LCD board -2Warning!


The white clips on the rear side of the LCD Panel secure
the backlight units and should NEVER be released!
Refer to Figure 4-31 for details.
1. Remove the tweeters as described earlier.
2. Remove the central subwoofer as described earlier.
3. Remove the mains switch as described earlier.
4. Remove the Main Power Supply board as described
earlier, together with its back shielding.
5. Remove the Small Signal Board as described earlier,
together with its back shielding.
6. Remove the cable from the clamp [1].
7. Remove the stand [2] together with its subframe [3].
8. Detach the front bezel together with the IR & LED board
and Keyboard Control board as described earlier.
9. Ensure all (sub-) frames, boards and cables that do not
belong to the LCD panel are removed before sending the
LCD Panel in.

18931_100_100510.eps
100510

Figure 4-32 LCD panel

Returning a defect LCD panel


To return a defect LCD panel to the factory, all boards, cabling,
mechanical supports, shieldings, clamps, spacers, the bezel
and tapes have to be removed from the panel, see Figure 4-32.
Be sure to carefully pack the areas of the panel that are visible
during normal use.

back to
div. table

2013-Jan-29

EN 30
4.6

4.

Q552.1E LA

Mechanical Instructions

Assy/Panel Removal Van Gogh Styling


The instructions apply to the 46PFL5605H/xx.

4.6.1

Rear Cover
Warning: Disconnect the mains power cord before you remove
the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
Special note:
Some models come with mechanical catches at top of the rear
cover. To open them, refer to Figure 4-33 to Figure 4-36 for
details.

18770_152_100218.eps
100218

Figure 4-35 Rear cover 40" -3-

3
2

4
2

5
2

6
2

18770_150_100218.eps
100219
18770_153_100218.eps
100317

Figure 4-33 Rear cover 40" -1Figure 4-36 Rear cover 40" -4-

1. Lift the rear cover on the bottom [1].


2. Push back the cover [2] to unlock the catches.
3. If the rear cover catches still lock, place a flat screwdriver
between flare and rear cover and turn it until the rear cover
and the flare are disassembled from the catch.
4. The location of the catches are indicated with [3], [4], [5]
and [6].
4.6.2

Speakers
Tweeters
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Subwoofer
The central subwoofer is located in the centre of the set, and is
mounted with two screws.
When defective, replace the whole unit.

18770_151_100218.eps
100218

Figure 4-34 Rear cover 40" -2-

2013-Jan-29

back to
div. table

Mechanical Instructions
4.6.3

Main Power Supply

4.6.6

Refer to Figure 4-37 for details.

Q552.1E LA

4.

EN 31

IR & LED Board


Refer to Figure 4-39, Figure 4-40 and Figure 4-41 for details.

1
2

18770_142_100215.eps
100215

18770_140_100215.eps
100217

Figure 4-39 IR & LED Board -1Figure 4-37 Main Power Supply
1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
4.6.4

Small Signal Board (SSB)


Refer to Figure 4-38 for details.

2
2

3
3
1
18770_143_100215.eps
100215

Figure 4-40 IR & LED Board -2-

2
3
3
3

4
18770_141_100215.eps
100217

Figure 4-38 SSB


1. Unplug all connectors [1] and [2].
2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit.
4.6.5

18770_144_100215.eps
100215

Mains Switch
Figure 4-41 IR & LED Board -3-

The mains switch is mounted on the front bezel with two


screws.
1.
2.
3.
4.

back to
div. table

Remove the stand [1].


Remove the IR & LED board cover [2].
Release the clips [3] that secure the IR & LED board.
Remove the connectors [4] on the IR/LED board.

2013-Jan-29

EN 32
4.6.7

4.

Mechanical Instructions

Q552.1E LA

Keyboard Control Board


Refer to Figure 4-42 for details.
1. Unplug the connector on the IR & LED board that leads to
the Keyboard Control board as described earlier.
2. Release the cable from its clamps.
3. Release the clip on top of the unit [1] and take the unit out.
When defective, replace the whole unit.

18770_145_100216.eps
100217

Figure 4-42 Keyboard Control board


4.6.8

LCD Panel
Refer to Figure 4-43 for details.
1. Remove the stand as described earlier.
2. Remove the brackets [1].
3. Remove the stand support [2].
4. Remove the central subwoofer as described earlier.
5. Remove the tweeters as described earlier.
6. Remove the mains switch as described earlier.

7. Remove the IR & LED board as described earlier.


8. Remove the keyboard control board as described earlier.
9. Remove the clamps [3].
10. Remove the flare.
11. Remove all remaining screws [4].
Now the LCD Panel can be lifted from the front cabinet.

1
4

4
1

18770_146_100216.eps
100407

Figure 4-43 LCD Panel

4.7

Assy/Panel Removal Matisse Styling

2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.

The instructions apply to the 40PFL7605H/12.


4.7.1

Rear Cover
4.7.2
Warning: Disconnect the mains power cord before you remove
the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.

Each speakerbox unit is mounted with two screws.


When defective, replace the whole unit.

1. Remove all screws of the rear cover.


2013-Jan-29

Speakers

back to
div. table

Mechanical Instructions
4.7.3

Main Power Supply

4.7.5

Refer to Figure 4-44 for details.

Q552.1E LA

4.

EN 33

IR & LED Board


Refer to Figure 4-46 for details.

2
1

1
3

1
3

18771_108_100504.eps
100504

18771_110_100504.eps
100504

Figure 4-44 Main Power Supply

Figure 4-46 IR & LED Board

1. Unplug all connectors [1].


2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.

1. Remove the stand.


2. Remove the IR & LED board cover [1].
Now the IR & LED board can be accessed.
When defective, replace the whole unit.

4.7.4

Small Signal Board (SSB)


Refer to Figure 4-45 for details.

3
3
1
1
2
3
3

4
3
5

18771_109_100504.eps
100505

Figure 4-45 SSB


1.
2.
3.
4.
5.
6.

Unplug all connectors [1].


Slide the side cover sidewards [2].
Remove the fixation screws [3].
Lift the clip [4].
Remove the bottom cover downwards [5].
Take the board out.

back to
div. table

2013-Jan-29

EN 34
4.7.6

4.

Mechanical Instructions

Q552.1E LA

1. Unplug the flat foil(s) [1].


2. Release the clips [2] that secure the PWB.
3. Slide the PWB out of the set [3].

Keyboard Control Board


The keyboard control panel is mounted on the LCD panel with
two screws.
When defective, replace the whole unit.

4.7.7

4.7.8

Ambilight Units

Refer to Figure 4-48 for details.


1. Remove the stand.
2. Remove all boards as described earlier.
3. Remove all cables from the set.
4. Remove the speaker boxes as earlier described.
5. Remove the IR & LED board cover as described earlier.
6. Remove the mains switch [1].
7. Remove the keyboard control panel as described earlier.
8. Remove the clamps [2]. Pay attention to the positioning
of the different screws!
9. Remove the plastic clamps [3].
10. Tilt the clamps [4] after having removed the screw.
11. Remove the Ambilight PWBs as earlier described.
12. Tilt the Ambilight subframes [5] after having removed the
screw.
Now the LCD Panel can be lifted from the front cabinet.

Refer to Figure 4-47 for details.


Note: the Ambilight units are to be swapped on PWB level.

1
3

2
18771_111_100504.eps
100504

Figure 4-47 Ambilight units

LCD Panel

4
3

1
2

2
3

18771_112_100504.eps
100504

Figure 4-48 LCD Panel

4.8

Pay special attention to use the correct screws at the


proper location when mounting a new LCD panel!

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
order.

Using the wrong screws will damage the LCD panel!


Notes:
While re-assembling, make sure that all cables are placed
and connected in their original position.
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.

EN 35

5. Service Modes, Error Codes, and Fault Finding


Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Stepwise Start-up
5.4 Service Tools
5.5 Error Codes
5.6 The Blinking LED Procedure
5.7 Protections
5.8 Fault Finding and Repair Tips
5.9 Software Upgrading

5.1

How to Activate SDM


For this chassis there are two kinds of SDM: an analogue SDM
and a digital SDM. Tuning will happen according Table 5-1.
Analogue SDM: use the standard RC-transmitter and key
in the code 062596, directly followed by the MENU (or
HOME) button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it off, push the MENU (or
"HOME") button again.
Analogue SDM can also be activated by grounding for a
moment the solder path on the SSB, with the indication
SDM (see Service mode pad).
Digital SDM: use the standard RC-transmitter and key in
the code 062593, directly followed by the MENU (or
"HOME") button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it off, push the MENU (or
"HOME") button again.

Test Points
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. However, several key
ICs are capable of generating test patterns, which can be
controlled via ComPair. In this way it is possible to determine
which part is defective.
Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.

5.2

Service Modes
Service Default mode (SDM) and Service Alignment Mode
(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.
This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.4.1 ComPair).
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old MENU
button is now called HOME (or is indicated by a house icon).

5.2.1

SDM

Service Default Mode (SDM)


Purpose
To create a pre-defined setting, to get the same
measurement results as given in this manual.
To override SW protections detected by stand-by
processor and make the TV start up to the step just before
protection (a sort of automatic stepwise start-up). See
section 5.3 Stepwise Start-up.
To start the blinking LED procedure where only LAYER 2
errors are displayed. (see also section 5.5 Error Codes).

18770_249_100215.eps
100407

Figure 5-1 Service mode pad


After activating this mode, SDM will appear in the upper right
corner of the screen (when a picture is available).
How to Navigate
When the MENU (or HOME) button is pressed on the RC
transmitter, the TV set will toggle between the SDM and the
normal user menu.

Specifications
Table 5-1 SDM default settings
Region

Freq. (MHz)

Default system

Europe, AP(PAL/Multi)

475.25

PAL B/G

Europe, AP DVB-T

546.00 PID Video: 0B


DVB-T
06 PID PCR: 0B 06 PID
Audio: 0B 07

How to Exit SDM


Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard customer RC-transmitter: key in 00sequence.

All picture settings at 50% (brightness, colour, contrast).


Sound volume at 25%.
All service-unfriendly modes (if present) are disabled, like:
(Sleep) timer.
Child/parental lock.
Picture mute (blue mute or black mute).
Automatic volume levelling (AVL).
Skip/blank of non-favourite pre-sets.

5.2.2

Service Alignment Mode (SAM)


Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.

back to
div. table

2013-Jan-29

EN 36

5.

Q552.1E LA

Service Modes, Error Codes, and Fault Finding

How to Activate SAM


Via a standard RC transmitter: Key in the code 062596
directly followed by the INFO or OK button. After activating
SAM with this method a service warning will appear on the
screen, continue by pressing the OK button on the RC.

Display Option
Code

Contents of SAM
Hardware Info.
A. SW Version. Displays the software version of the
main software (example: Q555X-1.2.3.4 =
AAAAB_X.Y.W.Z).
AAAA= the chassis name.
B= the SW branch version. This is a sequential
number (this is no longer the region indication, as
the software is now multi-region).
X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
compatible with one another) and Y.W.Z is the sub
version number (a higher number is always
compatible with a lower number).
B. STBY PROC Version. Displays the software
version of the stand-by processor.
C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is
initialized after corruption, this production code has to
be re-written to NVM. ComPair will foresee in a
possibility to do this.
Operation Hours. Displays the accumulated total of
operation hours (not the stand-by hours). Every time the
TV is switched on/off, 0.5 hours is added to this number.
Errors (followed by maximum 10 errors). The most recent
error is displayed at the upper left (for an error explanation
see section 5.5 Error Codes).
Reset Error Buffer. When cursor right (or OK button)
pressed here, followed by the OK button, the error buffer
is reset.
Alignments. This will activate the ALIGNMENTS submenu. See Chapter 6. Alignments.
Dealer Options. Extra features for the dealers.
Options. Extra features for Service. For more info
regarding option codes, see chapter 6. Alignments.
Note that if the option code numbers are changed, these
have to be confirmed with pressing the OK button before
the options are stored, otherwise changes will be lost.
Initialize NVM. The moment the processor recognizes a
corrupted NVM, the initialize NVM line will be highlighted.
Now, two things can be done (dependent of the service
instructions at that moment):
Save the content of the NVM via ComPair for
development analysis, before initializing. This will give
the Service department an extra possibility for
diagnosis (e.g. when Development asks for this).
Initialize the NVM.

39mm

27mm

PHILIPS
PROD.SERIAL NO:

AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps
240108

Figure 5-2 Location of Display Option Code sticker

Note: When the NVM is corrupted, or replaced, there is a high


possibility that no picture appears because the display code is
not correct. So, before initializing the NVM via the SAM, a
picture is necessary and therefore the correct display option
has to be entered. Refer to Chapter 6. Alignments for details.
To adapt this option, its advised to use ComPair (the correct
values for the options can be found in Chapter 6. Alignments)
or a method via a standard RC (described below).
Changing the display option via a standard RC: Key in the
code 062598 directly followed by the MENU (or "HOME")
button and XXX (where XXX is the 3 digit decimal display
code as mentioned on the sticker in the set). Make sure to key
in all three digits, also the leading zeros. If the above action is
successful, the front LED will go out as an indication that the
RC sequence was correct. After the display option is changed
in the NVM, the TV will go to the Stand-by mode. If the NVM
was corrupted or empty before this action, it will be initialized
first (loaded with default values). This initializing can take up to
20 seconds.
2013-Jan-29

040

MODEL:
32PF9968/10

Store - go right. All options and alignments are stored


when pressing cursor right (or the OK button) and then
the OK-button.
Operation hours display. Displays the accumulated total
of operation hours of the screen itself. In case of a display
replacement, reset to 0 or to the consumed operation
hours of the spare display.
SW Maintenance.
SW Events. In case of specific software problems, the
development department can ask for this info.
HW Events. In case of specific software problems, the
development department can ask for this info :
- Event 26: refers to a power dip, this is logged after
the TV set reboots due to a power dip.
- Event 17: refers to the power OK status, sensed even
before the 3 x retry to generate the error code.
Test settings. For development purposes only.
Development file versions. Not useful for Service
purposes, this information is only used by the development
department.
Upload to USB. To upload several settings from the TV to
an USB stick, which is connected to the SSB. The items are
Channel list, Personal settings, Option codes,
Alignments, Identification data (includes the set type
and prod code + all 12NC like SSB, display, boards),
History list. The All item supports to upload all several
items at once.
First a directory repair\ has to be created in the root
of the USB stick.
To upload the settings, select each item separately, press
cursor right (or the OK button), confirm with OK and
wait until the message Done appears. In case the
download to the USB stick was not successful, Failure will
be displayed. In this case, check if the USB stick is
connected properly and if the directory repair is present in
the root of the USB stick. Now the settings are stored onto
the USB stick and can be used to download into another TV
or other SSB. Uploading is of course only possible if the
software is running and preferably a picture is available.
This method is created to be able to save the customers
TV settings and to store them into another SSB.
Download from USB. To download several settings from
the USB stick to the TV, same way of working needs to be
followed as described in Upload to USB. To make sure
that the download of the channel list from USB to the TV is
executed properly, it is necessary to restart the TV and
tune to a valid preset if necessary. The All item supports
to download all several items at once.
NVM editor. For NET TV the set type number must be
entered correctly.
Also the production code (AG code) can be entered here
via the RC-transmitter.
Correct data can be found on the side/rear sticker.

How to Navigate
In SAM, the menu items can be selected with the
CURSOR UP/DOWN key on the RC-transmitter. The
selected item will be highlighted. When not all menu items
back to
div. table

Service Modes, Error Codes, and Fault Finding

fit on the screen, move the CURSOR UP/DOWN key to


display the next/previous menu items.
With the CURSOR LEFT/RIGHT keys, it is possible to:
(De) activate the selected menu item.
(De) activate the selected sub menu.
With the OK key, it is possible to activate the selected
action.

5.

EN 37

Contents of CSM
The contents are reduced to 3 pages: General, Software
versions and Quality items. The group names itself are not
shown anywhere in the CSM menu.
General
Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV-set. Note that if an NVM is replaced or is initialized after
corruption, this set type has to be re-written to NVM.
ComPair will foresee in a possibility to do this. The update
can also be done via the NVM editor available in SAM.
Production Code. Displays the production code (the serial
number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, this production code has to be
re-written to NVM. ComPair will foresee in a possibility to
do this. The update can also be done via the NVM editor
available in SAM.
Installed date. Indicates the date of the first installation of
the TV. This date is acquired via time extraction.
Options 1. Gives the option codes of option group 1 as set
in SAM (Service Alignment Mode).
Options 2. Gives the option codes of option group 2 as set
in SAM (Service Alignment Mode).
12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
corruption, this identification number has to be re-written to
NVM. ComPair will foresee in a possibility to do this. This
identification number is the 12nc number of the SSB.
12NC display. Shows the 12NC of the display.
12NC supply. Shows the 12NC of the power supply.
12NC 200Hz board. Shows the 12NC of the 200Hz Panel
(when present).
12NC AV PIP. Shows the 12NC of the AV PIP board
(when present).

How to Exit SAM


Use one of the following methods:
Switch the TV set to STAND-BY via the RC-transmitter.
Via a standard RC-transmitter, key in 00 sequence, or
select the BACK key.
5.2.3

Q552.1E LA

Customer Service Mode (CSM)


Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Helpdesk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this
mode are not possible.
When in this chassis CSM is activated, a test pattern will be
displayed during 5 seconds (1 second Blue, 1 second Green
and 1 second Red, then again 1 second Blue and 1 second
Green). This test pattern is generated by the PNX51X0
(located on the 200Hz board as part of the display). So if this
test pattern is shown, it could be determined that the back end
video chain (PNX51X0 and display) is working.For TV sets
without the PNX51X0 inside, every menu from CSM will be
used as check for the back end chain video.

Software versions
Current main SW. Displays the build-in main software
version. In case of field problems related to software,
software can be upgraded. As this software is consumer
upgradeable, it will also be published on the Internet.
Example: Q55xx1.2.3.4
Stand-by SW. Displays the build-in stand-by processor
software version. Upgrading this software will be possible
via ComPair or via USB (see section 5.9 Software
Upgrading).
Example: STDBY_88.68.1.2.
e-UM version. Displays the electronic user manual SWversion (12NC version number). Most significant number
here is the last digit.
AV PIP software.
3D dongle software version.

When CSM is activated and there is a USB stick connected to


the TV set, the software will dump the CSM content to the USB
stick. The file (CSM_model number_serial number.txt) will be
saved in the root of the USB stick. This info can be handy if no
information is displayed.
When in CSM mode (and a USB stick connected), pressing
OK will create an extended CSM dump file on the USB stick.
This file (Extended_CSM_model number_serial number.txt)
contains:
The normal CSM dump information,
All items (from SAM load to USB, but in readable format),
Operating hours,
Error codes,
SW/HW event logs.
To have fast feedback from the field, a flashdump can be
requested by development. When in CSM, push the red
button and key in serial digits 2679 (same keys to form the
word COPY with a cellphone). A file Dump_model
number_serial number.bin will be written on the connected
USB device. This can take 1/2 minute, depending on the
quantity of data that needs to be dumped.

Quality items
Signal quality. Bad / average /good (not for DVB-S).
Ethernet MAC address. Displays the MAC address
present in the SSB.
Wireless MAC address. Displays the wireless MAC
address to support the Wi-Fi functionality.
BDS key. Indicates if the set is in the BDS status.
CI module. Displays status if the common interface
module is detected.
CI + protected service. Yes/No.
Event counter :
S : 000X 0000(number of software recoveries : SW
EVENT-LOG #(reboots)
S : 0000 000X (number of software events : SW EVENTLOG #(events)
H : 000X 0000(number of hardware errors)
H : 0000 000X (number of hardware events : SW EVENTLOG #(events).

Also when CSM is activated, the LAYER 1 error is displayed via


blinking LED. Only the latest error is displayed (see also
section 5.5 Error Codes).
How to Activate CSM
Key in the code 123654 via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
How to Navigate
By means of the CURSOR-DOWN/UP knob on the RCtransmitter, can be navigated through the menus.
back to
div. table

2013-Jan-29

EN 38

5.

Q552.1E LA

Service Modes, Error Codes, and Fault Finding

How to Exit CSM


Press MENU (or "HOME") / Back key on the RC-transmitter.

5.3

7U0X or others FETs on shortcircuit before activating SDM via


the service pads.

Stepwise Start-up
When the TV is in a protection state due to an error detected by
stand-by software (error blinking is displayed) and SDM is
activated via shortcutting the SDM solder path on the SSB, the
TV starts up until it reaches the situation just before protection.
So, this is a kind of automatic stepwise start-up. In combination
with the start-up diagrams below, you can see which supplies
are present at a certain moment. Caution: in case the start-up
in this mode with a faulty FET 7U0X is done, you can destroy
all ICs supplied by the +1V8 and +1v1, due to overvoltage (12V
on XVX-line). It is recommended to measure first the FET

The abbreviations SP and MP in the figures stand for:


SP: protection or error detected by the Stand-by
Processor.
MP: protection or error detected by the MIPS Main
Processor.

Mains
off

Mains
on

- WakeUp requested
- Acquisition needed
- Tact switch pushed

St by

WakeUp
requested

Semi
St by

- stby requested and


no data Acquisition
required

Active
- St by requested
- tact SW pushed

Tact switch
pushed

Hibernate

WakeUp
requested
(SDM)

- Tact switch pushed


- last status is hibernate
after mains ON

GoToProtection
GoToProtection

Protection

18770_250_100216.eps
100402

Figure 5-3 Transition diagram

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.

EN 39

Off
Stand by or
Protection

Mains is applied

Standby Supply starts running.


All standby supply voltages become available.

st-by P resets

If the protection state was left by short circuiting the


SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.

Initialise I/O pins of the st-by P:


- Switch reset-AVC LOW (reset state)
- Switch reset-system LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
- Switch reset-USB LOW (reset state)
- Switch reset-DVBs LOW (reset state)
- keep Audio-reset and Audio-Mute-Up HIGH

- Switch Audio-Reset high.


It is low in the standby mode if the standby
mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are


off.

Switch ON Platform and display supply by switching


LOW the Standby line.

+12V, +24Vs, AL and Bolt-on power


is switched on, followed by the +1V2 DCDC converter
Detect2 is moved to an interrupt. To be checked if
the detection on interrupt base is feasible or not or if
we should stick to the standard 40ms interval.

Detect2 high received


within 2 seconds?

Yes

12V error:
Layer1: 3
Layer2: 16

No

Enter protection

Enable the DCDC converters


(ENABLE-3V3n LOW)

Wait 50ms

Enable the supply detection algorithm

Set IC slave address


of Standby P to (A0h)

Detect EJTAG debug probe


(pulling pin of the probe interface to
ground by inserting EJTAG probe)

An EJTAG probe (e.g. WindPower ICE probe) can be


connected for Linux Kernel debugging purposes.

EJTAG probe
connected ?

Yes

No
No

No

Cold boot?

Yes
Release AVC system reset
Feed warm boot script

Release AVC system reset


Feed cold boot script

Release AVC system reset


Feed initializing boot script
disable alive mechanism

18770_251_100216.eps
100216

Figure 5-4 Off to Semi Stand-by flowchart (part 1)

back to
div. table

2013-Jan-29

EN 40

5.

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

Reset-system is switched HIGH by the


AVC at the end of the bootscript

Reset-system is switched HIGH by the


AVC at the end of the bootscript

AVC releases Reset-Ethernet, Reset-USB and


Reset-DVBs when the end of the AVC bootscript is detected

AVC releases Reset-Ethernet, Reset-USB and


Reset-DVBs when the end of the AVC bootscript is detected

Reset-Audio and Audio-Mute-Up are


switched by MIPS code later on in the
startup process

Reset-Audio and Audio-Mute-Up are


switched by MIPS code later on in the
startup process

No

This cannot be done through the bootscript,


the I/O is on the standby P

Timing need to be updated if


more mature info is available.

Bootscript ready
in 1250 ms?

No

Yes
Set IC slave address
of Standby P to (60h)

RPC start (comm. protocol)


Timing needs to
be updated if more
mature info is
available.

Flash to Ram
image transfer succeeded
within 30s?

No
Code =
Layer1: 2
Layer2: 15

Yes

Switch AVC PNX85500 in


reset (active low)

Code =
Layer1: 2
Layer2: 53

No

SW initialization
succeeded
within 20s?

Wait 10ms

Timing needs to be
updated if more
mature info is
available.

Yes

Enable Alive check mechanism


Disable all supply related protections and
switch off the +3V3 +5V DC/DC converter.
MIPS reads the wake up reason
from standby P.

Wait until AVC starts to


communicate

Wait 5ms

switch off the remaining DC/DC


converters

3-th try?

Startup screen shall only be visible when there is a coldboot to


an active state end situation. The startup screen shall not be
visible when waking up for reboot reasons or waking up to semistandby conditions or waking up to enter Hibernate mode..

Wake up reason
coldboot & not semistandby?
yes

Switch Standby I/O line high


and wait 4 seconds

The first time after the option turn on of the startup screen or
when the set is virgin, the cfg file is not present and hence
the startup screen will not be shown.

Startup screen cfg file


present?

Yes

yes

Blink Code as
error code

200Hz set?

yes

No

Enter protection

85500 sends out startup screen

85500 sends out startup screen

85500 starts up the display.

200Hz Tcon has started up the


display.

Startup screen visible

85500 requests Lamp on

No

No
To keep this flowchart readable, the exact
display turn on description is not copied
here. Please see the Semi-standby to On
description for the detailed display startup
During the complete display time of the
Startup screen, the preheat condition of
sequence.
100% PWM is valid.

Startup screen visible

Initialize audio
initialize tuner and channel decoders
Initialize source selection
Initialize video processing ICs

initialize AutoTV by triggering CHS AutoTV Init interface


Initialize Ambilight with Lights off.

Semi-Standby
18770_252_100216.eps
100216

Figure 5-5 Off to Semi Stand-by flowchart (part 2)

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.

EN 41

Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the EEFL backlight, the backlight should be driven with a maximum PWM duty
cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output
level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts,
the picture should only be unblanked after these first seconds.

Semi Standby

The assumption here is that a fast toggle (<2s) can


only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
made in less than 2s, because the standby state will
be maintained for at least 4s.

Wait until previous on-state is left more than 2


seconds ago. (to prevent LCD display problems)

Assert RGB video blanking


and audio mute

CPipe already generates a valid output


clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.

Display already on?


(splash screen)
No

Switch on the display power by


switching LCD-PWR-ON low

The exact timings to


switch on the
display (LVDS
delay, lamp delay)
are defined in the
display file.

Yes
Wait x ms
Initialize audio and video
processing IC's and functions
according needed use case.

Switch on LVDS output in the 85500


Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set


the BOOST control to nominal and make sure
PWM output is set to maximum allowed PWM

Switch on LCD backlight (Lamp-ON)

Start POK line


detection algorithm

Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.

return

Switch Audio-Reset low and wait 5ms


A LED set does not normally need a
preheat time. The preheat remains present
but is set to zero in the display file.

Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)

Restore dimming backlight feature, PWM and BOOST output


and unblank the video.

The higher level requirement is that audio and video


should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.

Switch on the Ambilight functionality according the last status


settings.

Startup screen Option


and Installation setting
Photoscreen ON?
Yes
Display cfg file present
and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_253_100216.eps
100216

Figure 5-6 Semi Stand-by to Active flowchart (EEFL or LED backlight 50/100 Hz only)

back to
div. table

2013-Jan-29

EN 42

5.

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

The assumption here is that a fast toggle (<2s)


can only happen during ON->SEMI ->ON. In
these states, the AVC is still active and can
provide the 2s delay. If the transition ON->SEMI>STBY->SEMI->ON can be made in less than 2s,
we have to delay the semi -> stby transition until
the requirement is met.

Semi Standby
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)

Assert RGB video blanking


and audio mute

There is no need to define the


display timings since the timing
implementation is part of the Tcon.

Backlight already on?


(splash screen)
Yes
Initialize audio and video
processing IC's and functions
according needed use case.

No
Request Tcon to Switch on the backlight in a
direct LED or
set Lamp-on I/O line in case of a side LED

Start POK line


detection algorithm
Wait until valid and stable audio and video, corresponding to
the requested output is delivered by the AVC.
return
Switch Audio-Reset low and wait 5ms

The higher level requirement is that audio and


video should be demuted without transient
effects and that the audio should be demuted
maximum 1s before or at the same time as the
unblanking of the video.

Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)

unblank the video.

Switch on the Ambilight functionality according the last status


settings.

Startup screen Option


and Installation setting
Photoscreen ON?
Yes
Display cfg file present
and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_254_100216.eps
100216

Figure 5-7 Semi Stand-by to Active flowchart (LED backlight 200 Hz)

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.

EN 43

Active
Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground


(I/O: audio reset)
And wait 5ms

switch off Ambilight

Wait until Ambilight has faded out: Output power


Observer should be zero

Switch off POK line


detection algorithm

switch off LCD backlight


(I/O or IC)

Mute all video outputs

Yes

200Hz set?

No

Wait x ms (display file)


Instruct 200Hz
Tcon to turn off
the display

Switch off LVDS output in 85500

Wait x ms

The exact timings to


switch off the
display (LVDS
delay, lamp delay)
are defined in the
display file.

Switch off the display power by


switching LCD-PWR-ON high

Semi Standby
18770_255_100216.eps
100216

Figure 5-8 Active to Semi Stand-by flowchart

back to
div. table

2013-Jan-29

EN 44

5.

Q552.1E LA

Service Modes, Error Codes, and Fault Finding

Semi Stand by

If ambientlight functionality was used in semi-standby


(lampadaire mode), switch off ambient light (see CHS
ambilight)

Delay transition until ramping down of ambient light is


finished. *)

*) If this is not performed and the set is


switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by P.

Switch Memories to self-refresh (this creates a more


stable condition when switching off the power).

Switch AVC system in reset state (reset-system and


reset-AVC lines)
Switch reset-USB, Reset-Ethernet and Reset-DVBs
LOW

Wait 10ms

Disable all supply related protections and switch off


the DC/DC converters (ENABLE-3V3n)

Wait 5ms

Switch OFF all supplies by switching HIGH the


Standby I/O line

Important remarks:
release reset audio 10 sec after entering
standby to save power
Also here, the standby state has to be
maintained for at least 4s before starting
another state transition.

Stand by
18770_256_100216.eps
100216

Figure 5-9 Semi Stand-by to Stand-by flowchart

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding


5.4

Service Tools

5.5

Error Codes

5.4.1

ComPair

5.5.1

Introduction

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No
knowledge on I2C or UART commands is necessary,
because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the P
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.

How to Connect
This is described in the chassis fault finding database in
ComPair.

TO TV

ComPair II
RC in

RC out

TO
UART SERVICE
CONNECTOR

Multi
function

Optional Power Link/ Mode


Switch
Activity

I2C

EN 45

New in this chassis is the way errors can be displayed:

TO
I2C SERVICE
CONNECTOR

5.

The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from left to
right, new errors are logged at the left side, and all other errors
shift one position to the right.
When an error occurs, it is added to the list of errors, provided
the list is not full. When an error occurs and the error buffer is
full, then the new error is not added, and the error buffer stays
intact (history is maintained).
To prevent that an occasional error stays in the list forever, the
error is removed from the list after more than 50 hrs. of
operation.
When multiple errors occur (errors occurred within a short time
span), there is a high probability that there is some relation
between them.

Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer
procedure.

TO
UART SERVICE
CONNECTOR

Q552.1E LA

RS232 /UART

If no errors are there, the LED should not blink at all in


CSM or SDM. No spacer must be displayed as well.
There is a simple blinking LED procedure for board
level repair (home repair) so called LAYER 1 errors
next to the existing errors which are LAYER 2 errors (see
Table 5-2).
LAYER 1 errors are one digit errors.
LAYER 2 errors are 2 digit errors.
In protection mode.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
In CSM mode.
When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
In SDM mode.
When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Error display on screen.
In CSM no error codes are displayed on screen.
In SAM the complete error list is shown.

PC

Basically there are three kinds of errors:


Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section 5.6 The Blinking LED Procedure).
Errors detected by the Stand-by software which not
lead to protection. In this case the front LED should blink
the involved error. See also section 5.5 Error Codes, 5.5.4
Error Buffer. Note that it can take up several minutes
before the TV starts blinking the error (e.g. LAYER 1
error = 2, LAYER 2 error = 15 or 53).
Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
out via ComPair, via blinking LED method LAYER 1-2
error, or in case picture is visible, via SAM.

ComPair II Developed by Philips Brugge

HDMI
I2C only

Optional power
5V DC

10000_036_090121.eps
091118

Figure 5-10 ComPair II interface connection


Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs can be
blown!

5.5.2

How to Read the Error Buffer


Use one of the following methods:
On screen via the SAM (only when a picture is visible).
E.g.:
00 00 00 00 00: No errors detected
23 00 00 00 00: Error code 23 is the last and only
detected error.
37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note that no protection errors can be logged in the
error buffer.

How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair UART interface cable for Q55x.x.
(using 3.5 mm Mini Jack connector): 3138 188 75051.
Note: When you encounter problems, contact your local
support desk.
back to
div. table

2013-Jan-29

EN 46

5.5.3

5.

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

Via the blinking LED procedure. See section 5.5.3 How to


Clear the Error Buffer.
Via ComPair.

content, as this history can give significant information). This to


ensure that old error codes are no longer present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Via error bits in the status registers of ICs.
Via polling on I/O pins going to the stand-by processor.
Via sensing of analog values on the stand-by processor or
the PNX85500.
Via a not acknowledge of an I2C communication.

How to Clear the Error Buffer


Use one of the following methods:
By activation of the RESET ERROR BUFFER command
in the SAM menu.
If the content of the error buffer has not changed for 50+
hours, it resets automatically.

5.5.4

Error Buffer

Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.

In case of non-intermittent faults, clear the error buffer before


starting to repair (before clearing the buffer, write down the
Table 5-2 Error code overview

Description

Layer 1

Layer 2

Monitored
by

Error/
Prot

Error Buffer/
Blinking LED

Device

Defective Board

I2C3

13

MIPS

BL / EB

SSB

SSB

I2C2

14

MIPS

BL / EB

SSB

SSB

I2C4

18

MIPS

BL / EB

SSB

SSB

PNX doesnt boot (HW cause)

15

Stby P

BL

PNX8550

SSB

12V

16

Stby P

BL

Supply

Inverter or display supply

17

MIPS

EB

Supply

PNX51X0

2/9

21

MIPS

EB

PNX51X0

200 Hz board

HDMI mux

23

MIPS

EB

Sil9x87A

SSB

I2C switch

24

MIPS

EB

PCA9540

SSB

Channel dec DVB-S

28

MIPS

EB

STV0903

SSB

Lnb controller

31

MIPS

EB

LNBH23

SSB

Tuner

34

MIPS

EB

DTT 71300

SSB

Main nvm

35

MIPS

EB

STM24C64

SSB

Tuner DVB-S

36

MIPS

EB

STV6110

SSB

T sensor SSB/set

42

MIPS

EB

LM 75

T sensor

T sensor LED driver/Tcon

42

MIPS

EB

LM 75

T sensor

PNX doesnt boot (SW cause)

53

Stby P

BL

PNX8550

SSB

Display

64

MIPS

BL / EB

Altera

Display

Extra Info
Rebooting. When a TV is constantly rebooting due to
internal problems, most of the time no errors will be logged
or blinked. This rebooting can be recognized via a ComPair
interface and Hyperterminal (for Hyperterminal settings,
see section 5.8 Fault Finding and Repair Tips, 5.8.7
Logging). Its shown that the loggings which are generated
by the main software keep continuing. In this case
diagnose has to be done via ComPair.
Error 13 (I2C bus 3, SSB bus blocked). Current situation:
when this error occurs, the TV will constantly reboot due to
the blocked bus. The best way for further diagnosis here, is
to use ComPair.
Error 14 (I2C bus 2, TV set bus blocked). Current
situation: when this error occurs, the TV will constantly
reboot due to the blocked bus. The best way for further
diagnosis here, is to use ComPair.
Error 18 (I2C bus 4, Tuner bus blocked). In case this bus
is blocked, short the SDM solder paths on the SSB during
startup, LAYER error 2 = 18 will be blinked.
Error 15 (PNX8550 doesnt boot). Indicates that the main
processor was not able to read his bootscript. This error will
point to a hardware problem around the PNX8550
(supplies not OK, PNX 8550 completely dead, I2C link
between PNX and Stand-by Processor broken, etc...).
When error 15 occurs it is also possible that I2C1 bus is
blocked (NVM). I2C1 can be indicated in the schematics as
follows: SCL-UP-MIPS, SDA-UP-MIPS.
Other root causes for this error can be due to hardware
problems regarding the DDRs and the bootscript reading
from the PNX8550.
Error 16 (12V). This voltage is made in the power supply
be logged and displayed via the blinking LED procedure
2013-Jan-29

back to
div. table

and results in protection (LAYER 1 error = 3) in case of


absence. When SDM is activated we see blinking LED
LAYER 2 error = 16.
Error 17 (Invertor or Display Supply). Here the status of
the Power OK is checked by software, no protection will
occur during failure of the invertor or display supply (no
picture), only error logging. LED blinking of LAYER 1
error = 3 in CSM, in SDM this gives LAYER 2 error = 17.
Error 21 (PNX51X0). When there is no I2C communication
towards the PNX51X0 after start-up, LAYER 2 error = 21
will be logged and displayed via the blinking LED
procedure if SDM is switched on. This device is located on
the 200 Hz panel from the display.
Error 23 (HDMI). When there is no I2C communication
towards the HDMI mux after start-up, LAYER 2 error = 23
will be logged and displayed via the blinking LED
procedure if SDM is switched on.
Error 24 (I2C switch). When there is no I2C
communication towards the I2C switch, LAYER 2
error = 24 will be logged and displayed via the blinking LED
procedure when SDM is switched on. Remark: this only
works for TV sets with an I2C controlled screen included.
Error 28 (Channel dec DVB-S). When there is no I2C
communication towards the DVB-S channel decoder,
LAYER 2 error = 28 will be logged and displayed via the
blinking LED procedure if SDM is switched on.
Error 31 (Lnb controller). When there is no I2C
communication towards this device, LAYER 2 error = 31
will be logged and displayed via the blinking LED
procedure if SDM is activated.
Error 34 (Tuner). When there is no I2C communication
towards the tuner during start-up, LAYER 2 error = 34 will
when SDM is switched on.

Service Modes, Error Codes, and Fault Finding

Error 35 (main NVM). When there is no I2C


communication towards the main NVM during start-up,
LAYER 2 error = 35 will be displayed via the blinking LED
procedure when SDM is switched on. All service modes
(CSM, SAM and SDM) are accessible during this failure,
observed in the Uart logging as follows: "<< ERRO >>>
PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".
Error 36 (Tuner DVB-S). When there is no I2C
communication towards the DVB-S tuner during start-up,
LAYER 2 error = 36 will be logged and displayed via the
blinking LED procedure when SDM is switched on.
Error 42 (Temp sensor). Only applicable for TV sets
equipped with temperature devices.
Error 53. This error will indicate that the PNX8550 has
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because
of hardware problems (NAND flash, ...) or software
initialization problems. Possible cause could be that there
is no valid software loaded (try to upgrade to the latest main
software version). Note that it can take a few minutes
before the TV starts blinking LAYER 1 error = 2 or in SDM,
LAYER 2 error = 53.
Error 64. Only applicable for TV sets with an I2C controlled
screen.

5.6

The Blinking LED Procedure

5.6.1

Introduction

5.

EN 47

Activate the CSM. The blinking front LED will show only
the latest layer 1 error, this works in normal operation
mode or automatically when the error/protection is
monitored by the Stand-by processor.
In case no picture is shown and there is no LED blinking,
read the logging to detect whether error devices are
mentioned. (see section 5.8 Fault Finding and Repair
Tips, 5.8.7 Logging).
Activate the SDM. The blinking front LED will show the
entire content of the LAYER 2 error buffer, this works in
normal operation mode or when SDM (via hardware pins)
is activated when the tv set is in protection.

5.7

Protections

5.7.1

Software Protections
Most of the protections and errors use either the stand-by
microprocessor or the MIPS controller as detection device.
Since in these cases, checking of observers, polling of ADCs,
and filtering of input values are all heavily software based,
these protections are referred to as software protections.
There are several types of software related protections, solving
a variety of fault conditions:
Related to supplies: presence of the +5V, +3V3 and 1V2
needs to be measured, no protection triggered here.
Protections related to breakdown of the safety check
mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
guaranteed any more.

The blinking LED procedure can be split up into two situations:


Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
This will be only one digit error, namely the one that is
referring to the defective board (see table 5-2 Error code
overview) which causes the failure of the TV. This
approach will especially be used for home repair and call
centres. The aim here is to have service diagnosis from a
distance.
Blinking LED procedure LAYER 2 error. Via this
procedure, the contents of the error buffer can be made
visible via the front LED. In this case the error contains
2 digits (see table 5-2 Error code overview) and will be
displayed when SDM (hardware pins) is activated. This is
especially useful for fault finding and gives more details
regarding the failure of the defective board.
Important remark:
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed.

Remark on the Supply Errors


The detection of a supply dip or supply loss during the normal
playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are
actively monitored to be able to optimise the start-up speed,
and to assure good operation of all components. If these
monitors do not respond in a defined way, this indicates a
malfunction of the system and leads to a protection. As the
observers are only used during start-up, they are described in
the start-up flow in detail (see section 5.3 Stepwise Start-up).
5.7.2

When one of the blinking LED procedures is activated, the front


LED will show (blink) the contents of the error buffer. Error
codes greater then 10 are shown as follows:
1. n long blinks (where n = 1 to 9) indicating decimal digit
2. A pause of 1.5 s
3. n short blinks (where n= 1 to 9)
4. A pause of approximately 3 s,
5. When all the error codes are displayed, the sequence
finishes with a LED blink of 3 s (spacer).
6. The sequence starts again.

Hardware Protections
The only real hardware protection in this chassis appears in
case of an audio problem e.g. DC voltage on the speakers. This
protection will only affect the Class D audio amplifier (item
7D10; see diagram B03A) and puts the amplifier in a
continuous burst mode (cyclus approximately 2 seconds).
Repair Tip
There still will be a picture available but no sound. While
the Class D amplifier tries to start-up again, the cone of the
loudspeakers will move slowly in one or the other direction
until the initial failure shuts the amplifier down, this cyclus
starts over and over again. The headphone amplifier will
also behaves similar.

Example: Error 12 8 6 0 0.
After activation of the SDM, the front LED will show:
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s
2. Two short blinks of 250 ms followed by a pause of 3 s
3. Eight short blinks followed by a pause of 3 s
4. Six short blinks followed by a pause of 3 s
5. One long blink of 3 s to finish the sequence (spacer).
6. The sequence starts again.
5.6.2

Q552.1E LA

5.8

Fault Finding and Repair Tips


Read also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra
Info.

5.8.1

How to Activate

Ambilight
Due to degeneration process of the LEDs fitted on the ambi
module, there can be a difference in the colour and/or light
output of the spare ambilight modules in comparison with the

Use one of the following methods:


back to
div. table

2013-Jan-29

EN 48

5.

Q552.1E LA

Service Modes, Error Codes, and Fault Finding

originals ones contained in the TV set. Via SAM => alignments


=> ambilight, the spare module can be adjusted.
5.8.2

+12V is considered OK (=> DETECT2 signal becomes "high",


+12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter
can be started up) if it rises above 10V and doesnt drop below
9V5. A small delay of a few milliseconds is introduced between
the start-up of 12V to +1V8 DC-DC converter and the two other
DC-DC converters via 7U48 and associated components.

Audio Amplifier
The Class D-IC 7D10 has a powerpad for cooling. When the IC
is replaced it must be ensured that the powerpad is very well
pushed to the PWB while the solder is still liquid. This is needed
to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time.

5.8.3

Description DVB-S2:
LNB-RF1 (0V = disabled, 14V or 18V in normal operation)
LNB supply generated via the second conversion channel
of 7T03 followed by 7T50 LNB supply control IC. It provides
supply voltage that feeds the outdoor satellite reception
equipment.
+3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal)
and +1V-DVBS (1.03V nominal) power supply for the
silicon tuner and channel decoder. +1V-DVBS is generated
via a 5V to 1V DC-DC converter and is stabilized at the
point of load (channel decoder) by means of feedback
signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS
are generated via linear stabilizers from +5V-DVBS that by
itself is generated via the first conversion channel of 7T03.

AV PIP
To check the AV PIP board (if present) functionality, a
dedicated tespattern can be invoke as follows: select the
multiview icon in the User Interface and press the OK
button. Apply for the main picture an extended source, e.g.
HDMI input. Proceed by entering CSM (push 123654 on the
remote control) and press the yellow button. A coloured
testpattern should appear now, generated by the AV PIP board
(this can take a few seconds).

5.8.4

At start-up, +24V becomes available when STANDBY signal is


"low" (together with +12V for the basic board), when +3V3 from
the basic board is present the two DC-DC converters channels
inside 7T03 are activated. Initially only the 24V to 5V converter
(channel 1 of 7T03 generating +5V-DVBS) will effectively work,
while +V-LNB is held at a level around 11V7 via diode 6T55.
After 7T05 is initialized, the second channel of 7T03 will start
and generates a voltage higher then LNB-RF1 with 0V8. +5VDVBS start-up will imply +3V3-DVBS start-up, with a small
delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will
be enabled.

CSM
When CSM is activated and there is a USB stick connected to
the TV, the software will dump the complete CSM content to the
USB stick. The file (Csm.txt) will be saved in the root of the USB
stick. If this mechanism works it can be concluded that a large
part of the operating system is already working (MIPS, USB...)

5.8.5

DC/DC Converter
Description basic board

If +24V drops below +15V level then the DVB-S2 supply will
stop, even if +3V3 is still present.

The basic board power supply consists of 4 DC/DC converters


and 5 linear stabilizers. All DC/DC converters have +12V input
voltage and deliver:
+1V1 supply voltage (1.15V nominal), for the core voltage
of PNX85500, stabilized close to the point of load;
SENSE+1V1 signal provides the DC-DC converter the
needed feedback to achieve this.
+1V8 supply voltage, for the DDR2 memories and DDR2
interface of PNX85500.
+3V3 supply voltage (3.30V nominal), overall 3.3 V for
onboard ICs, for non-5000 series SSB diversities only.
+5V (5.15V nominal) for USB, WIFI and Conditional
Access Module and +5V5-TUN for +5V-TUN tuner
stabilizer.

Debugging
The best way to find a failure in the DC/DC converters is to
check their start-up sequence at power on via the mains cord,
presuming that the stand-by microprocessor and the external
supply are operational. Take STANDBY signal "high"-to-"low"
transition as time reference.
When +12V becomes available (maximum 1 second after
STANDBY signal goes "low") then +1V1 is started immediately.
After ENABLE-3V3 goes "low", all the other supply voltages
should rise within a few milliseconds.
Tips
Behaviour comparison with a reference TV550 platform
can be a fast way to locate failures.
If +12V stays "low", check the integrity of fuse 1U40.
Check the integrity (at least no short circuit between drain
and source) of the power MOS-FETs before starting up the
platform in SDM, otherwise many components might be
damaged. Using a ohmmeter can detect short circuits
between any power rail and ground or between +12V and
any other power rail.
Short circuit at the output of an integrated linear stabilizer
(7UC0, 7UD2 or 7UD3) will heat up this device strongly.
Switching frequencies should be 500 kHz ...600 kHz for
12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,
900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC
converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V
LNB DC-DC converters operates at 300 kHz while for 5 V
to 1.1 V DC-DC converter 900 kHz is used.

The linear stabilizers are providing:


+1V2 supply voltage (1.2V nominal), stabilized close to
PNX85500 device, for various other internal blocks of
PNX85500; SENSE+1V2 signal provides the needed
feedback to achieve this.
+2V5 supply voltage (2.5V nominal) for LVDS interface and
various other internal blocks of PNX85500; for 5000 series
SSB diversities the stabilizer is 7UD2 while for the other
diversities 7UC0 is used.
+3V3 supply voltage (3V3 nominal) for 5000 series SSB
diversities, provided by 7UD3; in this case the 12V to 3V3
DC-DC converter is not present.
+5V-TUN supply voltage (5V nominal) for tuner and IF
amplifier.
+3V3-STANDY (3V3 nominal) is the permanent voltage,
supplying the Stand-by microprocessor inside PNX85500.
5.8.6
Supply voltage +1V1 is started immediately when +12V voltage
becomes available (+12V is enabled by STANDBY signal when
"low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN
are switched "on" by signal ENABLE-3V3 when "low", provided
that +12V (detected via 7U40 and 7U41) is present.

2013-Jan-29

Exit Factory Mode


When an F is displayed in the screens right corner, this
means the set is in Factory mode, and it normally
happens after a new SSB is mounted. To exit this mode, push
the VOLUME minus button on the TVs local keyboard for 10
seconds (this disables the continuous mode).

back to
div. table

Service Modes, Error Codes, and Fault Finding

EN 49

Not all failures or error messages should be interpreted as


fault.For instance root cause can be due to wrong option
codes settings => e.g. DVBS2Suppoprted : False/True.
In the Uart log startup script we can observe and check the
enabled loaded option codes.

Logging
When something is wrong with the TV set (f.i. the set is
rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every
Windows application via Programs, Accessories,
Communications, Hyperterminal. Connect a ComPair UARTcable (3138 188 75051) from the service connector in the TV to
the multi function jack at the front of ComPair II box.
Required settings in ComPair before starting to log:
- Start up the ComPair application.
- Select the correct database (open file Q55X.X, this will set
the ComPair interface in the appropriate mode).
- Close ComPair
After start-up of the Hyperterminal, fill in a name (f.i. logging)
in the Connection Description box, then apply the following
settings:
1. COMx
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed.
This is also the case during rebooting of the TV set (the same
logging appears time after time). Also available in the logging
is the Display Option Code (useful when there is no picture),
look for item DisplayRawNumber in the beginning of the
logging. Tip: when there is no picture available during rebooting
you are able to check for error devices in the logging (LAYER
2 error) which can be very helpful to determine the failure cause
of the reboot. For protection state, there is no logging.

5.8.8

5.

Then push the SOURCE button for 10 seconds until the F


disappears from the screen.
5.8.7

Q552.1E LA

Defective sectors (bad blocks) in the Nand Flash can also be


reported in the logging.
Startup in the SW upgrade application and observe the Uart
logging:
Starting up the TV set in the Manual Software Upgrade mode
will show access to USB, meant to copy software content from
USB to the DRAM.Progress is shown in the logging as follows:
cosupgstdcmds_mcmdwritepart: Programming 102400 bytes,
40505344 of 40607744 bytes programmed.
Startup in Jett Mode:
Check Uart logging in Jet mode mentioned as : JETT UART
READY.
Uart logging changing preset:
=> COMMAND: calling DFB source = RC6, system=0, key = 4.

5.8.9

Loudspeakers
Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!

5.8.10 PSL
In case of no picture when CSM (test pattern) is activated and
backlight doesnt light up, its recommended first to check the
inverter on the PSL + wiring (LAYER 2 error = 17 is displayed
in SDM).

Guidelines Uart logging


Description possible cases:

5.8.11 Tuner
Uart loggings are displayed:
When Uart loggings are coming out, the first conclusion we
can make is that the TV set is starting up and
communication with the flash RAM seems to be supported.
The PNX85500 is able to read and write in the DRAMs.
We can not yet conclude : Flash RAM and DRAMs are fully
operational/reliable.There still can be errors in the data
transfers, DRAM erros, read/write speed and timing
control.

Attention: In case the tuner is replaced, always check the tuner


options!
5.8.12 Display option code
Attention: In case the SSB is replaced, always check the
display option code in SAM, even when picture is available.
Performance with the incorrect display option code can lead to
unwanted side-effects for certain conditions.

No Uart logging at all:


In case there is no Uart logging coming out, check if the
startup script can be send over the I2C bus (3 trials to
startup) + power supplies are switched on and stable.
No startup will end up in a blinking LED status : error
LAYER 1 = 2, error LAYER 2 = 53 (startup with SDM
solder paths short).
Error LAYER 2 = 15 (hardware cause) is more related to
a supply issue while error LAYER 2 = 53 (software cause)
refers more to boot issues.

New in this chassis:


While in the download application (start up in TV mode + OK
button pressed), the display option code can be changed via
062598 HOME XXX special SAM command (XXX=display
option in 3 digits).

Uart loggings reporting fault conditions, error messages, error


codes, fatal errors:
Failure messages should be checked and investigated.For
instance fatal error on the PNX51x0: check startup of the
back-end processor, supplies..reset, I2C bus. => error
mentioned in the logging as: *51x0 failed to start by itself*.
Some failures are indicated by error codes in the logging,
check with error codes table (see Table 5-2 Error code
overview).e.g. => <<<ERROR>>>PLFPOW_MERR.C :
First Error (id=10,Layer_1=2,Layer_2=23).

I2C bus error mentioned as e.g.: I2C bus 4 blocked.

back to
div. table

2013-Jan-29

EN 50

5.

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.8.13 SSB Replacement


Follow the instructions in the flowchart in case a SSB has to be
exchanged. See figure SSB replacement flowchart.
In st ru ct io n n o t e SSB rep lacem en t Q543.x, Q548.x, Q549.x, and Q55x.x

ST AR T

Before starting:
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder upgrades in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in
case there are more than one "autorun.upg" files on the USB stick.

Set is still oper ating?


No
Yes

C onnect the U SB stick to the set,


go to SAM and save the current TV settings via Upload to USB
1. D isconnect the WiF i module fr om the PC I connector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.

Start-up the set


Due to a possible wrong display option code in the received Service
SSB (NVM), its possible that no picture is displayed. Due to this
the download application will not be shown either. This tree enables you
to load the main software step-by-step via the UART logging on the PC
(this for visual feedback).
No pictur e displayed

1) Start up the TV set, equiped with the Service SSB,


and enable the UART logging on the PC.

Set behaviour?

Pictur e displayed
Set is starting up without software
upgrade menu appearing on screen

Pictur e displayed
Set is starting up with software
upgrade menu appearing on screen

2) The TV set will start-up automatically in the


download application if main TV software is not loaded.

3) Plug the prepared USB stick into the TV set. Follow the
instructions in the UART log file, press Right cursor key to enter
the list. Navigate to the autorun.upg file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press Ok.

1) Plug the USB stick into the TV set and select


the autorun .upg file in the displayed browser.

2) Now the main software will be loaded automatically,


supported by a progress bar.
4) Press "Down" cursor and Ok to start flashing the main
TV software. Printouts like: L: 1-100%, V: 1-100% and
P: 1-100% should be visible now in the UART logging.

5) Wait until the message Operation successful ! is logged in


the UART log and remove all inserted media. Restart the TV set.

3) Wait until the message Operation successful ! is displayed


and remove all inserted media. Restart the TV set.

Set the correct Display code via 062598 -HOME- xxx where
xxx is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)

After entering the Display Option code, the set is going to


Standby
(= validation of code)

No

Connect PC via the ComPair interface to Service connector.

Restart the set

Saved settings
on USB stick?

Yes

Start TV in Jett mode (DVD I + (OSD))


Open ComPair browser Q54x

Go to SAM and reload settings


via Download from USB function.

In case of settings reloaded from USB, the set type,


serial number, display 12 NC, are automatically stored
when entering display options.

Program set type number, serial number, and display 12 NC


Program E - DFU if needed.
If not already done:
Check latest software on Service website.
Update main and Stand-by software via USB.

Attention point for Net TV: If the set type and serial number are not
filled in, the Net TV functionality will not work. It will not be possible
to connect to the internet.

- Check if correct display option code is programmed.


- Verify option codes according to sticker inside the set.
- Default settings for white drive > see Service Manual.

Check and perform alignments in SAM according to the


Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.


Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.

End

Q54x.E SSB Board swap VDS


Updated 22-03-2010

H_16771_007a.eps
100402

Figure 5-11 SSB replacement flowchart

2013-Jan-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

Q552.1E LA

5.

EN 51

Set is st art in g u p in F act o ry m o d e

Set is starting up in F actory m ode?

Noisy picture with bands/lines is visible and the


RED LED is continuous on.

An F is displayed (and the HDMI 1


input is displayed).

- Press the volume minus button on the TVs local keyboard for 5 ~10
seconds
- Press the SOURCE button for 10 seconds until the F disappears
from the screen or the noise on the screen is replaced by blue mute

The noise on the screen is replaced


with the blue mute or the F is disappeared!

Unplug the mains cord to verify the correct


disabling of the Factory mode.

Program display option code


via 062598 MENU, followed by
the 3 digits code of the display
(this code can be found
on a sticker on - or inside - the set).

After entering display option code, the set is


going in stand-by mode (= validation of code)

R estart the set

H_16771_007b.eps
100322

Figure 5-12 SSB replacement flowchart - Factory mode

back to
div. table

2013-Jan-29

EN 52

5.

Q552.1E LA

Service Modes, Error Codes, and Fault Finding

18753_211_100811.eps
110810

Figure 5-13 SSB start-up

5.9

Software Upgrading

5.9.1

Introduction

Automatic Software Upgrade


In normal conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the AUTORUN.UPG
(FUS part of the one-zip file: e.g. 3104 337 05661 _FUS
_Q555X_ x.x.x.x_prod.zip). This can also be done by the
consumers themselves, but they will have to get their software
from the commercial Philips website or via the Software Update
Assistant in the user menu (see eUM). The autorun.upg file
must be placed in the root of the USB stick.
How to upgrade:
1. Copy AUTORUN.UPG to the root of the USB stick.
2. Insert USB stick in the set while the set is operational. The
set will restart and the upgrading will start automatically. As
soon as the programming is finished, a message is shown
to remove the USB stick and restart the set.

The set software and security keys are stored in a NANDFlash, which is connected to the PNX85500.
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a
stand alone set, without the need of an E-JTAG debugger. A
description on how to upgrade the main software can be found
in the electronic User Manual.
Important: When the NAND-Flash must be replaced, a new
SSB must be ordered, due to the presence of the security keys!
(CI +, MAC address, ...).
Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software => see the eUM (electronic User
Manual) for instructions.
3. Perform the alignments as described in chapter 6 (section
6.5 Reset of Repaired SSB).
4. Check in CSM if the CI + key, MAC address.. are valid.
For the correct order number of a new SSB, always refer to the
Spare Parts list!
5.9.2

Manual Software Upgrade


In case that the software upgrade application does not start
automatically, it can also be started manually.
How to start the software upgrade application manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the OK button on a Philips TV remote control or a
Philips DVD RC-6 remote control (it is also possible to use
a TV remote in DVD mode). Keep the OK button
pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.

Main Software Upgrade

2013-Jan-29

Attention!
In case the download application has been started manually,
the autorun.upg will maybe not be recognized.
What to do in this case:
1. Create a directory UPGRADES on the USB stick.

The UpgradeAll.upg file is only used in the factory.

back to
div. table

Service Modes, Error Codes, and Fault Finding


2. Rename the autorun.upg to something else, e.g. to
software.upg. Do not use long or complicated names,
keep it simple. Make sure that AUTORUN.UPG is no
longer present in the root of the USB stick.
3. Copy the renamed upg file into this directory.
4. Insert USB stick into the TV.
5. The renamed upg file will be visible and selectable in the
upgrade application.

5.9.5

Q552.1E LA

5.

EN 53

ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM


content. Must be programmed via ComPair or can be
loaded via USB, be aware that all alignments stored in
NVM are overwritten here.

UART logging 2K10 (see section 5.8 Fault Finding and


Repair Tips, 5.8.7 Logging)

Back-up Software Upgrade Application


If the default software upgrade application does not start (could
be due to a corrupted boot sector) via the above described
method, try activating the back-up software upgrade
application.
How to start the back-up software upgrade application
manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the CURSOR DOWN-button on a Philips TV
remote control while reconnecting the TV to the Mains/AC
Power.
3. The back-up software upgrade application will start.
Trouble Shooting - Software Upgrade Failure
Sometimes software upgrade fails, shown by:
pop-up screen shows The software upgrade could not be
completed, or
the third programming bar stops at 80 %.
This is caused by a high amount of big files in the flash, in
combination with a high number of bad blocks.
Cure
1. Activate CSM by pressing 123654 on the RC
2. Press the red button on the RC
3. Press 25327 on the RC.
This clears all debug dumps from the flash, and the dump count
is reset to 0.
In UART, following logging will appear:
DEBUG DUMP on Flash: clear...
DEBUG DUMP on Flash: clear done
5.9.3

Stand-by Software Upgrade via USB


In this chassis it is possible to upgrade the Stand-by software
via a USB stick. The method is similar to upgrading the main
software via USB.
Use the following steps:
1. Create a directory UPGRADES on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbyFactory_88.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section
Manual Software Upgrade.
5. Select the appropriate file and press the OK button to
upgrade.

5.9.4

Content and Usage of the One-Zip Software File


Below the content of the One-Zip file is explained, and
instructions on how and when to use it.
AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the
program instruction and software content, needed to
upgrade the ambilight CPLD on the TV550 platform.
BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the
BalanceFPGA software in upg format.
FUS_Q555X_x.x.x.x_prod.zip. Contains the
autorun.upg which is needed to upgrade the TV main
software and the software download application.
PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the
PNX5130 software in upg format.
StandbySW_Q555X_x.x.x.x_prod.zip. Contains the
StandbyFactory software in upg format.

back to
div. table

2013-Jan-29

EN 54

6.

Q552.1E LA

Alignments

6. Alignments
Index of this chapter:
6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 Option Settings
6.5 Reset of Repaired SSB
6.6 Total Overview SAM modes

6.1

6.3.1

6.2

50

Colour

Light Sensor

Off

Picture format

Unscaled

In menu Picture, choose Pixel Plus HD and set picture


settings as follows:

Dynamic Contrast

Off

Dynamic Backlight

Off

Colour Enhancement

Off

Gamma

Go to the SAM and select Alignments-> White point.

White point alignment LCD screens:


Use a 90% white screen to the HDMI input and set the
following values:
Colour temperature: Normal.
All White point values to: 127.

First, set the correct options:


In SAM, select Option numbers.
Fill in the option settings for Group 1 and Group 2
according to the set sticker (see also paragraph 6.4
Option Settings).
Press OK on the remote control before the cursor is
moved to the left.
In submenu Option numbers select Store and press
OK on the RC.
OR:
In main menu, select Store again and press OK on
the RC.
Switch the set to Stand-by.
Warming up (>15 minutes).

In case you have a colour analyser:


Measure, in a dark environment, with a calibrated
contactless colour analyser (Minolta CA-210 or Minolta
CS-200) in the centre of the screen.
Adjust the correct x, y coordinates (while holding one of the
White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see Table 6-1 White D alignment
values CCFL backlight panels, 6-2 White D alignment
values - LED - Minolta CA-210 or 6-3 White D alignment
values - LED - Minolta CS-200). Tolerance: dx: 0.002, dy:
0.002.
Repeat this step for the other colour temperatures that
need to be aligned.
When finished press OK on the RC and then press STORE
(in the SAM root menu) to store the aligned values to the
NVM.
Restore the initial picture settings after the alignments.

Hardware Alignments
Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select ALIGNMENTS and go to one of the sub
menus. The alignments are explained below.
The following items can be aligned:
White point
Ambilight
TCON Alignment
Reset TCON Alignment.

Table 6-1 White D alignment values CCFL backlight panels


Value

Cool (11000K)

Normal (9000K)

Warm (6500K)

0.276

0.287

0.313

0.282

0.296

0.329

Table 6-2 White D alignment values - LED - Minolta CA-210

To store the data:


Press OK on the RC before the cursor is moved to the
left
In main menu select Store and press OK on the RC
Switch the set to stand-by mode.

Value

Cool (9420K)

Normal (8120K)

Warm (6080K)

0.282

0.292

0.320

0.298

0.311

0.345

Table 6-3 White D alignment values - LED - Minolta CS-200

For the next alignments, supply the following test signals via a
video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25
MHz (channel 3).
2013-Jan-29

100

Brightness

Picture Setting

Not applicable.

6.3

Contrast

Alignment Sequence

Choose TV menu, Setup, More TV Settings and then


Picture and set picture settings as follows:

Picture Setting

Perform all electrical adjustments under the following


conditions:
Power supply voltage (depends on region):
AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%).
AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%).
EU: 230 VAC / 50 Hz ( 10%).
LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%).
US: 120 VAC / 60 Hz ( 10%).
Connect the set to the mains via an isolation transformer
with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heat sinks as ground.
Test probe: Ri > 10 M, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform
alignments.
6.1.1

White Point

General Alignment Conditions

LATAM models: an NTSC M TV-signal with a signal


strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).

back to
div. table

Value

Cool (11000K)

Normal (9000K)

Warm (6500K)

0.276

0.287

0.313

0.282

0.296

0.329

Alignments
If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production.
Select a COLOUR TEMPERATURE (e.g. COOL,
NORMAL, or WARM).
Set the RED, GREEN and BLUE default values according
to the values in Table 6-4 to Table 6-15.
When finished press OK on the RC, then press STORE (in
the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.

White Tone

Normal

125

127

95

Cool

122

127

109

Warm

127

119

53

White Tone

e.g. 32PFL5405x
32PFL3x05x

e.g. 42PFL5405x

Colour Temp R

Normal

127

113

118

Cool

109

102

127

Warm

127

100

66

Table 6-12 White tone default setting 42" (Matisse)

Normal

127

118

116

Cool

123

118

127

White Tone

Warm

127

108

78

Colour Temp R

Normal

114

113

127

Cool

98

100

127

Warm

127

115

94

Table 6-5 White tone default setting 32" (Van Gogh)


e.g. 32PFL5605x

Colour Temp R

e.g. 42PFL7605x

Table 6-13 White tone default setting 46" (van Gogh)

Normal

125

126

121

Cool

113

117

127

White Tone

Warm

127

117

78

Colour Temp R

Normal

112

127

125

Cool

97

116

127

Warm

125

127

89

Table 6-6 White tone default setting 32" (Matisse)

White Tone

e.g. 32PFL6605x, 7605x

Colour Temp R

e.g. 46PFL5605x

Table 6-14 White tone default setting 46" (Matisse)

Normal

126

127

116

White Tone

Cool

122

121

127

Colour Temp R

Warm

127

116

76

Normal

127

120

82

Cool

127

122

97

Warm

127

111

40

Table 6-7 White tone default setting 37" (Rembrandt)


White Tone

e.g. 46PFL7605x

Table 6-15 White tone default setting 52" (van Gogh)

e.g. 37PFL5405x

Colour Temp R

Normal

127

100

104

White Tone

Cool

126

105

122

Colour Temp R

Warm

127

91

63

Normal

123

127

106

Cool

109

127

120

Warm

125

127

71

Table 6-8 White tone default setting 37" (Matisse)


White Tone

6.3.2

e.g. 37PFL7605x

Colour Temp R

119

117

127

Cool

103

104

127

Warm

127

114

89

Ambilight
Every ambient light module is aligned by a matrix and by the
brightness. After replacement of a module, the brightness/color
must be aligned with the other modules:
1. Go to SAM.
2. Select Alignments.
3. Select Ambilight. A white test pattern shall be displayed
by the ambilight modules.
4. Select the number of the module that have to be aligned.
Module 1 is the first one which will come across according
the wiring path, starting at the small signal panel,
proceeding towards the ambient light modules.The first
module will be attached to the next module 2. Module
number 2 to number 3 etc..as follows the way to define the
ambilight module numbering.
5. Align the brightness compaired with the neighbouring
modules. The brightness is automatically stored.
6. Select one of 10 matrixes which color matches most with
the neighbouring modules, matrix 0 is the factory
alignment and can always be retrieved. (see table 6-16
Overview matrix correction table
7. The alignment is stored automatically.

Table 6-9 White tone default setting 40" (Van Gogh)


e.g. 40PFL5605x

Colour Temp R

Normal

120

125

127

Cool

104

112

127

Warm

127

120

87

Table 6-10 White tone default setting 40" (Matisse)


White Tone

e.g. 52PFL5605x

Normal

White Tone

EN 55

e.g. 40PFL7605x

Colour Temp R

Colour Temp R

White Tone

6.

Table 6-11 White tone default setting 42" (Rembrandt)

Table 6-4 White tone default setting 32" (Rembrandt)

White Tone

Q552.1E LA

e.g. 40PFL6605x

Colour Temp R

Normal

114

127

B
114

Cool

95

122

127

Warm

127

127

65

back to
div. table

2013-Jan-29

EN 56

6.

Alignments

Q552.1E LA

Table 6-16 Overview matrix correction table

6.3.3

Matrix #

fR

fG

fB

Matrix 0

Matrix 1

0.95

0.95

Matrix 2

0.95

0.95

Matrix 3

0.95

0.95

Matrix 4

0.95

Matrix 5

0.95

Matrix 6

0.95

Matrix 7

0.97

0.95

Matrix 8

0.97

0.95

Matrix 9

0.95

0.97

6.4.3

Select the sub menu's to set the initialisation codes (options) of


the model number via text menus.
See Table 6-18 SAM mode overview.
6.4.4

Sets with forward integration have the TCON on SSB. The


alignment of this TCON is stored in the SSB, and is related to
the used display. When an SSB or a display is replaced, a new
value must be entered.
A default value (see table below) is copied from the display file
(after entering the correct display code) and is shown in the
SAM menu. But on top of this, the default value can be
overruled manually via the menu item TCON alignment.
The current value is shown with 4 digits, and can be changed
by a digit entry. After pressing OK, the value is stored.
The menu item "Reset TCON alignment" can be used to return
to the default value from the display file. A notification is shown:
"TCON alignment has been reset".

Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Use of Alternative BOM => an alternative BOM number usually
indicates the use of an alternative display or power supply. This
results in another display code thus in another Option code.
Refer to Chapter 2. Technical Specifications, Diversity, and
Connections.

Table 6-17 TCON/VCOM default settings


Panel

TCON/VCOM Alignment

LGD (max: 1023)

32 CCFL (Rembrandt)

420

37 CCFL (Rembrandt)

403

Sharp (max: 255)

6.4

Option Settings

6.4.1

Introduction

42 CCFL (Rembrandt)

443

32 LED (Matisse)

428

37 LED (Matisse)

375

32 LED (Van Gogh)

109

40 LED (Van Gogh)

95

46 LED (Van Gogh)

143

52 LED (Van Gogh)

203

40 LED (da Vinci)

0098

46 LED (da Vinci)

0129

6.4.5

Option Code Overview


Refer to the sticker in the set for the correct option codes.
Important: after having edited the option numbers as
described above, you must press OK on the remote control
before the cursor is moved to the left!

6.5

Reset of Repaired SSB


A very important issue towards a repaired SSB from a Service
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
00PF0000000000 and Production code 00000000000000.
Also the virgin bit is to be set. To set all this, you can use the
ComPair tool or use the NVM editor and Dealer options
items in SAM (do not forget to store).

The microprocessor communicates with a large number of I2C


ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence / absence of these
PNX51XX ICs (back-end advanced video picture improvement
IC which offers motion estimation and compensation features
(commercially called HDNM) plus integrated Ambilight control)
is made known by the option codes.

After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
the TV has to be set according to the type plate of the set. For
this (new in this platform), you can use the NVM editor in
SAM. This action also ensures the correct functioning of the
Net TV feature and access to the Net TV portals. The loading
of the CTN and production code can also be done via ComPair
(Model number programming).

Notes:
After changing the option(s), save them by pressing the OK
button on the RC before the cursor is moved to the left,
select STORE in the SAM root menu and press OK on the
RC.
The new option setting is only active after the TV is
switched off / stand-by and on again with the mains
switch (the NVM is then read again).
6.4.2

Opt. No. (Option numbers)


Select this sub menu to set all options at once (expressed in
two long strings of numbers).
An option number (or option byte) represents a number of
different options. When you change these numbers directly,
you can set all options very quickly. All options are controlled
via eight option numbers.
When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set both option number lines. You can find the correct
option numbers on a sticker inside the TV set.
Example: The options sticker gives the following option
numbers:
08192 00133 01387 45160
12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
second line (group 2) indicate software options 5 to 8.
Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
When all the correct options are set, the sum of the decimal
values of each Option Byte (OB) will give the option number.

TCON/VCOM alignment

Supplier

(Service) Options

In case of a display replacement, reset the Operation hours


display to 0, or to the operation hours of the replacement
display.

Dealer Options
6.5.1
For dealer options, in SAM select Dealer options.
See Table 6-18 SAM mode overview.

2013-Jan-29

SSB identification
Whenever ordering a new SSB, it should be noted that the
correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The

back to
div. table

Alignments

Q552.1E LA

6.

EN 57

ordering number of a Service SSB is the same as the ordering


number of an initial factory SSB.

18310_221_090318.eps
090319

Figure 6-1 SSB identification

back to
div. table

2013-Jan-29

EN 58
6.6

6.

Q552.1E LA

Alignments

Total Overview SAM modes


Table 6-18 SAM mode overview
Main Menu

Sub-menu 1

Sub-menu 2

Hardware Info

A. SW version

e.g. Q5521_0.33.0.0

Sub-menu 3

B. Stand-by processor version e.g. STDBY_42.42.0.0


C. Production code

Description
Display TV & Stand-by SW version and CTN serial
number

e.g. see type plate

Operation hours

Displays the accumulated total of operation hours.TV


switched on/off & every 0.5 hours is increase one

Errors

Displayed the most recent errors

Reset error buffer


Alignment

Clears all content in the error buffer


White point

Colour temperature

Normal
Warn

3 different modes of colour temperature can be


selected

Cool
White point red

LCD White Point Alignment. For values,


see Table 6-4 White tone default setting 32"
(Rembrandt) until 6-15 White tone default setting 52"
(van Gogh)

White point green


White point blue
Ambilight

Select module
Brightness
Select matrix

Dealer options

TCON alignment

used when a new display code (after a SSB


exchange) is keyed-in and if you have alignment
values from production; see Table 6-17 TCON/
VCOM default settings

Reset TCON alignment

used when a new display code (after a SSB


exchange) is keyed-in and if you do not have
alignment values from production

Virgin mode

Off/On

Select Virgin mode On/Off. TV starts up / does not


start up (once) with a language selection menu after
the mains switch is turned on for the first time (virgin
mode)

E-sticker

Off/On

Select E-sticker On/Off (USPs on-screen)

Auto store mode

None
PDC/VPS
TXT page
PDC/VPS/TXT

2013-Jan-29

back to
div. table

Alignments

Q552.1E LA

Main Menu

Sub-menu 1

Sub-menu 2

Sub-menu 3

Description

Options

Digital broadcast

DVB

Off/On

Select DVB On/Off

Digital features

Display

Video reproduction

6.

EN 59

DVB - T installation

Off/On or Country dependent

Select DVB T installation On/Off or by country

DVB - T light

Off/On

Select DVB T light On/Off

DVB - C

Off/On

Select DVB C On/Off

DVB - C installation

Off/On or Country dependent

Select DVB C installation On/Off or by country

DVB - C light

Off/On

Select DVB C light On/Off

DVB - S

Off/On

Select DVB S On/Off

Over the air download

Off/On or Country dependent

Select Over the air download On/Off or by country

8 days EPG

Off/On

Select 8 day EPG On/Off


Select Ethernet On/Off

Ethernet

Off/On

Wi-Fi

Off/On

Select Wi-Fi On/Off

DLNA

Off/On

Select DLNA On/Off

On-line service

On

On-line service is On

Videostore SD card slot

Off/On

Select Videostore SD card slot On/Off


Select Multiview On/Off

Multiview

Off/On

Internet software update

Off

Internet software update is Off

Screen

237 / LCD Sharp D3GA23 46"

Displayed the panel code & type model

LightGuide

Off/On

Select LightGuide On/Off

Display fans

Not present/Present

Select Display fans Present/Not present

Temperature sensor

No sensor/On backside/In display/ Sensor present Yes/No and in case Yes, where
On SSB

Temperature LUT

N.A.

E-box & monitor

Off/On

Select E-box & monitor On/Off

Light sensor

Off/On

Select Light sensor On/Off

Light sensor type

0/1/2/3

Select Light sensor type form 0 to 3 (for difference


styling)

Super resolution

Off/On

Super resolution Off/On

Smart bit enhancement

Off/On

Smart bit enhancement Off/On

Pixel Plus type

Pixel Plus HD

Select type of picture improvement

Perfect Pixel HD
Pixel Precise HD
Natural motion type

Perfect Natural Motion

Natural motion type selection

HD Natural Motion
Ambilight

None

Select type of Ambilight modules use

2 sided 3/3
2 sided 4/4
2 sided 5/5
2 sided 6/6
2 sided 7/7
3 sided 5/5/5
3 sided 6/6/6
3 sided 7/7/7
3 sided 6/9/6
Ambilight sunset
Audio reproduction

Off/On

Acoustic system

Ambilight sunset On/Off


Cabinet design used for setting dynamic audio
parameters

back to
div. table

2013-Jan-29

EN 60

6.

Main Menu

Q552.1E LA

Alignments

Sub-menu 1

Sub-menu 2

Sub-menu 3

Description

Source selection

EXT1/AV1 type

SCART CVBS RGB LR

Select input source when connected with external


equipment

CVBS Y/C YPbPr LR


CVBS Y/C YPbPr HV LR
EXT2/AV2 type

SCART CVBS RGB LR


CVBS LR

Select input source when connected with external


equipment

YPbPr LR
None
EXT3/AV3 type

None
CVBS

Select input source when connected with external


equipment

CVBS LR
CVBS Y/C LR
YPbPr
YPbPr LR
YPbPr HV LR

Miscellaneous

SIDE I/O

Off/On

Select SIDE I/O On/Off

S-VIDEO (Y/C)

Off/On

Select S-VIDEO (Y/C) On/Off

HDMI 2

Off/On

Select HDMI 2 On/Off

HDMI 3

Off/On

Select HDMI 3 On/Off

HDMI side

Off/On

Select HDMI side On/Off

HDMI CEC Viewport 21:9

Off/On

Select HDMI CEC Viewport 21:9 On/Off

HDMI CEC OneUX seamless

Off/On

Select HDMI CEC OneUX seamless On/Off

Europe

Select Region/country

Region

AP-PAL-Multi
China
Australia
Latam
Russia
Tuner type

Select type of Tuner used

Hotel mode
Option numbers

Off

Hotel mode is Off

Group 1

e.g. 00008.01793.15421.08192

The first line (group 1) indicates hardware options 1


to 4

Group 2

e.g. 44013.34315.00000.00000

The second line (group 2) indicates software options


5 to 8

Store

Store after changing

Initialise NVM

N.A.

Store

Select Store in the SAM root menu after making any


changes

Operation hours display

Software maintenance

Software events

0003

In case the display must be swapped for repair, you


can reset the Display operation hours to 0. So,
this one does keeps up the lifetime of the display
itself (mainly to compensate the degeneration
behaviour)

Display

Display information is for development purposes

Clear
Test reboot
Test cold reboot
Test application crash
Hardware events

Display

Display information is for development purposes

Clear
Test setting

Digital info

Centre frequency: 774605208


QAM modulation: None

Display information is for development purposes

Symbol rate:
Original network ID: 0
Network ID: 0
Transport stream ID: 0
Service ID: 0
Hierarchical modulation: 0
Selected video PID: 0
Selected main audio PID: 0
Selected 2nd audio PID: 0
Install start frequency

000

Install start frequency from 0 MHz

Install end frequency

999

Install end frequency as 999 MHz

Digital only

Select Digital only or Digital + Analogue before


installation

Default install frequency


Installation

Digital + Analogue

2013-Jan-29

back to
div. table

Alignments
Main Menu

Sub-menu 1

Sub-menu 2

Development file
versions

Development 1 file version

Display parameters DISPT6.0.9.8

Sub-menu 3

Q552.1E LA

6.

EN 61

Description
Display information is for development purposes

Acoustics parameters ACSTS


0.39.6.16
PQ - TV550 1.0.22.1
PQS- Profile set
PQF - Fixed settings
PQU - User styles
Ambilight parameters PRFAM 5.0.2.4
Development 2 file version

12NC one zip software

Display information is for development purposes

Initial main software


NVM version Q55x1_0.3.1.0
Flash units software
Temp com file version none
Upload to USB

All

To upload several settings from the TV to an USB


stick

Channel list
Personal settings
Option codes
Alignments
Identification data
History list
Download from USB

All

To download several settings from the USB stick to


the TV

Channel list
Personal settings
Option codes
Alignments
Identification data
NVM editor

Type number

see type plate

AG code

see type plate

NVM editor; re key-in type number and production


code after SSB replacement

back to
div. table

2013-Jan-29

EN 62

7.

Q552.1E LA

Circuit Descriptions

7. Circuit Descriptions
7.1

Index of this chapter:


7.1 Introduction
7.2 Power Supply
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception
7.6 HDMI
7.7 Video and Audio Processing - PNX85500
7.8 Back-End
7.9 Ambilight
7.10 TCON

Introduction
The Q552.1E LA is a new chassis launched in Europe in 2010.
The whole range is covered by PNX8550x main IC so-called
NXP TV550 platform.
The major deltas versus its predecessor Q543/Q548 are the
DVBS, DLNA1.5+, Wireless Laptop Live (WLL-Dongle),
Ethernet, and WiFi Ready (Net-TV) functionality.
The Q552.1E LA chassis comes with the following stylings:
Rembrandt (series xxPFL54xx, with LGD CCFL display),
Van Gogh (series xxPFL56xx, with Sharp LED display),
Matisse (series xxPFL76xx, with LGD LED display).

Notes:
Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.

7.1.1

Implementation
Key components of this chassis are:
PNX85500 System-On-Chip (SOC) TV Processor
TX31XX Hybrid Tuner (DVB-T/C, analogue)
STV6110AT DVB-S Satellite Tuner
SII9x87 HDMI Switch
TPA312xD2PWP Class D Power Amplifier
LAN8710 Dual Port Gigabit Ethernet media access
controller.

7.1.2

TV550 Architecture Overview


For details about the chassis block diagrams refer to chapter 9.
Block Diagrams. An overview of the TV550 architecture can be
found in Figure 7-1.

18770_244_100203.eps
100219

Figure 7-1 Architecture of TV550 platform: with TCON integrated in display

2013-Jan-29

back to
div. table

Circuit Descriptions

Q552.1E LA

7.

EN 63

18770_245_100203.eps
100219

Figure 7-2 Architecture of TV550 platform: with TCON integrated on SSB

back to
div. table

2013-Jan-29

EN 64

Circuit Descriptions

Q552.1E LA

SSB Cell Layout

1M 71

1 M 59

1M 3 6

2D D IM

1G 51

1M99

D C /D C

FPGA

1M 9 5

D DR

LVD S - O U T

Class-D

1
D
3
8

CA
L O W P RO F IL E

D D R2

D D R2

1
7
3
5

F LASH

D D R2

1G 50

S D- S L O T

CA
PN X85500
M1
27 x27
1.00 m m

E TH

TS - IN
USB
H D MI
G P IO

IS
S P D IF

ANA
AUD

ANA
V ID

S TD B Y

USB
2 .0

D D R2

R J4 5

Tuner

ser v

Pb

Pr

S ca rt2 /Y P b P r

L /R

NO S P LIT TE R !!!

1M 20

7.1.3

7.

USB
2 .0
HD
MI
1 .3

9187

OUT

CT RL

VGA

HD
MI
1 .3

HD
MI
1 .3

SPO

HD
MI
1 .3

S ca rt1 /Y P b P r

18770_246_100203.eps
111121

Figure 7-3 SSB layout cells (top view) (non-DVBS without TCON)

1 M20

1M 71

1 M59

1M36

2 D D IM

1 G 51

1G 50

D V B -S

D V B -S

Quad LVDS

1M36

2D D IM

1 G 51

CA

FPGA

D D R2
LVD S -O U T

1 M 95

D DR

1M99

D C /D C

T S -IN
USB
H D MI
G P IO

ANA
AUD

ANA
V ID

S TD B Y

USB
2.0

D D R2

T u ner

serv

E TH
IS
S P D IF

S D -S L O T

CA
PN X85500
M1
27 x27
1.00 m m

R J4 5
L /R

USB
2.0
HD
MI
1 .3

CT RL

9187

OUT

Pb

Pr

S ca rt2 /Y P b P r

1
D
3
8

20,00

D D R2

C lassD

1
7
3
5

FLASH

D D R2

1G 50

HD
MI
1 .3

HD
MI
1 .3

SPO

HD
MI
1 .3

S ca rt1 /Y P b P r

LO W P RO F IL E

1 M59

NO S P LIT T ER !!!

1M 71

1 M20

VGA

18770_247_100203.eps
100219

Figure 7-4 SSB layout cells (top view) (DVBS without TCON)

2013-Jan-29

back to
div. table

Circuit Descriptions

1 M20

1M 71

1 M59

1M36

2 D D IM

Q552.1E LA

1 G 51

7.

EN 65

1G 50

V B -S
TDC
ON
Quad LVDS

1M36

2D D IM

1 G 51

CA

FPGA

D D R2
LVD S -O U T

1 M 95

D DR
IS
S P D IF

T S -IN
USB
H D MI
G P IO

ANA
AUD

ANA
V ID

S TD B Y

USB
2.0

D D R2

L /R

USB
2.0
HD
MI
1 .3

CT RL

9187

OUT

Pb

Pr

S ca rt2 /Y P b P r

T u ner

serv

E TH

R J4 5
0

1
D
3
8

C lassD

1
7
3
5

20,00

D D R2

S D -S L O T

CA
PN X85500
M1
27 x27
1.00 m m

1M99

D C /D C

FLASH

D D R2

1G 50

HD
MI
1.3

HD
MI
1.3

SPO

HD
MI
1.3

S ca rt1 /Y P b P r

LO W P RO F IL E

1 M59

NO S P LIT T ER !!!

1M 71

1 M20

VGA

18770_248_100203.eps
100219

Figure 7-5 SSB layout cells (top view) (non-DVBS with TCON)

back to
div. table

2013-Jan-29

EN 66
7.2

7.

Circuit Descriptions

Q552.1E LA

Power Supply
Refer to figure Figure 7-6 for the power architecture of this
platform.

18770_234_100127.eps
100127

Figure 7-6 Power Architecture TV550 platform


7.2.1

Power Supply Unit

All power supplies are a black box for Service. When defective,
a new board must be ordered and the defective one must be
returned, unless the main fuse of the board is broken. Always
replace a defective fuse with one with the correct
specifications! This part is available in the regular market.
Consult the Philips Service web portal for the order codes of the
boards.

7.2.2

Diversity
The diversity in power supply units is mainly determined by the
diversity in displays.

Important deltas with the TV543 platform are:


New power architecture for LED backlight (PSL, PSLS,
PSDL)
Boost-signal is now a PWM-signal + continuous variable.

The following displays can be distinguished:


CCFL/EEFL backlight: power board is conventional IPB
LED backlight:
- side-view LED without scanning: PSL power board
- side-view LED with scanning: PSLS power board
- direct-view LED without 2D-dimming: PSL power board
- direct-view LED with 2D-dimming: PSDL power board.

The control signals are:


Stand-by
Lamp on/off
DIM (PWM) (not for PSDL)
Boost (PWM except for IPB)
Power-OK: indicates that the main converter is functioning
(feedback signal to the SSB).

PSL stands for Power Supply with integrated LED-drivers.


PSLS stands for a Power Supply with integrated LED-drivers
with added Scanning functionality (added microcontroller).
PSDL stands for a Power Supply for Direct-view LED backlight
with 2D-dimming.

In this manual, no detailed information is available because of


design protection issues.
The output voltages to the chassis are:
+3V3-STANDBY (Stand-by mode only)
+12V (on-mode)
+Vsnd (+24V) (audio power) (on-mode)
+24V (bolt-on power) (on-mode)

2013-Jan-29

Output to the display; in case of


- IPB: High voltage to the LCD panel
- PSL and PSLS (LED-driver outputs)
- PSDL (high frequent) AC-current.

back to
div. table

Circuit Descriptions
7.2.3

Connector overview

Table 7-1 Connector overview

Connector
no.

7.3

1308

1311

1M95

1M99

1M09

1MP1

Descr.

Mains

Mains to SSB

to SSB

Amb.

T-con

Pin

CN1

CN2

CN5

CN6

CN7

CN8

3V3std

+12V

24Vb

+12V

Stndby

+12V

24Vb

+12V

GND1

GND1

GND1

n.c.

GND1

GND1

GND1

GND1

GND1

BL_ON_OFF

GND1

+12V

DIM

+12V

Boost

+12V

n.c.

+Vsnd

POK

10

GND_SND

11

n.c.

12

Q552.1E LA

7.

EN 67

the switching frequency of the +5V-DVBS to +1-DVBS


switched mode converter is 900 kHz (item no. 7T00)
a delay line for the +2V5-DVBS and +1V-DVBS lines is
created with item no. 3T03 (R=10k) and 2T06 (C=100n)
a 3.3V to 2.5V linear stabiliser is built around item no. 7T01
a 5V to 3.3V linear stabiliser is built around item no. 7T02.

Diagram B08B contains the DVB-S2 LNB supply:


the +V-LNB signal comes from item no. 7T03
the V0-CTRL signal goes to item no. 7T03
the LNB-RF1 goes to the LNB.
Figures gives a graphical representation of the DC/DC
converters with its current consumptions:

DC/DC Converters
The on-board DC/DC converters deliver the following voltages
(depending on set execution):
+3V3-STANDBY, permanent voltage for the Stand-by
controller, LED/IR receiver and controls; connector 1M95
pin 1
+12V, input from the power supply for TV550 common
(active mode); connector 1M95 pins 6, 7 and 8
+24V, input from the power supply for DVB-S2 (in active
mode); connector 1M09 pins 1 and 2
+1V1, core voltage supply for PNX85500; has to be started
up first and switched "off" last (diagram B03B)
+1V2, supply voltage for analogue blocks inside
PNX85500
+1V8, supply voltage for DDR2 (diagram B03B)
+2V5, supply voltage for analogue blocks inside
PNX85500 (see diagram B03E)
+3V3, general supply voltage (diagram B03E)
+5V, supply voltage for USB and CAM (diagram B03E)
+5V-TUN, supply voltage for tuner (diagram B03E)
+V-LNB, input voltage for LNB supply IC (item no. 7T50)
+5V-DVBS, input intermediate supply voltage for DVB-S2
(diagram B08A)
+3V3-DVBS, clean voltage for silicon tuner and DVB-S2
channel decoder
+2V5-DVBS, clean voltage for DVB-S2 channel decoder
+1V-DVBS, core voltage for DVB-S2 channel decoder.

18770_225_100127.eps
100219

Figure 7-7 DC/DC converters xxPFL5xxx series

+ 5V 5-TUN
196 m A
+ 5V
dc -dc

+ 12V

+ 3V 3
dc -dc

2919 m A

+ 1V 8
dc -dc

+ 1V 1
dc -dc

+ 5V 5-TUN

+ 5V
2179 m A

+ 3V 3

+ 3V 3
2371 m A

+ 1V 8

+ 1V 8
2450 m A

+ 5V -TUN

+ 5V -TUN
s tabiliz er

196 m A

+ 2V 5

+ 2V 5
s tabiliz er

450 m A

+ 1V 2

+ 1V 2
s tabiliz er

550 m A

+ 1V 1
5100 m A

18770_226_100127.eps
100426

A +12 V under-voltage detector (see diagram B03C) enables


the 12V to 3.3V and 12V to 5V DC/DC converters via the
ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter
via the ENABLE-1V8 line. DETECT2 is the signal going to the
Stand-by microcontroller and ENABLE-3V3n is the signal
coming from the Stand-by microcontroller.

Figure 7-8 DC/DC converters all other series

+ 24V

+ 5V
dc -dc

537.1 m A

Diagram B03D contains the following linear stabilisers:


+2V5 stabiliser, built around item no. 7UCO
+5V-TUN stabiliser, built around items no. 7UA6 and 7UA7
+1V2 stabiliser, built around items no. 7UA3 and 7UA4.

down
c onverter

Diagram B08A contains the DVB-S2-related DC/DC


converters and -stabilisers:
a +24V under-voltage detection circuitry is built around
item no. 7T04
the switching frequency of the 24 to 14...20V switched
mode converter is 350 kHz (item no. 7T03 and +V-LNB
lines)
the output signal on the +V-LNB line goes to the LNBH23Q
(item no. 7T50)
the LNBH23Q (item no. 7T50) sends a feedback signal via
the V0-CNTRL line

+ V -LNB

linear
s tabiliz er

+ 5V

+ 5V
777.4 m A

+ V -LNB

+ 3V 3 tuner
400 m A

LNB -RF1

+ 5V
400 m A

+ 3V 3
s tabiliz er

+ 2V 5
s tabiliz er

+ 1V 0
dc -dc

+ 3V 3 tuner
296 m A

+ 2V 5
90 m A

+ 1V 0
1820 m A

18770_227_100127.eps
100426

Figure 7-9 DC/DC converters DVB-S2 devices

back to
div. table

2013-Jan-29

EN 68

7.

Q552.1E LA

Circuit Descriptions

7.4

Front-End Analogue and DVB-T, DVB-C;


ISDB-T reception

7.4.1

European/China region

Below find a block diagram of the front-end application for


DVB-S(2) reception.

The Front-End for the European/China region consist of the


following key components:

Amplifier
PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.

Hybrid Tuner
Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter
(8 MHz) (China)
Bandpass filter
Amplifier
PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.

Below find a block diagram of the front-end application for this


region.
18770_237_100127.eps
100219

Figure 7-12 Front-End block diagram DVB-S(2) reception


This application supports the following protocols:
Polarization selection via supply voltage (18V = horizontal,
13V = vertical)
Band selection via toneburst (22 kHz): tone on = high
band, tone off = low band
Satellite (LNB) selection via DiSEqC 1.0 protocol
Reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.

18770_235_100127.eps
100219

Figure 7-10 Front-End block diagram European/China region

7.6
7.4.2

Brazil region
The Front-End for the Brazil region consist of the following key
components:

HDMI
In this platform, the Silicon Image Sil9x87 HDMI multiplexer is
implemented. Refer to figure 7-13 HDMI input configuration for
the application.

Hybrid Tuner with integrated SAW filter and amplifier


External ISDB-T channel decoder covering the Brazilian
digital terrestrial TV standard
Bandpass filter
Amplifier
PNX85500 SoC TV with integrated analogue demodulator.

Below find a block diagram of the front-end application for this


region.

18770_236_100127.eps
100219
18770_243_100203.eps
100203

Figure 7-11 Front-End block diagram Brazil region

7.5

Figure 7-13 HDMI input configuration

Front-End DVB-S(2) reception


The Front-End for the DVB-S(2) application consist of the
following key components:

2013-Jan-29

Satellite Tuner; I2C address 0xC6 (bridged via channel


decoder)
Channel decoder; I2C address 0xD0
LNB switching regulator; I2C address 0x14

The following multiplexers can be used:


Sil9187A (does not support Instaport technology for fast
switching between input signals)
back to
div. table

Circuit Descriptions

7.7

Sil9287B (supports Instaport technology for fast


switching between input signals).
The hardware default I2C addresses are:
Sil9187A: 0xB0/0xB2 (random: software workaround)
Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:


+5V detection mechanism
Stable clock detection mechanism
Integrated EDID
RT control
HPD control
Sync detection
TMDS output control
CEC control
EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.

The PNX85500 is the main audio and video processor (or


System-on-Chip) for this platform. It has the following features:

Multi-standard digital video decoder (MPEG-2, H.264,


MPEG-4)
Integrated DVB-T/DVB-C channel decoder
Integrated CI+
Integrated motion accurate picture processing (MAPP2)
High definition ME/MC

2D LED backlight dimming option


Embedded HDMI HDCP keys
Extended colour gamut and colour booster
Integrated USB2.0 host controller
Improved MPEG artefact reduction compared with
PNX8543
Security for customers own code/settings (secure flash).

MEMORY
CONTROLLER

TS input

DVB

EN 69

For a functional diagram of the PNX85500, refer


to Figure 7-14.

PNX85500x

MPEG
SYSTEM
PROCESSOR

CI/CA

TS out/in for
PCMCIA

7.

The TV550 combines front-end video processing functions,


such as DVB-T channel decoding, MPEG-2/H.264 decode,
analog video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
generation Motion Accurate Picture Processing (MAPP2). The
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness
and vivid colour management. High flat panel screen
resolutions and refresh rates are supported with formats
including 1366 768 @ 100Hz/120Hz and 1920 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.

Video and Audio Processing - PNX85500

Q552.1E LA

PRIMARY
VIDEO
OUTPUT

LVDS

LVDS for
flat panel display
(single, dual or
quad channel)

DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
DECODER

CVBS, Y/C,
RGB

3D COMB
SECONDARY
VIDEO
OUTPUT

Low-IF

SSIF, LR

DIGITAL IF

MPEG/H.264
VIDEO
DECODER

VIDEO
ENCODER

analog CVBS

AUDIO DACS

analog audio

Motion-accurate
pixel processing
SCALER,
DE-INTERLACE
AND NOISE
REDUCTION

AUDIO DEMOD
AND DECODE

AUDIO IN

SPDIF

AUDIO DSP
AUDIO OUT
HDMI
RECEIVER

HDMI

450 MHz
AV-DSP
560 MHz
MIPS32
24KEf CPU

SYSTEM
CONTROLLER
(8051)

I 2S
SPDIF

DRAWING
ENGINE

DMA BLOCK

I2C

PWM GPIO

IR

ADC

SPI

UART

I 2C

GPIO Flash USB 2.0 SD Ethernet


Memory MAC
x8
Card

18770_241_1

Figure 7-14 PNX85500 functional diagram

back to
div. table

2013-Jan-29

EN 70
7.8

7.

Circuit Descriptions

Q552.1E LA

Back-End
The following backlight types can be distinguished:
CCFL/EEFL backlight; applicable to the xxPFL54xx sets
LED backlight:
- side-view (edge) LED without scanning: PSL power
board; applicable to xxPFL76xx sets
- side-view (edge) LED with scanning: PSLS power board;
not applicable to this chassis
- direct-view LED with 0D-dimming: PSL power board;
applicable to xxPFL56xx sets
- direct-view LED with 2D-dimming: PSDL power board;
not applicable to this chassis.
Refer to section 7.2.2 Diversity for an in-depth explanation of
the different power boards that are used.

18770_242_100203.eps
100909

Figure 7-15 Backlight (xxPFL54xx, xxPFL56xx, xxPFL76xx sets)


application

7.9

Ambilight
In this chassis, only 2-sided Ambilight is implemented. Refer to
figure 7-16 Ambilight architecture.

MTK
or
PNX85500

1
M
5
9

Glue
logic

1
M
8
3

AmbiLight

1
M
8
4

1
M
8
3

AmbiLight

1
M
8
4

SSB
1M09
1M09

PSU

18770_209a_100202.eps
100202

Figure 7-16 Ambilight architecture


For an overview of the LED grouping per board, refer to figure
7-17 LED grouping per board.

2013-Jan-29

back to
div. table

Circuit Descriptions

Q552.1E LA

7.

EN 71

2 3B01-2 7

1 3B30-1 8

36

30

24

12

2B02

33p

2B00

15

18

7B20-2
74LVC2G17
+3V3
5

4
+
5
L
E
D

3B01-1

3B30-4

100R

SPI-CLOCK-BUF

220R
2B10

100p

SPI-CLOCK

6
L
E
D

6
L
E
D

33p

6
L
E
D

5
L
E
D

2B01

6
L
E
D

PWM-CLOCK-BUF

220R

100R

100p

PWM-CLOCK

7B20-1
74LVC2G17

6
L
E
D

100n

2B17

+3V3

18770_214_100126.eps
100126

Figure 7-20 Ambilight buffer


18770_210_100126.eps
100126

The temperature sensor is built around item no. 7B30 (diagram


AL1A) and indicates overtemperature of the board. Refer to
figure 7-21 Temperature sensor.

Figure 7-17 LED grouping per board


The communication between PNX85500, Complex
Programmable Logic Device (CPLD) and the Ambilight module
uses the SPI protocol; refer to figure 7-18 Communication
protocol outside LED board. Between the CPLD and the LED
driver, as extra line is mentioned:
Non-SPI signals that are required for the LED driver
Temperature sensor line.

3B34
+3V3

+3V3

100K RES

1K5 1%

6
3B39-3

7B30
5

3B39-2
2

FB40

1K5 1%

+3V3

4
2

RES

TEMP-SENSOR

LMV331IDCK

10K

10n
3004

10K

2B08

-T

3B11

10n
3B39-1

2B09

C P LD

PNX

1M 59

S P I + e x tra

1K5 1%

FB41

SPI

18770_211_100126.eps
100126

18770_215_100126.eps
100126

Figure 7-18 Communication protocol outside LED board

Figure 7-21 Temperature sensor

Refer to figure for an overview of the communication inside the


LED board.

The EEPROM (item no. 7B07; diagram AL1A) contains


alignment information about the mounted LEDs and is
programmed during the alignment process in production. Refer
to figure 7-22 EEPROM.

E x tra

SPI-DATA-IN-BUF

1M 83

SPI-CLOCK-BUF
7B07
M95010-WDW6

+3V3

EEPROM

Tem p
sensor

2B20

SPI

1M 84

LE D
D river

5
7B06
74LVC1G32GW
1
SPI-CS

6
4

Te m p

SPI

+3V3
3

DATA-SWITCH

10K

VCC

(64K)
C
3B02-2

S
HOLD
W

7
7

10K

+3V3

GND
4

SPI

1
1 3B02-1 8

SPI

B uffer

SPI

100n

+3V3

18770_213_100126.eps
100219

SPI-DATA-RETURN

18770_216_100126.eps
100126

Figure 7-19 Communication protocol inside LED board


Figure 7-22 EEPROM

The buffer is built around item no. 7B20 (diagram AL1A) and
regenerates the clock signals. Refer to figure 7-20 Ambilight
buffer.

The LED driver is built around item no. 7B26 (diagram AL1A)
and controls the LEDs. Refer to figure 7-23 LED driver.

back to
div. table

2013-Jan-29

EN 72

7.

Circuit Descriptions

Q552.1E LA

+3V3
2B11
100n

VCC

3B00-1

1K8

4 3B00-4 5
150R

PROG
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
SPI-DATA-IN
SPI-DATA-OUT

3
3B00-3

6
150R

3B18
FB35

150R

3B21

22
25
32

3B22
10K

+3V3

FB20

2 3B00-2 7

LATCH

31
24
26
3
1
2
23

8
150R

12
13
28
29

100p

2B04-3

XERR
XHALF
XLAT

NC

GND
30

100p

2B04-4
4

100p

100p
2B04-1

2B04-2

150R

BLANK
GSCLK
IREF
MODE
SCLK
SIN
SOUT

4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21

0
1
2
3
4
5
6
7
OUT
8
9
10
11
12
13
14
15

PWM-R1
PWM-G1
PWM-B1
PWM-G3
PWM-R3
PWM-R2
PWM-G2
PWM-B2
PWM-B3
PWM-G4
PWM-R4
PWM-B4
PWM-B5
PWM-G5
PWM-R5
DATA-SWITCH
3B31

GND_HS
33

BLANK
PWM-CLOCK-BUF

27

7B26-1
TLC5946RHB

+3V3

2K0
7B26-2
TLC5946RHB
34
VIA
35
VIA VIA
36
VIA
37
38
39

42
41
40

18770_217_100126.eps
100126

Figure 7-23 LED driver


The Overvoltage Protection Circuit is built around item no.
7B50, 7B51, 7C20 and 7C22 (diagram AL1B). Refer to figure
7-24 Overvoltage Protection Circuit.

7B23-1
BC847BS(COL)
6

10K

8 3B07-1 1

+24V

1
10K

2 3B07-2 7

FB30

PWM-B1

3B35
7000
99-235/RSBB7C-A24/2D

10K

7003
99-235/RSBB7C-A24/2D

7002
99-235/RSBB7C-A24/2D

7001
99-235/RSBB7C-A24/2D

+24V

7005
99-235/RSBB7C-A24/2D

7004
99-235/RSBB7C-A24/2D

270R
3B36

7B23-2
BC847BS(COL)
3

BLUE

BLUE

BLUE

BLUE

6 5

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

2 1

GREEN

GREEN

3B37

RED

RED

RED

RED

4 3

RED

RED

68R

4
10K

3 3B07-3 6

5 3B07-4 4

+24V

1 3B03-1 8
FB31

PWM-R1

2
+24V

1K5
3B03-2

1K5

7B25
BC847BW 3

2B03

2
10K

5 3B13-4 4

1K5

PWM-G1

1K5
3B03-4

100n

10K

3 3B13-3 6

3 3B03-3 6

FB32

18770_218_100126.eps
100126

Figure 7-24 Overvoltage Protection Circuit

7.10 TCON
This section describes the application with the TCON
integrated on the SSB.
For the basic application, refer to figure 7-25 TCON
architecture.

2013-Jan-29

back to
div. table

Circuit Descriptions

Q552.1E LA

7.

EN 73

EEPROM

LVDS

(10 bit)
Timing

Mini - LVDS

Controller
(TCON)

Gamma
Reference
Voltage

+3.3 V
+1.8 V

Source Drive IC

+16 V
+12 V

Power
Block

M ain P latform

VGH (+28 V)
VGL (-6 V)

Gate Drive IC

PNX8550

Control
Signals

TFT LCD Panel

TCO N
LC D P anel

SSB
18770_238_100127.eps
100402

Figure 7-25 TCON architecture


For the TCON block diagram, refer to figure 7-26 TCON block
diagram.

LVDS
Input

S p re a d
S p e c tru m

M in iLVDS
Output

T im in g C o n tro lle r IC

SDRAM

R 1 A ~E

LV D S
R e c e iv er

R 2C LK

ODC

DCA

(Over
Drive
Circuit)

(Dynamic
Contrast
Control)

R 2 A ~E

OPC
(Optimum
Power
Control)

R 1C LK

LV D S
R e c e iv er

D a ta
P a th
B lo c k
(L in e
B u ffer)

Form atter/S erializer

1 6 bit
M ini-LVDS
Transmitter

RLV P /N

M ini-LVDS
Transmitter

Right h alf
data

Gate D river
C trl S ign als

Ve rtic a l & H o rizo n ta l


Tim in g g e n e ra tio n
I2 C
S lav e

ROM

I2 C
M aster

Source D river
C trl S ign als

H s y n c/
Vsync
S S C L K (S p re a d Spectrum C lo c k)
DE

Control
Signal
Output

EEPROM
18770_239_100127.eps
100127

Figure 7-26 TCON block diagram


back to
div. table

2013-Jan-29

EN 74

7.

Q552.1E LA

Circuit Descriptions

Notes to figure 7-26 TCON block diagram:


LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
ODC: Over Drive Circuit - to improve LC response
Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data

+ 12V

D C /D C
C o n tro lle r

Timing Control Function: generates control signals to


column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-27 TCON DC/DC converters.

LGD

SHP

W h ere U sed

VGH

+2 8 V

+3 5 V

To G a te D riv e rs (G a te
H ig h Vo lta g e )

VGL

-6 V

-6 V

To G a te D riv e rs (G a te
L o w Vo lta g e )

Vcc

+3 V 3

+3 V 3

Tim in g C o n tro lle r IC


S u p p ly Vo lta g e

Vcc

+1 V 8

+1 V 2

Tim in g C o n tro lle r IC


S u p p ly Vo lta g e

Vre f

+1 6 V

+1 5 V 2

G a m m a R e fe renc e
Vo lta g e

Vdd

+1 6 V

+1 5 V 6

S o u rc e D riv e r S u p p ly
Vo lta g e
18770_240_100128.eps
100128

Figure 7-27 TCON DC/DC converters


7.10.1 TCON Programming
For LGD - TCONs, the EEPROM can be programmed via
ComPair (via I2C communication).
For Sharp - TCONs, the data can be flashed with a SPI
Programmer (via SPI communication). This device has to be
ordered separately.
7.10.2 TCON Alignment
The purpose of TCON alignment is to obtain equal voltages for
both positive and negative LC polarity. This is to avoid flicker
and image sticking.
The alignment value for the TCON is stored in the main
software and is automatically set to the correct value when you
enter the display code via the service menu. No manual
alignment is needed.

2013-Jan-29

back to
div. table

IC Data Sheets

Q552.1E LA

8.

EN 75

8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as black boxes in the

Diagram USB Hub B01C, USB2513B (IC 7F25)

Block diagram
To Upstream
VBUS

Upstream
USB Data

To EEPROM or
SMBus Master

24 MHz
Crystal

SDA SCL

3.3 V

BusPower
Detect/
Vbus Pulse

Upstream
PHY

Regulator

Serial
Interface

PLL

Serial
Interface
Engine

Repeater

3.3 V

...

TT
#1

Regulator

Controller

TT
#x

Port
Controller

CRFILT

Routing & Port Re-Ordering Logic

Port #1
PHY#1

OC Sense
Switch Driver/
LED Drivers

...

Port #x
OC Sense
Switch Driver/
LED Drivers

PHY#x

USB Data OC
Port
Downstream Sense Power
Switch/
LED
Drivers

OC
USB Data
Port
Downstream Sense Power
Switch/
LED
Drivers

The x indicates the number of available downstream ports: 2, 3, 4, or 7.

NC

NC

NC

21

19

SCL / SMBCLK / CFG_SEL[0]

24

20

HS_IND / CFG_SEL[1]

25

VDD33

RESET_N

26

SDA / SMBDATA / NON_REM[1]

VBUS_DET

27

Pinning information

22

The LED port indicators only apply to USB2513i.

23

SUSP_IND / LOCAL_PWR / NON_REM[0]

28

18

NC

VDD33

29

17

OCS_N[2]

USBDM_UP

30

16

PRTPWR[2] / BC_EN[2]*

USBDP_UP

31

15

VDD33

XTALOUT

32

14

CRFILT

XTALIN / CLKIN

33

13

OCS_N[1]

PLLFILT

34

12

PRTPWR[1] / BC_EN[1]*

11

TEST

10

VDD33

9
NC

6
NC

5
VDD33

4
USBDP_DN[2]

NC

3
USBDM_DN[2]

36
2

VDD33

35

Ground Pad
(must be connected to VSS)

USBDP_DN[1]

RBIAS

SMSC
USB2512/12A/12B
USB2512i/12Ai/12Bi
(Top View QFN-36)

NC

Note :

USBDM_DN[1]

8.1

electrical diagrams (with the exception of memory and logic


ICs).

Indicates pins on the bottom of the device.

18770_301_100217.eps
100217

Figure 8-1 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 76
8.2

8.

IC Data Sheets

Q552.1E LA

Diagram Temp Sensor + Headphone B01J, LM75BDP (IC 7FD1)

Block diagram
VCC

LM75B
BIAS
REFERENCE

POINTER
REGISTER

CONFIGURATION
REGISTER

BAND GAP
TEMP SENSOR

COUNTER

TEMPERATURE
REGISTER

TIMER

TOS
REGISTER

COMPARATOR/
INTERRUPT

THYST
REGISTER

11-BIT
SIGMA-DELTA
A-to-D
CONVERTER

OSCILLATOR

POWER-ON
RESET

OS

LOGIC CONTROL AND INTERFACE

A2

A1

A0

SCL SDA

GND

Pinning information

SDA

VCC

SCL

A0

A1

A2

OS

GND

LM75BDP

18770_300_100217.eps
100217

Figure 8-2 Pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets
8.3

Q552.1E LA

8.

EN 77

Diagram PNX NandFlash - Conditional Access B02A, PNX85500 (IC7S00)

Block diagram
PNX8550x

MEMORY
CONTROLLER

TS input

MPEG
SYSTEM
PROCESSOR

CI/CA

TS out/in for
PCMCIA

PRIMARY
VIDEO
OUTPUT

LVDS

LVDS for
flat panel display
(single, dual or
quad channel)

DVB-T/C
channel decoder

DVB

AV-PIP
SUB-PICTURE
VIDEO
DECODER

CVBS, Y/C,
RGB

3D COMB
SECONDARY
VIDEO
OUTPUT

Low-IF

MULTISTANDARD
VIDEO
DECODER

DIGITAL IF

Direct-IF

analog CVBS

AUDIO DACS

analog audio

analog Y/C

Motion-accurate
pixel processing
SCALER,
DE-INTERLACE
AND NOISE
REDUCTION

AUDIO DEMOD
AND DECODE

SSIF, LR

VIDEO
ENCODER

AUDIO IN

SPDIF

AUDIO DSP
AUDIO OUT
HDMI
RECEIVER

HDMI

450 MHz
AV-DSP
500 MHz
MIPS32
24KEf CPU

SYSTEM
CONTROLLER
(8051)

I2S
SPDIF

DRAWING
ENGINE
Scatter/Gather
TS Demux

I2C

PWM Px_x

IR

ADC

SPI

UART

I2C

GPIO Flash USB 2.0 SD Ethernet


Memory MAC
x 10
Card

Pinning information
ball A1
index area

PNX8550xE
2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25

A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
Transparent top view
18770_308_100217.eps
100217

Figure 8-3 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 78
8.4

8.

IC Data Sheets

Q552.1E LA

Diagram Audio B03A, TPA3120D2PWP (IC7D10)

Block diagram
TPA3120D2
1 F

0.22 F
LIN

BSR

RIN

ROUT

1 F

22 H

0.68 F

PGNDR

0.68 F

PGNDL

1 F
BYPASS
AGND

470 F

LOUT
22 H

BSL

470 F

0.22 F

PVCCL
AVCC
PVCCR

VCLAMP
Shutdown
Control

SD

1 F

MUTE

GAIN0
GAIN1

Control

Pinning information
PWP (TSSOP) PACKAGE
(TOP VIEW)

PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND
AGND
PVCCR
VCLAMP
PVCCR

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
I_18020_142.eps
100402

Figure 8-4 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets
8.5

Q552.1E LA

8.

EN 79

Diagram DC/DC B03B, TPS53126PW (IC7U03)

Block diagram

Pinning information
VBST1

28

NC

27

LL1

EN1

26

DRVL1
PGND1

DRVH1

25

24

TRIP1

NC

23

VIN

22

VREG5

GND

TEST1

NC

TPS53124

VO1
VFB1

21

V5FILT

20

TEST2
TRIP2

VFB2

10

19

VO2

11

18

PGND2

EN2

12

17

DRVL2

NC

13

16

LL2

14

15

DRVH2

VBST2

18310_300_090319.eps
100416

Figure 8-5 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 80
8.6

8.

IC Data Sheets

Q552.1E LA

Diagram DC/DC B03E, ST1S10PH (IC 7UD0)

Block diagram

ST1S10PH

Pinning information

DFN8 (4 4)

PowerSO-8
I_18010_083.eps
110601

Figure 8-6 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets
8.7

Q552.1E LA

8.

EN 81

Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)

Block diagram

LD1117DT

Pinning information

DPAK

F_15710_166.eps
100402

Figure 8-7 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 82
8.8

8.

IC Data Sheets

Q552.1E LA

Diagram Ethernet + Service B04C, LAN8710A-EZKH (IC 7E10)

Block diagram
MODE0
MODE1
MODE2
nRST

MODE Control

AutoNegotiation

10M Tx
Logic

Management
Control

100M Tx
Logic

Reset
Control

SMI

RMIISEL

HP Auto-MDIX

10M
Transmitter

TXP / TXN

Transmit Section

RXP / RXN

100M
Transmitter
MDIX
Control

TXD[0:3]
TXEN
TXER
TXCLK

CRS
COL/CRS_DV

RMII / MII Logic

RXD[0:3]
RXDV
RXER
RXCLK

100M Rx
Logic

DSP System:
Clock
Data Recovery
Equalizer

PLL

Analog-toDigital

XTAL2

Interrupt
Generator

nINT

100M PLL

Receive Section

LED Circuitry
10M Rx
Logic

Squelch &
Filters
10M PLL

MDC
MDIO

XTAL1/CLKIN

LED1
LED2

Central
Bias

RBIAS

PHY
Address
Latches

PHYAD[0:2]

RBIAS

RXP

RXN

TXP

TXN

VDD1A

RXDV

TXD3

32

31

30

29

28

27

26

25

Pinning information

VDD2A

24

TXD2

LED2/nINTSEL

23

TXD1

LED1/REGOFF

22

TXD0

XTAL2

21

TXEN

XTAL1/CLKIN

20

TXCLK

VDDCR

19

nRST

RXCLK/PHYAD1

18

nINT/TXER/TXD4

RXD3/PHYAD2

17

MDC

SMSC
LAN8710/LAN8710i
32 PIN QFN
(Top View)

13

14

15

16

COL/CRS_DV/MODE2

MDIO

VDDIO

CRS

12

RXD0/MDE0

RXER/RXD4/PHYAD0

10

11

RXD1/MODE1

9
RXD2/RMIISEL

VSS

18770_302_100217.eps
100217

Figure 8-8 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets
8.9

Q552.1E LA

8.

EN 83

Diagram HDMI B04D, SII9287B (IC 7EC1)

Block diagram

Pinning information

18770_303_100217.eps
100217

Figure 8-9 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 84

8.

IC Data Sheets

Q552.1E LA

8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)

Block diagram
VDD 8

VDD/2
2

IN 1

BYPASS

VO1 1

TPA6111A2
6

IN 2

SHUTDOWN

VO2 7

Bias
Control

Pinning information
D OR DGN PACKAGE
(TOP VIEW)

VO1
IN1
BYPASS
GND

VDD
VO2
IN2
SHUTDOWN
18770_309_100217.eps
110602

Figure 8-10 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets

Q552.1E LA

8.

EN 85

8.11 Diagram DVBS-FE B07A, STV6110AT (IC 7R02)

Block diagram
STV6110AT

RF_OUT
IP

RF_IN

IN
QP
AGC
QN
PLL, dividers
XTAL_IN
XTAL_INN

DC offset compensation
SCL
2

I C bus interface

Amplifier

SDA

XTAL_OUT

18770_304_100217.eps
110601

Figure 8-11 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 86

8.

IC Data Sheets

Q552.1E LA

8.12 Diagram DVBS-Supply B08A, TPS54283PWP (IC 7T03)

Block diagram
TPS54283PWP
CLK1

Level
Shift

+
4
+
FB1

BOOT1

PVDD1

SW1

Current
Comparator

f(IDRAIN1) + DC(ofst)
GND

2
BP

R
R

f(IDRAIN1)

Overcurrent Comp

0.8 VREF

RCOMP
Soft Start
1

SD1

f(ISLOPE1)

BP

f(IMAX1)
CLK1

CCOMP

Anti-Cross
Conduction

VDD2

Weak
Pull-Down
MOSFET

f(ISLOPE1)
Ramp
Gen 1
TSD

6 A
EN1

EN2

1.2 MHz
Oscilator

6 A

CLK1

Divide
by 2/4

f(ISLOPE2)
Ramp
Gen 2

SD1
Internal
Control

SD2

CLK2

UVLO
150 k
SEQ 10

BP
150 k

FB1
FB2

CLK2

Output
Undervoltage
Detect

13 BOOT2
BP

Level
Shift

14 PVDD2

f(IDRAIN2) + DC(ofst)

Current
Comparator
+

GND

4
+

FB2

R
R

FET
Switch

f(IDRAIN2)

Overcurrent Comp

0.8 VREF

RCOMP
Soft Start
2

SD2

f(ISLOPE2)

f(IMAX2)
CLK2

CCOMP

5.25-V
Regulator

BP 11
150 k

12 SW2
BP

Anti-Cross
Conduction

Weak
Pull-Down
MOSFET

PVDD2

BP
ILIM2

Level
Select

9
150 k

0.8 VREF
References
IMAX2 (Set to one of two limits)
UDG-07007

18770_305_100217.eps
110601

Figure 8-12 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets

Q552.1E LA

8.

EN 87

8.13 Diagram DVBS-Supply B08B, LNBH23Q (IC 7T50)

Block diagram
ISEL

TTX

ADDR

SDA SCL

Vcc

LX
PWM
Controller

Rsense

Byp

Vcc- L

Preregulator
+U.V.lockout
+P.ON reset
EN
VSEL

P-GND

VSEL
EN

TTX
ITEST

Vup

I2C interface

VOUT Control
TEN

Linear Post-reg
+Modulator
+Protections
+Diagnostics

VoRX

I2C Diagnostics

VoTX
TTX

22KHz
Oscill.

22KHz Tone
Amp. Diagn.

EXTM

22KHz Tone
Freq. Detector

DETIN

DSQOUT

DSQIN

LNBH23

V CTRL

A-GND

Pinning information
1 n.c .
2 n.c .
3 n.c .
4 LX
5 P -G ND
6 S DA
7 n.c .
8 n.c .
9 S CL
10 A D D R
11 D S Q out
12 D S Q IN
13 E XTM
14 TTX
15 B Y P
16 n.c .
17 n.c .
18 V c c -L
19 V c c
20 A -G N D
21 V oR X
22 V oTX
23 n.c .
24 n.c .
25 n.c .
26 n.c .
27 V up
28 IS E L
29 D E TIN
30 V CTRL
31 n.c .
32 n.c .

Epad

Connected with power grounds and to


the ground layer through vias
to dissipate the heat.

18770_306_100217.eps
100217

Figure 8-13 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 88

8.

IC Data Sheets

Q552.1E LA

8.14 Diagram TCON Controller B11A, TL2429MC (IC 7J01)

Block diagram
RLV0~6P/M,
LLV0~6P/M
SOE,POL

LVDS
Input
1RxA~E

Internal
SSIC

4RxA~E

ODC + OPC

1RxCLK

TCON

2RxCLK

mini-LVDS

3RxCLK

SDA

Frame Memory
SDRAM

SCL

4RxCLK

Source
Driver 2

Source
Driver 5

Source
Driver 8

VST(GSP)

3RxA~E

EEPROM
(LUT)
16Kbit
or 32Kbit

GCLK1, , GCLK3, , GCLK6

2RxA~E

Source
Driver 1

Gate
Driver
1

Gate in
panel
1

Gate
Driver
2

Gate in
panel
2

Gate
Driver
n

Gate in
panel
n

TFT LCD ARRAY

18770_310_100217.eps
100217

Figure 8-14 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets

Q552.1E LA

8.

EN 89

8.15 Diagram TCON DC/DC B11B, TPS62110RSA (IC 7JH1)

Block diagram
VI
+
_

Undervoltage
Lockout

Vina

REF

Thermal
Shutdown
+
_

V
I

V (COMP)

I AVG Comparator
REF

1-MHz
Oscillator
P-Channel
Comparator

+
_

Sawtooth
Generator

Driver
Shoot-Through
Logic

R
Control
Logic

+
_
SKIP Comparator

N-Channel

+
_

PG

+
_

+
Gm

SW

R2
+
_

+
_

EN

LBO

R1

Compensation
_

REF

LBI

FB
A.

P G ND

GND

The internal feedback divider is disabled and the FB pin is directly connected
to the internal GM amplifier.

P G ND
SW
SW
PG

Pinning information

Exposed
Thermal
Pad

11
10

5 6 7 8

GND
GND
FB
AGND

V IN A

2
3

16 15 14 13
12

S Y NC
LBO
LBI

PGND
VIN
VIN
EN

18770_311_100217.eps
100217

Figure 8-15 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 90

8.

IC Data Sheets

Q552.1E LA

8.16 Diagram TCON DC/DC B11B, MAX17113ETL (IC 7JF1)

Block diagram
VIN (12V)

BST
VL

IN2

LX1
3.3V
2A

LX2

STEP-DOWN

STEP-UP

OSC

PGND
GND2

FB1
COMP

OUT

AGND
FSEL

VL

SWI
P
150mV

VIN

VL

REF

3.3V

VIN

VL

VL

PGOOD
RESET

REF

REF
DRN

EN1

THR

EN2

MODE

DEL1

HV
SWITCH
BLOCK

POWER-UP
SEQUENCE

DEL2

CTL

DLP
GON
50% OSC

SRC

VIN
VGOFF
-6V
100mA

PGOOD

CRST

AGND
STEP-DOWN, NEGATIVE
ON/OFF
STEP-UP, POSITIVE
CHARGE PUMP ON/OFF

AVDD
16V
1.5A

SWO

FB2

DRVN

GON
CONTROL
VGON
35V
50mA

SWO
NEGATIVE
REG

DRVP

POSITIVE
REG

SRC

CPGND

CPGND
FBN

FBP
AVDD

REF

30 29 28 27 26 25

TOP VIEW
THIN QFN

OUT

IN2

VIN

IN2

FSEL

EN1

DEL2

VL

EN2

PGND

Pinning information
24 23 22 21

PGND 31

20 LX2

LX1 32

19 LX2

LX1 33

18 BST

SWI 34

17 FB2
16 DEL1

SWO 35

MAX17113

FB1 36

15 REF
14 FBN

COMP 37
PGOOD 38

13 AGND

CRST 39

12 DRVN
11 CTL
THR

GND2

SRC

GON

10
CPGND

FBP

DLP

DRN

MODE

DVRP

AGND 40

18770_312_100217.eps
100217

Figure 8-16 Internal block diagram and pin configuration

2013-Jan-29

back to
div. table

IC Data Sheets

Q552.1E LA

8.

EN 91

8.17 Diagram TCON DC/DC B14B, ISL97653AIRZ (IC 7KFA)

Block diagram

VREF PROT

RSET HVS

CM1
GM AMPLIFIER
FBB

HVS
LOGIC

SAWTOOTH
GENERATOR
SLOPE
COMPENSATION

+
VREF

UVLO COMPARATOR

LX1
LX2

BUFFER

CONTROL
LOGIC

+
RSENSE
PGND1
PGND2

CURRENT
AMPLIFIER

0.75 VREF
680kHz
OSCILLATOR

FREQ
VL
PVIN1,2

CURRENT LIMIT
COMPARATOR

REGULATOR
REFERENCE BIAS
AND

CDEL

CURRENT LIMIT
THRESHOLD

SEQUENCE CONTROLLER

EN

VL
PVIN1,2

CB
SUPN
LXL1
LXL2

NOUT

CONTROL
LOGIC

FBN

CURRENT
LIMIT
COMPARATOR

BUFFER
CURRENT AMPLIFIER

GM AMPLIFIER

0.2V

VREF
SLOPE
COMPENSATION

CURRENT LIMIT
THRESHOLD

UVLO COMPARATOR

CM2
FBL

SAWTOOTH
GENERATOR

+
0.4V
0.75 VREF

LDO
CONTROL
LOGIC2

TEMP
SENSOR

SUPP

FBP

LDO-CTL
LDO-FB

TEMP

VREF
POUT
SUPP

DRN

LX1

PGND2

PGND1

TEMP

COM

LX2

CTL

PROT

C2-

AGND

Pinning information

C2+

PVIN1

POUT

LDO-FB

C1+

LDO-CTL

C1-

40

39

38

37

36

35

34

33

32

31

PVIN2

30 COMP

CB

29 FBB

LXL1

28 RSET

LXL2

PGND3

27 HVS

PGND4

CM2

24 CTL

FBL

23 DRN

VL

22 COM

VREF

10

21 POUT

ISL97653A
40 LD 6X6 QFN
TOP VIEW

12

13

14

15

16

17

18

19

20

SUPN

PGND5

C1P

C1N

C2P

C2N

SUPP

FBP

25 CDEL

NOUT

FBN

11

26 EN

18770_307_100217.eps
100217

Figure 8-17 Internal block diagram and pin configuration

back to
div. table

2013-Jan-29

EN 92

8.

Q552.1E LA

IC Data Sheets

Personal Notes:

10000_012_090121.eps
110804

2013-Jan-29

back to
div. table

Block Diagrams

Q552.1E LA

9.

EN 93

9. Block Diagrams
9.1

Wiring diagram Rembrandt 32"

WIRING DIAGRAM 32" REMBRANDT

Board Level Repair


Component Level Repair
Only For Authorized Workshop

1M95 (B03C)

1M99 (B03C)

1735 (B03A)

1M20 (B09A)

1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK

1.
2.
3.
4.
5.
6.
7.
8.
9.

1.
2.
3.
4.

1.
2.
3.
4.
5.
6.
7.
8.

+12VD
+12VD
GND
GND
LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
POWER-OK

LEFT-SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT-SPEAKER

1JA1 (B11C)
1. GND
|
36. VCC
37. VCC
|
41. VDD
42. VDD
|
60. GND

LIGHT-SENSOR
GND
RC
LED-2
+3V3-STANDBY
LED-1
KEYBOARD
+5V

1JA2 (B11C)
1. GND
|
19. VDD
20. VDD
|
24. VCC
25. VCC
|
60. GND

1M99

60P

CONDITIONAL ACCESS

3104 313 6402.x


(1150)

9P

HDMI
SCART

HDMI

USB
HDMI

PHONE

TUNER

11P

1M99
1M95

2P3
1308
N
L

SSB

8191

2P3
1311

MAINS CORD

TO BACKLIGHT

TO BACKLIGHT

1JA1

60P

4P

KEYBOARD CONTROL
(1114)

8M95

J1

1JA2

8P

IPB 32 PLHC-P981A
(1005)
8M99

3P

1M20

8JA2

8JA1

9P
11P

MAIN POWER SUPPLY

8M20

1735

1P3

1319

HIGH VOLTAGE

1M95

1P3

1316

LOUDSPEAKER
(5213)

HDMI

VGA

8311
CN2

J2

J1

3P

8P

IR / LED BOARD
(1112)

LCD DISPLAY
(1004)

CN1

MAINS
SWITCH
(8311)

18770_400_100217.eps
100826

2013-Jan-29 back to

div. table

Block Diagrams
9.2

Q552.1E LA

9.

EN 94

Wiring diagram Rembrandt 37" - 42"

WIRING DIAGRAM 37"- 42" REMBRANDT

Board Level Repair

1M95 (B03C)

1M99 (B03C)

1735 (B03A)

1M20 (B09A)

1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK

1.
2.
3.
4.
5.
6.
7.
8.
9.

1.
2.
3.
4.

1.
2.
3.
4.
5.
6.
7.
8.

1M99

1JA2

1JA1

8P

60P

60P

SSB

HDMI
SCART

HDMI

HDMI

PHONE

8191

TUNER

USB

3104 313 6402.x


(1150)

9P
11P

1M99
1M95

2P3
1308
N
L

4P

2P3

1JA2 (B11C)
1. GND
|
19. VDD
20. VDD
|
24. VCC
25. VCC
|
60. GND

CONDITIONAL ACCESS

8JA2
8M99

MAINS CORD

TO BACKLIGHT

TO BACKLIGHT

1M20

37 PLHD-P982A
42 PLHF-P983A
(1005)

1311

1JA1 (B11C)
1. GND
|
36. VCC
37. VCC
|
41. VDD
42. VDD
|
60. GND

LIGHT-SENSOR
GND
RC
LED-2
+3V3-STANDBY
LED-1
KEYBOARD
+5V

8M20
8JA1

9P
11P

LEFT-SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT-SPEAKER

1735

1P3

MAIN POWER SUPPLY

+12VD
+12VD
GND
GND
LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
POWER-OK

8M95

J1

3P

KEYBOARD CONTROL
(1114)

1319

HIGH VOLTAGE

1M95

1P3

1316

Component Level Repair


Only For Authorized Workshop

HDMI

VGA

8311
CN2

J2

J1

3P

8P

IR / LED BOARD
(1112)

TWEETER
(5215)
MAINS
SWITCH
(8311)

LCD DISPLAY
(1004)

CN1
TWEETER
(5215)

LOUDSPEAKER
(5213)

18770_401_100217.eps
100826

2013-Jan-29 back to

div. table

Block Diagrams
9.3

Q552.1E LA

9.

EN 95

Wiring diagram Van Gogh 32" - 52"

WIRING DIAGRAM 32"- 52" VAN GOGH


8M83
TO DISPLAY

LCD DISPLAY
(1004)

TO DISPLAY

Board Level Repair

1M84

25P

(1174)

* Not applicable for all sets

*AMBILIGHT MODULE 24/30 LED

8KA1

1M83

25P

Component Level Repair


Only For Authorized Workshop

1M20 (B14F)

1.
2.
3.
4.
5.
6.
7.
8.
9.

1.
2.
3.
4.
5.
6.
7.
8.

+12VD
+12VD
GND
GND
LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
POWER-OK

LOUDSPEAKER
(5213)

1KA2 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_35V
79. VGL_-6V
80. GND

LIGHT-SENSOR
GND
RC
LED-2
+3V3-STANDBY
LED-1
KEYBOARD
+5V

1735 (B03A)
1.
2.
3.
4.

LEFT-SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT-SPEAKER

1KA1

1M59

80P

80P

25P

SSB

11P

NOT FOR 32" TV-SETS

8191

MAINS
SWITCH

2P3
1308
N
L

MAINS CORD

8311
TWEETER
(5216)

2P3
1311

HDMI

HDMI

PHONE

SCART

SPDIF

HDMI

TUNER

USB

3104 313 6400.x


3104 313 6417.x
3104 313 6405.x

AL

CONDITIONAL ACCESS

9P

1M99
1M95

4P

8M95

1735

9P

1KA2

8P
1M99

40"-10P
40"-10P

11P

1M95

1316

32"-12P
1319

1319

32"-6P
1316

32"- FSP124-3MS01
40"- DPS-206CP
46"- FSP173-3MS01
52"- FSP190-3MS01
(1005)

TO BACKLIGHT

1M20

(1150)

MAIN POWER SUPPLY

1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_35V
79. VGL_-6V
80. GND

8M59

B
8M99

1KA1 (B14E)

25P

1M99 (B03C)

1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK

1M83

KEYBOARD CONTROL
(1114)
J1

3P

(1174)

1M95 (B03C)

8M20

AL

*AMBILIGHT MODULE 24/30 LED

8KA2

VGA

TWEETER
(5216)
J2

J1

3P

8P

IR / LED BOARD
(1112)

NOT FOR 32" TV-SETS

(8311)

18770_402_100217.eps
101028

2013-Jan-29 back to

div. table

Block Diagrams

9.

EN 96

Wiring diagram Matisse 32" - 37"

WIRING DIAGRAM 32"- 37" MATISSE

8M83
8M09
TO BACKLIGHT

8JA1

8JA2
8M20

HDMI

HDMI

HDMI
VGA

HDMI

AL

25P

SCART

SPDIF

SCART

1M84

USB

ETHER
NET

(1174)

CONDITIONAL ACCESS

3104 313 6406.x


3104 313 6401.x
(1150)

TUNER

(5214)

9P

1M99

SUB-WOOFER

32" DPS-199DP-1 A B
37" PLDD-P973A B
(1005)

11P

KEYBOARD CONTROL
(1114)

MAIN POWER SUPPLY

SSB

J1

3P

25P

1M95

11P

1M95

8M95

(1174)

1M59

4P

B
8M99

AMBILIGHT MODULE 18/24 LED

1M72

60P

4P

4P

1JA1

60P

1735

13P

1JA2

8P

3P

12P

1M20

1D38

1M09

9P

1316

1M99

25P

1M83

1319

AMBILIGHT MODULE 18/24 LED

8M59

8M20

AL

Board Level Repair

2P3

2P3

1311

1308

25P

Component Level Repair


Only For Authorized Workshop
1M83

9.4

Q552.1E LA

MAINS CORD

8191
TO DISPLAY

LCD DISPLAY
(1004)

TO DISPLAY

8311
SPEAKER R
(5213)

MAINS
SWITCH

SPEAKER L
(5213)

(8311)

1M83 (AL1A)
1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. TEMP-SENSOR
12. N.C.
13. N.C.

1M84 (AL2A)
14. +3V3
15. BLANK
16. PROG
17. GND
18. LATCH
19. SPI-CS
20. +3V3
21. PWM-CLOCK
22. GND
23. SPI-DATA-RETURN
24. SPI-DATA-IN
25. SPI-CLOCK

1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. GND
5. PWM-CLOCK-BUF
6. +3V3
7. SPI-CS
8. LATCH
9. GND
10. PROG
11. BLANK
12. +3V3
13. N.C.

14. N.C.
15. TEMP-SENSOR
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V

J2

J1

3P

8P

IR / LED BOARD
(1112)

1M95 (B03C)

1M99 (B03C)

1M20 (B09A)

1735 (B03A)

1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK

1.
2.
3.
4.
5.
6.
7.
8.
9.

1.
2.
3.
4.
5.
6.
7.
8.

1.
2.
3.
4.

+12VD
+12VD
GND
GND
LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
POWER-OK

LIGHT-SENSOR
GND
RC
LED-2
+3V3-STANDBY
LED-1
KEYBOARD
+5V

1M72 (B13)
1.
2.
3.
4.

+24V
+24V
GND
GND

LEFT-SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT-SPEAKER

1D38 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. RIGHT-SPEAKER

1JA1 (B11C)
1. GND
|
36. VCC
37. VCC
|
41. VDD
42. VDD
|
60. GND

1JA2 (B11C)
1. GND
|
19. VDD
20. VDD
|
24. VCC
25. VCC
|
60. GND

1M59 (B13)
15. AMBI-TEMP
1. AMBI-SPI-CLK-OU
16. GND
2. AMBI-SPI-SDO-OUT
3. AMBI-SPI-SDI-OUT-GI 17. GND
18. GND
4. GND
19. GND
5. AMBI-PWM-CLK_B2
20. GND
6. V-AMBI
7. AMBI-SPI-CS-OUTn_R2 21. +24V
22. +24V
8. AMBI-LATCH1_G2
23. +24V
9. GND
24. +24V
10. AMBI-PROG_B1
25. +24V
11. AMBI-BLANK_R1
12. V-AMBI
13. AMBI-LATCH2_DIS
14. AMBI-SPI-CS-EXTLAMPSn
18770_403_100217.eps
100827

2013-Jan-29 back to

div. table

Block Diagrams

9.

EN 97

Wiring Matisse 40" - 46"

WIRING DIAGRAM 40"- 46" MATISSE

8M83

Board Level Repair


8M09

Component Level Repair


Only For Authorized Workshop

TO BACKLIGHT

8G50

8G51

8M59

CONDITIONAL ACCESS

USB

9P

ETHER
NET
SCART

SCART

HDMI

HDMI

HDMI

HDMI

11P

1M99
1M95

4P

40 DPS-199DP
46 PLDG-P977
(1005)

1735

9P

1M99
1M95

11P

KEYBOARD CONTROL
(1114)

MAIN POWER SUPPLY

3104 313 6364.x


3104 313 6372.x
(1150)

VGA

2P3

1308

AL

8735

J1

3P

41P

SSB

B
8M95

(1174)

1G50

51P

4P

8M99

AMBILIGHT MODULE 24/30 LED

1G51

25P

25P

4P

1M59

1M84

1M09

(1174)

8P

1M09

TUNER

1316

AMBILIGHT MODULE 24/30 LED

1M20
1319

SPDIF

25P

1M83

8M20

AL

2P3

LCD DISPLAY
(1004)

SPEAKER RIGHT

SPEAKER LEFT
(5215)

TCON

8191

MAINS CORD

(5215)

25P

TO DISPLAY

+ -

TO DISPLAY

1M83

1311

+ -

9.5

Q552.1E LA

8311
MAINS
SWITCH
(8311)

1M59 (B13)

1M83 (AL1A)

15. AMBI-TEMP
1. AMBI-SPI-CLK-OU
16. GND
2. AMBI-SPI-SDO-OUT
17. GND
3. AMBI-SPI-SDI-OUT-GI
18. GND
4. GND
19. GND
5. AMBI-PWM-CLK_B2
20. GND
6. V-AMBI
21. +24V
7. AMBI-SPI-CS-OUTn_R2
22. +24V
8. AMBI-LATCH1_G2
23. +24V
9. GND
24. +24V
10. AMBI-PROG_B1
25. +24V
11. AMBI-BLANK_R1
12. V-AMBI
13. AMBI-LATCH2_DIS
14. AMBI-SPI-CS-EXTLAMPSn

1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. TEMP-SENSOR
12. N.C.
13. N.C.

1M84 (AL2A)
14. +3V3
15. BLANK
16. PROG
17. GND
18. LATCH
19. SPI-CS
20. +3V3
21. PWM-CLOCK
22. GND
23. SPI-DATA-RETURN
24. SPI-DATA-IN
25. SPI-CLOCK

1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. GND
5. PWM-CLOCK-BUF
6. +3V3
7. SPI-CS
8. LATCH
9. GND
10. PROG
11. BLANK
12. +3V3
13. N.C.

14. N.C.
15. TEMP-SENSOR
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V

J2

J1

3P

8P

IR / LED BOARD
(1112)

1M95 (B03C)

1M99 (B03C)

1M20 (B09A)

1735 (B03A)

1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK

1.
2.
3.
4.
5.
6.
7.
8.
9.

1.
2.
3.
4.
5.
6.
7.
8.

1.
2.
3.
4.

+12VD
+12VD
GND
GND
LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
POWER-OK

LIGHT-SENSOR
GND
RC
LED-2
+3V3-STANDBY
LED-1
KEYBOARD
+5V

LEFT-SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT-SPEAKER

1G51 (B06B)
1. +VDISP
2. +VDISP
3. +VDISP
4. +VDISP
|
51. CTRL-DISP

1G50 (B06B)
1. GND
2. GND
|
|
40. N.C.
41. N.C.

1M09 (B09)
1.
2.
3.
4.

+24V
+24V
GND
GND
18770_404_100217.eps
100826

2013-Jan-29 back to

div. table

Block Diagrams

9.

EN 98

Block Diagram Video

VIDEO
B01A

B02

COMMON INTERFACE
1P00
17
51
52

7F01
74LVC245APW
20

B11A

VIDEO OUT - LVDS

B11C

TCON CONTROLLER (LGD)

MINI LVDS (LGD)


1JA1
60

1G50
1

7J01
TL2429MC

58

7J02
M24C32

53

2
+3V3

68P

PCMCIA

B06B

PNX85500

7S00
PNX85507EB

+5VCA

18

B02A VIDEO STREAM

SDA-TCON
SCL-TCON

B02F LVDS
LOUT1

PX1

42

EEPROM
+VDD

PX1
+VCC

CONDITIONAL
ACCESS

MDO(0-7)

CA-MDO(0-7)

BUFFER

19

QM

11

AGC

16

78
75
74

TS-DVBS-VALID
TS-DVBS-SOP
TS-DVBS-CLOCK

9F27-2

73

TS-DVBS-DATA

9F27-1

9F28

IF-OUT2

TUN-IF-P

11

TUN-IF-N

2F90

5F73
5F70

10

1G51
51

N.C.
I2C

1
2

1F75

2F78

SAW 36MHZ17

LOUT3

RML

6 3F79-4

PX3

B02I ANALOG VIDEO

BANDPASS
FILTER

PNX-IF-P

AE12

PNX-IF-N

AF12

OUT
4 IN
AGC CONTROL

25

B11B

TO TCON SSB

TUNER_P
PX4

GCLK

TUNER_N
4

EXT 1

AD12

+VDISP

IF_AGC

SSB 3104 313 6401*


SSB 3104 313 6402*
SSB 3104 313 6406*

B14A

DRX2DRX1+

89
87

DRX1DRX0+

86
RXD
84

DRX0-

83

23

ARX2ARX1+

22
20

ARX1ARX0+

19
RXA
17

7
20

AV4-PB
AV2-CVBS

9
10

ARX0-

16

ARXC+

14

HDMI 3
CONNECTOR

12

ARXC-

13

AV2-STATUS

B02G
CONTROL
B02G
CONTROL

B04B

R-VGA

G-VGA
B-VGA
H-SYNC-VGA

3
13
14

V-SYNC-VGA

B02E CONROL

B01C

19
18

1
2

HDMI 2
CONNECTOR

4
6
7

BRX2BRX1+

41
39

BRX1BRX0+

39
RXB
36

9
10

BRX0-

35

BRXC+

33

12

BRXC-

32

EXT 3

USB_DN
USB_DP

ANALOGUE EXTERNALS B

R26
R25

B01B

B02A FLASH

AV3-PR

AC15

AV3-Y

AE15

AV3-PB

AD15

PB

PR_R_C1

XIO_D

72

CRX2CRX1+

71
69

CRX1CRX0+

68
RXC
66

CRX0-

65

CRXC+

63

12

CRXC-

62

2
3
4

SIDE USB
CONNECTOR

SSB 3104 313 6364*


SSB 3104 313 6372*
SSB 3104 313 6401*
SSB 3104 313 6406*

NAND
FLASH

XIO-D(00-07)

+5V-USB1
1P07
1

256MB
512MB

9F21
9F20

PB_B1

HDMIA-RXC+
HDMIA-RXC-

B02B MEMORY

HDMIA-RX0+
HDMIA-RX0HDMIA-RX1+
HDMIA-RX1HDMIA-RX2+
HDMIA-RX23S0W
+3V3

W25
RXC_A_P
W26
RXC_A_N
V25
RX2_A_P
V26
RX2_A_N
U25
RX1_A_P
U26
RX1_A_N
T25
RX0_A_P
T26
RX0_A_N
W24
RREF

12,37

USB-DM1
USB-DP1

2
3
4

SIDE USB
CONNECTOR

+3V3

SSB 3104 313 6400*


SSB 3104 313 6402*
SSB 3104 313 6405*
SSB 3104 313 6417*

B05A

DDR
DDR2-D(0-31)

DQ
7B00
EDE1116AGBG
EDE1108AGBG

SDRAM
128MB
VDDL
VREF

CRX2+

9
10

USB-DM2
USB-DP2

Y_G1

VCC

62
TXC_P
63
TXC_N
60
TX0_P
61
TX0_N
58
TX1_P
59
TXA_N
56
TX2_P
57
TX2_N

2
1

FLASH

D(0-7)

1
2

HDMI 1
CONNECTOR

9F25

5000 Serie 256MB


7000 Serie 512MB

19
13

SSB 3104 313 6400*


SSB 3104 313 6405*
SSB 3104 313 6417*

7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F

B02C HDMI_DV

4
6
7

9F26

USB-DM
USB-DP

1E03

1P02

+VCC

CS(1U-12U)

+5V-USB2
1P08
1

1E08
42

LEVEL

TO DISPLAY
(TCON ON SSB)

USB HUB

PR
BRX2+

24
20

SSB 3104 313 6364*


SSB 3104 313 6372*

AF16 VGA_R
AD16
VGA_G
AE16
VGA_B
AB18
HSYNC_IN
AC18
VSYNC_IN

1E04

1P03

+VDD

SHIFTER

VGA
CONNECTOR
VCC33

7KUE
MAX17079GTL
CS(1-12)

1E05

11

9,27,64

MPD

PX4

Only 7000 Serie

+3V3-HDMI

13
25

TO TCON SSB

VGA
1

48
50

R_LV

B14D

Only 7000 Serie

B01I

59
GMA

Y_G2
AD14 PB_B2
AB14
CVBS_Y2

2
1

PX3

SCART2

TO DISPLAY
(TCON ON SSB)

1KA2
81

REF
VOLTAGE
GEN

PR_R_C2

7E09-2

21

36

13

CVBS1_OUT

7E04

AV2-BLK

41
37

13

PX2

19

19
18

4
6
7

ARX2+

10

1
2

AF11

CVBS-MON-OUT1

AE14

11

20

+VCC

50

7E06

AV4-Y

16

HDMI
SWITCH

FLASH

L_LV

TIMING
CONTROL

AC14

15

1P04

AV1-STATUS

B02G
CONTROL
B02G
CONTROL

AV4-PR

15

16

42
+VDD

7KQA
ISL24837IRZ

1E02
15
11

EXT 2

53

TO TCON SSB

5000/6000 Serie mux SIL9187 - non Instaport


7000 Serie mux SIL9287 - Instaport

A1 E2

7B02
EDE1116AEBG
EDE1108AGBG

SDRAM
128MB

A1 E2

7B03
EDE1108AGBG

SDRAM
128MB

A1 E2

D(24-31)

80

58

7KQB
M25P32

SCK

VDDL
VREF

81

DRXC-

AC13
AV1_R
AE13
AV1_G
AD13
AV1_B
AB15
CVBS_Y1

P GAMMA &
VOM & FLASH

SDO
SCS

PX1

D(16-23)

DRXC+

12

MINI LVDS (SHARP)


1KA1
81

B14C
SPI

VDDL
VREF

9
10

AV1-BLK

1
2
19
18

HDMI SIDE
CONNECTOR

3
4
6
7

21

SCART1

90

B14E

TCON CONTROL (SHARP)

7E09-1

16

1P05

2
1

GMA

19
16

CLK

LEVEL
SHIFTER

7E05

11
15

20

DRX2+

AV1-CVBS

19
13

7EC1
SII9187ACNU
SII9287BCNU

20

+VCC

TO DISPLAY
(TCON ON SSB)

PNX85500
AVI-B

24
20

3
2

1E01

+VDD

PX4

40

7KAA
UPD809900F

AV1-R
AV1-G

TCON DC/DC
7JD1
MAX17119ET

ANALOGUE EXTERNALS A

15
11

27

PX3

TO DISPLAY
(TCON ON DISPLAY)
LOUT4

PNX-IF-AGC

48

B04A

HDMI

59
GMA

OR

B04D

HDMI

1JA2
60

49

D(8-15)

B01H

GAMMA
REF
SYST

40

SELECT-SAW
B02E
CONTROL

40

7F75
+5V-TUN-PIN UPC3221GV
1
VCC
4 2F74 2 AGC AMPLIFIER 7 3F79-1

7F70

MAIN HYBRID
TUNER

TS-FE-DATA

TIMING
CONTROL

QUAD LVDS
1920x1080
100/120Hz

50

1T01
TH2603

RF IN

R23 TNR_SER1_MIVAL
R22
TNR_SER1_SOP
T22
TNR_SER1_MICLK
T21 TNR_SER1_DATA

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6372*

HDMI & CI

IF-OUT1

TS-FE-VALID
TS-FE-SOP
TS-FE-CLOCK

B01F

122
12

13
GMA

7JC1
MAX9668ETP

41

31

IP
IM
XTAL
QP

9F27-4

TO DISPLAY
(TCON ON SSB)

21

PX2

16M

1R10

30

21

PX2

N.C.

DVB-S
7
CHANNEL
8
DECODER

20
32
18

LOUT2

TUNER BRAZIL

4
SAT IN

DVB-S
TUNER

MDI

LML

1R01

B01K

7R01
STV0903BAC

36
34

TO TCON SSB

7R02
STV6110AT

41
37

7B01
EDE1108AGBG

SDRAM
128MB
VDDL
VREF

DVBS-FE

TO DISPLAY
(TCON ON DISPLAY)

MD0

CA-MDI(0-7)

B07A

19
18

9.6

Q552.1E LA

A1 E2
DDR2-A(0-13)

+1V8
DDR2-VREF-DDR
SSB 3104 313 6400*
SSB 3104 313 6402*
VREF_1
VREF_2

A2
V1

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6406*
SSB 3104 313 6417*
SSB 3104 313 6364*
SSB 3104 313 6372*

DDR2-VREF-CTRL2
DDR2-VREF-CTRL3
18770_405_100217.eps
100907

2013-Jan-29 back to

div. table

Block Diagrams
9.7

Q552.1E LA

9.

EN 99

Block Diagram Audio

AUDIO
B02

COMMON INTERFACE
1P00
17

+5VCA

18

B02A VIDEO STREAM

51
52

7R02
STV6110AT

MDO(0-7)

PVCC_L

CA-MDO(0-7)

BUFFER

MD0

78

20
32
18

IM
XTAL
QP

122
12

19

QM

11

75
74
73

TS-DVBS-DATA

9F27-1

TS-FE-VALID
TS-FE-SOP
TS-FE-CLOCK

9F28

+5V-TUN-PIN
1T01
TH2603

1
TUN-IF-P

11

TUN-IF-N

5F73

1F75

TS-FE-DATA

B02G STANDBY

PO_7

T21 TNR_SER1_DATA

-AUDIO-R

A-STBY

AC19

AA22

2F78

6 3F79-4

BANDPASS
FILTER

PNX-IF-P

AE12

PNX-IF-N

AF12

OUT
4 IN
AGC CONTROL

MAINS-OK

7D03
MAIN SWITCH
DETECT

B04A

HDMI

7EC1
SII9187ACNU
SII9287BCNU

PNX-IF-AGC

AD12

1E01-1
3
1

TUNER_P

PO_6

AD1

A-STBY

7EE0-1

7EE0-2

90

DRX2DRX1+

89
87

DRX1DRX0+

86
RXD
84

DRX0-

83

DRXC+

81

B04A

TUNER_N

IF_AGC

HEADPHONE
AMPLIFIER

ARX1ARX0+

19
RXA
17

ARX0-

16

ARXC+

14

12

ARXC-

13

AUDIO-IN1-R

AF10

AP-SCART-OUT-L

16
20

AP-SCART-OUT-R

A-PLOP

AUDIO-IN2-L

AD10

AUDIO-IN2-R

AC10

1
2
19
18

HDMI 2
CONNECTOR

39
RXB
36

12

BRXC-

32

B04B

1
2
19
18

HDMI 1
CONNECTOR

CRX2+

72

CRX2CRX1+

71
69

CRX1CRX0+

68
66

4
6
7
9
10

CRX0-

65

CRXC+

63

12

CRXC-

62

14

R25

+3V3

9F26
9F25

USB-DM2
USB-DP2

2
3
4

SIDE USB
CONNECTOR

AIN2_L

B01B

B02A FLASH

AIN2_R

SSB 3104 313 6364*


SSB 3104 313 6372*
SSB 3104 313 6401*
SSB 3104 313 6406*

FLASH
7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F

AUDIO-IN3-L

AE9

AUDIO-IN3-R

AF9

XIO_D

AIN3_L

AD9

AUDIO-IN4-R

AC9

AIN3_R

12,37

2
3
4

SIDE USB
CONNECTOR
SSB 3104 313 6400*
SSB 3104 313 6402*
SSB 3104 313 6405*
SSB 3104 313 6417*

+3V3

AIN4_L
5000 Serie 256MB
7000 Serie 512MB

AIN4_R

SPDIF-OUT

7S09
2
&
1

B02B MEMORY
SPDIF-OUT-PNX

AF5

B05A

DDR2-D(0-31)

DQ

4
8

SEL-HDMI-ARC

AF18

P0_4

HDMIA-RX0+
HDMIA-RX0HDMIA-RX1+
HDMIA-RX1HDMIA-RX2+
HDMIA-RX23S0W

W24

7B00
EDE1116AGBG
EDE1108AGBG

SDRAM
128MB

W25
RXC_A_P
W26
RXC_A_N
V25
RX2_A_P
V26
RX2_A_N
U25
RX1_A_P
U26
RX1_A_N
T25
RX0_A_P
T26
RX0_A_N

HDMIA-RXC+
HDMIA-RXC-

62
TXC_P
63
TXC_N
60
TX0_P
61
TX0_N
58
TX1_P
TXA_N 59
56
TX2_P
57
TX2_N

DDR

SPDIF_OUT
B02G STANDBY

5EC2

USB-DM1
USB-DP1

+3V3

+3V3
ARC-eHDMI+

9F20

VCC
AUDIO-IN4-L

9F21

256MB
512MB

1E09

+5V-USB1
1P07
1

NAND
FLASH

XIO-D(00-07)

B02c HDMI_DV

RXC

HEADPHONE
OUT 3.5mm

USB HUB

USB-DM
USB-DP

ANALOGUE EXTERNALS B

DIGITAL
AUDIO
OUT

1P02
1

R26

Only 7000 Serie

1E07

BRX1BRX0+

33

B01C

USB_DN
USB_DP

21

VCC33

BRX2BRX1+

35

VDD

B02E CONROL

B03C

41
39

BRX0-

PNX85500

AIN1_R

1E08

42

BRXC+

IN-2

SCART2

BRX2+

9
10

+5V-USB2
1P08
1

15

1P03

4
6
7

7E01

ADAC(4)

VGA (OR DVI)


AUDIO

AD6

AF6 ADAC_6
AE10 AIN1_L

AUDIO IN
L+R
9,27,64

ADAC4

11

Only 7000 Serie

+3V3-HDMI

AMP2

SCART1

HDMI
SWITCH

22
20

1
ADAC_5

AUDIO-IN1-L

A-PLOP

ARX2ARX1+

HDMI 3
CONNECTOR

ADAC(6)

AE6

VO_2

1E02

23

9
10

ADAC(5)

IN-1

AMP1

21

ARX2+

19
18

4
6
7

1
2

AUDIO-OUT-R

7S05

80

1P04

15

AP-SCART-OUT-R

3EA7-4

AUDIO-OUT-L

ADAC(3)

AF7

A1 E2

7B02
EDE1116AEBG
EDE1108AGBG

SDRAM
128MB

A1 E2

7B03
EDE1108AGBG

SDRAM
128MB
VDDL
VREF

DRXC-

3EA7-1

ADAC3

D(16-23)

12

20

AP-SCART-OUT-L

PNX85500: AUDIO

1328

SHUTDOWN
VO_1

VDDL
VREF

9
10

16

TEMP SENSOR + HEADPHONE

B03A

A-PLOP

D(8-15)

4
6
7

11

SUBWOOFER
(OPTIONAL)

3 2

DRX2+

2
3

B01J

HEADPHONE

VDDL
VREF

HDMI SIDE
CONNECTOR

SPEAKER R
1D38
1
7D03
STANDBY &
PROTECTION

RESET-AUDIO

D(0-7)

19
18

1
2

1P05

B02D

ANALOGUE EXTERNALS A
1

7EE1
TPA6111A2DGN

SELECT-SAW
B02E
CONTROL

B04D

HDMI

RIGHT-SPEAKER

MUTE

B01H

15

SD

DETECT2

B04E

B02I ANALOG VIDEO

OUT-R

AUDIO-MUTE-UP

VCC

AGC AMPLIFIER 7 3F79-1

7F70

B04E

B03C

7F75
UPC3221GV

A-PLOP

SPEAKER L
3

IN-R

5D03
P3_2

2F74

SAW 36MHZ17

MAIN HYBRID
TUNER

10

IF-OUT2

10

2F90
5F70

IF-OUT1

ADAC(2)

AE7

A-PLOP

R23 TNR_SER1_MIVAL
T22 TNR_SER1_SOP
T22 TNR_SER1_MICLK

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6372*

HDMI & CI

RF IN

ADAC_2

9F27-4
9F27-2

1735
1

LEFT-SPEAKER

22

CLASS D
POWER
AMPLIFIER

MDI

TUNER BRAZIL

TS-DVBS-VALID
TS-DVBS-SOP
TS-DVBS-CLOCK

31

B01F

OUT-L

IN-L

+24V-AUDIO-POWER

3 2

16M

1R10

30

+AUDIO-L

7D15

DVB-S
CHANNEL
8
DECODER

IP

21

14

12

ADAC(1)

AD7

5D07
10,12 5D08
1,3

SAT IN

DVB-S
TUNER

ADAC_1

PVCC_R

A1 E2

7B01
EDE1108AGBG

SDRAM
128MB
VDDL
VREF

B01K

7R01
STV0903BAC

B02D AUDIO

+3V3

CA-MDI(0-7)

DVBS-FE

AUDIO

7S05
LM324P

CONDITIONAL
ACCESS

B07A

B03A

CLASS-D

7D10
TPA3123D2PWP

7F01
74LVC245APW
20

68P

PCMCIA

B02D

PNX85500

7S00
PNX85507EB

D(24-31)

B01A

A1 E2
DDR2-A(0-13)

+1V8
SSB 3104 313 6400*
SSB 3104 313 6402*

RREF
VREF_1
VREF_2

eHDMI+

5000/6000 Serie mux SIL9187 - non Instaport


7000 Serie mux SIL9287 - Instaport

A2
V1

DDR2-VREF-DDR

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6406*
SSB 3104 313 6417*
SSB 3104 313 6364*
SSB 3104 313 6372*

DDR2-VREF-CTRL2
DDR2-VREF-CTRL3
18770_406_100217.eps
100907

2013-Jan-29 back to

div. table

Block Diagrams

9.

EN 100

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

7B02
EDE1116AEBG
EDE1108AGBG

SDRAM
128MB

SDRAM
128MB

ETHERNET
CONNECTOR
RJ45

ETH-RXD
ETH-TXD
7

ETH-RXCLK

AA3

20

ETH-TXCLK

AA2

25M

1E70

B01K

DVBS-FE

B02H POWER
AF1
VDD_1V1
AA15
VDDA_1V2

XTAL

122

18
19
21

QP

12

20
B08A

B01B

73

PNX85500

TUNER BRAZIL
9F27-1

TS-DVBS-DATA

9F28

SENSE+1V0-DVBS

9F27-2

TS-FE-DATA

T21

TS-FE-CLOCK

T22

TS-FE-SOP
TS-TS-VALID

9F27-4

TNR_SER1_MICLK

7F00

1P00
1
20

MOCLK

CA-MOCLK

K24

62
63

MOVAL
MOSTRT

CA-MOVAL
CA-MOSTRT

L23
L22

256MB/
512MB

CONDITIONAL
ACCESS

+3V3

39

43
3

MOVAL
MOSTRT

PNX-SPI-CLK
PNX-SPI-SDI

41

PNX-SPI-SDO

39

B02E

USB-DM
USB-DP
PXCLK54

7F02
7F03

B04C

B02A FLASH

31

AMBI-LATCH1_G2

19
20
28

AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-LATCH2_DIS

10
11
13

21
32

AMBI-SPI-CS-EXTLAMPSn
AMBI-TEMP

14

B02G

SSB 3104 313 6400.*


3104 313 6401.*
3104 313 6402.*
3104 313 6405.*
3104 313 6406.*
3104 313 6417.*

27

AMBI-SPI-SDO-OUT

23
29
30

AMBI-SPI-SDI-OUT_G1
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2

3
5
7

31

AMBI-LATCH1_G2

18

BL-SPI-CLK

19
20
28

AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-LATCH2_DIS

10
11
13

12

BL-SPI-SDO

14

BL-SPI-CSn

5
7
11

21
32

AMBI-SPI-CS-EXTLAMPSn
AMBI-TEMP

14

BACKLIGHT-PWM_BL-VS

13

B03C

1M59
1

PNX-SPI-CS-BLn

B02E

B14F

XIO-A(0-14)

I2C

VIO

26 VCCIO
9HA0

BACKLIGHT-PWM

B02E

15

USB HUB
+5V-USB2
1P08
1

B06E B06D B13


B01K B02G B02G

9F26

2
3

USB-DM2
USB-DP2

9F25

B06C B13
B01K B02G
B01F
B13

SIDE USB
CONNECTOR

2
3

USB-DM1
USB-DP1

9F20

SIDE USB
CONNECTOR

1E06

RXD1-MIPS

Y24

TXD1-MIPS

GPI0_3

SSB 3104 313 6364*


3104 313 6372*
3104 313 6401*
3104 313 6406*

+5V-USB1
1P07
1
9F21

GPI0_2 Y23

2D DIMMING
SSB 3104 313 6400.*
3104 313 6405.*
3104 313 6417.*

TO AMBILIGHT
MODULE
SSB 3104 313 6364.*
3104 313 6372.*

ETHERNET + SERVICE

XIO_A

7F04
7F05

SSB 3104 313 6400*


3104 313 6402*
3104 313 6405*
3104 313 6417*

UART
SERVICE
CONNECTOR

1
CA-D(0-7)

CONNECTORS
1F53
2

4
CA-A(00-14)

15
TO AMBILIGHT
MODULE

MDI

CA-MDO(0-7)

3
5
7

AMBI-SPI-CLK-OUT

VIO

RESET-SYSTEMn
SELECT-SAW
BACKLIGHT-PWM

AMBI-SPI-SDI-OUT_G1
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2

BACKLIGHT-PWM_BL-VS

B01C

R26
USB_DN
R25
USB_DP
AC5
CLK_54_OUT
AE4
RESET_SYS
U23
GPI0_11
AD5
BL_PWM

23
29
30

22

PNX85500: MIPS
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn

CPLD

40

AMBI-SPI-SDO-OUT

16

W23
V22

GPI0_6
GPI0_7

VS_2

MDO

MDO(0-7)

COMMON INTERFACE

VCC 12,37

PNX-SPI-SDO

CPLD

40

26
B02E CONTROL

PNX-SPI-CSBn

AMBI-SPI-CLK-OUT

27

NON DVBS
CONNECTOR BOARD

VCCIO

7F01

NAND
FLASH

41

PNX-SPI-CS-AMBIn

COMMON INTERFACE

PCMCIA

PNX-SPI-CLK
PNX-SPI-SDI

PXCLK54
PNX-SPI-CS-BLn

B02G

CA-MDI(0-7)

7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F

B02G

R22
TNR_SER1_SOP
R23
TNR_SER1_MIVAL

52

B01A

B03D

TNR_SER1_DATA

SSB 3104 313 6401.*


3104 313 6452.*
3104 313 6453.*

FLASH

B03B

SENSE+1V2

B02A VIDEO STREAM

74 TS-DVBS-CLOCK
MULTI
11
TS-DVBS-SOP
75
STANDARD
7 DEMODULATOR 78 TS-DVBS-VALID
FOR
SAT
DIG
TV
8
RESET-DVBS
62

QM
IP
IM

SENSE+1V1

B09A

7GA0
XC9572XL

43

1M59
1

22

SATELLITE
TUNER

32

AMBILIGHT CPLD

PNX-SPI-CSBn

7R01
STV0903BAC

7R02
STV6110AT

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6406*
SSB 3104 313 6417*
SSB 3104 313 6364*
SSB 3104 313 6372*

SSB 3104 313 6400*


SSB 3104 313 6402*

B07A

DDR2-A(0-13)

RXCLK
TXCLK

B02G

PXCLK54

F8 E8

DDR-CLK_N
DDR-CLK_P

B06C

RESET-ETHERNETn

F8 E8

RXD
TXD

19

F8 E8

A
N4
CLK_N
CLK_P N5

7E10
LAN8710A-EZK

ETHERNET

7HA0
XC9572XL

SDRAM
128MB

ETHERNET + SERVICE
1N00

SDRAM
128MB

7B01
EDE1108AGBG

B02E
F8 E8

B04C

DDR2-D(0-31)
7B03
EDE1108AGBG

3 2

SDIO-DAT2
SDIO-CDn
SDIO-WP

7B00
EDE1116AEBG
EDE1108AGBG

SDIO-DAT1

9
10
12

DQ

Pin8 Pin7

Pin6 Pin5

Pin4

Pin3

Pin2

5
7
8

B02B MEMORY

W2
CC_DAT3
W6
CMD
W1
CLK
W5
DAT_0
W4
DAT_1
W3
DAT_2
U6
SDCD
V6
SDWP

AMBILIGHT CPLD

3 2

SDIO-DAT3
SDIO-CMD
SDIO-CLK
SDIO-DAT0

D(24-31)

Pin1

Pin9

1
2

B13

DDR

D(16-23)

1P09

SD-CARD
CONNECTOR

B05A

PNX85500

7S00
PNX85507EB
B02E ETHERNET

D(8-15)

B02A

SD-CARD

D(0-7)

B01D

XIO_D

XIO-D(00-15)

68
XIO-D(00-07)

B02G
DC / DC

1M20
1
2
3
4

TO IR / LED BOARD AND


KEYBOARD CONTROL

5
6

AE26

RC
9U41

LED-2

LED1

LED-1

KEYBOARD

PWM_1

AD26

PWM_0

AD23

P5_0

SPI_CLK
P6_5
SPI_CSB
SPI_SDO
SPI_SDI

P3_1

PNX85500: STANDBY CONTROLLER


AB22
AD22
AC22

AV1-STATUS
AV2-STATUS
LCD-PWR-ONn

AE25
AE24
AC20

B04A
B04A
B03H

P3_2
P3_3
P3_5
P3_4

XTAL_I

CADC_2
CADC_3
P2_0

XTAL_O

4x HDMI
CONNECTOR

P1_1

TO PIN:
1P02-13
1P03-13 PCEC-HDMI
1P04-13
1P05-13
ARX-HOTPLUG
1P04-19
BRX-HOTPLUG
1P03-19
CRX-HOTPLUG
1P02-19
DRX-HOTPLUG
1P05-19

7EC0
EF

P2_7
CEC-HDMI

AF19

7EC1
SII9187ACNU
SII9287BCNU
31
35
41
45

HDMI
SWITCH

P1_2

P0_4
P2_2
P0_1
P0_3
P2_6

B02C HDMI_DV
RX

HDMIA-RC
3S0W
+3V3

W24

PNX-SPI-CLK

AE22
AF23
AE23

PNX-SPI-WPn

PNX-SPI-CSBn
PNX-SPI-SDO
PNX-SPI-SDI

1
5
2

AF25

P1_3
P0_6
RREF

P0_7
P2_3

5000/6000 Serie mux SIL9187 - non Instaport


7000 Serie mux SIL9287 - Instaport

2013-Jan-29 back to

div. table

+3V3-STANDBY

1 LEVEL SHIFTED
2
FOR
4 DEBUG USE
ONLY
5

FF04
SDM
FF29
SPI-PROG

7S20
NCP303LSN28G
2
3

INP OUTP
GND

AD18

RESET-USBn

AD21

ENABLE-3V3n

AF18
AE20
AA18
AE18

SEL-HDMI-ARC
LAMP-ON
RESET-DVBS
RESET-ETHERNETn

AC21

POWER-OK

AC19
AF20

1F51
3

SDM
RESET-STBYn
SPI-PROG

AE17

AA20
AB19

VCC

512K

TXD-UP

AF22

AF17

FLASH

RXD-UP

AE21
AF21
AB20
AA26

+3V3-STANDBY

HDMI

1
2

B04D

AA22

P1_7
RESET_IN
P6_4

AF24

1S02

DETECT2
RESET-SYSTEMn
AV1-BLK
AV2-BLK

B03C

7F52
M25P05-AVMN6P

+5V

B03C
B02E
B04A
B04A

BACKLIGHT-BOOST

B06C B13

P3_0

B02G

PNX85500-CONTROL

9CH0

BOOST-PWM

V23

B01E

P1_0

7U43

+3V3-STANDBY

GPIO_10

P5_1

AD19
AC25

LED2

7
8

B02G STANDBY
LIGHT-SENSOR

PNX85500: STANDBY CONTROLLER

BACKLIGHT-PWM-ANA-DISP
RESET-AUDIO
AUDIO-MUTE-UP
STANDBY

RESET-STBYn

B01C

B03C

DC / DC

+12V
+3V3-STANDBY

CONTROL

B03C

DVBS CONNECTOR BOARD


CONNECTORS
CONNECTORS

54M

B09A
B11D
B14F

19
18

9.8

Q552.1E LA

B02D
B07A
B04C

B06C
B01E

BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST

ENABLE -3V3-5V
ENABLE -1V8
DETECT2
1M99
5
6
7
9

B03E
B03B B03D
B02G B03A

TO
POWER
SUPPLY

8
B04E
B03A

1M95
2

TO
POWER
SUPPLY

18770_407_100217.eps
110217

Block Diagrams
9.9

Q552.1E LA

9.

EN 101

Block Diagram I2C

IC
B01E

PNX85500: MIPS

B04D

PNX85500-CONTROL

39

XIO_D

XIO-D(00-07)

DDC_A_SCL

DDCA-SCL

3S84

3S83

Y23
GPIO_2

DDR

uP
LEVEL SHIFTED
FOR DEBUG
1
USE ONLY

15

+3V3
43

DRX-DDC-SDA

44

DRX-DDC-SCL

3E53-4

3E53-3

TXD1-MIPS

3E53-2

3E53-1

AD25

3S5V-1

VGA-SDA-EDID

9FC2

AD24

3S5V-3

VGA-SCL-EDID

9FC4

PNX85500: ANALOG VIDEO

EDID
SW

48

VGA-SDA-EDID-TCON

9S14

VGA-SCL-EDID-TCON

3T51

3T61

3R14

3R15

3R01

3R00

3FD4

3FD3
1E05
12
15

VGA
CONNECTOR

TUN-P6

RES

7JC1
MAX9668ETP

RES

10 BIT
PROG GAMMA
REF SYST

175

RXD_2
RXD_3
RXCLK

B26

3S58

A25

3S5W

ETH-TXCLK

AA2

2_SCL

SDA-DISP

3KTV

3KTU

8-CHANNEL
PROG I2C
REF VOLT GEN

1J02
2

7
TCON
SW

1
9JBB

E19

E20

7KAA
UPD809900F1

7KQB
M25P32

CONTROL

FLASH

SCD
SCL
WP

SSB 3104 313 6401*


SSB 3104 313 6402*
SSB 3104 313 6406*

TCON
SW

SSB 3104 313 6400*


SSB 3104 313 6405*
SSB 3104 313 6417*

SSB 3104 313 6400*


SSB 3104 313 6405*
SSB 3104 313 6417*

VIDEO OUT - LVDS

SDA-SET

9S12

SDA-DISP

3G2W

50

SCL-SET

9S11

SCL-DISP

3G2Y

49

LVDS
CONNECTOR

+3V3

TXD_2
TXD_3

+3V3

ERR
14

TXCLK
W21
GPIO_2
GPIO_3

W22

RXD2-MIPS
TXD2-MIPS

7S01
PCA9540B
2 CHAN.
MULTIPLEX.
ERR
24

ERR
64

3S66

20

TXD_0
TXD_1

3S80

ETH-TXD(2)
ETH-TXD(3)

AA1
AA4
AB1
AB2

3S81

ETH-TXD(0)
ETH-TXD(1)

13

1G51

2_SDA
22
23
24
25

EEPROM
(4Kx8)

B06B

3S68

AA3

6
RES

SSB 3104 313 6401*


SSB 3104 313 6402*
SSB 3104 313 6406*

12

7KQA
ISL24837IRZ

7J02
M24C32-WDW6 +VDISP

+3V3

3S65

AC1

RXD_0
RXD_1

TCON

3S67

Y5
Y6
AB4

176

7J01
TL2429MC

MAIN
TUNER

3J35

3J36

SCL-TCON

1T01
TH2603

3S6B

ETH-RXD(3)
ETH-RXCLK

SDA-TCON

9JBA

SDA-TCON
SCL-TCON

9JB7

VCC

3S6C

9JBB

TUN-P7

RES

2 CHANNEL
MULTIPLEXER

9JB6

SCL-TUNER

3F76

7E10
LAN8710A-EZK

ETH-RXD(2)

TCON CONTROL
(SHARP)

SCL-DISP

3F75

SDA-DISP

SDA-TUNER

20

7KQH
PCA9540B

VCC

3J04

A23

3S6F

3S60
3S61

3S6G

D(24-31)

B24
4_SDA

ERR
34

ETH-RXD(0)
ETH-RXD(1)

B14A

P GAMMA & VCOM & FLASH (SHARP)

VCOM_SCL

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6406*
SSB 3104 313 6417*
SSB 3104 313 6364*
SSB 3104 313 6372*

11
10
9

B14C

VCOM_SDA
7JB3

HDMI & CI

ETHERNET + SERVICE

ETHERNET
CONNECTOR
RJ45

SSB 3104 313 6401*


SSB 3104 313 6405*
SSB 3104 313 6372*

3J37

B01F

ERR
18

HDMI
CONNECTOR
SIDE

7JB1
+3V3

ETHERNET

16

TCON CONTROLLER (LGD)

3J38

D(0-7)

A
DQ

4_SCL

1N00

1P05

VCC_3V3

DDR2-A(0-13)

SSB 3104 313 6400*


SSB 3104 313 6402*

ERR
36

MEMORY

DDR2-D(0-31)

SDRAM

SATELITE
TUNER

RES

1KQB
1

7B03
EDE1108AGBG

D(16-23)

SDRAM

B02B

9S15

B11A

MINI LVDS (LGD)

9JB7

SDRAM

B11C

9JB6

SDRAM

ERR
31

RES
ANALOGUE
VIDEO

SCL-DISP

7B01
EDE1108AGBG

D(8-15)

7B00
EDE1116AEBG
EDE1108AGBG

12

+5V-VGA

9FC3

13

VGA

VGA-SCL-EDID-HDMI

47

UART
SERVICE
CONNECTOR

LNB
CONTROLLER

HDMI

15

+5V-EDID

1E06

W22 SCLT

DIN-5V

HDMI
CONNECTOR 1

ETHERNET + SERVICE

RXD1-MIPS

3FE8

3FE9
CRX-DDC-SCL

B01H

9FC1

B02I

VGA_EDID_SCL

1
2
19
18

16

VGA_EDID_SDA

7B02
EDE1116AEBG
EDE1108AGBG

B04C

1P02
CRX-DDC-SDA

RES

VGA-SDA-EDID-HDMI

Y24

B02I

B05A

HDMI
CONNECTOR 2

B01I
B04C

MAIN
SW

GPIO_3

15

+3V3

HDMI_DV

5000/6000 Serie 256MB


7000 Serie 512MB

BRX-DDC-SCL

W21 SDAT

7R02
STV6110A

19
18

Y26

ERR
28

19
18

3F64

DDCA-SDA

DDC_A_SDA
FLASH

TXD-UP

Y25

16

10

B02C

ERR
42

1P03
BRX-DDC-SDA

B02A

CHANEL DEC
DVBS

7T50
LNBH23QT

11

FLASH
(4Gx16)

AF21

3F65

3ECP-3

P3_1

TEMP
SENSOR

15

P3_0

RXD-UP

3ECU-4

7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F

40

DEMODULATOR

HDMI
CONNECTOR 3

1F51
3

3ECU-2

AE21

MAIN NVM
SW

3S1H

3S1G

FLASH

15

CIN-5V

ERR
35

RES

+3V3RF
97

3S2G

AC24

+3V3-STANDBY

B01B

DVBS-SUPPLY

MC_SCL

16

ARX-DDC-SCL

1
2

34
EEPROM
(NVM)

98

7R01
STV903BAC

3FBF-1

3S2F

AC23
MC_SDA

7FD1
LM75BDP

3FBF-2

ERR
53

33

7FE0
TC90517FG

3FC2

STANDBY
SW

7F58
M24C64

ARX-DDC-SDA

BIN-5V

HDMI
MUX
ERR
23

STANDBY
ERR
15

30

45

1P04

3FC1

PNX-SPI-CSBn
PNX-SPI-SDO
PNX-SPI-SDI

29

46

1
2

1
5
2

PNX85500: STANDBY
CONTROLER

DEBUG
ONLY

+3V3-STANDBY

AF24

SPI_CLK
AE22
P6_5
AF23
SPI_CSB
AE23
SPI_SDO
AF25 SPI_SDI

3F62

7EC1
SII9287B
SII9187A

1F52
3

3ECP-1

512K

PNX-SPI-WPn

3F63

SCL-UP-MIPS

3S6V

VCC

PNX-SPI-CLK

B08B

DVBS-FE

19
18

SDA-UP-MIPS

3S6W

+3V3-STANDBY

B02G

B02G

B07A

1
2

3S57

3F60

1_SCL

AIN-5V
54

3ECA-4

C26

1_SDA

3F59

C25

3S56

3S69

CONTROL

3S6A

53

3EC1-3

ERR
13

PNX85500

3ECA-2

+3V3

FLASH

TEMP SENSOR +
HEADPHONE

SCL-SSB

3EC5

3_SCL

B01J

TUNER BRAZIL

SDA-SSB

3EC1-1

3S5Z

3ECA-1

3S5Y

A24

3_SDA

3ECA-3

B25

3S6D

B02E

7F52
M25P05-AVMN6P

B01K

HDMI

+3V3

7S00
PNX85507EB

3EC3

B02E

PNX85500: CONTROL

3S6E

B01E

B09A

DVBS CONNECTOR BOARD

B11D

1F53

3C84

3C85

3C83

1M71
3

B14F

CONNECTORS (LGD)

CONNECTORS (SHARP)

1F53

2D
DIMMING

1F53

3J84

3J85

3J83

1M71
3

2D
DIMMING

3K84

3K85

3K83

1M71
1

2D
DIMMING

SW

Programmable via USB

SW

Programmable via ComPair

SW

Pre-programmed device

7
8

3C81
RES
RES

9S13
9S10

TO
1 TEMPERATURE
SENSOR
SDA-BL

3J81

TO
1 TEMPERATURE
SENSOR

RES

3K81

TO
3 TEMPERATURE
SENSOR

RES

SCL-BL
SSB 3104 313 6364*
SSB 3104 313 6372*

SSB 3104 313 6401*


SSB 3104 313 6402*
SSB 3104 313 6406*

SSB 3104 313 6400*


SSB 3104 313 6405*
SSB 3104 313 6417*
18770_408_100217.eps
110217

2013-Jan-29 back to

div. table

Block Diagrams

9.

EN 102

Supply Lines Overview


SUPPLY LINES OVERVIEW

GND1

BL_ON_OFF
DIM
BOOST
N.C
POK
N.C.
N.C.
N.C.

4
5
6
7

LAMP-ON
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST

BACKLIGHT-PWM-ANA-DISP

POWER-OK

10

11

BL-SPI-SDO
BL-SPI-CSn

12

BL-SPI-CLK

B02G
B06C
B01E
B02G

6
7
8

6
7
8

9
10

9
10

11

11

+1V2

7UA3

+3V3-BRA
+3V3-BRA-FLT

3U16

+3V3

T 3.0A

1G03
B02d,h
+2V5-LVDS

CUA0

ENABLE-1V8

+12V

+12V

7UA0
VOLT.
REG.

PNX85500: SDRAM

+2V5-REF

+5V

+5V

B03e

B06C
B03E

DDR2-VREF-CTRL2

B03e

+12V

+3V3

IN OUT
COM

5UD2

+3V3

5UD1

+5V5-TUN

7UD0

+2V5

+2V5

7UD2

+3V3

+3V3

IN OUT
COM

+3V3
+5V

B03e

3F01

+24V-AUDIO-POWER

B03c

+2V5-AUDIO

B02E

PNX85500: MIPS

B03e

5UM1

+3V3
+5V

+5V

B03e

3F25
3F32

+T

+1V1

+3V3-STANDBY

+3V3-STANDBY

+3V3

+3V3

B03d

3F40

+3V3-SD
B03b

+T

PNX85500: CONTROL
+3V3

+3V3-STANDBY

+1V2

+1V2

+1V8

+1V8

+3V3

+3V3-STANDBY

+3V3-STANDBY

+VDISP-INT

+5V-TUN-PIN
B03c

+24V-AUDIO-POWER

3D09

B04A
B03e

B01G

+3V3

+5V

+5V

B03e

B08a

B03B

IN OUT
COM

5FA3

+1V2-BRA-VDDC

B03c

5FA4

+1V2-BRA-DR1

B03c

+3V3

7U03
TPS53126PW

B01H

1P05
18

7U02-1

DIN-5V

B04d

Dual
Synchronous
7U02-2
Step-Down
Controller
14

B01I

VGA
CONNECTOR

1
1E05
9

+5V-VGA

7U04

B04d

24

B01J
+3V3
B03e

+3V3-DVBS

IN OUT
COM

LCD
SUPPLY 21
10

+5V
B03e

B02b,h,B03d,
B05a

B08b

DVBS-SUPPLY

+3V3-DVBS

VGH_35V
VGL_-6V

+3V3-HDMI

B14C

P GAMMA & VCOM & FLASH (SHARP)

1P03
18

BIN-5V

B14D

+3V3
+3V3-STANDBY

+5V

+3V3

VREF_15V2

1M59
21

B03c

+3V3-STANDBY

+VDISP

+3V3

VLS_15V6

B08a

TO
AMBILIGHT
MODULE

B14E

MINI LVDS (SHARP)

VGL_-6V

VGL_-6V

VGH_35V

VGH_35V

B14b
B14b

TCON CONTROLLER (LGD)

VCC

VCC
VCORE
9J02

+VDISP

B14F

+VDISP-INT

+3V3
+3V3-STANDBY
+5V
1M20
5

B11a

VDD
VCC

+5V

B03e

+VDISP

7JF1
22 MAX17113ETL
Multiple 35
Output
Power 21
Supply

+3V3-STANDBY

B03c
+VDISP-INT

CONNECTORS (SHARP)

+3V3

B03e

B11B

VCC_3V3
VLS_15V6

B14b

ML_VDD

TCON DC / DC (LGD)

VCC_3V3
VLS_15V6

B14b

+VDISP

T 3.0A

+3V3-STANDBY

VCC_3V3
VREF_15V2

+VDISP

VLS_15V6

+12V

HEADPHONE

+3V3

B14c
TO
IR/LED
BOARD B14b
B14b

+24V
1C86
*1T86

1JG1

B03e

B14d

B14b

CIN-5V
DIN-5V

VREF_15V2

MPD (SHARP)

VCC_3V3

+5V

IN OUT
COM

B11b

VLS_15V6

(*NON) DVBS CONNECTOR BOARD

+3V3

+12V

B03h

B04E

VCC_3V3
+VDISP

7KQA
5 ISL248371RZ
32
IC
LCD
SUPPLY

7J03
AIN-5V

B02g,h,
B03e

TEMP SENSOR + HEADPHONE

B14b

+V-LNB

+3V3-STANDBY

1P04
18

DIN-5V

B01h
+1V1

B14e
B14e

+12V

1M09
1
2

B11b

HDMI 1
CONNECTOR

B14a,c,d,e

9KFE
3KFP

VLS_15V6

+3V3-DVBS

+V-LNB

B11A

1P02
18

B14c,d,e
VCC_3V3

B14b

+5V

HDMI 3
CONNECTOR

VLS_15V6

B07a

+V-LNB

B03c

12V/1V1
COVERSION

5U01

7KFA
1 ISL97653AIRZ
5KFD
3
IC

B07a,B08b

+2V5-DVBS

1M20
5

+5V-VGA

HDMI 2
CONNECTOR

23

B07a

7T01

+5V-EDID

+1V8

B14a,c,d

9KFC

5T01 +1V-DVBS

T 2.0A
+5V-VGA

7U01

VGA

IN OUT
COM

B03c
B03e

+3V3

+3V3-STANDBY

12V/1V8
COVERSION
5U00

+VDISP
VLS_15V6_B

7KFE

7T00
5T00

HDMI

5EC0

B01I

12

HDMI

HDMI SIDE
CONNECTOR

+3V3-ET-ANA

+12V

B01k

1KFA

+5V-DVBS

+3V3-STANDBY
+3V3

5E08

+3V3-STANDBY

+12V

+VDISP-INT

T 3.0A

12 5T04

B09A

ETHERNET + SERVICE

B03e

B03c
B01k

VCC_1V2

+VDISP-INT

ANALOGUE EXTERNALS B

B03e

DC / DC

TCON DC / DC (SHARP)

B14a
B03h

+AVCC

+3V3-STANDBY

7FA3

+24V

+12V
B03c

+5V

B04C

TOSHIBA SUPPLY
+3V3

+24V

B08B

ANALOGUE EXTERNALS A

+3V3

+3V3

VDDQ

VCC_3V3

+3V3

B04D

B03e

VDD33

5KAF

+VDISP

+3V3-STANDBY

+24V-AUDIO-POWER

+3V3

B06a,B11b,
B14b

B03e

B03c
9F71

B14B

5KAE

B14b

AUDIO

+3V3-STANDBY

VCC_3V3

B14b

DVBS-SUPPLY

+12VD

+5V

B03d

SSCG_AVDD

+3V3RF

IN OUT
COM

B03e

+5V-TUN

mini_AVDD

5KAD

5R01

+3V3

B04B

+5V-TUN

LVDS_AVDD

+3V3-DVBS

+3V3-STANDBY

B08a

B03A

5KAB
5KAC

+3V3-DEMOD

Dual
N-Synchr
Converter

+5V

HDMI & CI

+1V-DVBS

7UU2
LCD-PWR-ONn

B03e

B01F

B14b

+2V5-DVBS

7T02

7UU1

+2V5-LVDS

B03c
+5V

B03c

VCC_1V2
VDD12

5R00

7T03
1 TPS54283PWP
3 5T03

+2V5-AUDIO

+3V3

B03e

+3V3-STANDBY

5KAG
5KAA

B09a

VDISP - SWITCH

+12VD

+2V5

+2V5-LVDS

B03d

+3V3
B03e

+1V1

+2V5-AUDIO

B02d

B01E

+1V1

+2V5

B03d

VIN SW
GND

DVBS-FE

+3V3

+12V

+3V3-STANDBY

B03c

PNX85500: POWER

SD-CARD

B03e

FAN - CONTROL

+3V3

B03b

+VDISP

7KAC

VCC_1V2

+3V3

B03H
B03e

B01D

B08A

TO
AMBILIGHT
MODULE

TCON CONTROL (SHARP)

+VDISP

V-AMBI

+12V

+T

B03c

1UM0

+3V3

B03c

B02H

1M59
21

VCC_3V3

B03e
B03c

+5V-USB1
+5V-USB2

B03G

PNX85500: STANDBY CONTROLLER

+1V1

B03b

+24V

T 1.5A

B14A
+3V3

+3V3-DVBS

B08a

B03e

+3V3

VIO

1HA0

+3V3

T 1.0A

+3V3-STANDBY

USB HUB

B03e

SPI-BUFFER

+2V5-DVBS

+3V3

+3V3

+3V3-STANDBY

B02G

VIO

+1V-DVBS

B08a

B03c

B01C

B07A

B03e

+3V3

+3V3

VINT

5GA1

1M72
1
2

TEMPSENSOR + AMBILIGHT

+3V3

FLASH

+3V3

5GA0

+3V3

+24V-AUDIO-VDD

B03F

B03e

+3V3

ONLY FOR 5000 SERIES

+T

B01B

B06D

VINT

5HA1

B14b

B08a

IN OUT
COM

B02h

+24V-AUDIO-POWER

3S0Z

+5VCA

B03d

B01,a,c,e,k,
B03c,d,B04a,b,d,
B09a,B11d,
B14f

+2V5

7UD3

IN OUT
COM

B03e

+3V3
5HA0

+3V3-ARC

7S08

+5V

+5V

B03e

PNX85500: AUDIO

COMMON INTERFACE

+3V3

B01,a,b,c,d,e,
g,j,jk,B14f
B02a,c,d,e,h,
B03c,f,g,h,
B04a,c,d,e,
B06b,c,d,
B08a,B09a,
B11d,B13

+12V
5UD3

TO
IR/LED
PANEL

AMBILIGHT CPLD

+3V3

+3V3

B03e

7UD1

3S11

B01A

B13

+VDISP

DC / DC
+1V1

PNX85500: DIGITAL VIDEO IN

+12V

+3V3

+VDISP

B06a

5UD0

B02D

B03c

+3V3

DDR2-VREF-CTRL3

+3V3

+12V

B03e

B03c

B03d

VIDEO OUT - LVDS

B03e

B03b

B03e

+5V
1M20
5

+1V8

6UD0
+3V3

+5V

B03e

B06B

IN OUT
COM

+3V3

1G00

+5V-TUN

+1V1

B03e

+3V3
+3V3-STANDBY

T 3.0A

+3V3

3S06

B03A

CONNECTORS (LGD)

+3V3
+3V3-STANDBY

B03c

5G02

B11D

B01f

+24V-AUDIO-POWER

MAINS-OK

B06b
B03e

5G01

+5V5-TUN
7UA6

+1V8

B02C

+VDISP

T 3.0A

B03e

PNX85500: NANDFLASH
CONDITIONAL ACCESS

B03b,d,e,g,
B08b,B09a,
B11d,B14f

P_VDD

B03h

B02h

3UA0

B02d,B03a

3JC1

+VDISP-INT

+2V5

IN OUT
COM

+2V5-BRA

IN OUT
COM

+3V3

B02B

3JC0

DISPLAY INTERFACING-VDISP

7UC0

NOT FOR 5000 SERIES

B01e,B02e,
g,h,B03a,b,h,
B04d,e,B09a,
B11d,B14f

VDD

B11b

B06A

3U15

3S20
+12V

VDD

+5V

+5V
5FE9

B03b

1U40

DDR2-VREF-DDR

+VDISP-INT

B03c

B02G

3B20

+12V
+5V
B03e

7FE3

B03e

VCC

B11b

+3V3

+5V

B03e

B02A

STANDBY

B03b

MINI LVDS (LGD)

VCC

+1V8

B02h
+3V3

+5V5-TUN

+3V3-STANDBY

B11C

DDR

+1V8

B01g

B02G

1M95
1
2
3
4
5

B05A
+1V8

+1V2-BRA-DR1

5FE4

1M95
1
3V3_ST
2
STANDBY
3
GND1
4
GND1
5
GND1

+12V
+12V
+VSND
GND_SND
N.C.

+1V2-BRA-DR1

5FE7
5
6
7

DC / DC

+1V8
B03b

B03e

Optional 1M99 is 12 pin connector

+12V

B03D
+1V2-BRA-VDDC

5T02

GND1

PSU

+12VD
B03h

TUNER BRAZIL

+1V2-BRA-VDDC
B01g

6EC1

+12V

B01K

DC / DC

1M99
1

OR

B03C
1M99
1
+12V

5U02

9.10

Q552.1E LA

B11c
B03c

+12V

TO
IR/LED
PANEL

+12V

B11a,c
18770_409_100412.eps
100423

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 103

10. Circuit Diagrams and PWB Layouts


10.1 A01 272217100965 PSU
10-1-1

Power Supply Unit with Integrated Led Driver 32" FHD

A01

Power Supply Unit with Integrated Led Driver 32" FHD

A01

Power Supply Unit with


Integrated Led Driver 32" FHD

2009-12-14

2722 171 00965


18778_001_130122.eps
130122

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 104

10.2 A01 272217100966 PSU


10-2-1

Power Supply Unit with Integrated Led Driver 42" FHD

A01

Power Supply Unit with Integrated Led Driver 42" FHD

A01

Power Supply Unit with


Integrated Led Driver 42" FHD

2009-12-14

2722 171 00966


18778_002_130122.eps
130122

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 105

10.3 AL1 820400089786 AmbiLight Common


10-3-1

LiteOn LED Common

LiteOn 15 LED Common

AL1A
1

AL1A

10

11

12

13

14

+3V3
2B11
100n

TEMP-SENSOR

6
100p

2B04-3

5
100p

2B04-4

LATCH
SPI-CS
FB12
PWM-CLOCK

BLANK
GSCLK
IREF
MODE
SCLK
SIN
SOUT

12
13
28
29

4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21

0
1
2
3
4
5
6
7
OUT
8
9
10
11
12
13
14
15

XERR
XHALF
XLAT

NC

GND

PWM-R1
PWM-G1
PWM-B1
PWM-G3
PWM-R3
PWM-R2
PWM-G2
PWM-B2
PWM-B3
PWM-G4
PWM-R4
PWM-B4
PWM-B5
PWM-G5
PWM-R5
DATA-SWITCH

SPI-DATA-RETURN
FB15
SPI-DATA-IN
FB16
SPI-CLOCK

27 26

+3V3

2K0
7B26-2
TLC5946RHB
34
VIA
35
VIA VIA
36
VIA

FB13

3B31

GND_HS

30

+3V3

22
25
32

3B22
10K

FB10
FB11

BLANK
PROG

100p

FB07
FB08

3B21
150R

+3V3

3B18
FB35

150R

FB06

+3V3

1K8

FB20

2 3B00-2 7

LATCH

FB05

31
24
26
3
1
2
23

8
150R

4 3B00-4 5
PROG
150R
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
3
6
SPI-DATA-IN
150R
SPI-DATA-OUT 3B00-3

FB03

FB04

VCC

3B00-1

33

1
BLANK
PWM-CLOCK-BUF

27

+24V

2B04-2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

42
41
40

1M83
37
38
39

7B26-1
TLC5946RHB

FB01

100p
2B04-1

FH12-25S-0.5SH(55)

+3V3

3B34

6
3B39-3

2
1

100R

3B30-4

SPI-CLOCK-BUF

2B10

33p

2B01

220R

+24V

100p

3B01-1

10n
3B39-1

2B09

5
1

SPI-CLOCK

1K5 1%

4
SPI-DATA-RETURN

7B23-1
BC847BS(COL)
6

10K

8 3B07-1 1

FB41
7B20-2
74LVC2G17
+3V3

1K5 1%

3
RES

10n
3004

GND

TEMP-SENSOR

LMV331IDCK

10K

+3V3

10K

2B08

10K

3B11

7B30
1
3

100p

HOLD

FB40

PWM-CLOCK-BUF

1K5 1%

7
1 3B30-1 8

3B39-2
6

220R

3B02-2

10K

100R

2B02

1 3B02-1 8

2 3B01-2 7

PWM-CLOCK

-T

+3V3

+3V3

(64K)

4
DATA-SWITCH

VCC

33p

2B00

+3V3
7B06
74LVC1G32GW
1
SPI-CS

7B20-1
74LVC2G17

100K RES

100n

SPI-CLOCK-BUF
7B07
M95010-WDW6

+3V3

+3V3
2B17

SPI-DATA-IN-BUF

100n

2B20

+3V3

1
10K

2 3B07-2 7

FB30

PWM-B1

3B35

7B23-2
BC847BS(COL)
3

10K

5 3B07-4 4

7001
LTW-008RGB

7002
LTW-008RGB

7004
LTW-008RGB

7003
LTW-008RGB

7005
LTW-008RGB

BLUE

BLUE

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

3B37

RED

RED

RED

RED

BLUE

BLUE

GREEN

GREEN

RED

RED

270R
3B36

68R

4
10K

3 3B07-3 6

1 3B03-1 8
FB31

PWM-R1

+24V

7000
LTW-008RGB

+24V

2
+24V

1K5
3B03-2

1K5

7B25
BC847BW 3

3
B002

2B03

2
10K

5 3B13-4 4

2
B001

FB32

PWM-G1

1K5

1K5
3B03-4

100n

10K

3 3B13-3 6

3 3B03-3 6

10

11

12

13

14

1M83 C1
2B00 E8
2B01 F8
2B02 E9
2B03 I14
2B04-1 B7
2B04-2 B6
2B04-3 B8
2B04-4 B7
2B08 E12
2B09 E12
2B10 F9
2B11 A9
2B17 D8
2B20 D4
3004 E12
3B00-1 A6
3B00-2 B6
3B00-3 B6
3B00-4 B6
3B01-1 E7
3B01-2 D7
3B02-1 E3
3B02-2 E5
3B03-1 H14
3B03-2 H14
3B03-3 H14
3B03-4 H14
3B07-1 F3
3B07-2 G3
3B07-3 H3
3B07-4 G3
3B11 E12
3B13-3 H3
3B13-4 I3
3B18 A8
3B21 B7
3B22 B8
3B30-1 D9
3B30-4 E9
3B31 B10
3B34 D13
3B35 G14
3B36 G14
3B37 G14
3B39-1 E13
3B39-2 D12
3B39-3 D13
7000 G5
7001 G7
7002 G8
7003 G10
7004 G11
7005 G13
7B06 D3
7B07 D4
7B20-1 D8
7B20-2 E8
7B23-1 F4
7B23-2 G4
7B25 H3
7B26-1 A8
7B26-2 C9
7B30 D13
FB01 A1
FB03 B1
FB04 B1
FB05 B1
FB06 B2
FB07 B1
FB08 B1
FB10 B2
FB11 B1
FB12 B2
FB13 C1
FB15 C1
FB16 C1
FB20 B7
FB30 G3
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13

B007

AL 2K10 LiteOn
15 LED Common

8204 000 8978

2009-12-04

2009-10-28

2009-10-07

2009-08-27

2009-07-03

18770_600_100212.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-3-2

Q552.1E LA

10.

EN 106

LiteOn LED Common 2

AL1B
1

LiteOn 15 LED Common 2

AL1B

10

11

12

7B50-1
BC847BS(COL)

10K

5 3B55-4 4

+24V

1
10K

3 3B55-3 6

FB70

PWM-B2

3B50
+24V

7B50-2
BC847BS(COL) 3

10K

BLUE

BLUE

270R

BLUE

BLUE

BLUE

BLUE

GREEN

GREEN

3B52

GREEN

GREEN

GREEN

GREEN

RED

RED

RED

RED

RED

RED

8
+24V

1K5
3 3B53-3 6

100n

2 3B53-2 7
FB71

1K5

+24V

4 3B53-4 5
1K5
7B51
BC847BW 3

10K

3 3B57-3 6

68R
3B53-1

1K5

10K

1 3B55-1 8

7100
LTW-008RGB

PWM-G2

7101
LTW-008RGB

7102
LTW-008RGB

7103
LTW-008RGB

270R
3B51

2B50

7 3B55-2 2

7104
LTW-008RGB

7105
LTW-008RGB

2
10K

7 3B57-2 2

FB72

PWM-R2

7C20-1
BC847BS(COL) 6

10K

5 3C00-4 4

+24V

1
10K

3 3C00-3 6

FC01

PWM-B3

1 3C10 2
+24V

7C20-2
BC847BS(COL) 3

10K

7 3C00-2 2

1 3C11 2

4
10K

1 3C00-1 8

BLUE

BLUE

BLUE

Blue

3C12

GREEN

GREEN

GREEN

Green

RED

RED

RED

Red

1 3C15-1 8

1K5
3C15-2

1K5

FC02

PWM-G3

270R

68R

7202
LTW-008RGB

7201
LTW-008RGB

7200
LTW-008RGB

270R

3 3C15-3 6

1K5
4 3C15-4 5
1K5

7C22
BC847BW 3

10K

1 3C06-1 8

+24V

H
PWM-R3

2
10K

7 3C06-2 2

FC03

10

11

2B50 C11
3B50 B7
3B51 B7
3B52 B7
3B53-1 B7
3B53-2 C7
3B53-3 C7
3B53-4 C7
3B55-1 C3
3B55-2 B3
3B55-3 A3
3B55-4 A3
3B57-2 D3
3B57-3 C3
3C00-1 G3
3C00-2 F3
3C00-3 F3
3C00-4 E3
3C06-1 G3
3C06-2 H3
3C10 F4
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
3C15-3 G4
3C15-4 G4
7100 B11
7101 B10
7102 B9
7103 B7
7104 B6
7105 B5
7200 F8
7201 F9
7202 F10
7B50-1 A3
7B50-2 B3
7B51 C3
7C20-1 E3
7C20-2 F3
7C22 G3
FB70 B3
FB71 C3
FB72 D3
FC01 F3
FC02 G3
FC03 H3

12
AL 2K10 LiteOn
15 LED Common

8204 000 8978

2009-12-04

2009-10-28

2009-10-07

2009-08-27

2009-07-03

18770_601_100212.eps
100212

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 107

10.4 AL2 820400089773 3 LED LiteOn


10-4-1

3 LED LiteOn

AL2A

3 LED LiteOn

AL2A
2

10

1M84 A10
2C15 B6
7203 A3
7204 A4
7205 A5

FH12-25S-0.5SH(55)
7204
LTW-008RGB

7203
LTW-008RGB
BLUE

Green

Red

BLUE

BLUE

GREEN

GREEN

GREEN

PWM-CLOCK-BUF

RED

RED

RED

SPI-CS
LATCH

+24V

+3V3
2C15

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

100n

Blue

7205
LTW-008RGB

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V

26

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

C
27

1M84

10

B003

3 LED LiteOn
AL 2K10

8204 000 8977


3104 313 63895

2009-10-07

2009-08-27

2009-07-20

18770_630_100212.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 108

10.5 AL2 820400089691 9 LED LiteOn


10-5-1

9 LED LiteOn

AL2A

9 LED LiteOn

AL2A
2

10

A
7204
LTW-008RGB

1M84

7205
LTW-008RGB

Blue

BLUE

BLUE

Green

GREEN

GREEN

Red

RED

RED

BLUE

GREEN

PWM-CLOCK-BUF

RED

SPI-CS
LATCH

+24V

+3V3

2D01

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

100n

7203
LTW-008RGB

1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V
26

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27

FH12-25S-0.5SH(55)

FD04

B003

10

B004
1

9 LED LiteOn
AL 2K10

2009-10-07

8204 000 8969


3104 313 63812
18770_610_100212.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-5-2

Q552.1E LA

10.

EN 109

9 LED LiteOn

AL2B

9 LED LiteOn

AL2B
3

11

10

12

13

+24V

A
7D01-1
BC847BS(COL)
6

10K

8 3D02-1 1

FD01
1 3D10 2

+24V

7302
LTW-008RGB

7301
LTW-008RGB

7300
LTW-008RGB

7304
LTW-008RGB

7303
LTW-008RGB

7305
LTW-008RGB

7D01-2
BC847BS(COL)
3

10K

6 3D02-3 3

PWM-R4

BLUE

BLUE

BLUE

BLUE

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

GREEN

GREEN

3D12

RED

RED

RED

RED

RED

RED

68R

1 3D13-1 8

1K5

FD02

2 3D13-2 7

1K5

7D02
BC847BW 3

10K

3 3D05-3 6

1K5
3 3D13-3 6
4 3D13-4 5
1K5
2D10

2
10K

5 3D05-4 4

+24V

PWM-G4

+24V

10K

4 3D02-4 5

270R
3D11

100n

PWM-B4

1
10K

2 3D02-2 7

FD03

10

11

12

2D10 D13
3D02-1 A1
3D02-2 B1
3D02-3 B1
3D02-4 C1
3D05-3 C1
3D05-4 D1
3D10 B12
3D11 B12
3D12 B12
3D13-1 C12
3D13-2 C12
3D13-3 C12
3D13-4 D12
7300 B5
7301 B6
7302 B7
7303 B8
7304 B10
7305 B11
7D01-1 A2
7D01-2 B2
7D02 C2
FD01 B1
FD02 C1
FD03 D1

13

9 LED LiteOn
AL 2K10

2009-10-07

8204 000 8969


3104 313 63812
18770_611_100212.eps
100212

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 110

10.6 AL2 820400089703 15 LED LiteOn


10-6-1

15 LED LiteOn

AL2A

15 LED LiteOn

AL2A
2

10

1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
FD18 C7

FH12-25S-0.5SH(55)
7203
LTW-008RGB

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

Blue

BLUE

BLUE

BLUE

Green

GREEN

GREEN

GREEN

PWM-CLOCK-BUF

Red

RED

RED

RED

SPI-CS
LATCH

+24V

100n

+3V3
2D01

1M84

7205
LTW-008RGB

7204
LTW-008RGB

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V

26

FD18

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

C
27

B003

B004

10

B005

15 LED LiteOn
AL 2K10

8204 000 8970


3104 313 63823

2009-12-07

2009-10-07

2009-07-02

18770_620_100212.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-6-2

Q552.1E LA

10.

EN 111

15 LED LiteOn

AL2B

15 LED LiteOn
1

AL2B

10

11

12

13

7D01-1
BC847BS(COL)
6

10K

8 3D02-1 1

+24V

2 3D02-2 7

10K

FD01
3D10
+24V

7D01-2
BC847BS(COL)
3

4 3D02-4 5

PWM-R4

7302
LTW-008RGB

7301
LTW-008RGB

7300
LTW-008RGB

10K

6 3D02-3 3

+24V

7303
LTW-008RGB

7305
LTW-008RGB

7304
LTW-008RGB

270R
3D11

BLUE

BLUE

BLUE

BLUE

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

GREEN

GREEN

3D12

RED

RED

RED

RED

RED

RED

10K

4
1 3D13-1 8
1K5

FD02

2 3D13-2 7
+24V

1K5
3 3D13-3 6
4 3D13-4 5
1K5

10K

2D10

1
5 3D05-4 4

1K5

7D02
BC847BW 3

10K

3 3D05-3 6

PWM-G4

68R

100n

PWM-B4

FD03

+24V

10K

7D03-1
BC847BS(COL)
6

3D04-3

10K

3D04-4

PWM-B5

FD04
3D15
+24V

+24V

10K

7D03-2
BC847BS(COL)
3

7402
LTW-008RGB

7403
LTW-008RGB

7405
LTW-008RGB

7404
LTW-008RGB

BLUE

BLUE

BLUE

BLUE

BLUE

BLUE

GREEN

GREEN

GREEN

GREEN

GREEN

GREEN

RED

RED

RED

RED

RED

RED

270R

270R
3D17
68R

10K

4
1 3D18-1 8

3D04-2

PWM-R5

3D16

3D04-1

7401
LTW-008RGB

7400
LTW-008RGB

1K5
2 3D18-2 7

FD05
+24V

1K5

1K5
4 3D18-4 5
1K5

2
10K

3D03-3

2D11

100n

10K

7D04
BC847BW 3

3D03-4

3 3D18-3 6

PWM-G5

FD06

10

11

12

2D10 C13
2D11 H13
3D02-1 A1
3D02-2 A1
3D02-3 B1
3D02-4 B1
3D03-3 H2
3D03-4 G2
3D04-1 F2
3D04-2 G2
3D04-3 E2
3D04-4 F2
3D05-3 C1
3D05-4 D1
3D10 B12
3D11 B12
3D12 B12
3D13-1 B12
3D13-2 C12
3D13-3 C12
3D13-4 C12
3D15 F12
3D16 F12
3D17 F12
3D18-1 G12
3D18-2 G12
3D18-3 G12
3D18-4 G12
7300 B5
7301 B6
7302 B7
7303 B8
7304 B10
7305 B11
7400 F5
7401 F6
7402 F7
7403 F8
7404 F10
7405 F11
7D01-1 A2
7D01-2 B2
7D02 C2
7D03-1 E2
7D03-2 F2
7D04 G2
FD01 A1
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1

13

15 LED LiteOn
AL 2K10

8204 000 8970


3104 313 63823

2009-12-07

2009-10-07

2009-07-02

18770_621_100212.eps
100219

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 112

10.7 AL1 Layout AmbiLight LiteOn


10-7-1

Layout AmbiLight LiteOn

AmbiLight LiteOn

FB15

FC02

3C10

7C02
3C06

3C05

7103
3C01

7102

3C02

1M84

FB71

FC03

3C09

7101

FB70

FB20

FB72

3C08

9B53

7100

2B50

9B50

7004

7B26

FB35

9B51

3B18

FC01

3B22

FB03

2B11

2B03

3B54

3B53

7003
3B21

2B04

B003

FB31

9B52

7B07

FB07

FB06

3C07

FB10

FB01

3B55

3B30

1M83

FB13
FB16

3B56

FB05

B002

7B20

FB11

B007

2B01

3B52

7B06

7002

FB12

3B00

FB08

7001
2B17
2B00

3B02

7B30

FB30

FB40

2B10
2B02
2B20

FB41

3B01

3004 3001
2B08
3B11

2B09

FB04

3B34

3B13

3B07

7B23

B001

FB32

7B25

7000

3B31 3B50
3B51

9 LED
7C01

3104 313 6390.3

FD03

7104

1M84

7105

7106
3E02

7E02

7103

3E01

7102

FB71

FC03

B004

FC02

FD02

3E04
3E03

FB70

FB20

FB72

FD01

3E06

7101

3E05

9B53
9B52

7100

2B50

9B50

7004

7B26

9B51

3B18

FB35

B003

FB15

3B22

B002

FB31

3B21
FB03

2B11

3B53

3B54

2B03

FC01

7003

FB07

FB06

2B04

B007

7B07

FB01

3B55

3B30

1M83

FB16

3B56

FB05

3B00

7B20

FB11

3B02

2B01

3B52

7B06

7002

FB12

2B10
2B02
2B20

FB08

7001
2B17
2B00

FB10

FB40

3B01

FB41

7B30

FB13

2B09

3004 3001
2B08
3B11

3B13

3B07

FB04

3B34

FB30

7B23

B001

FB32

7B25

7000

3B31 3B50
3B51

12 LED
7E01

3104 313 6385.2

FD02

7201

3C06

3C05

FD05

7202

1M84

FD04

7203

FD06

7204
3C02

7C02

FD01

3C01

7200

2C03

3C09

FD03

3D02

3C08

7104
7D01

7D02

7103

3D01

3D05 3D06

B005

FB71

FC03

B004

FC02

3D07

7102

FB70

FB20

FB72

3D09

7101

B003

9B53

7100

2B50

9B50

7004

7B26

9B51

2B11
FB35

9B52

3B22

FB03

B002

3B21

2B04

3B18

FC01

7003

FB07

FB06

FB15

B007

2B03

FB01

3B54

3B56

FB05

FB31

3B53

3B52
FB11

7B07

3B00

FB10

3B55

3B30

1M83

FB16

7B06

7002

FB12

7B20

2B01

3B02

7001
2B17
2B00

2B10
2B02
2B20

FB40

FB08

3B01

FB41

7B30

FB13

2B09

FB04

3B34

3004 3001
2B08
3B11

3B07

3B13

FB30

7B23

B001

FB32

7B25

7000

3B31 3B50
3B51

15 LED
7C01

3104 313 6386.3

2B11

7104

3B53

7105
7B50

FB70

FB20

FB72

FC02

FB71

FC03

7200
3C11

3B57

3C15

3C10

7201

3C12

3B51
3B50

3C00

7103

3B55

7102

3B52

7101

7B26

7202

B003

FB03

FB35

7203

1M84

3C06

2B04

7100
2B50

7C20

FB15

3B22

7C22

3B21

3B18

3B37

3B03

FC01

7005

7B51

FB31

2B03

FB06

B002

7B07

FB07

B007

FB10

3B31

3B30

1M83

FB13

FB16

7004
FB05

3B00

7B20

FB11

3B02

FB08

FB01

7B06

7003

FB12

2B10
2B02
2B20

3B39

3004
2B08
3B11

7B30

FB30

7002
2B17

3B01

FB40

FB41

2B00
2B01

2B09

3B13

3B07

7B23

7001

FB04

3B34

B001

FB32

7B25

7000

3B35
3B36

18 LED
7204

7205

2C15

3104 313 6389.5

FB71

FC03

7201

7202

7203

7204

7205

7300

7301

7302

3D02

7D01
FD01

7303

1M84

FD03

2D01

3D05

7304

7305
3D10
3D11

FD04

3D12

3C15

3C10

2D10

7200
3C11

3B57

3D13

FC02

7D02

7105
7B50

FB70

FB20

B003

7104

3B53

3C06

3B51
3B50

FB72

3C12

7103

3C00

7102

B004

FD02

FC01

7101

7C20

2B11

7C22

FB35

3B55

7100
2B50

7B51

3B22

FB03

3B52

7005
3B21

2B04

B002

2B03

FB07

FB06

FB15

3B18

3B35
3B36

7004
FB05

FB31

3B37

FB01

FB11

7B07

7B26

FB10

3B31

1M83

B007

FB13

7B06

7003

FB12

FB16

3B00

7B20

3B30

2B09

7002
2B17

3B02

FB08

2B10
2B02
2B20

3004
2B08
3B11

3B39

3B01

FB40

FB41

7B30

FB30

2B00
2B01

7001

FB04

3B34

3B13

3B07

7B23

B001

FB32

7B25

7000

3B03

24 LED

3104 313 6381.2

FB71

7202

7203

7204

7205

FD03

7300

2D01

3D02

7D01

7301

7302

7303

7304

3D05
FD01

FD02

7305
3D10
3D11

FD05

7400
FD04

7D03

7401

7402

7403

1M84

FD06

FD18

7404

7405
3D15

3D17

3D16

3D18

2D11

7201

3D03

3C15

3D04

3C10

2D10

7200
3C11

3B57

B004

FC03

7D04

FC02

3D12

7105
7B50

FB70

FB20

3D13

7104

3B53

B005

3B51
3B50

FB72

7D02

7103

B003

7102

3C12

7101

3C00

7B26

3C06

2B11

7C22

FB35

3B55

7100
2B50

7C20

3B22

FB03

7B51

2B04

3B52

FC01

7005
3B21

FB06

FB15

3B18

2B03

3B03

7004
FB05

FB31

FB07

FB11

7B07

3B37

FB01

7B06

7003

B002

FB10

3B31

1M83

B007

FB13

FB16

3B00

7B20

3B30

FB12

7002
2B17

3B02

FB08

2B10
2B02
2B20

3004
2B08
3B11

3B39

3B01

FB40

FB41

7B30

FB30

2B00
2B01

7001

FB04

3B34

2B09

3B13

3B07

7B23

B001

FB32

7B25

7000

3B35
3B36

30 LED

3104 313 6382.3

FB71

3D05

FD01

7301
FD02

7302

7303

7304

7305
3D10
3D11

FD04

FD05

7400
7E01

FD06

7401

3D00

2D04

7402

7403

3D18
2D11

7D26

7404
FD18

7405
3E11
3E10

7500
7F01

7501

7502

FF02

FF01

FF03

1M84

7503
FD19

7504

7505
3F10
3F11

3F12
3F13

2F10

FD03

7300
7D01

3F05

2C01

7F02

7205

2E10

7204

3F02

7203

3D22

7202

3D21

7201

3E12

3C15

3E13

3C10

7E02

7200
3C11

3B57

B006

FC03

B004

FC02

3E05

7105
7B50

FB70

FB20

2D10

7104

3D12

3B53

3E02

3B51
3B50

FB72

3D13

7103

B005

7102

7D02

7101

3C12

7B26

3D02

2B11

3C06

FB35

7C20

7100
2B50

7C22

3B22

B003

FC01

7005
3B21

FB03

3C00

2B03

2B04

3B55

FB07

FB06

FB15

7B51

7004
FB05

FB31

3B52

FB11

3B03

FB01

7B06

7B07

3B37

7003

B002

FB10

3B18

1M83

B007

FB13

3B30

FB12

FB16

3B00

7B20

3B31

7002
2B17

3B02

FB40

FB08

2B10
2B02
2B20

3B39

3B01

7001

FB41

7B30

2B00
2B01

2B09

FB04

3B34

3004
2B08
3B11

FB30

3B13

7B25
3B07

7B23

B001

FB32

7000

3B35
3B36

36 LED

3104 313 6383.2

18770_602_100216.eps
100526

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 113

10.8 AL1 820400090592 AmbiLight Common


10-8-1

Everlight LED Common

Everlight 15 LED Common

AL1A
1

AL1A

10

11

12

13

14

+3V3
2B11
100n

BLANK
PWM-CLOCK-BUF

FB03

TEMP-SENSOR

FB05

3B21
150R

+3V3

22
25
32

3B22
10K

6
100p

2B04-3

BLANK
GSCLK
IREF
MODE
SCLK
SIN
SOUT

4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21

0
1
2
3
4
5
6
7
OUT
8
9
10
11
12
13
14
15

XERR
XHALF
XLAT

12
13
28
29

NC

GND

LATCH
SPI-CS
FB12
PWM-CLOCK

100p

BLANK
PROG

PWM-R1
PWM-G1
PWM-B1
PWM-G3
PWM-R3
PWM-R2
PWM-G2
PWM-B2
PWM-B3
PWM-G4
PWM-R4
PWM-B4
PWM-B5
PWM-G5
PWM-R5
DATA-SWITCH
3B31

GND_HS
33

30

+3V3

FB20

3B18
FB35

150R

FB10
FB11

6
150R

100p

FB08

2 3B00-2 7

2B04-4

FB07

3
3B00-3

LATCH

FB06

1K8

4 3B00-4 5
150R

+3V3

31
24
26
3
1
2
23

8
150R

100p
2B04-1

FB04

VCC

3B00-1

PROG
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
SPI-DATA-IN
SPI-DATA-OUT

27

+24V

2B04-2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

SPI-DATA-RETURN
FB15
SPI-DATA-IN
FB16
SPI-CLOCK

27 26

+3V3

2K0
7B26-2
TLC5946RHB
VIA
34
35
VIA VIA
36
VIA

FB13

42
41
40

1M83
37
38
39

7B26-1
TLC5946RHB

FB01

FH12-25S-0.5SH(55)

+3V3

3B34

6
3B39-3

7
8

2
1

100R

3B30-4

10n
3B39-1

2B09

SPI-CLOCK-BUF

2B10

33p

2B01

220R

+24V

100p

3B01-1

1K5 1%

SPI-CLOCK

SPI-DATA-RETURN

7B23-1
BC847BS(COL)
6

10K

8 3B07-1 1

FB41
7B20-2
74LVC2G17
+3V3

1K5 1%

3
RES

10n
3004

GND

TEMP-SENSOR

LMV331IDCK

10K

+3V3

10K

-T

10K

2B08

7B30
1
3

3B11

FB40

PWM-CLOCK-BUF

1K5 1%

3B39-2
1 3B30-1 8

8
HOLD

220R

3B02-2

10K

100R

1
1 3B02-1 8

2 3B01-2 7

PWM-CLOCK

100p

+3V3

2B02

2
3

DATA-SWITCH

(64K)

+3V3

VCC

33p

2B00

+3V3
7B06
74LVC1G32GW
1
SPI-CS

7B20-1
74LVC2G17

100K RES

100n

SPI-CLOCK-BUF
7B07
M95010-WDW6

+3V3

+3V3
2B17

SPI-DATA-IN-BUF

100n

2B20

+3V3

1
10K

2 3B07-2 7

FB30

PWM-B1

3B35

7B23-2
BC847BS(COL)
3

10K

5 3B07-4 4

7004
99-235/RSBB7C-A24/2D

7003
99-235/RSBB7C-A24/2D

7002
99-235/RSBB7C-A24/2D

7001
99-235/RSBB7C-A24/2D

7005
99-235/RSBB7C-A24/2D

BLUE

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

3B37

RED

RED

RED

RED

BLUE

BLUE

BLUE

GREEN

GREEN

RED

RED

270R
3B36

68R

4
10K

3 3B07-3 6

1 3B03-1 8
FB31

PWM-R1

+24V

7000
99-235/RSBB7C-A24/2D

+24V

2
+24V

1K5
3B03-2

1K5

7B25
BC847BW 3

B001

B002

2B03

2
10K

5 3B13-4 4

FB32

PWM-G1

1K5

1K5
3B03-4

100n

10K

3 3B13-3 6

3 3B03-3 6

10

11

12

13

1M83 C1
2B00 E8
2B01 F8
2B02 E9
2B03 I14
2B04-1 B7
2B04-2 B6
2B04-3 B8
2B04-4 B7
2B08 E12
2B09 E12
2B10 F9
2B11 A9
2B17 D8
2B20 D4
3004 E12
3B00-1 A6
3B00-2 B6
3B00-3 B6
3B00-4 B6
3B01-1 E7
3B01-2 D7
3B02-1 E3
3B02-2 E5
3B03-1 H14
3B03-2 H14
3B03-3 H14
3B03-4 H14
3B07-1 F3
3B07-2 G3
3B07-3 H3
3B07-4 G3
3B11 E12
3B13-3 H3
3B13-4 I3
3B18 A8
3B21 B7
3B22 B8
3B30-1 D9
3B30-4 E9
3B31 B10
3B34 D13
3B35 G14
3B36 G14
3B37 G14
3B39-1 E13
3B39-2 D12
3B39-3 D13
7000 G5
7001 G7
7002 G8
7003 G10
7004 G11
7005 G13
7B06 D3
7B07 D4
7B20-1 D8
7B20-2 E8
7B23-1 F4
7B23-2 G4
7B25 H3
7B26-1 A8
7B26-2 C9
7B30 D13
FB01 A1
FB03 B1
FB04 B1
FB05 B1
FB06 B2
FB07 B1
FB08 B1
FB10 B2
FB11 B1
FB12 B2
FB13 C1
FB15 C1
FB16 C1
FB20 B7
FB30 G3
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13

14

B007

AL 2K10 Everlight
15 LED Common

2009-11-27

2009-11-03

8204 000 9059


18770_670_100212.eps
100219

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-8-2

Q552.1E LA

10.

EN 114

Everlight LED Common 2

AL1B
1

Everlight 15 LED Common 2


2

AL1B

11

10

12

7B50-1
BC847BS(COL)

10K

5 3B55-4 4

+24V

1
10K

3 3B55-3 6

FB70

PWM-B2

3B50
+24V

7B50-2
BC847BS(COL) 3

10K

7100
99-235/RSBB7C-A24/2D

BLUE

BLUE

270R

BLUE

BLUE

BLUE

BLUE

GREEN

GREEN

3B52

GREEN

GREEN

GREEN

GREEN

RED

RED

RED

RED

RED

RED

68R
3B53-1

8
+24V

1K5

1K5
3 3B53-3 6

100n

2 3B53-2 7
FB71

1K5

+24V

4 3B53-4 5
1K5
7B51
BC847BW 3

10K

3 3B57-3 6

7101
99-235/RSBB7C-A24/2D

10K

1 3B55-1 8

7102
99-235/RSBB7C-A24/2D

PWM-G2

7103
99-235/RSBB7C-A24/2D

270R
3B51

2B50

7 3B55-2 2

7104
99-235/RSBB7C-A24/2D

7105
99-235/RSBB7C-A24/2D

2
10K

7 3B57-2 2

FB72

PWM-R2

7C20-1
BC847BS(COL) 6

10K

5 3C00-4 4

+24V

1
10K

3 3C00-3 6

FC01

PWM-B3

1 3C10 2
+24V

7C20-2
BC847BS(COL) 3

10K

7 3C00-2 2

1 3C11 2

4
10K

1 3C00-1 8

BLUE

BLUE

Blue

GREEN

GREEN

GREEN

Green

RED

RED

RED

Red

BLUE

3C12

1
3

1 3C15-1 8

1K5
3C15-2

1K5

FC02

PWM-G3

270R

68R

7202
99-235/RSBB7C-A24/2D

7201
99-235/RSBB7C-A24/2D

7200
99-235/RSBB7C-A24/2D

270R

3 3C15-3 6

1K5
4 3C15-4 5
1K5

7C22
BC847BW 3

10K

1 3C06-1 8

+24V

H
PWM-R3

2
10K

7 3C06-2 2

FC03

10

11

12

AL 2K10 Everlight
15 LED Common

2B50 C11
3B50 B7
3B51 B7
3B52 B7
3B53-1 B7
3B53-2 C7
3B53-3 C7
3B53-4 C7
3B55-1 C3
3B55-2 B3
3B55-3 A3
3B55-4 A3
3B57-2 D3
3B57-3 C3
3C00-1 G3
3C00-2 F3
3C00-3 F3
3C00-4 E3
3C06-1 G3
3C06-2 H3
3C10 F4
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
3C15-3 G4
3C15-4 G4
7100 B11
7101 B10
7102 B9
7103 B7
7104 B6
7105 B5
7200 F8
7201 F9
7202 F10
7B50-1 A3
7B50-2 B3
7B51 C3
7C20-1 E3
7C20-2 F3
7C22 G3
FB70 B3
FB71 C3
FB72 D3
FC01 F3
FC02 G3
FC03 H3

2009-11-27

2009-11-03

8204 000 9059


18770_671_100212.eps
100212

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 115

10.9 AL2 820400090611 3 LED Everlight


10-9-1

3 LED Everlight

AL2A

3 LED Everlight

AL2A
2

10

1M84 A10
2C15 B6
7203 A3
A 7204 A4
7205 A5

A
FH12-25S-0.5SH(55)
7204
99-235/RSBB7C-A24/2D

7203
99-235/RSBB7C-A24/2D
BLUE

Green

GREEN

Red

RED

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

BLUE

BLUE

GREEN

GREEN

PWM-CLOCK-BUF

RED

RED

SPI-CS
LATCH

+24V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

+3V3
100n

2C15

Blue

7205
99-235/RSBB7C-A24/2D

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V

26

27

1M84

10

B003

3 LED Everlight
AL 2K10

2009-11-27

8204 000 9061


3104 313 64201
18770_650_100212.eps
100219

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 116

10.10 AL2 820400090601 9 LED Everlight


10-10-1

9 LED Everlight

AL2A

9 LED Everlight

AL2A
2

10

A
7203
99-135/RSGBB7C-A24/2D

7204
99-135/RSGBB7C-A24/2D

1M84

7205
99-135/RSGBB7C-A24/2D

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

Blue

BLUE

BLUE

BLUE

Green

GREEN

GREEN

GREEN

PWM-CLOCK-BUF

Red

RED

RED

RED

SPI-CS
LATCH

+24V

100n

+3V3
2D01

1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V
26

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27

FH12-25S-0.5SH(55)

B003

10

B004

9 LED Everlight
AL 2K10

2009-11-03

8204 000 9060


3104 313 64191
18770_640_100212.eps
100219

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-10-2

Q552.1E LA

10.

EN 117

9 LED Everlight

AL2B

9 LED Everlight
1

AL2B

10

11

12

13

7D01-1
BC847BS(COL)
6

10K

8 3D02-1 1

+24V

FD01
1 3D10 2
+24V

7302
99-135/RSGBB7C-A24/2D

7301
99-135/RSGBB7C-A24/2D

7300
99-135/RSGBB7C-A24/2D

7303
99-135/RSGBB7C-A24/2D

7304
99-135/RSGBB7C-A24/2D

7305
99-135/RSGBB7C-A24/2D

7D01-2
BC847BS(COL)
3

10K

6 3D02-3 3

PWM-R4

BLUE

BLUE

BLUE

BLUE

BLUE

BLUE

270R

GREEN

GREEN

GREEN

GREEN

GREEN

GREEN

3D12

RED

RED

RED

RED

RED

RED

1 3D13-1 8
1K5

FD02

2 3D13-2 7
1K5
3 3D13-3 6
1K5

7D02
BC847BW 3

10K

3 3D05-3 6

1K5
2D10

2
10K

5 3D05-4 4

4 3D13-4 5

68R

+24V

PWM-G4

+24V

10K

4 3D02-4 5

270R
3D11

100n

PWM-B4

1
10K

2 3D02-2 7

FD03

FD04

10

11

12

2D10 C13
3D02-1 A1
3D02-2 A1
3D02-3 B1
3D02-4 B1
3D05-3 C1
3D05-4 C1
3D10 A12
3D11 B12
3D12 B12
3D13-1 B12
3D13-2 C12
3D13-3 C12
3D13-4 C12
7300 B5
7301 B6
7302 B7
7303 B8
7304 B10
7305 B11
7D01-1 A2
7D01-2 B2
7D02 C2
FD01 A1
FD02 C1
FD03 D1
FD04 D1

13

9 LED Everlight
AL 2K10

2009-11-03

8204 000 9060


3104 313 64191
18770_641_100212.eps
100212

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 118

10.11 AL2 820400090621 15 LED Everlight


10-11-1

15 LED Everlight

AL2A

15 LED Everlight

AL2A
2

10

A
7203
99-235/RSBB7C-A24/2D

SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN

Blue

BLUE

BLUE

BLUE

Green

GREEN

GREEN

GREEN

PWM-CLOCK-BUF

Red

RED

RED

RED

SPI-CS
LATCH

+24V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

100n

+3V3
2D01

1M84

7205
99-235/RSBB7C-A24/2D

7204
99-235/RSBB7C-A24/2D

PROG
BLANK
+3V3

TEMP-SENSOR

C
+24V
FD18

26

1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
FD18 C7

C
27

B003

B004

10

B005

15 LED Everlight
AL 2K10

2009-11-27

8204 000 9062


3104 313 64211
18770_660_100212.eps
100526

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-11-2

Q552.1E LA

10.

EN 119

15 LED Everlight

AL2B

15 LED Everlight
1

AL2B

10

11

12

13

7D01-1
BC847BS(COL)
6

10K

8 3D02-1 1

+24V

2 3D02-2 7

10K

FD01
3D10
+24V

7300
99-235/RSBB7C-A24/2D
7D01-2
BC847BS(COL)
3

10K

6 3D02-3 3

+24V

4 3D02-4 5

PWM-R4

7301
99-235/RSBB7C-A24/2D

7305
99-235/RSBB7C-A24/2D

7304
99-235/RSBB7C-A24/2D

7303
99-235/RSBB7C-A24/2D

7302
99-235/RSBB7C-A24/2D

BLUE

BLUE

BLUE

BLUE

BLUE

BLUE

68R

GREEN

GREEN

GREEN

GREEN

GREEN

GREEN

3D12

RED

RED

RED

RED

RED

RED

68R

10K

4
1 3D13-1 8
1K5

FD02

2 3D13-2 7
+24V

1K5
3 3D13-3 6
4 3D13-4 5
1K5

10K

2D10

1
5 3D05-4 4

1K5

7D02
BC847BW 3

10K

3 3D05-3 6

PWM-G4

68R
3D11 RES

100n

PWM-B4

FD03

+24V

10K

7D03-1
BC847BS(COL)
6

3D04-3

10K

3D04-4

PWM-B5

FD04
3D15
+24V

+24V

10K

7D03-2
BC847BS(COL)
3

7402
99-235/RSBB7C-A24/2D

7404
99-235/RSBB7C-A24/2D

7403
99-235/RSBB7C-A24/2D

BLUE

BLUE

GREEN

RED

BLUE

BLUE

BLUE

GREEN

GREEN

GREEN

RED

RED

RED

7405
99-235/RSBB7C-A24/2D

BLUE

GREEN

GREEN

RED

RED

PWM-R5

RES

68R

10K

4
1 3D18-1 8

3D04-2

68R
3D16

68R
3D17

3D04-1

7401
99-235/RSBB7C-A24/2D

7400
99-235/RSBB7C-A24/2D

1K5
2 3D18-2 7

FD05
+24V

1K5

1K5
4 3D18-4 5
1K5

2
10K

3D03-3

2D11

100n

10K

7D04
BC847BW 3

3D03-4

3 3D18-3 6

PWM-G5

FD06

10

11

12

13

2D10 C13
2D11 H13
3D02-1 A1
3D02-2 A1
3D02-3 B1
3D02-4 B1
3D03-3 H2
3D03-4 G2
3D04-1 F2
3D04-2 G2
3D04-3 E2
3D04-4 F2
3D05-3 C1
3D05-4 D1
3D10 B12
3D11 B12
3D12 B12
3D13-1 B12
3D13-2 C12
3D13-3 C12
3D13-4 C12
3D15 F12
3D16 F12
3D17 F12
3D18-1 G12
3D18-2 G12
3D18-3 G12
3D18-4 G12
7300 B5
7301 B6
7302 B7
7303 B8
7304 B10
7305 B11
7400 F5
7401 F6
7402 F7
7403 F8
7404 F10
7405 F11
7D01-1 A2
7D01-2 B2
7D02 C2
7D03-1 E2
7D03-2 F2
7D04 G2
FD01 A1
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1

15 LED Everlight
AL 2K10

2009-11-27

8204 000 9062


3104 313 64211
18770_661_100212.eps
100212

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 120

10.12 Layout AmbiLight Everlight


10-12-1

Layout AmbiLight Everlight

AmbiLight Everlight

FC02

FC03

7200

3B57

3B57

FB71

3C11
3C10

3C15

7201

7202
3C06

1M84

7203

B003

7105
7B50

FB70

FB20

7204

7204

B003

7104

3B53

3C12

7103

3B51
3B50

FB72

7C20

7103

7C22

7102

3C00

7101

3B55

7B26

7B51

2B11

FB35

3B52

7100
2B50

7B51

3B21

B002

FC01

7005

FB03

3B18

3B35
3B36
2B03

B002

FB06

FB15

3B22

FB05

FB07

7004
FB31

3B37

FB01

FB11

7B07

B007

FB10

7B06

7003

3B30

1M83

3B00

FB13

FB16

2B04

7B20

3B31

FB12

7002
2B17

3B02

FB08

2B10
2B02
2B20

3B39

3B01

FB40

FB41

7B30

2B01

3B34

2B00

7001

FB04

2B09

3B07

3B13

7B25

FB30

3004
2B08
3B11

7B23

B001

FB32

7000

3B03

18 LED

7205

2C15

7205

3104 313 6420.1

FC02

FC03

FB71

7200
3C11
3C10

3C15

7201

7202

7203

3C06

FD03

7300
3D02

2D01

7D01

7301

7302

FD01

7303

1M84

3D05
FD02

7304
FD04

7305
3D10
3D11

3D12

7105
7B50

FB70

FB20

2D10

7104

3B53

3D13

3B51
3B50

FB72

3C12

7102

B004

FC01

7101

7D02

2B11

7C20

FB35

3C00

7100
2B50

7C22

3B21

3B55

7005

FB03

3B52

2B03

3B18

FB07

FB06

FB15

3B22

FB05

3B03

7004
FB31

3B37

FB01

FB11

7B07

7B26

FB10

7B06

7003

3B30

1M83

B007

FB13

3B00

FB16

2B04

7B20

3B31

FB12

7002
2B17

3B02

FB40

FB08

2B10
2B02
2B20

3B39

3B01

7001

FB41

7B30

2B01

3B34

2B00

FB04

2B09

3B13

3B07

7B25

FB30

3004
2B08
3B11

7B23

B001

FB32

7000

3B35
3B36

24 LED

3104 313 6419.1

FC03

FB71

3C10

7202

7203

3C06

7204

7205
2D01

7300
3D02

7D01

FD03

7301

FD01

FD02

3D05

7302

7303

7304

7305
3D10
3D11

FD04

7400
7D03

FD05

FD06

7401

7402

1M84

7403
FD18

7404

7405
3D17
3D15
3D16

3D18

2D11

7201

B004

3C15

3D03

7200
3C11

3B57

7D04

FC02

3D04

7105
7B50

FB70

FB20

2D10

7104

3D12

3B53

3D13

3B51
3B50

FB72

B005

7103

7D02

7102

3C12

7101

3C00

7B26

B003

2B11

7C20

FB35

3B55

7100
2B50

3B52

FC01

7005
3B21

FB03

3B18

2B03

7C22

FB06

FB15

7B51

FB05

3B22

7004
FB31

3B03

FB11

3B37

FB01

7B06

7B07

FB07

7003

B002

FB10

3B31

3B30

1M83

B007

FB13

3B00

FB16

2B04

7B20

3B02

FB12

7002
2B17

3B01

FB40

FB08

2B10
2B02
2B20

3B39

2B01

7001

FB41

7B30

2B00

FB04

3B34

2B09

3B07

3B13

7B25

FB30

3004
2B08
3B11

7B23

B001

FB32

7000

3B35
3B36

30 LED

3104 313 6421.1

18770_672_100216.eps
100527

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 121

10.13 B01 820400089943 Tuner, HDMI & CI


10-13-1

Common Interface

Common Interface

B01A
1

B01A
4

+3V3
3F01

2F01

22u 16V

RES

2F00

TRANSPORT STREAM FROM CAM

+5VCA

7F00
74LVC245A
1

+T 0R4

19
CA-MOCLK
CA-MOVAL
CA-MOSTRT

3F02

IF01

100R

3F03-1

3F03-2 2

1
7

100R

3
4
5
6
7
8
9

8
100R

IF03

CA-CD1n
CA-CD2n

3EN1
3EN2
G3

CA-DATAENn

2
IF02

1
2

18

MOCLK

17
16
15
14
13
12
11

MOVAL
MOSTRT

CA-DATADIR

CA-ADDENn
MOCLK
MOVAL

10

MOSTRT

MDO0

+3V3
2F02

19

MDO1
RES
MDO2

100n

20

7F01
74LVC245A
1

MDO3

3EN1
3EN2
G3

MDO4

IF05
CA-MDO0

3F04-1 1

8 100R

2
IF06

CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

3F04-2
6 100R
3F04-4
8 100R
3F05-2
6 100R
3F05-4

3F04-3 3
3F05-1 1
3F05-3 3

7 100R

5 100R

7 100R

5 100R

3
4
5
6
7
8
9

1
2

18

MDO0

17
16
15
14
13
12
11

MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7

MDO5
MDO6
MDO7

CA-RDY
10

IF07

CA-WAITn
+3V3

CA-INPACKn
2F03

15-BIT ADDRESS

3EN1
3EN2
G3
18

XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07

17
16
15
14
13
12
11

CA-WP

1
2

CA-VS1n

1
19

CA-ADDENn

CA-A00

3
4
5
6
7
8
9

CA-A01
CA-A02
CA-A03
CA-A04
CA-A05
CA-A06
CA-A07

10

XIO-A00

RES

100n

20

7F02
74LVC245A

3F06

CA-RST
RES

100n

20

+5V

1 3F08-1 8
10K
2 3F08-2 7
10K
3 3F08-3 6
10K
4 3F08-4 5
10K
1 3F09-1 8
10K
2 3F09-2 7
10K
3 3F09-3 6
10K
4 3F09-4 5
10K
1

B
IF04

3F10-1

8
10K
3F10-2
2
7
10K
3 3F10-3 6
10K
4 3F10-4 5
10K

3F12
+3V3

10K
2 3F11-2 7
10K
3 3F11-3 6
10K
4 3F11-4 5
10K
8 3F11-1 1
10K

IF08

18

XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14

17
16
15
14
13
12
11

+5VCA

+3V3

CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-CE1n
CA-A10
CA-OEn
CA-A11
CA-A09
CA-A08
CA-A13
CA-A14
CA-WEn
CA-RDY

20
1
2

1
19

CA-ADDENn

CA-A08

3
4
5
6
7
8
9

CA-A09
CA-A10
CA-A11
CA-A12
CA-A13
CA-A14

CA-MIVAL
CA-MICLK
CA-A12
CA-A07
CA-A06
CA-A05
CA-A04
CA-A03
CA-A02
CA-A01
CA-A00
CA-D00
CA-D01
CA-D02
CA-WP

ROW_A
1P00-A
GND1
1
D3
2
D4
3
D5
4
D6
5
D7
6
CE1
7
A10
8
OE
9
A11
10
A9
11
A8
12
A13
13
A14
14
WE|P
15
RDY|BSY
16
VCC1
17
VPP1
18
A16
19
A15
20
A12
21
A7
22
A6
23
A5
24
A4
25
A3
26
A2
27
A1
28
A0
29
D0
30
D1
31
D2
32
WP|IOIS16
33
GND2
34
70 69

10

XIO-A08

RES

100n

3EN1
3EN2
G3

+3V3

+5VCA
2F04

11

100K

4 3F07-4 5
10K
2 3F07-2 7
10K
3F07-3
3
6
10K
3F07-1
1
8
10K

+3V3

7F03
74LVC245A

10

10074595-050MLF
+3V3
2F05

8-BIT DATA

7F04
100n
74LVC245A

20

3EN1
3EN2
G3
18

XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

17
16
15
14
13
12
11

1
2

CA-DATADIR

19

CA-DATAENn

CA-D00

3
4
5
6
7
8
9

CA-D01
CA-D02
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07

CA-CD1n
MDO3
MDO4
MDO5
MDO6
MDO7
CA-CE2n
CA-VS1n
CA-IORDn
CA-IOWRn
CA-MISTRT
CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
+5VCA

10

XIO-D00

RES

+3V3
2F06

CONTROL
3EN1
3EN2
G3
XIO-D11

18

XIO-D09
XIO-D08
XIO-OEn
XIO-WEn
XIO-D14
XIO-D15
CA-WAITn

17
16
15
14
13
12
11

1
2

1
19

CA-ADDENn

CA-REGn

3
4
5
6
7
8
9

CA-CE1n
CA-CE2n
CA-OEn
CA-WEn
CA-IORDn
CA-IOWRn
XIO-D10

1X04
REF EMC HOLE

1X01
REF EMC HOLE

10074595-050MLF

10

RES

100n

20

7F05
74LVC245A

CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7
MOCLK
CA-RST
CA-WAITn
CA-INPACKn
CA-REGn
MOVAL
MOSTRT
MDO0
MDO1
MDO2
CA-CD2n

ROW_B
1P00-B
GND3
35
CD1
36
D11
37
D12
38
D13
39
D14
40
D15
41
CE2
42
VS1
43
IORD
44
IOWR
45
A17
46
A18
47
A19
48
A20
49
A21
50
VCC2
51
VPP2
52
A22
53
A23
54
A24
55
A25
56
VS2
57
RESET
58
WAIT
59
INPACK
60
REG
61
BVD2|SPKR
62
BVD1|STSCHG
63
D8
64
D9
65
D10
66
CD2
67
GND4
68
72 71

1P00-A D10
1P00-B G10
2F00 A6
2F01 A2
2F02 B6
2F03 D6
2F04 E6
2F05 G6
2F06 H6
3F01 A2
3F02 A4
3F03-1 A4
3F03-2 A4
3F04-1 C4
3F04-2 C4
3F04-3 C4
3F04-4 C4
3F05-1 C4
3F05-2 C4
3F05-3 C4
3F05-4 C4
3F06 A9
3F07-1 A9
3F07-2 A9
3F07-3 A9
3F07-4 A9
3F08-1 A9
3F08-2 A9
3F08-3 B9
3F08-4 B9
3F09-1 B9
3F09-2 B9
3F09-3 B9
3F09-4 B9
3F10-1 C9
3F10-2 C9
3F10-3 C9
3F10-4 C9
3F11-1 D9
3F11-2 C9
3F11-3 D9
3F11-4 D9
3F12 C9
7F00 A5
7F01 B5
7F02 D5
7F03 E5
7F04 G5
7F05 I5
IF01 A4
IF02 A5
IF03 A4
IF04 B9
IF05 C4
IF06 C5
IF07 C5
IF08 D9

10

11

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_500_100118.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 122

Flash

Flash

B01B
1

4
2F20 A3
2F21 A3
3F19 D2

+3V3

3F20-1 1

3F20-3 3

3F21-1 1

3F21-3 3

100R
3F20-2
100R
3F20-4
100R
3F21-2
100R
3F21-4

100R

100R

100R

100R

3F22-2
+3V3

XIO-OEn
XIO-WEn
NAND-WPn

3F23
3F22-4

100R
3F22-3 3
10K
3F22-1 1
5 100R

16
17
9
8
18
19
7

100R

100R
IF22

3F24

+3V3
NAND-RDY1n

0
1
2
3
IO
4
5
6
7

CLE
ALE
CE
RE
WE
WP
R
B

2K2

10K

IF23

1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48

3F22-2 C1
3F22-3 C2
3F22-4 C2

3F23 C2
3F24 D2
7F20 B3

IF21 C3
IF22 D3
IF23 D3

36

VSS
13

3F21-3 C1
3F21-4 C2
3F22-1 C2

37
VCC

NC

IF21

NAND-CE1n
NAND-CLE
NAND-ALE

29
30
31
32
41
42
43
44

3F20-4 C2
3F21-1 C1
3F21-2 C2

[FLASH]
4Gx16
XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

12

7F20
NAND04GW3B2DN6F

3F20-1 B1
3F20-2 B2
3F20-3 B1

100n

100n
2F21

2F20

3F19

B01B

+3V3

10-13-2

Q552.1E LA

4
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_501_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-3

Q552.1E LA

10.

EN 123

USB Hub

B01C

USB Hub

B01C

IF44

1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
2F26 A2
2F27 A2
2F28 A4
2F29 A4
2F30 A4
2F31 A5
2F32 A5
2F33 A5
2F34 B1
2F35 B2
3F25 A8
3F26-1 A8
3F26-2 A8
3F26-3 A8
3F26-4 B8
3F28 B2
3F30 C2
3F31-2 C2
3F31-3 C2
3F31-4 D2
3F32 C8
3F34-1 C8
3F34-2 C8
3F34-3 D8
3F34-4 D8
3F35 B1
3F36 D6
7F25 B2
9F20 B7
9F21 B7
9F25 B8
9F26 B8
FF30 E8
FF31 E9
FF32 E9
FF33 C9
FF34 C7
FF35 C7
FF36 D7
FF37 D7
FF38 E9
FF39 E8
FF40 A8
IF30 C2
IF31 C1
IF32 C1
IF33 B2
IF34 B2
IF35 B5
IF36 C5
IF37 C5
IF39 D2
IF40 C2
IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9

+5V
+T 0R4

3F25

100n

2F25

+3V3

FF40

3F26-1

+5V-USB1

100K
IF43
2

USB-OC1n

3F26-2

100n

100n
2F33

100n
2F32

100n
2F31

100n
2F30

1u0
2F29

2F28

1u0

100n
2F27

2F26

100K
3

IF42

10K

IF31
IF32

+3V3
3F30
3

3F31-3
10K

6
4

IF41

12K IF40
3F31-4

IF39

28
31
30
27
35
22
24
25

36
23
15
5
10
29

RESET
OSC2
TEST
USBDP_DN2|PRT_DIS_P2
USBDM_DN2|PRT_DIS_M2
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
DP
USBUP
DM
VBUS_DET

USB-DP2

USB-DM

9F26

USB-DM2

OSC3
USBDP_DN3|PRT_DIS_P3
USBDM_DN3|PRT_DIS_M3
BC_EN3|PWRTPWR3

RBIAS
SDA|SMBDATA|NON_REM1
SCL|SMBCLK|CFG_SEL0
HS_IND|CFG_SEL1

NC

13
2
1
12

USB-OC1n
USB-DP1
USB-DM1
IF36

17
4
3
16

USB-OC2n
USB-DP2
USB-DM2

USB-DM1
USB-DP1

FF34
FF35
+5V

19
7
6
18

USB-OC3n
USB-DP3
USB-DM3
1

8
9
20
21

3F34-1

C
FF33

+5V-USB2

100K
2

USB-OC2n

3F34-2

100K
3

38
39
40
41

1
2
3
4

292303-4

IF37

VIA

37

1P07
+5V-USB1

10K
GND_HS

B
SIDE USB BOTTOM

+T 0R4

26

XTALOUT

9F25

IF35

OSC1
USBDP_DN1|PRT_DIS_P1
USBDM_DN1|PRT_DIS_M1
BC_EN1|PWRTPWR1

XTALIN|CLKIN

USB-DP

3F32

32

11

USB-DP
USB-DM

9F21

33

VDD_3V3

USB HUB

9F20

10p

IF33

RESET-USBn

34

CR PLL
FILT

IF30

3F31-2

14

1M0

3F28

7F25
USB2513B-AEZG

IF34

3F26-4
100K

24M

10p

10K
2F34

3F35

4
2

1F25

2F35

100K
4

+3V3

3F26-3

+3V3

3F36

100K

USB-OC3n
4

10K

3F34-3

3F34-4

SIDE USB TOP

100K

1P08
+5V-USB2

FF36
FF37

USB-DM2
USB-DP2

FF32

1
2
3
4 IF45

292303-4

FF38

1F24

+5V

FF39

USB-DM3
USB-DP3

FF30
FF31
7

1
2
3
4
5

502382-0570

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_502_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 124

SD Card

B01D

SD Card

B01D
1

A
3F40
+3V3
2F40

+T
22u 16V

10-13-4

Q552.1E LA

FF45

+3V3-SD

0R4

B
+3V3

3F41-2

IF47

47K

SDIO-DAT3
3F41-3

SDIO-CMD

SDIO-DAT3

3F44-2
100R

SDIO-CMD

FF47

7
2

3F45 RES

SDIO-CLK

SDIO-CLK

3F41-1

47K
1

3F42-1

3F41-4

47K

SDIO-DAT0

SDIO-DAT0

SDIO-DAT1

SDIO-DAT1

SDIO-DAT2

SDIO-DAT2

47K

+3V3-SD

1 3F44-1 8

10K
1

1P09-1
FF48

100R

47K

3F43-2

100R
3F43-3

FF49

100R
3

3F44-3

FF41

6
1
6

3F43-1

100R

FF42

1314

FF43

1939115-1

3F42-2

FF46

1P09-2
7

SDIO-CDn

SDIO-CDn

FF44

SDIO-WP

SDIO-WP

FF50

10
11
12

47K
3

100R

2
3F42-3

1
2
3
4
5
6
7
8
9

IF46

1P09-1 C4
1P09-2 D4
2F40 A2
3F40 A2
3F41-1 C1
3F41-2 C1
3F41-3 C1
3F41-4 C1
3F42-1 C1
3F42-2 D1
3F42-3 D1
3F43-1 C3
3F43-2 C3
3F43-3 C3
3F44-1 C3
3F44-2 C3
3F44-3 C3
3F45 C1
FF41 C3
FF42 C3
FF43 C3
FF44 D3
FF45 A2
FF46 C4
FF47 C3
FF48 C3
FF49 C3
FF50 D3
IF46 D1
IF47 B1

1939115-1

47K

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_503_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-5

Q552.1E LA

10.

EN 125

PNX85500 Control

B01E

PNX85500 Control

B01E

A
+3V3-STANDBY

+3V3-STANDBY

10K
RES

IF53
PNX-SPI-CSBn
IF54
3

HOLD

+5V

PNX-SPI-CLK

PNX-SPI-WPn
+3V3-STANDBY
FF29

VSS

3F66

IF52
6

BACKLIGHT-BOOST
7F53 RES
PDTA114EU

PNX-SPI-SDO

RES

512K
FLASH

10K
RES

3F67

IF50
5

IF55

BOOST-PWM

IF61

47K

3F68

+3V3

+3V3

10K

7F52
M25P05-AVMN6

VCC
IF51

3F52

B
PNX-SPI-SDI

+3V3

100n
RES

10K

2F52

3F51

+3V3-STANDBY

7F54-1 RES
BC847BPN(COL) 6

7F54-2 RES
BC847BPN(COL)

SPI-PROG

IF56
4

IF57

FF04

IF62
SDM

3F54

RES

3F69

FF58

RES

10K

1u0

2F53

MAIN NVM

+3V3

RES

9CH0

10K

1K0
RES

3F53

DEBUG ONLY
IF58

2F58 RES

3F58

10K

IF59

1
2
3

0
1
2

100R

SDA-SSB
3F63

FF63

WC
SCL

ADR
SDA

100R

SCL

1
2
3

SDA
5

7
6
5

FF55

3F59
100R

3F60

SCL-UP-MIPS

FF56

SDA-UP-MIPS

100R

(8K8)
EEPROM

1F52

3F62

FF62

100n
7F58

FF61

SCL-SSB

FF57

LEVEL

DEBUG / RS232 INTERFACE

SHIFTED
TXD-UP
RXD-UP
RESET-STBYn
SPI-PROG

FF65

3F64

FF66

100R

1F51
FF64

3F65
100R

1
2
3
4
5

UP

FOR
DEBUG
USE ONLY

1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
3F53 C6
3F54 D7
3F58 E1
3F59 E3
3F60 E3
3F62 D5
3F63 E5
3F64 F5
3F65 F5
3F66 B7
3F67 B6
3F68 C7
3F69 D7
7F52 B2
7F53 B7
7F54-1 C7
7F54-2 C7
7F58 D1
9CH0 C7
FF04 C4
FF29 C4
FF55 E3
FF56 E3
FF57 E2
FF58 C7
FF61 D4
FF62 D7
FF63 E4
FF64 F7
FF65 F4
FF66 F4
IF50 B3
IF51 B1
IF52 B3
IF53 B3
IF54 C3
IF55 C6
IF56 C7
IF57 C7
IF58 D2
IF59 E1
IF61 C4
IF62 C4

9
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_504_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-6

Q552.1E LA

10.

EN 126

HDMI & CI

HDMI & CI

B01F
1F75 B5
1T01 A1
2F59 B1
2F60 B1
2F61 B1

2F62 B10
2F63 C9
2F64 C9
2F65 B10
2F66 C10

B01F

2F70 B10
2F71 A7
2F72 A9
2F73 A9
2F74 B6

2F75 B8
2F76 B9
2F77 B9
2F78 B6
2F79 B8

2F80 B9
2F81 B1
2F82 B9
2F84 C1
2F85 C4

2F86 D1
2F88 E5
2F90 C6
2F91 D6
2F92 C7

2F93 C2
2F94 D7
3F71 C7
3F72 C7
3F75 D2

3F76 C2
3F77 C4
3F78 C7
3F79-1 B8
3F79-4 B8

3F80 C9
3F81 C9
3F82 B10
5F66 C10
5F70 D6

5F71 B9
5F72 E4
5F73 C5
5F74 B10
5F76 B10

6F72 C7
7F70 D8
7F75 A6
9F00 A6
9F01 A6

9F02 A8
9F03 A8
9F04 B3
9F05 C4
9F06 C4

9F71 E4
AF70 B3
AF71 B3
AF72 B9
AF73 B9

FF00 B2
FF01 C4
FF71 A1
FF74 B1
FF75 B2

FF76 B1
FF81 C1
FF82 C2
IF10 A5
IF11 A5

IF12 C9
IF13 C9
IF14 C9
IF15 C9
IF16 B10

IF77 B6
IF78 B8
IF79 C5
IF80 B8
IF81 B6

IF72 C5
IF73 B6
IF74 B8
IF75 B6
IF76 B8

IF82 C4
IF86 C5
IF87 C2
IF88 D2
IF89 D5

IF90 D7

10

IF10
IF11

220R

15p

2F65
1p0

10p
2F70

820n
2F62

5F74

22p

AF73

820R

IF16

330n
3F82

10n

5F76

AGC CONTROL

3F79-4

1p0

10n

IF80

15p
2F82

2F79

3F79-1
220R

10n
IF78

1p0

AF72
1

2p2 RES
2F77

IF76

15p
2F73

2F72

9F03

9F02

2F75

2F76

VAGC

OUTPUT2

IF74

680n

5F71

INPUT2

VCC

OUTPUT1

2F80

IF-AGC

IF77

INPUT1

GND2

X7251X
36M17

10n
2F78

IF81

GND

IF73

4u7

100n

4u7

RES
2F60

TUN-IF-N
TUN-IF-P

4
O1
5
O2

I
IGND

2F74

GND1

9F00

NC

IF75

PNX-IF-P

FF75

3F75

15p

47R

IF88

TUN-IF-N

SDA-TUNER

TUN-IF-P

5F73

2
1

ATB2012

10n

2F64

IF15

2F66

IF+

10n

2F91

TUN-P7

10n

1K0
2F92

3F71
10n

TUN-P6

IF14

3K3

2F86

SCL-TUNER

3F78

47R

220R

IF-

10n

470n

15p

IF87

5F70

3F76

3F72

IF13

2F90

IF86
2F84

BA591

3F81

2F63

22p

+5V-TUN-PIN

9F06

9F05

47n

IF72
2F85

IF12

220R

FF01

+5V-TUN-PIN

IF-AGC

3F80

IF79

4K7

680n

3F77

5F66

IF82

6F72

PNX-IF-AGC

FF82

4K7

100n

2F93

PNX-IF-N

FF81

TUN-P6
TUN-P7

12

11

10

1
RES

2F59

2F81

2F61

9F04

10n
7F75
UPC3221GV-E1

1
2

AF71
AF70

FF76
FF00

4n7

FF74

+5V-TUN-PIN

13

1F75

TUN-P1

2F71

9F01

14
IF_OUT2

B+_TUN

I2C_SDA

I2C_SCL

TUN

RF_AGC

B+_LNA

RF_IO

16

I2C_ADR

TUNER

15

IF_OUT1

FF71

4MHZ_REF

1T01
TX31XX

RES

IF89
IF90

RES
2F94

SELECT-SAW

7F70
PDTC114EU

10n

9F71

5F72
+5V-TUN-PIN

+5V-TUN

22u

RES
2F88

30R

10
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_505_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-7

Q552.1E LA

10.

EN 127

Toshiba Supply

B01G

Toshiba Supply

B01G

2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2

+1V2-BRA-DR1

+3V3

+1V2-BRA-VDDC

B
5FA4

30R
10u

2FA4

OUT

30R

IN

100n

5FA3

7FA3
LD1117DT12

2FA3

B
FFAF

100n

2FA2

COM

FFA2

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_506_100118.eps
100525

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 128

HDMI

B01H

HDMI

1P05 B1

B01H
3FBF-1 C4

3FBF-2 C4

FFB1 C2

FFB2 C2

FFB3 C2

FFB4 C2

FFB5 C1

FFB6 C2

HDMI CONNECTOR SIDE


1P05

DRX2DRX1+

DRX1DRX0+
DRX0DRXC+
DRXCPCEC-HDMI
FFB1
FFB2

DRX-DDC-SCL
DRX-DDC-SDA

DRX-DDC-SCL
DRX-DDC-SDA

3FBF-2
47K

FFB3
FFB4

DIN-5V

DRX-HOTPLUG

DIN-5V

20
23 22

DIN-5V

47K

DRX2+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FFB5 21

1 3FBF-1 8

10-13-8

Q552.1E LA

FFB6

4
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_507_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 129

VGA

B01I

VGA

B01I

A
3FC5
CDS4C12GTA
12V

RES 6FC1

1FC1

100p

2FC1

FFC1

RES 6FC2

1FC2

100p

2FC2
FFC4

CDS4C12GTA
12V

RES 6FC3

1FC3

100p

2FC3

FFC3

FFC6

1216-00D-15S-1EF

B-VGA

C
9FC5

H-SYNC-VGA

9FC6

V-SYNC-VGA

4K7

3FC3

CDS4C12GTA
12V

RES 6FC4

1FC4

16
17

6FC7

47p

2FC7

4K7

CDS4C12GTA
12V

FFC9

10K

D
9FC1

VGA-SDA-EDID-HDMI

9FC2

VGA-SDA-EDID

RES

CDS4C12GTA
12V

6FC6

47p

2FC6
RES
3FC2

3FC4

FFC8

10K

CDS4C12GTA
12V

RES 6FC5

1FC5

2FC5
RES
3FC1

47p

FFC7

18R

FFC5

47p

G-VGA

18R

3FC7

2FC4

VGA
CONNECTOR

CDS4C12GTA
12V

3FC6

1E05
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

R-VGA

18R

FFC2

9FC3

VGA-SCL-EDID-HDMI

9FC4

VGA-SCL-EDID

RES

CDS4C12GTA
12V

6FC8

1FC6

47p

+5V-VGA
2FC8

10-13-9

Q552.1E LA

1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
1FC5 D4
1FC6 F4
2FC1 B4
2FC2 B4
2FC3 C4
2FC4 C4
2FC5 D4
2FC6 E4
2FC7 E4
2FC8 F4
3FC1 D3
3FC2 E3
3FC3 C6
3FC4 D6
3FC5 A6
3FC6 B6
3FC7 C6
6FC1 B5
6FC2 B5
6FC3 C5
6FC4 C5
6FC5 D5
6FC6 E5
6FC7 E5
6FC8 F5
9FC1 D6
9FC2 E6
9FC3 E6
9FC4 E6
9FC5 C6
9FC6 D6
FFC1 A4
FFC2 B4
FFC3 C4
FFC4 C3
FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4

9
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_508_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-10

Q552.1E LA

10.

EN 130

Temp Sensor + Headphone

B01J

Temp Sensor + Headphone

B01J

IFD4

1K0

3FD2 RES

9FD2

9FD1

100n

2FD1
2

SDA

A1

SCL

A2

IFD1

IFD3

IFD5

100R

A0

9FD5

100R

OS

1K0

3FD4

SCL-SSB

1K0
3FD7 RES

SDA-SSB

IFD2

3FD6 RES

3FD3

+VS

7FD1
LM75BDP

GND

6FD1

RES

1K0

RES

LTST-C190KGKT

3FD1

+3V3

C
1329

1
2
3

502382-0370

FFDA

1n0

FFDB
1n0
2FDD

CDS4C12GTA
12V
2FDC

6FD3

CDS4C12GTA
12V
1FD3

6FD2

1FD2

1K0

1K0

3FDG-2
2

3FDG-1

AMP1
AMP2

2
3
1

1328

FFDC
MSJ-035-29D PPO (PHT)

1328 D6
1329 C6
1FD2 D4
1FD3 D5
2FD1 A4
2FDC D5
2FDD D5
3FD1 A3
3FD2 B5
3FD3 B3
3FD4 B2
3FD6 C4
3FD7 C4
3FDG-1 D4
3FDG-2 D4
6FD1 B3
6FD2 D4
6FD3 D5
7FD1 B3
9FD1 A4
9FD2 A4
9FD5 C5
FFDA D5
FFDB D5
FFDC D6
IFD1 B4
IFD2 B3
IFD3 B4
IFD4 B3
IFD5 B4

9
3

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_509_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-13-11

Q552.1E LA

10.

EN 131

Tuner Brazil

Tuner Brazil

B01K

B01K

10

12

11

13

A
5FE0

IF63

IF64

+2V5-BRA

+1V2-BRA-VDDC

+3V3-BRA-FLT

1u0

100n
2FF1

100n
2FF0

100n
2FE5

100n
2FE4

2FE3

1u0

2FE0

30R

AGND
5FE3

IF65

IF66

+3V3-BRA-FLT

5FE4
+3V3-BRA

30R

1u0

100n
2FF6

100n
2FF5

100n
2FF4

2FF2

100n
2FF3

1u0

2FE6

30R

AGND
5FE5

IF67

IF68
+1V2-BRA-DR1
IF48

5FE7

+3V3-BRA

+3V3

1u0

100n
2FF9

100n
2FF8

2FF7

1u0

2FE8

30R

30R

5FE8

IF69

+2V5-BRA
7FE3
LD3985M25

5FE9

+5V
30R

18p

2FG3

18p

2FG2

25M4
4 2

1u0

2FG0

100n
2FG1

30R
1FE0

IN

OUT

INH

BP

FF03

+2V5-BRA

30
29

100n

BFE1
BFE2

28
27

100n
2FH6

100n

BFE3
BFE4

2FH7

100n

BFE5

10n
2FG6

2FG7
AGND

2FG9

100n
2FG8

AGND

10n

24
25
26
39

AGND

0
XSEL
1

PBVAL
RERR
RLOCK

P
ADI_AI
N

RSEORF

P
ADQ_AI
N

SBYTE
SLOCK

P
AD_VREF
N

SRCK

AD_VREF

SRDT

DTCLK

STSFLG1

1n5

58

3FG6-4

11
3FE8

100R
3FE9

IF49
100R

45
46

SYRSTN
AGCI
SLADRS

CKI
SCL
SDA

23

SCL-SSB
SDA-SSB

STSFLG0

AGND

TN

0
1

SCL
SDA

33R

1u0

10n

2FH4

TS-FE-VALID
4

9F27-4

TS-DVBS-VALID

DFE8

55

3FG6-3

59

9F27-2

TS-DVBS-SOP

33R

TS-FE-SOP

DFE9

52

9F28

61

3FG7
3FG6-2

60

33R

33R

3FE5
18K

DFF2

51

30R

TS-FE-DATA
1

10

5FG0

TS-FE-CLOCK

DFF1

38

TS-DVBS-CLOCK

9F27-1

5FG2

TS-DVBS-DATA

30R

IF28

AGND

IF-AGC

42
6
5

3FG2-1

RESET-SYSTEMn
10K

3FG2-2

12
14

4K7

3FG4-1
4K7

VSS

10K

3FG4-2

+3V3-BRA-FLT

4
15
33
37
44
47
50
57
62

0
TSMD
1

PLLVSS

10K IF29

AGCCNTR

AD_DVSS

3FE7

1
41

10K

AGCCNTI

S_INFO

31

3FE6

DTMB

17

AD_AVSS

40

DFE7

54

IF27
+3V3-BRA-FLT

AGND

DFE6

53

2FH3

2FH5

21

1u0

43
FIL

2FH2

VDDS

DR2VDD

16
36
56
63

22

13
35
49
64

34
DR1VDD 48

VDDC

10n

IF17
IF18

2FG4

IF+
IF-

2FH8

3
2

PLLVDD

18

AD_AVDD

19

32

7FE0
TC90517FG

AGND

AD_DVDD

AGND

20

COM
AGND

AGND

10

11

12

1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF1 A7
2FF2 B6
2FF3 B6
2FF4 B6
2FF5 B6
2FF6 B7
2FF7 C6
2FF8 C6
2FF9 C7
2FG0 C6
2FG1 C7
2FG2 C1
2FG3 C2
2FG4 D3
2FG6 D3
2FG7 E3
2FG8 E3
2FG9 E3
2FH2 D11
2FH3 D12
2FH4 D12
2FH5 D6
2FH6 E3
2FH7 E3
2FH8 E7
3FE5 E7
3FE6 F3
3FE7 F3
3FE8 F3
3FE9 F3
3FG2-1 F6
3FG2-2 F7
3FG4-1 F7
3FG4-2 F6
3FG6-2 E7
3FG6-3 E7
3FG6-4 D7
3FG7 E7
5FE0 A3
5FE3 B3
5FE4 B7
5FE5 B3
5FE7 C11
5FE8 C7
5FE9 C11
5FG0 E11
5FG2 E11
7FE0 D4
7FE3 C11
9F27-1 E8
9F27-2 D8
9F27-4 D8
9F28 E8
BFE1 E4
BFE2 E4
BFE3 E4
BFE4 E4
BFE5 E4
DFE6 D6
DFE7 D6
DFE8 D6
DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6

13

TUNER, HDMI & CI

2009-10-22

8204 000 8994


18770_510_100118.eps
100525

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 132

10.14 B01 820400089944 Tuner, HDMI & CI


10-14-1

Common Interface

Common Interface

B01A
1

B01A
4

+3V3
3F01

2F01

22u 16V

RES

2F00

TRANSPORT STREAM FROM CAM

+5VCA

7F00
74LVC245A
1

+T 0R4

19
CA-MOCLK
CA-MOVAL
CA-MOSTRT

3F02

IF01

100R

3F03-1

3F03-2 2

1
7

100R

3
4
5
6
7
8
9

8
100R

IF03

CA-CD1n
CA-CD2n

3EN1
3EN2
G3

CA-DATAENn

2
IF02

1
2

18

MOCLK

17
16
15
14
13
12
11

MOVAL
MOSTRT

CA-DATADIR

CA-ADDENn
MOCLK
MOVAL

10

MOSTRT

MDO0

+3V3
2F02

19

MDO1
RES
MDO2

100n

20

7F01
74LVC245A
1

MDO3

3EN1
3EN2
G3

MDO4

IF05
CA-MDO0

3F04-1 1

8 100R
IF06

CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

3F04-2
6 100R
3F04-4
8 100R
3F05-2
6 100R
3F05-4

3F04-3 3
3F05-1 1
3F05-3 3

3
4
5
6
7
8
9

7 100R

5 100R

7 100R

5 100R

1
2

18

MDO0

17
16
15
14
13
12
11

MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7

MDO5
MDO6
MDO7

CA-RDY

10

IF07

CA-WAITn
+3V3

CA-INPACKn
2F03

15-BIT ADDRESS

3EN1
3EN2
G3
18

XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07

17
16
15
14
13
12
11

CA-WP

1
2

CA-VS1n

1
19

CA-ADDENn

CA-A00

3
4
5
6
7
8
9

CA-A01
CA-A02
CA-A03
CA-A04
CA-A05
CA-A06
CA-A07

10

XIO-A00

RES

100n

20

7F02
74LVC245A

3F06

CA-RST
RES

100n

20

+5V

18

XIO-A08

20
1
2

17
16
15
14
13
12
11

XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14

1 3F08-1 8
10K
2 3F08-2 7
10K
3 3F08-3 6
10K
4 3F08-4 5
10K
1 3F09-1 8
10K
2 3F09-2 7
10K
3 3F09-3 6
10K
4 3F09-4 5
10K
1

B
IF04

3F10-1

8
10K
3F10-2
7
10K
3F10-3
3
6
10K
3F10-4
4
5
10K
2

3F12
+3V3

10K
2 3F11-2 7
10K
3 3F11-3 6
10K
4 3F11-4 5
10K
8 3F11-1 1
10K

IF08

+5VCA

+3V3

CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-CE1n
CA-A10
CA-OEn
CA-A11
CA-A09
CA-A08
CA-A13
CA-A14
CA-WEn
CA-RDY

1
19

CA-ADDENn

CA-A08

3
4
5
6
7
8
9

CA-A09
CA-A10
CA-A11
CA-A12
CA-A13
CA-A14

CA-MIVAL
CA-MICLK
CA-A12
CA-A07
CA-A06
CA-A05
CA-A04
CA-A03
CA-A02
CA-A01
CA-A00
CA-D00
CA-D01
CA-D02
CA-WP

ROW_A
1P00-A
GND1
1
D3
2
D4
3
D5
4
D6
5
D7
6
CE1
7
A10
8
OE
9
A11
10
A9
11
A8
12
A13
13
A14
14
WE|P
15
RDY|BSY
16
VCC1
17
VPP1
18
A16
19
A15
20
A12
21
A7
22
A6
23
A5
24
A4
25
A3
26
A2
27
A1
28
A0
29
D0
30
D1
31
D2
32
WP|IOIS16
33
GND2
34
70 69

10

RES

100n

3EN1
3EN2
G3

+3V3

+5VCA
2F04

11

100K

4 3F07-4 5
10K
2 3F07-2 7
10K
3F07-3
3
6
10K
3F07-1
1
8
10K

+3V3

7F03
74LVC245A

10

10074595-050MLF
+3V3
2F05

8-BIT DATA
20

3EN1
3EN2
G3
18

XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

17
16
15
14
13
12
11

1
2

CA-DATADIR

19

CA-DATAENn

CA-D00

3
4
5
6
7
8
9

CA-D01
CA-D02
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07

CA-CD1n
MDO3
MDO4
MDO5
MDO6
MDO7
CA-CE2n
CA-VS1n
CA-IORDn
CA-IOWRn
CA-MISTRT
CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
+5VCA

10

XIO-D00

RES

7F04
100n
74LVC245A
1

+3V3
2F06

CONTROL
3EN1
3EN2
G3
18

XIO-D11

1
2

17
16
15
14
13
12
11

1
19

CA-ADDENn

CA-REGn

3
4
5
6
7
8
9

CA-CE1n
CA-CE2n
CA-OEn
CA-WEn
CA-IORDn
CA-IOWRn
XIO-D10

10074595-050MLF

10

XIO-D09
XIO-D08
XIO-OEn
XIO-WEn
XIO-D14
XIO-D15
CA-WAITn

RES

100n

20

7F05
74LVC245A

CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7
MOCLK
CA-RST
CA-WAITn
CA-INPACKn
CA-REGn
MOVAL
MOSTRT
MDO0
MDO1
MDO2
CA-CD2n

ROW_B
1P00-B
GND3
35
CD1
36
D11
37
D12
38
D13
39
D14
40
D15
41
CE2
42
VS1
43
IORD
44
IOWR
45
A17
46
A18
47
A19
48
A20
49
A21
50
VCC2
51
VPP2
52
A22
53
A23
54
A24
55
A25
56
VS2
57
RESET
58
WAIT
59
INPACK
60
REG
61
BVD2|SPKR
62
BVD1|STSCHG
63
D8
64
D9
65
D10
66
CD2
67
GND4
68
72 71

1P00-A D10
1P00-B G10
2F00 A6
2F01 A2
2F02 B6
2F03 D6
2F04 E6
2F05 G6
2F06 H6
3F01 A2
3F02 A4
3F03-1 A4
3F03-2 A4
3F04-1 C4
3F04-2 C4
3F04-3 C4
3F04-4 C4
3F05-1 C4
3F05-2 C4
3F05-3 C4
3F05-4 C4
3F06 A9
3F07-1 A9
3F07-2 A9
3F07-3 A9
3F07-4 A9
3F08-1 A9
3F08-2 A9
3F08-3 B9
3F08-4 B9
3F09-1 B9
3F09-2 B9
3F09-3 B9
3F09-4 B9
3F10-1 C9
3F10-2 C9
3F10-3 C9
3F10-4 C9
3F11-1 D9
3F11-2 C9
3F11-3 D9
3F11-4 D9
3F12 C9
7F00 A5
7F01 B5
7F02 D5
7F03 E5
7F04 G5
7F05 I5
IF01 A4
IF02 A5
IF03 A4
IF04 B9
IF05 C4
IF06 C5
IF07 C5
IF08 D9

5
1X04
REF EMC HOLE

10

11

1X01
REF EMC HOLE

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_830_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-2

Q552.1E LA

10.

EN 133

Flash

B01B

Flash

B01B
2

4
2F20 A3
2F21 A3
3F19 D2

+3V3

3F20-1 1

3F20-3 3

3F21-1 1

3F21-3 3

100R
3F20-2
100R
3F20-4
100R
3F21-2
100R
3F21-4

100R

100R

100R

100R

3F22-2
+3V3

XIO-OEn
XIO-WEn
NAND-WPn

3F23
3F22-4

100R
3F22-3 3
10K
3F22-1 1
5 100R

16
17
9
8
18
19
7

100R

100R
IF22

3F24

+3V3
NAND-RDY1n

0
1
2
3
IO
4
5
6
7

CLE
ALE
CE
RE
WE
WP
R
B

2K2

10K

3F23 C2
3F24 D2
7F20 B3

IF21 C3
IF22 D3
IF23 D3

+3V3

13

VSS

1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48

36

3F19

IF23

3F22-2 C1
3F22-3 C2
3F22-4 C2

37
VCC

NC

IF21

NAND-CE1n
NAND-CLE
NAND-ALE

29
30
31
32
41
42
43
44

3F21-3 C1
3F21-4 C2
3F22-1 C2

[FLASH]
4Gx16
XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

12

7F20
NAND04GW3B2DN6F

3F20-4 C2
3F21-1 C1
3F21-2 C2

100n

100n
2F21

2F20

3F20-1 B1
3F20-2 B2
3F20-3 B1

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_831_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-3

Q552.1E LA

10.

EN 134

USB Hub

B01C

USB Hub

B01C

IF44

+5V

3F25

+T 0R4

100n

2F25

+3V3

FF40

3F26-1

+5V-USB1

100K
IF43
2

USB-OC1n

3F26-2

100n

100n
2F33

100n
2F32

100n
2F31

100n
2F30

1u0
2F29

2F28

1u0

100n
2F27

2F26

100K
3

26
11

IF42

10K

IF31
IF32

+3V3
3F30
3

3F31-3
10K

6
4

IF41

12K IF40
3F31-4

IF39

28
31
30
27
35
22
24
25

36
23
15
5
10
29

XTALOUT
RESET

OSC2
USBDP_DN2|PRT_DIS_P2
USBDM_DN2|PRT_DIS_M2
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2

TEST

DP
USBUP
DM
VBUS_DET

USB-DP2

9F26

USB-DM2

OSC3
USBDP_DN3|PRT_DIS_P3
USBDM_DN3|PRT_DIS_M3
BC_EN3|PWRTPWR3

RBIAS
SDA|SMBDATA|NON_REM1
SCL|SMBCLK|CFG_SEL0
HS_IND|CFG_SEL1

NC

13
2
1
12

USB-OC1n
USB-DP1
USB-DM1
IF36

17
4
3
16

USB-OC2n
USB-DP2
USB-DM2

USB-DM1
USB-DP1

+5V

1
2
3
4

292303-4
USB-OC3n
USB-DP3
USB-DM3
1

8
9
20
21

3F34-1

C
FF33

+5V-USB2

100K
2

USB-OC2n

3F34-2

100K
3

38
39
40
41

IF37
19
7
6
18

VIA

37

1P07
+5V-USB1

FF34
FF35

10K
GND_HS

B
SIDE USB BOTTOM

+T 0R4

32

9F25

USB-DM
IF35

OSC1
USBDP_DN1|PRT_DIS_P1
USBDM_DN1|PRT_DIS_M1
BC_EN1|PWRTPWR1

XTALIN|CLKIN

USB-DP

9F20

33

VDD_3V3

USB HUB

3F32

IF30

USB-DP
USB-DM

9F21

10p

IF33

RESET-USBn

34

CR PLL
FILT

IF34

14

1M0

3F28

7F25
USB2513B-AEZG

3F31-2

3F26-4
100K

24M

10p

10K
2F34

3F35

4
2

1F25

2F35

100K
4

+3V3

3F26-3

3F36

+3V3

100K
USB-OC3n
4

10K

3F34-3

3F34-4

SIDE USB TOP

100K

1P08
+5V-USB2

FF36
FF37

USB-DM2
USB-DP2

FF32

1
2
3
4 IF45

292303-4

FF38
USB-DM3
USB-DP3

1F24

+5V

FF39

FF30
FF31
7

1
2
3
4
5

502382-0570

1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
2F26 A2
2F27 A2
2F28 A4
2F29 A4
2F30 A4
2F31 A5
2F32 A5
2F33 A5
2F34 B1
2F35 B2
3F25 A8
3F26-1 A8
3F26-2 A8
3F26-3 A8
3F26-4 B8
3F28 B2
3F30 C2
3F31-2 C2
3F31-3 C2
3F31-4 D2
3F32 C8
3F34-1 C8
3F34-2 C8
3F34-3 D8
3F34-4 D8
3F35 B1
3F36 D6
7F25 B2
9F20 B7
9F21 B7
9F25 B8
9F26 B8
FF30 E8
FF31 E9
FF32 E9
FF33 C9
FF34 C7
FF35 C7
FF36 D7
FF37 D7
FF38 E9
FF39 E8
FF40 A8
IF30 C2
IF31 C1
IF32 C1
IF33 B2
IF34 B2
IF35 B5
IF36 C5
IF37 C5
IF39 D2
IF40 C2
IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_832_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-4

Q552.1E LA

10.

EN 135

SD Card

B01D

SD Card

B01D
1

A
3F40
+3V3
22u 16V

2F40

+T

FF45

+3V3-SD

0R4

B
+3V3

3F41-2

IF47

SDIO-DAT3

47K

3F41-3

SDIO-CMD

SDIO-DAT3

3F44-2

SDIO-CMD

FF47

100R

47K

SDIO-CLK

SDIO-CLK

3F41-1
47K

3F42-1

8
4

SDIO-DAT0
3F41-4

47K

SDIO-DAT0

SDIO-DAT1

SDIO-DAT1

SDIO-DAT2

SDIO-DAT2

47K

+3V3-SD

1 3F44-1 8

10K
1

1P09-1
FF48

100R

3F45 RES

3F43-2

100R
3F43-3

FF49

3F44-3

FF41

100R

1
6

3F43-1

100R

FF42

1314

FF43

1939115-1

3F42-2

FF46

1P09-2
7

SDIO-CDn

SDIO-CDn

FF44

SDIO-WP

SDIO-WP

FF50

10
11
12

47K
3F42-3

100R

1
2
3
4
5
6
7
8
9

1P09-1 C4
1P09-2 D4
2F40 A2
3F40 A2
3F41-1 C1
3F41-2 C1
3F41-3 C1
3F41-4 C1
3F42-1 C1
3F42-2 D1
3F42-3 D1
3F43-1 C3
3F43-2 C3
3F43-3 C3
3F44-1 C3
3F44-2 C3
3F44-3 C3
3F45 C1
FF41 C3
FF42 C3
FF43 C3
FF44 D3
FF45 A2
FF46 C4
FF47 C3
FF48 C3
FF49 C3
FF50 D3
IF46 D1
IF47 B1

IF46

1939115-1

47K

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_833_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-5

Q552.1E LA

10.

EN 136

PNX85500 Control

B01E

PNX85500 Control

B01E

A
+3V3-STANDBY

+3V3-STANDBY

10K
RES

IF53
PNX-SPI-CSBn
IF54
3

HOLD

+5V

PNX-SPI-CLK

PNX-SPI-WPn
+3V3-STANDBY
FF29

VSS

3F66

IF52
6

BACKLIGHT-BOOST
7F53 RES
PDTA114EU

PNX-SPI-SDO

RES

512K
FLASH

10K
RES

3F67

IF50
5

IF55

BOOST-PWM

IF61

47K

3F68

+3V3

+3V3

10K

7F52
M25P05-AVMN6

VCC
IF51

3F52

B
PNX-SPI-SDI

+3V3

100n
RES

10K

2F52

3F51

+3V3-STANDBY

7F54-1 RES
BC847BPN(COL) 6

7F54-2 RES
BC847BPN(COL)

SPI-PROG

IF56
4

IF57

FF04

IF62
SDM

3F54

RES

3F69

FF58

RES

10K

1u0

2F53

MAIN NVM

+3V3

RES

9CH0

10K

1K0
RES

3F53

DEBUG ONLY
IF58

2F58 RES

3F58

10K

IF59

1
2
3

0
1
2

100R

SDA-SSB
3F63

FF63

WC
SCL

ADR
SDA

100R

SCL

1
2
3

SDA
5

7
6
5

FF55

3F59
100R

3F60

SCL-UP-MIPS

FF56

SDA-UP-MIPS

100R

(8K 8)
EEPROM

1F52

3F62

FF62

100n
7F58

FF61

SCL-SSB

FF57

LEVEL

DEBUG / RS232 INTERFACE

SHIFTED
TXD-UP
RXD-UP
RESET-STBYn
SPI-PROG

FF65

3F64

FF66

100R

1F51
FF64

3F65
100R

1
2
3
4
5

UP

FOR
DEBUG
USE ONLY

1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
3F53 C6
3F54 D7
3F58 E1
3F59 E3
3F60 E3
3F62 D5
3F63 E5
3F64 F5
3F65 F5
3F66 B7
3F67 B6
3F68 C7
3F69 D7
7F52 B2
7F53 B7
7F54-1 C7
7F54-2 C7
7F58 D1
9CH0 C7
FF04 C4
FF29 C4
FF55 E3
FF56 E3
FF57 E2
FF58 C7
FF61 D4
FF62 D7
FF63 E4
FF64 F7
FF65 F4
FF66 F4
IF50 B3
IF51 B1
IF52 B3
IF53 B3
IF54 C3
IF55 C6
IF56 C7
IF57 C7
IF58 D2
IF59 E1
IF61 C4
IF62 C4

9
4

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_834_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-6

Q552.1E LA

10.

EN 137

HDMI & CI

HDMI & CI

B01F

B01F

10

IF10
IF11

1T01

15p

820R

2F65
1p0

10p
2F70

820n
2F62

5F74

AF73

IF16

330n
3F82

220R

5F76

3F79-4

2F80

AGC CONTROL

10n

IF80

1p0

2F79

3F79-1
220R

10n
IF78

1p0

AF72
1

22p

IF76

15p
2F73

2F72

9F03

9F02
6

2F75

15p
2F82

VAGC

OUTPUT2

IF74

2F76

10n

X7251X
36M17

IF-AGC

INPUT2

OUTPUT1

FF75

IF72

+5V-TUN-PIN

3F75

15p

47R

IF88

TUN-IF-N

SDA-TUNER

TUN-IF-P

5F73

10n

1K0
2F92

6F72

3F71
10n

TUN-P6

IF-

10n
IF14

2F64

IF15

2F66

IF+

10n

2
1

ATB2012

3K3

2F86

SCL-TUNER

3F78

47R

220R

IF13

470n

15p

IF87

5F70

3F76

3F72

2F63

2F90

IF86
2F84

BA591

3F81

9F06

9F05

2F85

IF12

220R

FF01

+5V-TUN-PIN

IF-AGC

3F80

IF79

4K7

22p

3F77

680n

IF82

5F66

PNX-IF-AGC

FF82

4K7

100n

2F93

PNX-IF-N

FF81

TUN-P6
TUN-P7

9F04

IF81

GND

4u7

100n

RES
2F60

2F61

4u7

RES

2F59

4n7

2F81

FF00

TUN-IF-N
TUN-IF-P

47n

AF70

IF77

INPUT1

2p2 RES
2F77

AF71

10n
2F78

680n

TUN-P1
FF76

4
O1
5
O2

I
IGND

IF73

GND2

1
2
3
4
5
6
7
8
9
10
11
12

1
2

2F74

5F71

IF75

1F75

FF74

10n

13

16

+5V-TUN-PIN
7F75
UPC3221GV-E1

PNX-IF-P

DC
NC1
RF_AGC
NC2
AS
SCL
SDA
+5V
4Mhz
IF_OUT1
IF_OUT2
NC3

14

VCC

RF-IN 15

GND1

FF71

2F71

9F01

9F00

TH2603

2F91

TUN-P7

10n

RES

IF89
IF90

7F70
PDTC114EU

10n

RES
2F94

SELECT-SAW

9F71

5F72
+5V-TUN-PIN

+5V-TUN

1
1F75 B5
1T01 A1
2F59 B1
2F60 B1
2F61 B1

2F62 B10
2F63 C9
2F64 C9
2F65 B10
2F66 C10

2F70 B10
2F71 A7
2F72 A9
2F73 A9
2F74 B6

2F75 B8
2F76 B9
2F77 B9
2F78 B6
2F79 B8

3
2F80 B9
2F81 B1
2F82 B9
2F84 C1
2F85 C4

2F86 D1
2F88 E5
2F90 C6
2F91 D6
2F92 C7

22u

RES
2F88

30R

4
2F93 C2
2F94 D7
3F71 C7
3F72 C7
3F75 D2

3F76 C2
3F77 C4
3F78 C7
3F79-1 B8
3F79-4 B8

5
3F80 C9
3F81 C9
3F82 B10
5F66 C10
5F70 D6

6
5F71 B9
5F72 E4
5F73 C5
5F74 B10
5F76 B10

6F72 C7
7F70 D8
7F75 A6
9F00 A6
9F01 A6

7
9F02 A8
9F03 A8
9F04 B3
9F05 C4
9F06 C4

9F71 E4
AF70 B3
AF71 B3
AF72 B9
AF73 B9

8
FF00 B2
FF01 C4
FF71 A1
FF74 B1
FF75 B2

FF76 B1
FF81 C1
FF82 C2
IF10 A5
IF11 A5

9
IF12 C9
IF13 C9
IF14 C9
IF15 C9
IF16 B10

IF72 C5
IF73 B6
IF74 B8
IF75 B6
IF76 B8

10
IF77 B6
IF78 B8
IF79 C5
IF80 B8
IF81 B6

IF82 C4
IF86 C5
IF87 C2
IF88 D2
IF89 D5

IF90 D7

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_835_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-7

Q552.1E LA

10.

EN 138

Toshiba Supply

B01G

Toshiba Supply

B01G

2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2

+1V2-BRA-DR1

+3V3

+1V2-BRA-VDDC

B
5FA4

30R
10u

2FA4

OUT

30R

IN

100n

5FA3

7FA3
LD1117DT12

2FA3

B
FFAF

100n

2FA2

COM

FFA2

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_836_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-8

Q552.1E LA

10.

EN 139

HDMI

B01H

HDMI

B01H

HDMI CONNECTOR SIDE


1P05
DRX2+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FFB5 21

DRX2DRX1+

DRX0DRXC+
DRXCPCEC-HDMI
FFB1
FFB2

DRX-DDC-SCL
DRX-DDC-SDA

DRX-DDC-SCL
DRX-DDC-SDA

47K

DRX1DRX0+

3FBF-2

DIN-5V

47K

FFB3
FFB4

DIN-5V

DRX-HOTPLUG

20
23 22

FFB6

1
1P05 B1

B
1 3FBF-1 8

DIN-5V

3FBF-1 C4

3FBF-2 C4

FFB1 C2

3
FFB2 C2

FFB3 C2

FFB4 C2

FFB5 C1

FFB6 C2

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_837_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-9

Q552.1E LA

10.

EN 140

VGA

B01I

VGA

B01I

A
CDS4C12GTA
12V

RES 6FC1

1FC1

100p

3FC5

2FC1

FFC1

FFC2

RES 6FC2

1FC2

100p

2FC2
1E05

FFC4

CDS4C12GTA
12V

RES 6FC3

1FC3

100p

2FC3

FFC3

FFC6

1216-00D-15S-1EF

B-VGA

C
9FC5

H-SYNC-VGA

9FC6

V-SYNC-VGA

4K7

3FC3

CDS4C12GTA
12V

RES 6FC4

1FC4

16
17

6FC7

47p

2FC7

4K7

CDS4C12GTA
12V

FFC9

10K

D
9FC1

VGA-SDA-EDID-HDMI

9FC2

VGA-SDA-EDID

RES

CDS4C12GTA
12V

6FC6

47p

2FC6
RES
3FC2

3FC4

FFC8

10K

CDS4C12GTA
12V

RES 6FC5

1FC5

2FC5
RES
3FC1

47p

FFC7

18R

FFC5

47p

G-VGA

18R

3FC7

2FC4

VGA
CONNECTOR

CDS4C12GTA
12V

3FC6

B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

R-VGA

18R

1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
1FC5 D4
1FC6 F4
2FC1 B4
2FC2 B4
2FC3 C4
2FC4 C4
2FC5 D4
2FC6 E4
2FC7 E4
2FC8 F4
3FC1 D3
3FC2 E3
3FC3 C6
3FC4 D6
3FC5 A6
3FC6 B6
3FC7 C6
6FC1 B5
6FC2 B5
6FC3 C5
6FC4 C5
6FC5 D5
6FC6 E5
6FC7 E5
6FC8 F5
9FC1 D6
9FC2 E6
9FC3 E6
9FC4 E6
9FC5 C6
9FC6 D6
FFC1 A4
FFC2 B4
FFC3 C4
FFC4 C3
FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4

9FC3

VGA-SCL-EDID-HDMI

9FC4

VGA-SCL-EDID

RES

CDS4C12GTA
12V

6FC8

1FC6

2FC8

47p

+5V-VGA

9
4

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_838_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-10

Q552.1E LA

10.

EN 141

Temp Sensor + Headphone

B01J

Temp Sensor + Headphone

B01J

A
1K0

3FD2 RES

9FD2

9FD1

100n

2FD1
2

A1

SCL

A2

B
IFD3

IFD5

9FD5

IFD4

100R

SDA

IFD1

A0

OS

1K0

100R

3
1

1K0
3FD7 RES

3FD4

SCL-SSB

IFD2

3FD6 RES

3FD3

SDA-SSB

+VS

7FD1
LM75BDP

GND

6FD1

RES

1K0

RES

LTST-C190KGKT

3FD1

+3V3

1328 D6
1329 C6
1FD2 D4
1FD3 D5
2FD1 A4
2FDC D5
2FDD D5
3FD1 A3
3FD2 B5
3FD3 B3
3FD4 B2
3FD6 C4
3FD7 C4
3FDG-1 D4
3FDG-2 D4
6FD1 B3
6FD2 D4
6FD3 D5
7FD1 B3
9FD1 A4
9FD2 A4
9FD5 C5
FFDA D5
FFDB D5
FFDC D6
IFD1 B4
IFD2 B3
IFD3 B4
IFD4 B3
IFD5 B4

C
1329

1
2
3

502382-0370

FFDA

1n0

FFDB

1n0
2FDD

CDS4C12GTA
12V
2FDC

6FD3

CDS4C12GTA
12V
1FD3

6FD2

1FD2

1K0

1K0

3FDG-2
2

3FDG-1

AMP1
AMP2

2
3
1

1328

FFDC
MSJ-035-29D PPO (PHT)

9
4

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_839_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-14-11

Q552.1E LA

10.

EN 142

Tuner Brazil

B01K

Tuner Brazil

B01K

10

12

11

13

A
5FE0

IF63

IF64

+2V5-BRA

+1V2-BRA-VDDC

+3V3-BRA-FLT

1u0

100n
2FF1

100n
2FF0

100n
2FE5

2FE3

100n
2FE4

1u0

2FE0

30R

AGND
5FE3

IF66

IF65

+3V3-BRA-FLT

5FE4
+3V3-BRA

30R

1u0

100n
2FF6

100n
2FF5

100n
2FF4

2FF2

1u0

100n
2FF3

30R
2FE6

AGND
5FE5

IF67

IF68
+1V2-BRA-DR1
IF48

5FE7

+3V3-BRA

+3V3

1u0

100n
2FF9

100n
2FF8

2FF7

1u0

2FE8

30R

30R

5FE8

IF69

+2V5-BRA
7FE3
LD3985M25
5FE9

+5V
30R

18p

2FG3

18p

2FG2

1u0

25M4
4 2

100n
2FG1

2FG0

30R
1FE0

IN

OUT

INH

BP

FF03

+2V5-BRA

30
29

100n

BFE1
BFE2

28
27

100n
2FH6

100n

BFE3
BFE4

2FH7

100n

BFE5

10n
2FG6

2FG7
AGND

2FG9

100n
2FG8

AGND

10n

24
25
26
39

AGND

PBVAL
RERR

0
XSEL
1

RLOCK
P
ADI_AI
N

RSEORF
SBYTE

P
ADQ_AI
N

SLOCK
P
AD_VREF
N

SRCK

AD_VREF

SRDT
STSFLG1

DTCLK

1n5

58

3FG6-4

3FE8

100R
3FE9

IF49
100R

45
46

AGCI
SLADRS

CKI
SCL
SDA

23

SCL-SSB
SDA-SSB

SYRSTN

AGND

TN

0
1

SCL
SDA

33R

1u0

10n

2FH4

TS-FE-VALID
4

9F27-4

TS-DVBS-VALID

DFE8

55

3FG6-3

59

9F27-2

TS-DVBS-SOP

33R

TS-FE-SOP

DFE9

52

9F28
3FG7

61
60

3FG6-2

33R

33R

3FE5
18K

DFF2

51

30R

TS-FE-DATA
1

10

5FG0

TS-FE-CLOCK

DFF1

38

TS-DVBS-CLOCK

9F27-1

5FG2

TS-DVBS-DATA

30R

IF28

AGND

IF-AGC

42
6
5

3FG2-1

RESET-SYSTEMn
10K

3FG2-2

12
14

4K7

3FG4-1
4K7

VSS

10K

3FG4-2

+3V3-BRA-FLT

4
15
33
37
44
47
50
57
62

11

STSFLG0

PLLVSS

0
TSMD
1

17

10K IF29

AGCCNTR

AD_DVSS

3FE7

1
41

10K

S_INFO

31

3FE6

AGCCNTI

DTMB

AD_AVSS

40
8

DFE7

54

IF27
+3V3-BRA-FLT

AGND

DFE6

53

2FH3

2FH5

21

1u0

43
FIL

2FH2

VDDS

DR2VDD

13
35
49
64

22

16
36
56
63

34
DR1VDD 48

VDDC

10n

IF17
IF18

2FG4

IF+
IF-

2FH8

3
2

PLLVDD

18

AD_AVDD

19

32

7FE0
TC90517FG

AGND

AD_DVDD

AGND

20

COM
AGND

AGND

10

11

12

1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF1 A7
2FF2 B6
2FF3 B6
2FF4 B6
2FF5 B6
2FF6 B7
2FF7 C6
2FF8 C6
2FF9 C7
2FG0 C6
2FG1 C7
2FG2 C1
2FG3 C2
2FG4 D3
2FG6 D3
2FG7 E3
2FG8 E3
2FG9 E3
2FH2 D11
2FH3 D12
2FH4 D12
2FH5 D6
2FH6 E3
2FH7 E3
2FH8 E7
3FE5 E7
3FE6 F3
3FE7 F3
3FE8 F3
3FE9 F3
3FG2-1 F6
3FG2-2 F7
3FG4-1 F7
3FG4-2 F6
3FG6-2 E7
3FG6-3 E7
3FG6-4 D7
3FG7 E7
5FE0 A3
5FE3 B3
5FE4 B7
5FE5 B3
5FE7 C11
5FE8 C7
5FE9 C11
5FG0 E11
5FG2 E11
7FE0 D4
7FE3 C11
9F27-1 E8
9F27-2 D8
9F27-4 D8
9F28 E8
BFE1 E4
BFE2 E4
BFE3 E4
BFE4 E4
BFE5 E4
DFE6 D6
DFE7 D6
DFE8 D6
DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6

13

TUNER, HDMI & CI

2010-02-16

8204 000 8994


18770_840_100330.eps
100909

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 143

10.15 B01 820400089945 Tuner, HDMI & CI


10-15-1

Common Interface

Common Interface

B01A
1

B01A

+3V3
3F01

2F01

22u 16V

RES

2F00

TRANSPORT STREAM FROM CAM

+5VCA

7F00
74LVC245A
1

+T 0R4

19

CA-MOVAL
CA-MOSTRT

3F03-1

IF02

8
100R

7
100R

CA-CD2n

3EN1
3EN2
G3

CA-DATAENn

100R
3F03-2 2

CA-CD1n

IF01

3F02

CA-MOCLK

3
4
5
6
7
8
9

IF03

1
2

18

MOCLK

17
16
15
14
13
12
11

MOVAL
MOSTRT

CA-DATADIR

CA-ADDENn
MOCLK
MOVAL

10

MOSTRT

MDO0

+3V3
2F02

19

MDO1
RES
MDO2

100n

20

7F01
74LVC245A
1

MDO3

3EN1
3EN2
G3

MDO4

IF05
CA-MDO0

3F04-1 1

8 100R

2
IF06

CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

3F04-2
6 100R
3F04-4
8 100R
3F05-2
6 100R
3F05-4

3F04-3 3
3F05-1 1
3F05-3 3

7 100R

5 100R

7 100R

5 100R

3
4
5
6
7
8
9

1
2

18

MDO0

17
16
15
14
13
12
11

MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7

MDO5
MDO6
MDO7

CA-RDY
10

IF07

CA-WAITn
+3V3

CA-INPACKn
2F03

15-BIT ADDRESS

3EN1
3EN2
G3
18

XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07

17
16
15
14
13
12
11

CA-WP

1
2

CA-VS1n

1
19

CA-ADDENn

CA-A00

3
4
5
6
7
8
9

CA-A01
CA-A02
CA-A03
CA-A04
CA-A05
CA-A06
CA-A07

10

XIO-A00

RES

100n

20

7F02
74LVC245A

3F06

CA-RST
RES

100n

20

+5V

20
3EN1
3EN2
G3

18

XIO-A08

1
2

17
16
15
14
13
12
11

XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14

1 3F08-1 8
10K
2 3F08-2 7
10K
3 3F08-3 6
10K
4 3F08-4 5
10K
1 3F09-1 8
10K
2 3F09-2 7
10K
3F09-3
3
6
10K
4 3F09-4 5
10K
1

B
IF04

3F10-1

8
10K
3F10-2
2
7
10K
3 3F10-3 6
10K
4 3F10-4 5
10K

3F12
+3V3

10K
2 3F11-2 7
10K
3 3F11-3 6
10K
4 3F11-4 5
10K
8 3F11-1 1
10K

IF08

+5VCA

+3V3

CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-CE1n
CA-A10
CA-OEn
CA-A11
CA-A09
CA-A08
CA-A13
CA-A14
CA-WEn
CA-RDY

1
19

CA-ADDENn

CA-A08

3
4
5
6
7
8
9

CA-A09
CA-A10
CA-A11
CA-A12
CA-A13
CA-A14

CA-MIVAL
CA-MICLK
CA-A12
CA-A07
CA-A06
CA-A05
CA-A04
CA-A03
CA-A02
CA-A01
CA-A00
CA-D00
CA-D01
CA-D02
CA-WP

ROW_A
1P00-A
GND1
1
D3
2
D4
3
D5
4
D6
5
D7
6
CE1
7
A10
8
OE
9
A11
10
A9
11
A8
12
A13
13
A14
14
WE|P
15
RDY|BSY
16
VCC1
17
VPP1
18
A16
19
A15
20
A12
21
A7
22
A6
23
A5
24
A4
25
A3
26
A2
27
A1
28
A0
29
D0
30
D1
31
D2
32
WP|IOIS16
33
GND2
34
70 69

10

RES

100n

+3V3

+5VCA
2F04

11

100K

4 3F07-4 5
10K
2 3F07-2 7
10K
3F07-3
3
6
10K
3F07-1
1
8
10K

+3V3

7F03
74LVC245A

10

10074595-050MLF
+3V3
2F05

8-BIT DATA
20

3EN1
3EN2
G3
18

XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

17
16
15
14
13
12
11

1
2

CA-DATADIR

19

CA-DATAENn

CA-D00

3
4
5
6
7
8
9

CA-D01
CA-D02
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07

CA-CD1n
MDO3
MDO4
MDO5
MDO6
MDO7
CA-CE2n
CA-VS1n
CA-IORDn
CA-IOWRn
CA-MISTRT
CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
+5VCA

10

XIO-D00

RES

7F04
100n
74LVC245A
1

+3V3
2F06

CONTROL
3EN1
3EN2
G3
XIO-D11

18

XIO-D09
XIO-D08
XIO-OEn
XIO-WEn
XIO-D14
XIO-D15
CA-WAITn

17
16
15
14
13
12
11

1
2

1
19

CA-ADDENn

CA-REGn

3
4
5
6
7
8
9

CA-CE1n
CA-CE2n
CA-OEn
CA-WEn
CA-IORDn
CA-IOWRn
XIO-D10

H
1X04
REF EMC HOLE

1X01
REF EMC HOLE

10074595-050MLF

10

RES

100n

20

7F05
74LVC245A

CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7
MOCLK
CA-RST
CA-WAITn
CA-INPACKn
CA-REGn
MOVAL
MOSTRT
MDO0
MDO1
MDO2
CA-CD2n

ROW_B
1P00-B
GND3
35
CD1
36
D11
37
D12
38
D13
39
D14
40
D15
41
CE2
42
VS1
43
IORD
44
IOWR
45
A17
46
A18
47
A19
48
A20
49
A21
50
VCC2
51
VPP2
52
A22
53
A23
54
A24
55
A25
56
VS2
57
RESET
58
WAIT
59
INPACK
60
REG
61
BVD2|SPKR
62
BVD1|STSCHG
63
D8
64
D9
65
D10
66
CD2
67
GND4
68
72 71

1P00-A D10
1P00-B G10
2F00 A6
2F01 A2
2F02 B6
2F03 D6
2F04 E6
2F05 G6
2F06 H6
3F01 A2
3F02 A4
3F03-1 A4
3F03-2 A4
3F04-1 C4
3F04-2 C4
3F04-3 C4
3F04-4 C4
3F05-1 C4
3F05-2 C4
3F05-3 C4
3F05-4 C4
3F06 A9
3F07-1 A9
3F07-2 A9
3F07-3 A9
3F07-4 A9
3F08-1 A9
3F08-2 A9
3F08-3 B9
3F08-4 B9
3F09-1 B9
3F09-2 B9
3F09-3 B9
3F09-4 B9
3F10-1 C9
3F10-2 C9
3F10-3 C9
3F10-4 C9
3F11-1 D9
3F11-2 C9
3F11-3 D9
3F11-4 D9
3F12 C9
7F00 A5
7F01 B5
7F02 D5
7F03 E5
7F04 G5
7F05 I5
IF01 A4
IF02 A5
IF03 A4
IF04 B9
IF05 C4
IF06 C5
IF07 C5
IF08 D9

TUNER, HDMI & CI

10

11

2010 -03-13

8204 000 8994


18770_965_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

Flash

B01B

Flash

B01B
1

+3V3

12

7F20
NAND04GW3B2DN6F

100n

100n
2F21

2F20

VCC

[FLASH]
4Gx16
3F20-1 1

XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07

EN 144

37

10-15-2

Q552.1E LA

3F20-3 3

3F21-1 1

3F21-3 3

100R
3F20-2
100R
3F20-4
100R
3F21-2
100R
3F21-4

100R

100R

100R

100R

0
1
2
3
IO
4
5
6
7

NC

IF21

NAND-CE1n
NAND-CLE
NAND-ALE

29
30
31
32
41
42
43
44

3F22-2
+3V3

XIO-OEn
XIO-WEn
NAND-WPn

3F23
3F22-4

100R
3F22-3 3
10K
3F22-1 1
5 100R

16
17
9
8
18
19
7

100R

100R
IF22

3F24

+3V3

CLE
ALE
CE
RE
WE
WP
R
B

2K2

NAND-RDY1n

+3V3

36

VSS
13

10K

3F19

IF23

1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48

1
2F20 A3
2F21 A3
3F19 D2

2
3F20-1 B1
3F20-2 B2
3F20-3 B1

3F20-4 C2
3F21-1 C1
3F21-2 C2

3F21-3 C1
3F21-4 C2
3F22-1 C2

3F22-2 C1
3F22-3 C2
3F22-4 C2

4
3F23 C2
3F24 D2
7F20 B3

IF21 C3
IF22 D3
IF23 D3

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_966_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-3

Q552.1E LA

10.

EN 145

USB Hub

B01C

USB Hub

B01C

IF44

9
1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
2F26 A2
2F27 A2
2F28 A4
2F29 A4
2F30 A4
2F31 A5
2F32 A5
2F33 A5
2F34 B1
2F35 B2
3F25 A8
3F26-1 A8
3F26-2 A8
3F26-3 A8
3F26-4 B8
3F28 B2
3F30 C2
3F31-2 C2
3F31-3 C2
3F31-4 D2
3F32 C8
3F34-1 C8
3F34-2 C8
3F34-3 D8
3F34-4 D8
3F35 B1
3F36 D6
7F25 B2
9F20 B7
9F21 B7
9F25 B8
9F26 B8
FF30 E8
FF31 E9
FF32 E9
FF33 C9
FF34 C7
FF35 C7
FF36 D7
FF37 D7
FF38 E9
FF39 E8
FF40 A8
IF30 C2
IF31 C1
IF32 C1
IF33 B2
IF34 B2
IF35 B5
IF36 C5
IF37 C5
IF39 D2
IF40 C2
IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9

+5V

3F25

+T 0R4

100n

2F25

+3V3

FF40

3F26-1

+5V-USB1

100K
IF43
2

USB-OC1n

3F26-2

100n

100n
2F33

100n
2F32

100n
2F31

100n
2F30

1u0
2F29

2F28

1u0

100n
2F27

2F26

100K
3

IF42

10K

IF31
IF32

+3V3
3F30
3

3F31-3
10K

IF41

12K IF40

6
4

3F31-4

IF39

28
31
30
27
35
22
24
25

36
23
15
5
10
29

RESET
OSC2
TEST
USBDP_DN2|PRT_DIS_P2
USBDM_DN2|PRT_DIS_M2
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
DP
USBUP
DM
VBUS_DET

USB-DP2

USB-DM

9F26

USB-DM2

OSC3
USBDP_DN3|PRT_DIS_P3
USBDM_DN3|PRT_DIS_M3
BC_EN3|PWRTPWR3

RBIAS
SDA|SMBDATA|NON_REM1
SCL|SMBCLK|CFG_SEL0
HS_IND|CFG_SEL1

NC

13
2
1
12

USB-OC1n
USB-DP1
USB-DM1
IF36

17
4
3
16

USB-OC2n
USB-DP2
USB-DM2

USB-DM1
USB-DP1

FF34
FF35
+5V

19
7
6
18

USB-OC3n
USB-DP3
USB-DM3
1

8
9
20
21

3F34-1

C
FF33

+5V-USB2

100K
2

USB-OC2n

3F34-2

100K
3

38
39
40
41

1
2
3
4

292303-4

IF37

VIA

37

1P07
+5V-USB1

10K
GND_HS

B
SIDE USB BOTTOM

+T 0R4

26

XTALOUT

9F25

IF35

OSC1
USBDP_DN1|PRT_DIS_P1
USBDM_DN1|PRT_DIS_M1
BC_EN1|PWRTPWR1

XTALIN|CLKIN

USB-DP

3F32

32

11

USB-DP
USB-DM

9F21

33

VDD_3V3

USB HUB

9F20

10p

IF33

RESET-USBn

34

CR PLL
FILT

IF30

3F31-2

14

1M0

3F28

7F25
USB2513B-AEZG

IF34

3F26-4
100K

24M

10p

10K
2F34

3F35

4
2

1F25

2F35

100K
4

+3V3

3F26-3

3F36

+3V3

100K
USB-OC3n
4

10K

3F34-3

3F34-4

SIDE USB TOP

100K

1P08
+5V-USB2

FF36
FF37

USB-DM2
USB-DP2

FF32

1
2
3
4 IF45

292303-4

FF38

1F24

+5V

FF39

USB-DM3
USB-DP3

FF30
FF31
7

1
2
3
4
5

502382-0570

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_967_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-4

Q552.1E LA

10.

EN 146

SD Card

B01D

SD Card

B01D
1

A
3F40
+3V3
22u 16V

2F40

+T

FF45

+3V3-SD

0R4

B
+3V3

3F41-2

IF47

47K

3F41-3

SDIO-DAT3

SDIO-DAT3

SDIO-CMD

SDIO-CMD

3F44-2

FF47

100R

3F45 RES

SDIO-CLK

SDIO-CLK

3F41-1

SDIO-DAT0

47K
1

3F42-1

4
8

3F41-4

47K

SDIO-DAT0

SDIO-DAT1

SDIO-DAT1

SDIO-DAT2

SDIO-DAT2

+3V3-SD

1 3F44-1 8

10K
1

1P09-1
FF48

100R

47K

3F43-2

100R
3F43-3
100R

47K

FF49

3F44-3

FF41

3F43-1

100R

FF42

1314

FF43

1939115-1

3F42-2

SDIO-CDn

SDIO-CDn

FF44

SDIO-WP

SDIO-WP

FF50

IF46

10
11
12
1939115-1

47K

1
1P09-1 C4
1P09-2 D4
2F40 A2
3F40 A2

FF46

1P09-2
7

47K
3

100R

2
3F42-3

1
2
3
4
5
6
7
8
9

3F41-1 C1
3F41-2 C1
3F41-3 C1
3F41-4 C1

2
3F42-1 C1
3F42-2 D1
3F42-3 D1
3F43-1 C3

3
3F43-2 C3
3F43-3 C3
3F44-1 C3
3F44-2 C3

3F44-3 C3
3F45 C1
FF41 C3
FF42 C3

4
FF43 C3
FF44 D3
FF45 A2
FF46 C4

FF47 C3
FF48 C3
FF49 C3
FF50 D3

IF46 D1
IF47 B1
5

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_968_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-5

Q552.1E LA

10.

EN 147

PNX85500 Control

B01E

PNX85500 Control

B01E

A
+3V3-STANDBY

IF52
6

10K
RES

IF53
PNX-SPI-CSBn
IF54
3

HOLD

+5V

PNX-SPI-CLK

BACKLIGHT-BOOST
7F53 RES
PDTA114EU

PNX-SPI-SDO

RES

512K
FLASH

PNX-SPI-WPn
+3V3-STANDBY
FF29

VSS

3F66
3F67

IF50
5

IF55

BOOST-PWM

IF61

47K

3F68

+3V3

+3V3

10K

7F52
M25P05-AVMN6

VCC
IF51

3F52

B
PNX-SPI-SDI

+3V3

100n
RES

10K

2F52

3F51

+3V3-STANDBY

10K
RES

+3V3-STANDBY

7F54-1 RES
BC847BPN(COL) 6

7F54-2 RES
BC847BPN(COL)

SPI-PROG

IF56
4

IF57

FF04

IF62
SDM

3F54

RES

3F69

FF58

RES

10K

1u0

2F53

MAIN NVM

+3V3

RES

9CH0

10K

1K0
RES

3F53

DEBUG ONLY
IF58

2F58 RES

3F58

10K

IF59

1
2
3

0
1
2

100R

SDA-SSB
3F63

FF63

WC
SCL

ADR
SDA

100R

SCL

1
2
3

SDA
5

7
6
5

FF55

3F59
100R

3F60

SCL-UP-MIPS

FF56

SDA-UP-MIPS

100R

(8K 8)
EEPROM

1F52

3F62

FF62

100n
7F58

FF61

SCL-SSB

FF57

LEVEL

DEBUG / RS232 INTERFACE

SHIFTED
TXD-UP
RXD-UP
RESET-STBYn
SPI-PROG

FF65

3F64

FF66

100R

1F51
FF64

3F65
100R

1
2
3
4
5

UP

FOR
DEBUG
USE ONLY

1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
3F53 C6
3F54 D7
3F58 E1
3F59 E3
3F60 E3
3F62 D5
3F63 E5
3F64 F5
3F65 F5
3F66 B7
3F67 B6
3F68 C7
3F69 D7
7F52 B2
7F53 B7
7F54-1 C7
7F54-2 C7
7F58 D1
9CH0 C7
FF04 C4
FF29 C4
FF55 E3
FF56 E3
FF57 E2
FF58 C7
FF61 D4
FF62 D7
FF63 E4
FF64 F7
FF65 F4
FF66 F4
IF50 B3
IF51 B1
IF52 B3
IF53 B3
IF54 C3
IF55 C6
IF56 C7
IF57 C7
IF58 D2
IF59 E1
IF61 C4
IF62 C4

9
5

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_969_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-6

Q552.1E LA

10.

EN 148

HDMI & CI

HDMI & CI

B01F

B01F

10

IF10
IF11

1T01

15p

820R

2F65
1p0

10p
2F70

820n
2F62

5F74

AF73

IF16

330n
3F82

220R

5F76

3F79-4

1p0

10n

IF80

22p

220R

2F80

AGC CONTROL

3F79-1

15p
2F82

2F79

1p0

AF72
1

10n
IF78

15p
2F73

2F72

9F03

9F02

IF76

2p2 RES
2F77

VAGC

2F75

680n

OUTPUT2

IF74

2F76

INPUT2

10n

X7251X
36M17

IF-AGC

OUTPUT1

FF75

+5V-TUN-PIN

3F75

15p

47R

IF88

TUN-IF-N

SDA-TUNER

TUN-IF-P

5F73

2
1

ATB2012

10n

1K0
2F92

IF14

2F64

IF15

2F66

IF+

10n

2F91

TUN-P7

10n

6F72

3F71
10n

TUN-P6

IF-

10n

3K3

2F86

SCL-TUNER

3F78

47R

220R

IF13

470n

15p

IF87

5F70

3F76

3F72

2F63

2F90

IF86
2F84

BA591

3F81

9F06

9F05

IF72
2F85

IF12

220R

FF01

+5V-TUN-PIN

IF-AGC

3F80

IF79

4K7

22p

3F77

680n

IF82

5F66

PNX-IF-AGC

FF82

4K7

100n

2F93

PNX-IF-N

FF81

TUN-P6
TUN-P7

9F04

IF81

GND

IF77

INPUT1

4u7

100n

RES
2F60

2F61

4u7

RES

2F59

4n7

2F81

FF00

TUN-IF-N
TUN-IF-P

47n

AF70

10n
2F78

GND2

AF71
FF76

4
O1
5
O2

I
IGND

IF73

1
2
3
4
5
6
7
8
9
10
11
12

1
2

TUN-P1

2F74

PNX-IF-P

5F71

IF75

1F75

FF74

10n
7F75
UPC3221GV-E1

13

VCC

DC
NC1
RF_AGC
NC2
AS
SCL
SDA
+5V
4Mhz
IF_OUT1
IF_OUT2
NC3

14

16

+5V-TUN-PIN

GND1

RF-IN 15

2F71

9F01

9F00

TH2603
FF71

RES

IF89
IF90

7F70
PDTC114EU

10n

RES
2F94

SELECT-SAW

9F71

5F72
+5V-TUN-PIN

+5V-TUN

1
1F75 B5
1T01 A1
2F59 B1
2F60 B1
2F61 B1

2F62 B10
2F63 C9
2F64 C9
2F65 B10
2F66 C10

2F70 B10
2F71 A7
2F72 A9
2F73 A9
2F74 B6

2F75 B8
2F76 B9
2F77 B9
2F78 B6
2F79 B8

3
2F80 B9
2F81 B1
2F82 B9
2F84 C1
2F85 C4

2F86 D1
2F88 E5
2F90 C6
2F91 D6
2F92 C7

22u

RES
2F88

30R

4
2F93 C2
2F94 D7
3F71 C7
3F72 C7
3F75 D2

3F76 C2
3F77 C4
3F78 C7
3F79-1 B8
3F79-4 B8

5
3F80 C9
3F81 C9
3F82 B10
5F66 C10
5F70 D6

5F71 B9
5F72 E4
5F73 C5
5F74 B10
5F76 B10

6F72 C7
7F70 D8
7F75 A6
9F00 A6
9F01 A6

7
9F02 A8
9F03 A8
9F04 B3
9F05 C4
9F06 C4

9F71 E4
AF70 B3
AF71 B3
AF72 B9
AF73 B9

8
FF00 B2
FF01 C4
FF71 A1
FF74 B1
FF75 B2

FF76 B1
FF81 C1
FF82 C2
IF10 A5
IF11 A5

10

9
IF12 C9
IF13 C9
IF14 C9
IF15 C9
IF16 B10

IF72 C5
IF73 B6
IF74 B8
IF75 B6
IF76 B8

IF77 B6
IF78 B8
IF79 C5
IF80 B8
IF81 B6

IF82 C4
IF86 C5
IF87 C2
IF88 D2
IF89 D5

IF90 D7

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_970_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-7

Q552.1E LA

10.

EN 149

Toshiba Supply

B01G

Toshiba Supply

B01G

2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2

+1V2-BRA-DR1

+3V3

+1V2-BRA-VDDC

B
5FA4

30R
10u

2FA4

OUT

30R

IN

100n

5FA3

7FA3
LD1117DT12

2FA3

B
FFAF

100n

2FA2

COM

FFA2

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_971_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-8

Q552.1E LA

10.

EN 150

HDMI

B01H

HDMI

B01H

HDMI CONNECTOR SIDE


1P05
DRX2+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FFB5 21

DRX2DRX1+

DRX0DRXC+
DRXCPCEC-HDMI
FFB1
FFB2

DRX-DDC-SCL
DRX-DDC-SDA

DRX-DDC-SCL
DRX-DDC-SDA

47K

DRX1DRX0+
1 3FBF-1 8

DIN-5V

3FBF-2

DIN-5V

47K

FFB3
FFB4

DIN-5V

DRX-HOTPLUG

20
23 22

FFB6

4
5

1P05 B1

3FBF-1 C4

3FBF-2 C4

FFB1 C2

FFB2 C2

FFB3 C2

FFB4 C2

FFB5 C1

FFB6 C2

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_972_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-9

Q552.1E LA

10.

EN 151

VGA

B01I

VGA

B01I

A
CDS4C12GTA
12V

RES 6FC1

100p

1FC1

3FC5

2FC1

FFC1

FFC2

RES 6FC2

100p

1FC2

2FC2
1E05

CDS4C12GTA
12V

RES 6FC3

100p

1FC3

2FC3
FFC4

FFC6

1216-00D-15S-1EF

B-VGA

C
9FC5

H-SYNC-VGA

9FC6

V-SYNC-VGA

4K7

3FC3

CDS4C12GTA
12V

RES 6FC4

47p

16
17

6FC7

47p

2FC7

4K7

CDS4C12GTA
12V

FFC9

10K

D
9FC1

VGA-SDA-EDID-HDMI

9FC2

VGA-SDA-EDID

RES

CDS4C12GTA
12V

6FC6

47p

2FC6
RES
3FC2

3FC4

FFC8

10K

CDS4C12GTA
12V

RES 6FC5

1FC5

2FC5
RES
3FC1

47p

FFC7

18R

FFC5

1FC4

G-VGA

18R

3FC7
FFC3

2FC4

VGA
CONNECTOR

CDS4C12GTA
12V

3FC6

B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

R-VGA

18R

9FC3

VGA-SCL-EDID-HDMI

9FC4

VGA-SCL-EDID

RES

CDS4C12GTA
12V

6FC8

47p

1FC6

2FC8

+5V-VGA

1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
1FC5 D4
1FC6 F4
2FC1 B4
2FC2 B4
2FC3 C4
2FC4 C4
2FC5 D4
2FC6 E4
2FC7 E4
2FC8 F4
3FC1 D3
3FC2 E3
3FC3 C6
3FC4 D6
3FC5 A6
3FC6 B6
3FC7 C6
6FC1 B5
6FC2 B5
6FC3 C5
6FC4 C5
6FC5 D5
6FC6 E5
6FC7 E5
6FC8 F5
9FC1 D6
9FC2 E6
9FC3 E6
9FC4 E6
9FC5 C6
9FC6 D6
FFC1 A4
FFC2 B4
FFC3 C4
FFC4 C3
FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4

9
5

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_973_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-10

Q552.1E LA

10.

EN 152

Temp Sensor + Headphone

B01J

Temp Sensor + Headphone

B01J

IFD4

1K0

3FD2 RES

9FD2

9FD1

100n

2FD1
2

SDA

A1

SCL

A2

IFD1

IFD3

IFD5

100R

A0

9FD5

100R

OS

1K0

3FD4

SCL-SSB

1K0
3FD7 RES

SDA-SSB

IFD2

3FD6 RES

3FD3

+VS

7FD1
LM75BDP

GND

6FD1

RES

1K0

RES

LTST-C190KGKT

3FD1

+3V3

C
1329

1
2
3

502382-0370

FFDA

1n0

FFDB
1n0
2FDD

CDS4C12GTA
12V
2FDC

6FD3

CDS4C12GTA
12V
1FD3

6FD2

1FD2

1K0

1K0

3FDG-2
2

3FDG-1

AMP1
AMP2

2
3
1

1328

1328 D6
1329 C6
1FD2 D4
1FD3 D5
2FD1 A4
2FDC D5
2FDD D5
3FD1 A3
3FD2 B5
3FD3 B3
3FD4 B2
3FD6 C4
3FD7 C4
3FDG-1 D4
3FDG-2 D4
6FD1 B3
6FD2 D4
6FD3 D5
7FD1 B3
9FD1 A4
9FD2 A4
9FD5 C5
FFDA D5
FFDB D5
FFDC D6
IFD1 B4
IFD2 B3
IFD3 B4
IFD4 B3
IFD5 B4

FFDC
MSJ-035-29D PPO (PHT)

9
5

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_974_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-15-11

Q552.1E LA

10.

EN 153

Tuner Brazil

Tuner Brazil

B01K

B01K

10

11

12

13

A
5FE0

IF63

IF64

+2V5-BRA

+1V2-BRA-VDDC

+3V3-BRA-FLT

1u0

100n
2FF1

100n
2FF0

100n
2FE5

100n
2FE4

2FE3

1u0

2FE0

30R

AGND
5FE3

IF66

IF65

+3V3-BRA-FLT

5FE4
+3V3-BRA

30R

1u0

100n
2FF6

100n
2FF5

100n
2FF4

100n
2FF3

2FF2

1u0

2FE6

30R

AGND
5FE5

IF67

IF68
+1V2-BRA-DR1
IF48

5FE7

+3V3-BRA

+3V3

1u0

100n
2FF9

100n
2FF8

2FF7

1u0

2FE8

30R

30R

5FE8

IF69

+2V5-BRA
7FE3
LD3985M25

5FE9

+5V
30R

18p

2FG3

18p

2FG2

25M4
4 2

1u0

2FG0

100n
2FG1

30R
1FE0

IN

OUT

INH

BP

FF03

+2V5-BRA

30
29

100n

BFE1
BFE2

28
27

100n
2FH6

100n

BFE3
BFE4

2FH7

100n

BFE5

10n
2FG6

2FG7
AGND

2FG9

100n
2FG8

AGND

10n

24
25
26
39

AGND

0
XSEL
1

PBVAL
RERR
RLOCK

P
ADI_AI
N

RSEORF

P
ADQ_AI
N

SBYTE
SLOCK

P
AD_VREF
N

SRCK

AD_VREF

SRDT

DTCLK

STSFLG1

1n5

58

3FG6-4

11
3FE8

100R
3FE9

IF49
100R

45
46

SYRSTN
AGCI
SLADRS

CKI
SCL
SDA

23

SCL-SSB
SDA-SSB

STSFLG0

AGND

TN

0
1

SCL
SDA

33R

1u0

10n

2FH4

TS-FE-VALID
4

9F27-4

TS-DVBS-VALID

DFE8

55
59

3FG6-3

9F27-2

TS-DVBS-SOP

33R

TS-FE-SOP

DFE9

52

9F28

61

3FG7
3FG6-2

60

33R

33R

3FE5
18K

DFF2

51

30R

TS-FE-DATA
1

10

5FG0

TS-FE-CLOCK

DFF1

38

TS-DVBS-CLOCK

9F27-1

5FG2

TS-DVBS-DATA

30R

IF28

AGND

IF-AGC

42
6
5

3FG2-1

RESET-SYSTEMn
10K

3FG2-2

12
14

4K7

3FG4-1
4K7

VSS

10K

3FG4-2

+3V3-BRA-FLT

4
15
33
37
44
47
50
57
62

0
TSMD
1

PLLVSS

10K IF29

AGCCNTR

17

3FE7

1
41

10K

AGCCNTI

S_INFO

AD_DVSS

3FE6

DTMB

31

AD_AVSS

40

DFE7

54

IF27
+3V3-BRA-FLT

AGND

DFE6

53

2FH3

2FH5

21

1u0

43
FIL

2FH2

VDDS

DR2VDD

16
36
56
63

22

13
35
49
64

34
DR1VDD 48

VDDC

10n

IF17
IF18

2FG4

IF+
IF-

2FH8

3
2

PLLVDD

18

AD_AVDD

19

32

7FE0
TC90517FG

AGND

AD_DVDD

AGND

20

COM
AGND

AGND

10

11

12

1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF1 A7
2FF2 B6
2FF3 B6
2FF4 B6
2FF5 B6
2FF6 B7
2FF7 C6
2FF8 C6
2FF9 C7
2FG0 C6
2FG1 C7
2FG2 C1
2FG3 C2
2FG4 D3
2FG6 D3
2FG7 E3
2FG8 E3
2FG9 E3
2FH2 D11
2FH3 D12
2FH4 D12
2FH5 D6
2FH6 E3
2FH7 E3
2FH8 E7
3FE5 E7
3FE6 F3
3FE7 F3
3FE8 F3
3FE9 F3
3FG2-1 F6
3FG2-2 F7
3FG4-1 F7
3FG4-2 F6
3FG6-2 E7
3FG6-3 E7
3FG6-4 D7
3FG7 E7
5FE0 A3
5FE3 B3
5FE4 B7
5FE5 B3
5FE7 C11
5FE8 C7
5FE9 C11
5FG0 E11
5FG2 E11
7FE0 D4
7FE3 C11
9F27-1 E8
9F27-2 D8
9F27-4 D8
9F28 E8
BFE1 E4
BFE2 E4
BFE3 E4
BFE4 E4
BFE5 E4
DFE6 D6
DFE7 D6
DFE8 D6
DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6

13

TUNER, HDMI & CI

2010-03-12

8204 000 8994


18770_975_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 154

10.16 B02 820400089505 PNX85500


10-16-1

PNX NandFlash - Conditional Access

B02A

PNX NandFlash - Conditional Access

B02A

10

11

12

13

14

7S00-5
PNX85500

FLASH

NAND-ALE
NAND-CLE

D22
ALE
NAND
C21
CLE

XIO-A00
XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07
XIO-A08
XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14
XIO-A15

J25
J26
H21
H22
H23
H24
H25
H26
G21
G22
G23
G24
G25
G26
F22
F23

IS25

00
01
02
03
04
05
06
07
XIO_A
08
09
10
11
12
13
14
15

D25
D26
C24
D23
C23
B23
A22
E22
F24
F25
F26
E23
E24
E25
E26
D24

XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07
XIO-D08
XIO-D09
XIO-D10
XIO-D11

B22
OE_
XIO
C22
WE_

XIO-OEn
XIO-WEn

00
01
02
03
04
05
06
07
XIO_D
08
09
10
11
12
13
14
15

CLK_BURST

INPACK
XIO-D14
XIO-D15

B
INPACK

IS26

3S15
10K

B21

E21
CE1_
D21
CE2_
A20
NAND RDY2
F21
RDY1
A21
WP_

NAND-CE1n

NAND-RDY1n
NAND-WPn

9S08
IS00

7S00-11
PNX85500
3S01-1 8
33R
3S01-3 6

CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7

7 3S01-2 2
3 33R
33R 5 3S02-4 4
33R
7 3S02-2 2
33R 8 3S02-1 1
6
3 33R
3S02-3
33R 5 3S01-4 4
33R

P21
P22
P23
P24
P25
P26
N21
N22

CA-ADDENn

J22

CA-DATADIR

K25

CA-DATAENn

K26
3S03

CA-MICLK

N23
10R
L25

CA-MOCLK
7

CA-MISTRT
8
33R

CA-MIVAL

3S04-1

3S04-2

2
33R

N24
N25
L22

CA-MOSTRT

L23

CA-MOVAL

J21

CA-RDY

L24

CA-RST

L26
J23
J24

VIDEO_STREAM

0
1
2
3
MDI
4
5
6
7

0
1
2
3
MDO
4
5
6
7

N26
M21
M22
M23
M24
M25
M26
L21

CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

ADD_EN
DATA_DIR

VS

DATA_EN

CA-VS1n
CA-MOCLK

9S00 *
RES

K21
1
CD
K22
2

I
MCLK

K23
1
K24
2

CA-CD1n
CA-CD2n

3S01-1 E2
3S01-2 E3
3S01-3 E2
3S01-4 E3
3S02-1 E3
3S02-2 E2
3S02-3 E2
3S02-4 E3
3S03 F3
3S04-1 F3
3S04-2 F3
3S15 B6
3S1R F7
3S1S G7
3S1T G7
3S1U G7
3S23 G7
3S24 G7
3S28 G7
3S29 H7
7S00-11 E3
7S00-5 A4
9S00 F5
9S08 C5
IS00 C5
IS25 C3
IS26 B6

CA

+3V3

MISTRT
MIVAL

TS-FE-DATA

3S1R

MOSTRT

TS-FE-CLOCK

3S1S

MOVAL

TS-FE-VALID

3S1T

OOB_EN

TS-FE-SOP

3S1U

560R
560R
1X06
EMC HOLE

560R
560R

RDY
RST
VCCEN
VPPEN

TS-FE-DATA

T21
DATA
T23
ERR
T22
TNR_SER1 MICLK
R23
MIVAL
R22
SOP

TS-FE-ERR
TS-FE-CLOCK
TS-FE-VALID
TS-FE-SOP

TS-FE-DATA
TS-FE-CLOCK
TS-FE-VALID

3S23
RES
3S24
RES
3S28
3S29

TS-FE-SOP

470R
470R
470R
470R

10

11

12

13

14
5

PNX85500

2009-10-22

8204 000 8950


18770_841_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-16-2

Q552.1E LA

10.

EN 155

PNX SDRAM

B02B

PNX SDRAM
1

B02B
2

10

11

DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D6
DDR2-D5
DDR2-D4
DDR2-D7
DDR2-D8
DDR2-D9
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15
DDR2-D16
DDR2-D17
DDR2-D19
DDR2-D18
DDR2-D22
DDR2-D23
DDR2-D20
DDR2-D21
DDR2-D24
DDR2-D30
DDR2-D26
DDR2-D25
DDR2-D28
DDR2-D31
DDR2-D27
DDR2-D29

F3
C2
F2
C3
B4
F1
C1
E1
F4
B2
E5
C5
A4
G5
B3
F5
U3
P2
U2
P3
N1
U1
P1
T1
V4
R5
U5
P5
N3
V3
R4
V5

FS02

2S12

100u 2.0V

3S06

180R 1%

3S20

180R 1%

+1V8

FS01

3S07

DDR2-VREF-CTRL2
180R 1%

3S22

180R 1%

DDR2-VREF-CTRL3

CLK

N
P

DQS0

N
P

DQS1

N
P

DQS2

N
P

DQS3

N
P

CASB
CKE
CSB
ODT
PCAL
RASB
WEB
VREF

1
2

3S30

N5
N4

10R

DDR2-CLK_N
DDR2-CLK_P

3S33
10R

E2
E3

DDR2-DQS0_N
DDR2-DQS0_P

D3
D4

DDR2-DQS1_N
DDR2-DQS1_P

R1
R2

DDR2-DQS2_N
DDR2-DQS2_P

T3
T4

DDR2-DQS3_N
DDR2-DQS3_P

K3
K4
L5
M4
M1
M5
H3

DDR2-CAS
DDR2-CKE
DDR2-CS
DDR2-ODT

DDR2-CKE

3S6Q
10K

DDR2-RAS
DDR2-WE

A2
V1

DDR2-VREF-CTRL2
DDR2-VREF-CTRL3

3S0V

2S24

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DQ
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

M0

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13
DDR2-A14

1%

0
1
DM
2
3

J1
J3
K1
G4
L3
G3
L2
H5
L1
J5
J2
M3
J4
M2
K5

IS42
261R

D1
D5
R3
T5

0
1
2
3
4
5
6
7
A 8
9
10
11
12
13
14

100p

DDR2-DQM0
DDR2-DQM1
DDR2-DQM2
DDR2-DQM3

MEMORY

0
1 BA
2

100n
2S25

H1
H2
G1

100n
2S17

DDR2-BA2

DDR2-BA0
DDR2-BA1

100p
2S20

7S00-8
PNX85500

2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
3S6Q E10
7S00-8 B6
FS01 D3
FS02 D2
IS42 E8

10

11

PNX85500

2009-10-22

8204 000 8950


18770_842_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-16-3

Q552.1E LA

10.

EN 156

PNX Digital Video In

B02C
1

PNX Digital Video In


2

B02C

10

11

12

13

14

2S2E F5
3S0W E5
7S00-6 D6
IS01 E6
IS10 E7

D
7S00-6
PNX85500
T25
T26

HDMIA-RX1+
HDMIA-RX1-

U25
P
U26
RX1_A
N

DDCA-SCL
DDCA-SDA
IS10

W25
P
W26
RXC_A
N

HDMIA-RXC+
HDMIA-RXC+3V3

P
RX0_A
N

Y26
SCL
Y25
DDC_A
SDA
V25
P
V26
T24
RX2_A
HOT_PLUG_A
N

HDMIA-RX0+
HDMIA-RX0-

HDMI_DV

HDMIA-RX2+
HDMIA-RX2-

IS01

3S0W

W24

RREF

10u

RES

2S2E

12K

10

11

12

13

14
5

PNX85500

2009-10-22

8204 000 8950


18770_843_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-16-4

Q552.1E LA

10.

EN 157

PNX Audio

B02D

PNX Audio

B02D

10

11

12

13

14

A
3S0Z
+2V5-AUDIO

3S53-1

+24V-AUDIO-POWER
4R7

100R
3S53-2

220n

2S3J
RES

2S31

1u0

3S17-1

8
10K

2S33

7
10K

2S32

1u0
3S17-2

2 3S13-2

ADAC

AD9
L
AIN4
AC9
R

7
1u0

AF8
L
AIN5
AE8
R

3S10
100R

2S2L

1u0

1
IS1N

1u0

1
2
3
4
5
6

AE5

IS03

ADAC(2)

10

IS1S

7S05-3
LM324 8

3S39

-AUDIO-R

100R
11

ADAC(3)

33R

ADAC(4)

3S3H

3 3S36-3 6

10K

10K

5 3S36-4 4
2S2H

ADAC(5)

33R
3S3U

47p

ADAC(6)

+24V-AUDIO-VDD

33R

SPDIF_OUT
SPDIF_IN1

IS07
3

ADAC(5)

9S06

100n

10u
2S3G

100n
2S3H

2S3F

10u
2S3E

DBS8

ADAC(2)

2S3D

AF5

56R

3S3G-2
7
2
4 3S3G-4 5
33R

AE1
1
AF2
VREF_AADC
2
AE3
I2S_OUT_SD 3
AC8
AF3
VCOM_AADC
4

3S3F

3S3G-3
33R

AD7
AE7
AF7
AD6
AE6
AF6

ADAC(1)
3

AC6
P
AB6
N

AD8
IS1A

33R

AD4
OSCLK
AD1
SCK
AD2
WS

I2S_OUT
AB9
POS
VR_AADC
AB8
NEG

IS1B

1u0

IS19

ADACR

AE9
L
AIN3
AF9
R

AC7
P
AB7
N

1n0

AD10
L
AIN2
AC10
R

1u0
1

ADACL

1n0
2S38

AE10
L
AIN1
AF10
R

2S30

3S3G-1

1n0
2S39

6
10K

+24V-AUDIO-VDD
2S36

AUDIO

1n0
2S3A

3
3S17-3

+AUDIO-L

47p

7S00-2
PNX85500

1u0

22K

2S2S

4 3S17-4 5
10K

22K

AUDIO-IN4-R

100n

IS0R

100u 4V

10K
8 3S36-1 1
2S2G

3S38
100R

11

10K

3S13-3

1 22K

7S05-4
LM324 14

13

2 3S36-2 7

3S13-1

AUDIO-IN4-L

IS02

1u0

1n0
2S3B

AUDIO-IN3-R

22K

4
12

ADAC(1)

2S2Y

1n0
2S3C

+2V5
22K

2S2Z

22K

3S14

IS0V
5

3S13-4

AUDIO-IN3-L

IS13

3S16-4 5
4
10K

2S41

4 3S12-4

FS03

1
3

COM

6
10K

22K
AUDIO-IN2-R

INH

2S34

100R

IN

BP

3S16-3 3

OUT

1u0

3S12-3 6

5
IS12

2S2V

22K
AUDIO-IN2-L

FS08

100n

7
10K

100R
3S53-4

2S2T

2 3S12-2

AUDIO-IN1-R

3S53-3

1u0

4R7
2S42

2
3S16-2

2S2W

10u

22K

10u

100R

1 3S16-1 8
10K

7S08
LD3985M25

2S2R

3S12-1

3S51

1
AUDIO-IN1-L

+24V-AUDIO-VDD

+3V3

7S05-1
LM324 1

AUDIO-OUT-L

11

3S37

3S6L

10K

22K
2S2K

+3V3

47p

+3V3-ARC

+24V-AUDIO-VDD
3S11

IS1L

100n

2S3Q

1R0
5

ADAC(6)

IS06

7S05-2
LM324 7

AUDIO-OUT-R

1 3S18-1 8

IS1G

SPDIF-OUT

220R

100n
7

+3V3

2S3K

+3V3

220R

&

3 3S18-3 6

7S09-1
74LVC00APW
1

IS1D

220R

SPDIF-OUT-PNX

2 3S18-2 7

SPDIF-OUT-PNX

14

11

3S34

3S32

10K

22K
2S2J
47p

IS1E

SEL-HDMI-ARC

7S09-3
74LVC00APW
9

&
6

14

+3V3-ARC

&
8

5
+3V3

10

2S3L

180R

100n

3S6M

IS1K

2S3M

IS44
eHDMI+

100n
68R

3S25

7S09-2
74LVC00APW
4

14

10K

3S19

+3V3-ARC

3S19 H5
3S25 H9
3S32 G12
3S34 G11
3S36-1 C12
3S36-2 B11
3S36-3 D11
3S36-4 D12
3S37 F11
3S38 B13
3S39 C13
3S3F E4
3S3G-1 C7
3S3G-2 D8
3S3G-3 C8
3S3G-4 D7
3S3H D7
3S3U D8
3S51 C6
3S53-1 A6
3S53-2 B6
3S53-3 B6
3S53-4 B6
3S6L F12
3S6M H8
7S00-2 C5
7S05-1 E12
7S05-2 G12
7S05-3 C12
7S05-4 B12
7S08 B8
7S09-1 G6
7S09-2 H6
7S09-3 H7
7S09-4 I7
9S06 E4
DBS8 E4
FS03 B12
FS08 B7
IS02 B11
IS03 C11
IS06 G11
IS07 E11
IS0R C2
IS0V C2
IS12 B8
IS13 B9
IS19 D3
IS1A D3
IS1B D4
IS1D G5
IS1E H5
IS1G G7
IS1K H9
IS1L F5
IS1N C7
IS1S D7
IS44 H9

2S2G C12
2S2H D12
2S2J G12
2S2K F12
2S2L D4
2S2R B7
2S2S B9
2S2T B8
2S2V B3
2S2W B3
2S2Y C3
2S2Z B3
2S30 C3
2S31 C3
2S32 D3
2S33 C3
2S34 B9
2S36 C6
2S38 E9
2S39 E9
2S3A E8
2S3B E8
2S3C E8
2S3D E8
2S3E E3
2S3F E2
2S3G E3
2S3H E3
2S3J B11
2S3K G6
2S3L H8
2S3M H9
2S3Q G5
2S41 C6
2S42 C6
3S0Z A11
3S10 D4
3S11 F5
3S12-1 B2
3S12-2 B2
3S12-3 B2
3S12-4 C2
3S13-1 C2
3S13-2 D2
3S13-3 C2
3S13-4 C2
3S14 B9
3S16-1 B3
3S16-2 B3
3S16-3 B3
3S16-4 C3
3S17-1 C3
3S17-2 D3
3S17-3 C3
3S17-4 C3
3S18-1 G7
3S18-2 G8
3S18-3 G8

14

+3V3-ARC
7S09-4
74LVC00APW
12

&
11

13
7

+3V3

10

11

12

13

14

PNX85500

2009-10-22

8204 000 8950


18770_844_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

B02E

+3V3
+3V3
+3V3

3S80
3S81

10K

3S21
+3V3
10K
3S62

10K
10K

DS52
BOOST-PWM
FS10 TXD2-MIPS
FS11 RXD2-MIPS
PNX-SPI-CS-AMBIn

IS04
PNX-SPI-CS-BLn

+3V3

FS64

SELECT-SAW

1 3S58 2
100R

B25
SDA
A24
3
SCL

1 3S5Y 2
100R

B24
SDA
A23
SCL

1 3S60 2
100R

TRSTN
TMS
TCK
TDO
TDI

RESET_SYS

5K6

3S64
+3V3

3S55

10K

B26
SDA
A25
2
SCL

R26
DN
R25
USB
IS4Z R24 DP
RREF

USB-DM
USB-DP

BL_PWM

10K
CLK_54_OUT

3S83
+3V3

12

13

14

1
100R
1
100R

2 3S57

2 3S5W

SDA-SET
SCL-SET

SDA-SET
SCL-SET
SDA-SSB
SCL-SSB

3S6E

2K2

SDA-TUNER
SCL-TUNER

3S6G

4K7

1
100R

3S5Z

SDA-SSB
SCL-SSB

1
100R

3S61

SDA-TUNER
SCL-TUNER

AA25
AA24
AA23
AB26
AB25

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

3S00

AE4

SDA-UP-MIPS
SCL-UP-MIPS

3S6A

4K7

3S6C

1F10
4K7

3S6B

4K7

3S6D

2K2

3S6F

4K7

4K7

FS44

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDI-PNX85500

FS49
FS50
FS51
FS52

EJTAG-DETECTn

FS53
10 9

1
2
3
4
5
6
7
8

FOR FACTORY
USE ONLY

3S6K

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

8 3S6H-1
10K
3
6 3S6H-3
10K
2
10K

1
10K

FS57

+3V3-STANDBY

+3V3

BM08B-SRSS-TBT

7 3S6H-2
5 3S6H-4
4
10K

RESET-SYSTEMn

33R

AD5

BACKLIGHT-PWM

AC5
10K

10K
3S82 RES

11

3S69

SDA-UP-MIPS
SCL-UP-MIPS

3S27

GPIO1

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_11

10K

+3V3

Y21
Y22
Y23
Y24
W21
W22
W23
V22
V23
U23

BOOTMODE
GPIO1
RXD1-MIPS
TXD1-MIPS
RXD2-MIPS
TXD2-MIPS
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
BOOST-PWM
SELECT-SAW

1 3S56 2
100R

3S26

BOOTMODE

10K
3S40

C25
SDA
C26
1
SCL

3S6J

IS05

3S45
+3V3

10

+3V3

7S00-3
PNX85500

CONTROL

EN 158

PNX Mips

B02E

10.

PNX Mips

10K

10-16-5

Q552.1E LA

RXD1-MIPS

10K
3S84
+3V3

+3V3
TXD1-MIPS

+3V3
IS40

3S72

PXCLK54

10K
47R

RES

D
+3V3
2S89
100n

VDD

+3V3

7S01
PCA9540B

SCL-SET

SCL

SDA-SET

SDA

INP
FIL

I 2 C
-BUS
CTRL

SC0

SCL-DISP

SC1

SCL-BL

SD0

SDA-DISP

SD1

SDA-BL

SCL-DISP

3S65

3S66 4K7
1
3S67 4K7
2
1
3S68 4K7
2
1
4K7
2

SCL-BL
SDA-DISP
SDA-BL

VSS

FS31

9S10
IS08

SCL-SET

SDA-SET

IS09

SCL-BL

9S11

FS2W

SCL-DISP

9S12

FS2Y

SDA-DISP

9S13

SDA-BL

7S00-4
PNX85500

10

11

ETHERNET

ETH-RXCLK

AA3

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

Y5
0
Y6
1
AB4
RXD ETH
2
AC1
3

IS50

RXCLK

ETH-RXDV
ETH-RXER

AC2
RXDV
Y4
RXER

SDIO-DAT3
SDIO-CLK
SDIO-CMD
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP

W2
W1
W6
W5
W4
W3
U6
V6

12

TXCLK
0
1
2
3
TXEN
TXER
COL
CRS
MDC
MDIO

TXD
ETH

CC_DAT3
CLK
CMD
0
SDIO
1 DAT
2
SDCD
SDWP

AA2

ETH-TXCLK

AA1
AA4
AB1
AB2
AA5
AB3
AC3
Y2
Y3
Y1

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)
ETH-TXD(3)
ETH-TXEN
ETH-TXER
ETH-COL
ETH-CRS
ETH-MDC
ETH-MDIO

13

1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
3S56 A5
3S57 A6
3S58 A5
3S5W B6
3S5Y B5
3S5Z B6
3S60 B5
3S61 B6
3S62 B1
3S64 C1
3S65 E11
3S66 E11
3S67 E11
3S68 E11
3S69 A9
3S6A A8
3S6B A9
3S6C B8
3S6D B9
3S6E B8
3S6F B9
3S6G B8
3S6H-1 B8
3S6H-2 B9
3S6H-3 B9
3S6H-4 B9
3S6J C5
3S6K B9
3S72 C6
3S80 B1
3S81 B1
3S82 B1
3S83 C1
3S84 C1
7S00-3 A4
7S00-4 G12
7S01 E8
9S10 F8
9S11 F8
9S12 F8
9S13 F8
DS52 B2
FS10 B2
FS11 B2
FS2W F9
FS2Y F9
FS31 F8
FS44 A12
FS49 A12
FS50 A12
FS51 B12
FS52 B12
FS53 B12
FS57 B12
FS64 C2
IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12

14

PNX85500

2009-10-22

8204 000 8950


18770_845_100330.eps
100330

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-16-6

Q552.1E LA

10.

EN 159

PNX Video Out - LVDS

B02F
1

PNX Video Out - LVDS


2

B02F
4

10

11

12

13

14

7S00-7 C8

7S00-7
PNX85500
PX1APX1A+

A7
B7

N
A
P

LVDS

N
A
P

D7
E7

PX3APX3A+

E8
D8

PX3BPX3B+

E10
N
D10
CLK
P

PX3CLKPX3CLK+

D9
E9

PX3CPX3C+

D11
N
E11
D
P

PX3DPX3D+

PX1BPX1B+

C8
B8

PX1CLKPX1CLK+

C10
N
B10
CLK
P

PX1CPX1C+

A9
B9

PX1DPX1D+

A11
N
B11
D
P

PX1EPX1E+

C12
N
B12
E
P

E12
N
D12
P

PX3EPX3E+

PX2APX2A+

A14
N
B14
A
P

D14
N
E14
P

PX4APX4A+

PX2BPX2B+

C15
N
B15
B
P

E15
N
D15
B
P

PX4BPX4B+

PX2CLKPX2CLK+

C17
N
B17
CLK
P

E17
N
D17
CLK
P

PX4CLKPX4CLK+

PX2CPX2C+

A16
B16 N
C
P
A18
B18 N
D
P
C19
B19 N
E
P

D16
N
E16
P

PX4CPX4C+

D18
N
E18
P

PX4DPX4D+

E19
N
E
D19
P

PX4EPX4E+

PX2DPX2D+
PX2EPX2E+

N
B
P

N
C
P

LOUT1 LOUT3
C

LOUT2 LOUT4

N
P

N
P

10

11

12

13

14

PNX85500

2009-10-29

8204 000 8950


18770_846_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 160

PNX Stand-by Controller

PNX Stand-by Controller

B02G
1

B02G

+1V1

10

11

12

13

POL

10-16-7

Q552.1E LA

2S13

100n

1u0
2S10

30R

RES
5S04

IS3B

2S37
9S24
RES

1u0

2S11
100n

IS20

DS50

2S4G

10K

3S3M
10K
3S3P
10K
RES 3S3S
10K
3S3T
10K

+3V3-STANDBY
3S1H
10K

RES
10K
3S3N RES
10K
3S3Q RES
10K
3S3R
10K RES

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

3S1G

RXD-UP
TXD-UP

10K
3S2A RES

AC20
0
AD20
1
AE20
2
AF20
3
P2
AA21
4
AB21
5
AC21
6
AD21
7

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

DETECT2

RESET-SYSTEMn

10K
3S1J

KEYBOARD

100K

2S4E
100n

3S1L

SPI-PROG

10K

RESET_IN
EA
ALE
PSEN

AF22
4
P6
AE22
5

SPI-PROG
PNX-SPI-WPn

1S02

AA26

RESET-STBYn

AB24

EA

AB23

ALE

AC26

AD26
0
PWM
AC25
1

SPI

+3V3-STANDBY

10p

AF17

AC23
SDA
MC
AC24
SCL

AD23
0
AE26
1
P5
AE25
2
AE24
3

RESET-SYSTEMn
AV2-BLK
AV1-BLK
KEYBOARD
LIGHT-SENSOR
AV1-STATUS
AV2-STATUS

AE17

10p
2S4F

AF26

AC17
XTAL_IN
XTAL_OUT

STANDBY

AE21
0
AF21
1
AA22
2
P3
AB22
3
AC22
4
AD22
5

RXD-UP
TXD-UP
DETECT2

10K
3S1K RES

VDD_XTAL

AD19
0
AE19
1
AF19
2 P1
AA20
3
AB20
7

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

54M

3
3S3L

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

EA
ALE

PSEN
100R

3S2G

3S2F
100R

SDA-UP-MIPS
SCL-UP-MIPS

100R

3S2K

3S2H
100R

LED1
LED2

AE23
SDO
AF25
SDI
AF24
CLK
AF23
CSB

3S44
10K

3S43

10K 3S42

10K

IS3D

PSEN

IS3F
IS3E

RES

SDA-UP-MIPS
SCL-UP-MIPS

3S6V
4K7
RES

LED1

3S6W

IS2V
IS2Z

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

4K7

3S1P
10K

LED2

RES

3S41
10K

PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
PNX-SPI-CSBn

AB17
0
AA18
1
AD18
2
AE18
3
P0
AF18
4
AA19
5
AB19
6
AC19
7

AD17

3S1E
10K
+3V3-STANDBY

10K
3S1D
27K

VSS_XTAL

RES
10K
RES
3S1F

VDDA_ADC2V5

AA17

2S4D
1n0

3S1B
3S1C

VDDA_1V1_DCS

+3V3-STANDBY

1
7S00-9
PNX85500

D
RES
10K
RES 3S3Y
10K

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

10K

3S2L

3S2S
RES
3S3W
4K7

RES
10K
RES
10K

3S46
+3V3-STANDBY

3S47
3S2M
RES
3S49

10K
4K7

7S20
NCP303LSN28
2

FS45
1

INP

IS2U
5

OUTP
CD

FS0Z

RESET-STBYn

NC GND

100n

2S4K

RES

9S0D

10K

1 3S2V 2

+3V3-STANDBY

9S0E

+3V3-STANDBY

1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
2S4D C3
2S4E E2
2S4F B9
2S4G B9
2S4K G10
3S1B C2
3S1C C1
3S1D C2
3S1E C1
3S1F C2
3S1G D2
3S1H D1
3S1J D2
3S1K D1
3S1L E2
3S1P D11
3S2A D2
3S2F D7
3S2G D7
3S2H D7
3S2K D7
3S2L D10
3S2M E10
3S2S E10
3S2V F11
3S3L C2
3S3M C1
3S3N C2
3S3P C1
3S3Q C2
3S3R D2
3S3S D1
3S3T D1
3S3W E9
3S3Y D9
3S41 D12
3S42 C11
3S43 C11
3S44 C11
3S46 D10
3S47 E10
3S49 E10
3S6V C11
3S6W D12
5S04 B6
7S00-9 B6
7S20 G10
9S0D G9
9S0E G9
9S24 B6
DS50 B8
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10

10

11

12

13

PNX85500

2009-10-22

8204 000 8950


18770_847_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-16-8

Q552.1E LA

10.

EN 161

PNX Power

PNX Power

B02H
1

B02H

10

12

11

13

14

5S80

IS3Q

2S5A

RES 10u

100n

2S6A

+1V1
30R

5S81

2S5B

RES 10u

30R

100n

2S6B

+2V5

5S82

IS3S

100n

100n
2S67

+3V3
2S5D

2S4M

100n

U22

10u

VDDA_2V5_USB
VDDA_2V5_VADC
VDDA_2V5_VDAC

100n
100n

2S4W

2S4Y

RES 1u0

10u

2S50

100n

2S4Z

+1V2

10u

100n

AA7

6.3V

5S84
30R
c000

SENSE+1V2

Y17
D13
T20

POL

Y13

+2V5-AUDIO

Y10
R21

R20

VDDA_3V3_USB

+2V5

100n

VDDA_2V5_LVDS_BG

30R

30R

2S46

VDDA_2V5_DCS

5S95

Y12
AA9
2S52

VDDA_2V5_ADAC

VSSA_USB

IS3L

2S51

VDDA_2V5_AADC

5S83
+1V1

AA15
Y15
AA13

VDDA_2V5

VSSA_2V5_LVDS_BG

10u

100n

1
10u
2S4U

IS3K
B13

VDDA_1V1_LVDS_PLL

+2V5-AUDIO
100n

2S45

VDD_1V1_DDR

2S6P

2
100n
2S6C

2
100n
2S6N
1

2
2S6F
1

100n
1 2S6G 2

Y19
Y18

VDD_3V3_SBY

VDDA_1V2

+3V3

30R

+3V3-STANDBY
2S4V

VDD_1V1

5S85

W20
P20
M20
K20
V7
Y8

VDD_3V3

100n

2S4N

C7
C9
C11
C14
C16
C18

2S4P

+2V5-LVDS

N6
N7

VDD_2V5_LVDS

220u 6.3V

100n
2S6E 2

2S6D

U20
U21

+2V5

30R

1
HDMI_VDDA_2V5

VDD_2V5

C13

HDMI_VDDA_1V1

V20
V21

HDMI_VDDA_3V3_TERM

VSSA_1V1_LVDS_PLL

1u0

2S21

100n

RES

2S4S

G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

J7

30R

VDD

A13

100u 2.0V

100n

5
100n
2S5J-4
4

2
5S94

+1V1

VSS

VSS

VSS

2S5P

VSS

M7
N2
N20
P10
P12
P14
P16
P18
P4
P6
P7
T10
T12
T14
T16
T18
T2
T6
T7
U4
V10
V12
V14
V16
V18
V2
Y20

10u

VSSA

VDD_1V8

U24
V24 HDMI_AGND

47u

2S23

5
100n

100n
2S5H-4

100n
2S5H-3
3
7

100n
2S5J-2

100n
2S5J-1 8

4
5

100n
2S5J-3 6

100n
2S5K-4
4

6
100n
2S5K-3

2S29

AA16
AA8
Y11
Y14
Y16
Y9

100n
2S5K-2

2S5K-1
1

A1
A10
A12
A15
A17
A19
A26
A3
A8
B1
B20
C20
C4
D2
D20
E13
E20
E4
F10
F12
F14
F16
F18
F20
F8
G10
G12

8
100n
2S5H-2

100n
2S5H-1

100n
2S5G-4

6
100n
2S5G-3

7
2

100n
2S5G-2

2S5G-1
1

22u

22u
2S4R

100n

2S4Q

100n

2S27

2S28

100n

2S43

+1V1

AF1
AE2
AD3
AC4
AB5
H20
F11
G11
F13
G13
F15
G15
F17
G17
F19
G19
J9
J11
J13
J15
J17
L9
L11
L13
L15
L17
N9
N11
N13
N15
N17
R9
R11
R13
R15
R17
U9
U11
U13
U15
U17
J6
AA6
Y7
W7
F9
G9

30R

5S93
L6
L7
R6
R7
U7
A5
A6
B5
B6
C6
D6
E6
F6
G6
F7
G7

7S00-10
PNX85500

7S00-12
PNX85500

RES 10u

c001

SENSE+1V1

100n

2S5C

100n
2S66

100n
2S65

100n
2S64

100n
2S63

100n

2S62

100n
2S61

2S26

47u
2S60

+1V8

5S87
+2V5
1u0

2S56

100n

2S55

30R

5S88
10u

100n
2S57

2S5M

+2V5-LVDS
30R

5S89
100n
2S58

10u

100n
2S6K
1

2S6H

+2V5
30R

5S90
+2V5
10u

100n

2S53

2S4T

100n

2SHW

30R

I
5S92

10

11

1u0

100n
2S59

2
100n
2S6L

+3V3
30R

2S6M

IS58

12

13

2S21 F6
2S23 B6
2S26 A6
2S27 B3
2S28 B3
2S29 C6
2S43 B2
2S45 F11
2S46 F11
2S4M B12
2S4N C11
2S4P C11
2S4Q B3
2S4R B4
2S4S F5
2S4T H11
2S4U D11
2S4V D11
2S4W D11
2S4Y D11
2S4Z E11
2S50 E11
2S51 E9
2S52 E9
2S53 H11
2S55 G11
2S56 G11
2S57 G11
2S58 H11
2S59 I11
2S5A A11
2S5B A11
2S5C B11
2S5D B11
2S5G-1 B4
2S5G-2 B4
2S5G-3 B4
2S5G-4 B5
2S5H-1 B5
2S5H-2 B5
2S5H-3 B5
2S5H-4 B5
2S5J-1 C5
2S5J-2 C5
2S5J-3 C5
2S5J-4 C5
2S5K-1 C4
2S5K-2 C4
2S5K-3 C4
2S5K-4 C5
2S5M G11
2S5P F5
2S60 A6
2S61 A6
2S62 A7
2S63 A7
2S64 A7
2S65 A7
2S66 A7
2S67 A8
2S6A A11
2S6B A11
2S6C C11
2S6D B11
2S6E B11
2S6F C11
2S6G C11
2S6H H11
2S6K H11
2S6L I11
2S6M I11
2S6N C11
2S6P C12
2SHW I11
5S80 A12
5S81 A12
5S82 A12
5S83 D12
5S84 E12
5S85 C12
5S87 F12
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12
5S94 F5
5S95 E10
7S00-10 B6
7S00-12 C1
IS3K D10
IS3L D10
IS3Q A10
IS3S A10
IS58 I10
c000 E13
c001 B5

14
5

PNX85500

2009-10-22

8204 000 8950


18770_848_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 162

PNX Analog Video

PNX Analog Video


3

10

11

13

12

2S87

AV1-CVBS

9S17

2S8A

2S7J

AV1-R

2S22

3S4J

56R

22n

C-SVHS
22n

EU: SCART1

CVBS-MON-OUT1

56R

3S4L

22n

560R

3S5E

2S7K

AV1-B

Y-SVHS

22n
47R

Connectivity

3S59

47R

22n

AP:

14

3S5B

B02I

56R

B02I

3S05

10-16-9

Q552.1E LA

B
3S08

560R

47p

2S7H

2S40

IS4V

22n

10n
2S7L
56R

3S4P

AV3-Y

22n

AF15
AE15
AC15
AD15

2S8G

AV2-CVBS

47R

3S5L

22n

AB14
AF14
AE14
AC14
AD14

2S7Q

YPBPR2-SYNCIN2

10n

2S7R

AV4-Y

56R

22n
3S4U

SCART2
YPBPR2

P
SCL VGA_EDID
TUNER N
SDA

AF11
AE11
AB10
AA11
AC16
AB16
AB13
AB12
AA12
AA10

IS5E

3S5S
10K

IS5D
IS5F
IS5G
IS5H
IS5J

3S75

AD12
AB11

BS15

AE12
AF12

BS09

BS17

56R

PNX-IF-AGC

47K

BS10

IS11

3S76
10n

AA14

PNX-RF-AGC

47K

3S4W

22n

2S14

BS13

AGND
AV4-PR

2S15
22n

AD11
AC11

+CVBS
2S7U

2S16
22n

IS5C

22n

AC12
AF13

2S76

EU:
AP:

AF16
AD16
AE16
AB18
AC18
AF4
AD24
AD25

CVBS_Y1 ATV_CVBS_Y3
R
C3
B AV1
G
CVBS_Y7
C7
SYNCIN1
Y_G1
CVBS1_OUT
PR_R_C1
CVBS2_OUT
PB_B1
RESREF
CVBS_Y2
CURREF
SYNCIN2
1
Y_G2
PR_R_C2
2
PB_B2
3
REF 4
R
5
G VGA
6
B
HSYNC_IN
IF_AGC
RF_AGC
IN
VSYNC
OUT

22n

22n

2S18
22n

ANALOG_VIDEO
AB15
AC13
AD13
AE13

2S19

56R

3S4T

AV3-PB

7S00-1
PNX85500
2S7P

10n

YPBPR1

2S75

56R

YPBPR1

3S4R

AP:

22n

2S7N

AV3-PR

2S7M

YPBPR1-SYNCIN1

EU:

8K2

IS4W
3S09

56R

3S4K

AV1-G

2S77

PNX-IF-P

10n

2S7E
56R

3S4G

AV4-PB

2S78

22n

PNX-IF-N

10n

2S84
56R

3S50

R-VGA

22n

2S85
56R

3S52

G-VGA

22n

2S86

VGA-SDA-EDID

1 3S5V-1 8

100R

3 3S5V-3 6

2 3S5V-2 7

VGA-SCL-EDID

100R

100R
3 3S5T-3 6

4 3S5V-4 5

V-SYNC-VGA

100R

1 3S5T-1 8

100R

H-SYNC-VGA

2 3S5T-2 7

AP: VGA

22n
4 3S5T-4 5

56R

EU: VGA

3S54

B-VGA

100R

100R

VGA-SCL-EDID-TCON

9S14

VGA-SDA-EDID-TCON

9S15

100R

*
*

*
4

= TCON ONLY

10

11

12

13

2S14 D12
2S15 D12
2S16 D12
2S18 D12
2S19 D12
2S22 A11
2S40 B11
2S75 F11
2S76 F11
2S77 F12
2S78 G12
2S7E G6
2S7H B6
2S7J A6
2S7K B6
2S7L C6
2S7M C6
2S7N D6
2S7P D6
2S7Q E6
2S7R F6
2S7U F6
2S84 G6
2S85 H6
2S86 H6
2S87 A6
2S8A A11
2S8G E6
3S05 A11
3S08 B11
3S09 C11
3S4G G6
3S4J A6
3S4K C6
3S4L B6
3S4P D6
3S4R D6
3S4T D6
3S4U F6
3S4W F6
3S50 H6
3S52 H6
3S54 I6
3S59 A6
3S5B A11
3S5E B11
3S5L E6
3S5S E9
3S5T-1 I5
3S5T-2 I11
3S5T-3 I5
3S5T-4 I11
3S5V-1 I5
3S5V-2 I12
3S5V-3 I5
3S5V-4 I12
3S75 E12
3S76 F12
7S00-1 D8
9S14 I3
9S15 I3
9S17 A13
BS09 F9
BS10 F10
BS13 E9
BS15 F9
BS17 F10
IS11 F13
IS4V B10
IS4W C10
IS5C D9
IS5D E9
IS5E E9
IS5F E9
IS5G E9
IS5H E9
IS5J E9

14
5

PNX85500

2009-10-22

8204 000 8950


18770_849_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 163

10.17 B02 820400089506 PNX85500


10-17-1

PNX NandFlash - Conditional Access

B02A

PNX NandFlash - Conditional Access

B02A

10

11

12

13

14

7S00-5
PNX85500

FLASH

NAND-ALE
NAND-CLE

D22
ALE
C21
NAND
CLE

XIO-A00
XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07
XIO-A08
XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14
XIO-A15

J25
J26
H21
H22
H23
H24
H25
H26
G21
G22
G23
G24
G25
G26
F22
F23

IS25

00
01
02
03
04
05
06
07
XIO_A
08
09
10
11
12
13
14
15

D25
D26
C24
D23
C23
B23
A22
E22
F24
F25
F26
E23
E24
E25
E26
D24

XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07
XIO-D08
XIO-D09
XIO-D10
XIO-D11

B22
OE_
C22
XIO
WE_

XIO-OEn
XIO-WEn

00
01
02
03
04
05
06
07
XIO_D
08
09
10
11
12
13
14
15

CLK_BURST

INPACK
XIO-D14
XIO-D15

B
INPACK

IS26

3S15
10K

B21

E21
CE1_
D21
CE2_
A20
NAND RDY2
F21
RDY1
A21
WP_

NAND-CE1n

NAND-RDY1n
NAND-WPn

9S08
IS00

3S01-1 E2
3S01-2 E3
3S01-3 E2
3S01-4 E3
3S02-1 E3
3S02-2 E2
3S02-3 E2
3S02-4 E3
3S03 F3
3S04-1 F3
3S04-2 F3
3S15 B6
3S1R F7
3S1S G7
3S1T G7
3S1U G7
3S23 G7
3S24 G7
3S28 G7
3S29 H7
7S00-11 E3
7S00-5 A4
9S00 F5
9S08 C5
IS00 C5
IS25 C3
IS26 B6

7S00-11
PNX85500
3S01-1 8
33R
3S01-3 6

CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7

7 3S01-2 2
3 33R
33R 5 3S02-4 4
33R
7 3S02-2 2
33R 8 3S02-1 1
6
3 33R
3S01-4
3S02-3
4
33R 5
33R

P21
P22
P23
P24
P25
P26
N21
N22

CA-ADDENn

J22

CA-DATADIR

K25

CA-DATAENn

K26
3S03

CA-MICLK

N23
10R
L25

CA-MOCLK
7

CA-MISTRT
8
33R

CA-MIVAL

3S04-1

3S04-2

2
33R

N24
N25

CA-MOSTRT

L22

CA-MOVAL

L23
J21

CA-RDY

L24

CA-RST

L26
J23
J24

VIDEO_STREAM

0
1
2
3
MDI
4
5
6
7

0
1
2
3
MDO
4
5
6
7

N26
M21
M22
M23
M24
M25
M26
L21

CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

ADD_EN
DATA_DIR

VS

K23
1
K24
2

CD

K21
1
K22
2

DATA_EN
I
MCLK
O

CA-VS1n
CA-MOCLK

9S00 *
RES

CA-CD1n
CA-CD2n

CA

+3V3

MISTRT
MIVAL

TS-FE-DATA

3S1R

MOSTRT

TS-FE-CLOCK

3S1S

MOVAL

TS-FE-VALID

3S1T

TS-FE-SOP

3S1U

TS-FE-DATA

TS-FE-VALID

3S23
RES
3S24
RES
3S28

TS-FE-SOP

3S29

OOB_EN

560R
560R
560R
560R

RDY
RST
VCCEN
VPPEN

DATA
ERR
TNR_SER1 MICLK
MIVAL
SOP

TS-FE-DATA

T21
T23
T22
R23
R22

TS-FE-ERR
TS-FE-CLOCK
TS-FE-VALID
TS-FE-SOP

TS-FE-CLOCK

1X06
EMC HOLE

470R
470R
470R
470R

10

11

12

13

14
6

PNX85500

2009-12-07

8204 000 8950


18770_511_100118.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-17-2

Q552.1E LA

10.

EN 164

PNX SDRAM

B02B

PNX SDRAM

B02B
2

10

11

F3
C2
F2
C3
B4
F1
C1
E1
F4
B2
E5
C5
A4
G5
B3
F5
U3
P2
U2
P3
N1
U1
P1
T1
V4
R5
U5
P5
N3
V3
R4
V5

FS02

2S12

100u 2.0V

3S06

180R 1%

3S20

180R 1%

+1V8

FS01

3S07

DDR2-VREF-CTRL2
180R 1%

3S22

180R 1%

DDR2-VREF-CTRL3

CLK

N
P

DQS0

N
P

DQS1

N
P

DQS2

N
P

DQS3

N
P

CASB
CKE
CSB
ODT
PCAL
RASB
WEB
1
VREF
2

DDR2-CLK_N
DDR2-CLK_P

3S30

N5
N4

10R

3S33
10R

E2
E3

DDR2-DQS0_N
DDR2-DQS0_P

D3
D4

DDR2-DQS1_N
DDR2-DQS1_P

R1
R2

DDR2-DQS2_N
DDR2-DQS2_P

T3
T4

DDR2-DQS3_N
DDR2-DQS3_P

K3
K4
L5
M4
M1
M5
H3

DDR2-CAS
DDR2-CKE
DDR2-CS
DDR2-ODT
DDR2-RAS
DDR2-WE

A2
V1

DDR2-CKE

3S6Q
10K

DDR2-ODT

3S6P
10K

DDR2-VREF-CTRL2
DDR2-VREF-CTRL3

3S0V

2S24

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DQ
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

1%

DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D6
DDR2-D5
DDR2-D4
DDR2-D7
DDR2-D8
DDR2-D9
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15
DDR2-D16
DDR2-D17
DDR2-D19
DDR2-D18
DDR2-D22
DDR2-D23
DDR2-D20
DDR2-D21
DDR2-D24
DDR2-D30
DDR2-D26
DDR2-D25
DDR2-D28
DDR2-D31
DDR2-D27
DDR2-D29

M0

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13
DDR2-A14

IS42
261R

0
1
DM
2
3

J1
J3
K1
G4
L3
G3
L2
H5
L1
J5
J2
M3
J4
M2
K5

100p

D1
D5
R3
T5

0
1
2
3
4
5
6
7
A 8
9
10
11
12
13
14

100n
2S25

DDR2-DQM0
DDR2-DQM1
DDR2-DQM2
DDR2-DQM3

MEMORY

0
1 BA
2

100n
2S17

DDR2-BA2

H1
H2
G1

DDR2-BA0
DDR2-BA1

100p
2S20

7S00-8
PNX85500

2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
A 3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
B 3S30 C7
3S33 C8
3S6P E10
3S6Q E10
7S00-8 B6
C FS01 D3
FS02 D2
IS42 E8

10

11

PNX85500

2009-12-07

8204 000 8950


18770_512_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-17-3

Q552.1E LA

10.

EN 165

PNX Digital Video In

B02C
1

PNX Digital Video In


2

B02C

10

11

12

13

14

2S2E F5
3S0W E5
7S00-6 D6
IS01 E6
IS10 E7

D
7S00-6
PNX85500
T25
T26

HDMIA-RX1+
HDMIA-RX1-

U25
P
U26
RX1_A
N

DDCA-SCL
DDCA-SDA
IS10

W25
P
RXC_A
W26
N

HDMIA-RXC+
HDMIA-RXC+3V3

P
RX0_A
N

Y26
SCL
DDC_A
Y25
SDA
V25
P
RX2_A
V26
T24
N
HOT_PLUG_A

HDMIA-RX0+
HDMIA-RX0-

HDMI_DV

HDMIA-RX2+
HDMIA-RX2-

IS01

3S0W

W24

RREF

10u

RES

2S2E

12K

10

11

12

13

14
6

PNX85500

2009-12-07

8204 000 8950


18770_513_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-17-4

Q552.1E LA

10.

EN 166

PNX Audio

PNX Audio

B02D

B02D

10

11

12

13

14

A
3S0Z
+2V5-AUDIO

3S53-1

+24V-AUDIO-POWER
4R7

100R
3S53-2

1 22K

22K

3S17-1

8
10K

2S33

7
10K

2S32

8
2

1u0

D
IS1B

1u0

IS1A
3S3F

AF5
DBS8

AE5

220n

2S3J
RES

2S2S

100n

2S34

8
3S3G-3

ADAC(2)

IS03

ADAC(2)

10

33R

AD7
AE7
AF7
AD6
AE6
AF6

4 3S3G-4 5
33R

7S05-3
LM324 8

3S39

-AUDIO-R

100R
11

3S3G-2
2
7

IS1S

ADAC(1)
3

ADAC(3)

33R

ADAC(4)

3S3H

3 3S36-3 6

10K

10K

5 3S36-4 4
2S2H

ADAC(5)

33R
3S3U

47p

ADAC(6)

+24V-AUDIO-VDD

33R

SPDIF_OUT
SPDIF_IN1

IS07
3

ADAC(5)

9S06

100n

10u
2S3G

100n
2S3H

2S3F

10u
2S3E

56R

33R

AF8
L
AIN5
AE8
AD4
R
OSCLK
AD1
I2S_OUT
SCK
AB9
AD2
POS
WS
VR_AADC
AB8
NEG
AE1
1
AD8
AF2
VREF_AADC
2
AE3
I2S_OUT_SD 3
AC8
AF3
VCOM_AADC
4

3S10
100R

2S2L

3S3G-1

AC6
P
AB6
N

1
2
3
ADAC
4
5
6

AD9
L
AIN4
AC9
R

IS19

ADACR

AE9
L
AIN3
AF9
R

1u0
3S17-2

2 3S13-2

AUDIO-IN4-R

AD10
L
AIN2
AC10
R

1u0
1

1
IS1N

1u0

1n0

AUDIO-IN4-L

AUDIO
AC7
AE10
L
P
AIN1
ADACL
AB7
AF10
R
N

2S30

22K
3S13-1

+24V-AUDIO-VDD
2S36

1n0
2S38

6
10K

47p

7S00-2
PNX85500

1n0
2S39

3
3S17-3

3S13-3

+AUDIO-L

11

10K

1u0

3S38
100R

8 3S36-1 1
2S2G

2S31

7S05-4
LM324 14

13

10K

1n0
2S3A

AUDIO-IN3-R

22K

4
IS02

2 3S36-2 7

1n0
2S3B

22K

12

ADAC(1)

1u0

2S3D

+2V5

2S2Y
1u0

4 3S17-4 5
10K

IS0R

3S14

100u 4V

10K

1u0

3S16-4 5

22K
3S13-4

AUDIO-IN3-L

IS13

2S2Z

2S41

FS03

COM

6
10K

IS0V

4 3S12-4

INH

100R

22K
AUDIO-IN2-R

IN

BP

1n0
2S3C

3S16-3 3

OUT

1u0

3S12-3 6

5
IS12

2S2V

22K
AUDIO-IN2-L

FS08

100n

7
10K

100R
3S53-4

2S2T

2 3S12-2

AUDIO-IN1-R

3S53-3

1u0

4R7
2S42

2
3S16-2

2S2W

10u

22K

10u

100R

1 3S16-1 8
10K

7S08
LD3985M25

2S2R

3S12-1

3S51

1
AUDIO-IN1-L

+24V-AUDIO-VDD

+3V3

7S05-1
LM324 1

AUDIO-OUT-L

11

3S37

3S6L

10K

22K
2S2K

+3V3

47p

+3V3-ARC

+24V-AUDIO-VDD
3S11

IS1L

100n

2S3Q

1R0
5

ADAC(6)

IS06

7S05-2
LM324 7

AUDIO-OUT-R

2S3K

1 3S18-1 8

IS1G

SPDIF-OUT

220R

100n
7

+3V3
+3V3

220R

&

3 3S18-3 6

IS1D

220R

SPDIF-OUT-PNX

2 3S18-2 7

SPDIF-OUT-PNX

11
14

7S09-1
74LVC00APW
1

3S34

3S32

10K

22K
2S2J
47p

IS1E

SEL-HDMI-ARC

&
6

14

7S09-3
74LVC00APW
9

&
8

5
+3V3

10

2S3L

180R

100n

3S6M

IS1K

2S3M

IS44
eHDMI+

100n
68R

3S25

+3V3-ARC
14

10K

3S19

+3V3-ARC
7S09-2
74LVC00APW
4

14

+3V3-ARC
7S09-4
74LVC00APW
12

&
11

13
7

+3V3

10

11

12

13

2S2G C12
2S2H D12
2S2J G12
2S2K F12
2S2L D4
2S2R B7
2S2S B9
2S2T B8
2S2V B3
2S2W B3
2S2Y C3
2S2Z B3
2S30 C3
2S31 C3
2S32 D3
2S33 C3
2S34 B9
2S36 C6
2S38 E9
2S39 E9
2S3A E8
2S3B E8
2S3C E8
2S3D E8
2S3E E3
2S3F E2
2S3G E3
2S3H E3
2S3J B11
2S3K G6
2S3L H8
2S3M H9
2S3Q G5
2S41 C6
2S42 C6
3S0Z A11
3S10 D4
3S11 F5
3S12-1 B2
3S12-2 B2
3S12-3 B2
3S12-4 C2
3S13-1 C2
3S13-2 D2
3S13-3 C2
3S13-4 C2
3S14 B9
3S16-1 B3
3S16-2 B3
3S16-3 B3
3S16-4 C3
3S17-1 C3
3S17-2 D3
3S17-3 C3
3S17-4 C3
3S18-1 G7
3S18-2 G8
3S18-3 G8
3S19 H5
3S25 H9
3S32 G12
3S34 G11
3S36-1 C12
3S36-2 B11
3S36-3 D11
3S36-4 D12
3S37 F11
3S38 B13
3S39 C13
3S3F E4
3S3G-1 C7
3S3G-2 D8
3S3G-3 C8
3S3G-4 D7
3S3H D7
3S3U D8
3S51 C6
3S53-1 A6
3S53-2 B6
3S53-3 B6
3S53-4 B6
3S6L F12
3S6M H8
7S00-2 C5
7S05-1 E12
7S05-2 G12
7S05-3 C12
7S05-4 B12
7S08 B8
7S09-1 G6
7S09-2 H6
7S09-3 H7
7S09-4 I7
9S06 E4
DBS8 E4
FS03 B12
FS08 B7
IS02 B11
IS03 C11
IS06 G11
IS07 E11
IS0R C2
IS0V C2
IS12 B8
IS13 B9
IS19 D3
IS1A D3
IS1B D4
IS1D G5
IS1E H5

IS1G G7
IS1K H9
IS1L F5
IS1N C7
IS1S D7
IS44 H9

14

PNX85500

2009-12-07

8204 000 8950


18770_514_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

B02E

10K
3S82 RES

+3V3
+3V3
+3V3

3S80
3S81

10K

3S21
+3V3
10K
3S62

10K
10K

DS52
BOOST-PWM
FS10 TXD2-MIPS
FS11 RXD2-MIPS
PNX-SPI-CS-AMBIn

IS04
PNX-SPI-CS-BLn

+3V3

R26
DN
R25
USB
IS4Z R24 DP
RREF

USB-DM
USB-DP

FS64

SELECT-SAW

B26
SDA
2
A25
SCL

1 3S58 2
100R

B25
SDA
3
A24
SCL

1 3S5Y 2
100R

B24
SDA
4
A23
SCL

1 3S60 2
100R

TRSTN
TMS
TCK
TDO
TDI

RESET_SYS

5K6

3S64
+3V3

3S55

10K

BL_PWM

10K
CLK_54_OUT

3S83
+3V3

12

13

14

1
100R
1
100R
1
100R
1
100R

2 3S57

2 3S5W

SDA-SET
SCL-SET

SDA-SET
SCL-SET

3S5Z

SDA-SSB
SCL-SSB

SDA-SSB
SCL-SSB

3S61

SDA-TUNER
SCL-TUNER

AA25
AA24
AA23
AB26
AB25

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

3S00

AE4

3S69

SDA-UP-MIPS
SCL-UP-MIPS

3S6A

4K7

3S6C

4K7
3S6B

4K7

3S6D

2K2

3S6F

4K7

4K7

3S6E

SDA-TUNER
SCL-TUNER

1F10

2K2

3S6G

FS44

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDI-PNX85500

FS49
FS50
FS51
FS52

EJTAG-DETECTn

FS53
10 9

1
2
3
4
5
6
7
8

FOR FACTORY
USE ONLY

4K7

3S6K

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

10K
8 3S6H-1
3
6 3S6H-3
10K
2
10K

1
10K

FS57

+3V3-STANDBY

+3V3

BM08B-SRSS-TBT

7 3S6H-2
5 3S6H-4
4
10K

RESET-SYSTEMn

33R

AD5

BACKLIGHT-PWM

AC5
10K

GPIO1

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_11

SDA-UP-MIPS
SCL-UP-MIPS

3S27

+3V3

Y21
Y22
Y23
Y24
W21
W22
W23
V22
V23
U23

BOOTMODE
GPIO1
RXD1-MIPS
TXD1-MIPS
RXD2-MIPS
TXD2-MIPS
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
BOOST-PWM
SELECT-SAW

10K

BOOTMODE

3S26

3S45
10K
3S40

C25
SDA
1
C26
SCL

1 3S56 2
100R

3S6J

IS05

+3V3

11

10

+3V3

7S00-3
PNX85500

CONTROL

EN 167

PNX Mips

B02E

10.

PNX Mips

10K

10-17-5

Q552.1E LA

RXD1-MIPS

10K
3S84
+3V3

+3V3
TXD1-MIPS

+3V3
IS40

3S72

PXCLK54

10K
47R

RES

D
+3V3
2S89
100n

VDD

+3V3

7S01
PCA9540B

SCL-SET

SCL

SDA-SET

SDA

INP
FIL

I 2 C
-BUS
CTRL

SC0

SCL-DISP

SC1

SCL-BL

SD0

SDA-DISP

SD1

SDA-BL

SCL-DISP

3S65

3S66 4K7
1
3S67 4K7
2
1
4K7
3S68
2
1
4K7
2

SCL-BL
SDA-DISP
SDA-BL

VSS

FS31

9S10
IS08

SCL-SET

SDA-SET

IS09

SCL-BL

9S11

FS2W

SCL-DISP

9S12

FS2Y

SDA-DISP

9S13

1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
3S56 A5
3S57 A6
3S58 A5
3S5W B6
3S5Y B5
3S5Z B6
3S60 B5
3S61 B6
3S62 B1
3S64 C1
3S65 E11
3S66 E11
3S67 E11
3S68 E11
3S69 A9
3S6A A8
3S6B A9
3S6C B8
3S6D B9
3S6E B8
3S6F B9
3S6G B8
3S6H-1 B8
3S6H-2 B9
3S6H-3 B9
3S6H-4 B9
3S6J C5
3S6K B9
3S72 C6
3S80 B1
3S81 B1
3S82 B1
3S83 C1
3S84 C1
7S00-3 A4
7S00-4 G12
7S01 E8
9S10 F8
9S11 F8
9S12 F8
9S13 F8
DS52 B2
FS10 B2
FS11 B2
FS2W F9
FS2Y F9
FS31 F8
FS44 A12
FS49 A12
FS50 A12
FS51 B12
FS52 B12
FS53 B12
FS57 B12
FS64 C2
IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12

SDA-BL

7S00-4
PNX85500

10

11

ETHERNET

ETH-RXCLK

AA3

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

Y5
0
Y6
1
AB4
RXD ETH
2
AC1
3

IS50

RXCLK

ETH-RXDV
ETH-RXER

AC2
RXDV
Y4
RXER

SDIO-DAT3
SDIO-CLK
SDIO-CMD
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP

W2
W1
W6
W5
W4
W3
U6
V6

12

TXCLK
0
1
2
3
TXEN
TXER
COL
CRS
MDC
MDIO

TXD
ETH

CC_DAT3
CLK
CMD
0
SDIO
1 DAT
2
SDCD
SDWP

AA2

ETH-TXCLK

AA1
AA4
AB1
AB2
AA5
AB3
AC3
Y2
Y3
Y1

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)
ETH-TXD(3)
ETH-TXEN
ETH-TXER
ETH-COL
ETH-CRS
ETH-MDC
ETH-MDIO

13

14

PNX85500

2009-12-07

8204 000 8950


18770_515_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-17-6

Q552.1E LA

10.

EN 168

PNX Video Out - LVDS

B02F
1

PNX Video Out - LVDS


2

B02F
4

10

11

12

13

14
7S00-7 C8

7S00-7
PNX85500

PX1APX1A+

A7
B7

PX1BPX1B+

C8
B8

PX1CLKPX1CLK+

C10
N
CLK
B10
P

PX1CPX1C+

A9
B9

PX1DPX1D+
PX1EPX1E+

N
A
P

LVDS

N
B
P

N
P

N
P

D7
E7

PX3APX3A+

E8
D8

PX3BPX3B+

E10
N
CLK
D10
P

PX3CLKPX3CLK+

LOUT1 LOUT3
C

N
P

D9
E9

PX3CPX3C+

A11
N
D
B11
P

D11
N
E11
P

PX3DPX3D+

C12
N
E
B12
P

E12
N
E
D12
P

PX3EPX3E+

PX2APX2A+

A14
N
A
B14
P

D14
N
E14
P

PX4APX4A+

PX2BPX2B+

C15
N
B
B15
P

E15
N
D15
B
P

PX4BPX4B+

PX2CLKPX2CLK+

C17
N
CLK
B17
P

E17
N
CLK
D17
P

PX4CLKPX4CLK+

PX2CPX2C+

A16
B16 N
C
P
A18
B18 N
D
P
C19
B19 N
E
P

D16
N
E16
P

PX4CPX4C+

D18
N
E18
P

PX4DPX4D+

E19
N
E
D19
P

PX4EPX4E+

PX2DPX2D+
PX2EPX2E+

N
C
P

LOUT2 LOUT4

10

11

12

13

14

PNX85500

2009-12-07

8204 000 8950


18770_516_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 169

PNX Stand-by Controller

PNX Stand-by Controller

B02G
1

B02G
3

+1V1

10

11

13

12

POL

10-17-7

Q552.1E LA

2S13

100n

1u0
2S10

30R

RES
5S04

IS3B

2S37
9S24
RES

1u0

2S11
100n

IS20

DS50

3S1E
10K
+3V3-STANDBY

3S3L

10K

3S3M
10K
3S3P
10K
RES 3S3S
10K
3S3T
10K

+3V3-STANDBY
3S1H
10K

RES
10K
3S3N RES
10K
3S3Q RES
10K
3S3R
10K RES

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

3S1G

RXD-UP
TXD-UP

10K
3S2A RES

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

AD19
0
AE19
1
AF19
2 P1
AA20
3
AB20
7

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

AC20
0
AD20
1
AE20
2
AF20
3
P2
AA21
4
AB21
5
AC21
6
AD21
7

DETECT2

RESET-SYSTEMn

10K
3S1J

KEYBOARD

100K

2S4E
100n

3S1L

SPI-PROG

10K

RESET_IN
EA
ALE
PSEN
MC

SPI

AF22
4
AE22
P6
5

SPI-PROG
PNX-SPI-WPn

+3V3-STANDBY

54M

1S02

10p

AF17
AA26

RESET-STBYn

AB24

EA

AB23

ALE

AC26

PSEN

AC23
SDA
AC24
SCL

AD26
0
AC25
PWM
1

AD23
0
AE26
1
P5
AE25
2
AE24
3

RESET-SYSTEMn
AV2-BLK
AV1-BLK
KEYBOARD
LIGHT-SENSOR
AV1-STATUS
AV2-STATUS

AE17

10p
2S4F

AF26

AC17
XTAL_IN
XTAL_OUT

STANDBY

AE21
0
AF21
1
AA22
2
P3
AB22
3
AC22
4
AD22
5

RXD-UP
TXD-UP
DETECT2

10K
3S1K RES

VDD_XTAL

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

1
7S00-9
PNX85500

3S2F
100R

100R

3S2G

100R

3S2K

3S2H
100R

EA
ALE
PSEN

SDA-UP-MIPS
SCL-UP-MIPS

IS3F

3S44

IS3E

10K

3S43

IS3D

10K 3S42

10K

RES

SDA-UP-MIPS
SCL-UP-MIPS

3S6V
4K7
RES

LED1

LED1
LED2

AE23
SDO
AF25
SDI
AF24
CLK
AF23
CSB

3S6W

IS2V
IS2Z

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

4K7

3S1P

LED2

10K

RES

3S41
10K

PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
PNX-SPI-CSBn

AB17
0
AA18
1
AD18
2
AE18
3
P0
AF18
4
AA19
5
AB19
6
AC19
7

AD17

10K
3S1D
27K

RES
10K
RES
3S1F

VDDA_ADC2V5

2S4D
1n0

3S1B
3S1C

VSS_XTAL

+3V3-STANDBY

VDDA_1V1_DCS

AA17

2S4G

D
RES
10K
RES 3S3Y
10K

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

10K

3S2L

3S2S
RES
3S3W
4K7

3S46

RES
10K
RES
10K

+3V3-STANDBY

3S47
3S2M
RES
3S49

10K
4K7

1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
2S4D C3
2S4E E2
2S4F B9
2S4G B9
2S4K G10
3S1B C2
3S1C C1
3S1D C2
3S1E C1
3S1F C2
3S1G D2
3S1H D1
3S1J D2
3S1K D1
3S1L E2
3S1P D11
3S2A D2
3S2F D7
3S2G D7
3S2H D7
3S2K D7
3S2L D10
3S2M E10
3S2S E10
3S2V F11
3S3L C2
3S3M C1
3S3N C2
3S3P C1
3S3Q C2
3S3R D2
3S3S D1
3S3T D1
3S3W E9
3S3Y D9
3S41 D12
3S42 C11
3S43 C11
3S44 C11
3S46 D10
3S47 E10
3S49 E10
3S6V C11
3S6W D12
5S04 B6
7S00-9 B6
7S20 G10
9S0D G9
9S0E G9
9S24 B6
DS50 B8
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10

7S20
NCP303LSN28
2

FS45
1

INP

IS2U
5

OUTP
CD

FS0Z

RESET-STBYn

NC GND

100n

2S4K

RES

9S0D

10K

1 3S2V 2

+3V3-STANDBY

9S0E

+3V3-STANDBY

10

11

12

13
6

PNX85500

2009-12-07

8204 000 8950


18770_517_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-17-8

Q552.1E LA

10.

EN 170

PNX Power

PNX Power

B02H
1

B02H

10

11

13

12

14

5S80

IS3Q

2S5A

RES 10u

100n

2S6A

+1V1
30R

5S81

2S5B

RES 10u

30R

100n

2S6B

+2V5

5S82

IS3S

100n

100n
2S68

100n
2S67

+3V3
2S5D

2S4M

100n

U22

10u

VDDA_2V5_USB
VDDA_2V5_VADC
VDDA_2V5_VDAC
VDDA_3V3_USB

100n
100n

2S4W

2S4Y

RES 1u0

+2V5

10u

2S50

100n

2S4Z

+1V2

10u

100n

AA7

6.3V

5S84
30R
c000

SENSE+1V2

Y17
D13
T20

POL

Y13

+2V5-AUDIO

Y10

100n

VDDA_2V5_LVDS_BG

30R

30R

2S46

VDDA_2V5_DCS

5S95

Y12
AA9
2S52

VDDA_2V5_ADAC

VSSA_USB

+1V1

2S51

VDDA_2V5_AADC

5S83

IS3L

AA15
Y15
AA13

VDDA_2V5

VSSA_2V5_LVDS_BG

10u

100n

1
10u
2S4U

IS3K
B13

VDDA_1V1_LVDS_PLL

R21

+2V5-AUDIO
100n

2S45

VDD_1V1_DDR

2S6P

2
100n
2S6C

2
100n
2S6N
1

2
2S6F

100n
1 2S6G 2

Y19
Y18

VDD_3V3_SBY

VDDA_1V2

+3V3

30R

+3V3-STANDBY
2S4V

VDD_1V1

5S85

W20
P20
M20
K20
V7
Y8

VDD_3V3

100n

2S4N

C7
C9
C11
C14
C16
C18

2S4P

+2V5-LVDS

N6
N7

VDD_2V5_LVDS

220u 6.3V

100n
2S6E 2

2S6D
1

U20
U21

+2V5

30R

R20

HDMI_VDDA_2V5

VDD_2V5

C13

1u0

2S21

RES

HDMI_VDDA_1V1

V20
V21

HDMI_VDDA_3V3_TERM

VSSA_1V1_LVDS_PLL

30R
2S4S

G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

J7
2

+1V1

VSS

VDD

A13

100u 2.0V

5
100n

100n
2S5J-4
4

5S94

100n

VSS

VSS

2S5P

VSS

M7
N2
N20
P10
P12
P14
P16
P18
P4
P6
P7
T10
T12
T14
T16
T18
T2
T6
T7
U4
V10
V12
V14
V16
V18
V2
Y20

10u

VSSA

VDD_1V8

U24
V24 HDMI_AGND

47u

2S23

5
100n

100n
2S5H-4

100n
2S5H-3
3
2

100n
2S5J-2

2
100n
2S5J-1 8

4
5

100n
2S5J-3 6

100n
2S5K-4
4

6
100n
2S5K-3

2S29

AA16
AA8
Y11
Y14
Y16
Y9

100n
2S5K-2

2S5K-1
1

8
100n
2S5H-2

100n
2S5H-1

100n
2S5G-4

6
100n
2S5G-3

7
2

100n
2S5G-2

2S5G-1
1

22u

22u
2S4R

100n

2S4Q

100n

2S27

2S28

100n

2S43

A1
A10
A12
A15
A17
A19
A26
A3
A8
B1
B20
C20
C4
D2
D20
E13
E20
E4
F10
F12
F14
F16
F18
F20
F8
G10
G12

AF1
AE2
AD3
AC4
AB5
H20
F11
G11
F13
G13
F15
G15
F17
G17
F19
G19
J9
J11
J13
J15
J17
L9
L11
L13
L15
L17
N9
N11
N13
N15
N17
R9
R11
R13
R15
R17
U9
U11
U13
U15
U17
J6
AA6
Y7
W7
F9
G9

+1V1

30R

5S93
L6
L7
R6
R7
U7
A5
A6
B5
B6
C6
D6
E6
F6
G6
F7
G7

7S00-10
PNX85500

7S00-12
PNX85500

RES 10u

c001

SENSE+1V1

100n

2S5C

100n
2S66

100n
2S65

100n
2S64

100n
2S63

100n

2S62

100n
2S61

47u
2S60

2S26

+1V8

5S87

2S21 F6
2S23 B6
2S26 A6
2S27 B3
2S28 B3
2S29 C6
2S43 B2
2S45 F11
2S46 F11
2S4M B12
2S4N C11
2S4P C11
2S4Q B3
2S4R B4
2S4S F5
2S4T H11
2S4U D11
2S4V D11
2S4W D11
2S4Y D11
2S4Z E11
2S50 E11
2S51 E9
2S52 E9
2S53 H11
2S55 G11
2S56 G11
2S57 G11
2S58 H11
2S59 I11
2S5A A11
2S5B A11
2S5C B11
2S5D B11
2S5G-1 B4
2S5G-2 B4
2S5G-3 B4
2S5G-4 B5
2S5H-1 B5
2S5H-2 B5
2S5H-3 B5
2S5H-4 B5
2S5J-1 C5
2S5J-2 C5
2S5J-3 C5
2S5J-4 C5
2S5K-1 C4
2S5K-2 C4
2S5K-3 C4

2S5K-4 C5
2S5M G11
2S5P F5
2S60 A6
2S61 A6
2S62 A7
2S63 A7
2S64 A7
2S65 A7
2S66 A7
2S67 A8
2S68 A8
2S6A A11
2S6B A11
2S6C C11
2S6D B11
2S6E B11
2S6F C11
2S6G C11
2S6H H11
2S6K H11
2S6L I11
2S6M I11
2S6N C11
2S6P C12
2SHW I11
5S80 A12
5S81 A12
5S82 A12
5S83 D12
5S84 E12
5S85 C12
5S87 F12
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12
5S94 F5
5S95 E10
7S00-10 B6
7S00-12 C1
IS3K D10
IS3L D10
IS3Q A10
IS3S A10
IS58 I10
c000 E13
c001 B5

+2V5
1u0

2S56

100n

2S55

30R

5S88
10u

100n
2S57

2S5M

+2V5-LVDS
30R

10u

100n
2S58

100n
2S6K

+2V5
30R

2S6H

5S89

5S90
+2V5
10u

100n

2S53

2S4T

100n

2SHW

30R

I
5S92

10

11

1u0

100n
2S59

2
100n
2S6L

+3V3
30R

2S6M

IS58

12

13

14
6

PNX85500

2009-12-07

8204 000 8950


18770_518_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 171

PNX Analog Video

PNX Analog Video


3

10

11

13

12

2S87

AV1-CVBS

9S17

2S8A

2S7J

AV1-R

2S22

3S4J

56R

22n

C-SVHS
22n

EU: SCART1

CVBS-MON-OUT1

56R

3S4L

22n

560R

3S5E

2S7K

AV1-B

Y-SVHS

22n
47R

Connectivity

3S59

47R

22n

AP:

14

3S5B

B02I

56R

B02I

3S05

10-17-9

Q552.1E LA

B
3S08

560R

47p

2S7H

2S40

IS4V

22n

10n
2S7L
56R

3S4P

AV3-Y

22n

AF15
AE15
AC15
AD15

2S8G

AV2-CVBS

47R

3S5L

22n

AB14
AF14
AE14
AC14
AD14

2S7Q

YPBPR2-SYNCIN2

10n

2S7R

AV4-Y

56R

22n
3S4U

SCART2
YPBPR2

P
SCL VGA_EDID
TUNER N
SDA

AF11
AE11
AB10
AA11
AC16
AB16
AB13
AB12
AA12
AA10

IS5E

3S5S
10K

IS5D
IS5F
IS5G
IS5H
IS5J

3S75

AD12
AB11

BS15

AE12
AF12

BS09

BS17

56R

PNX-IF-AGC

47K

BS10

IS11

3S76
10n

AA14

PNX-RF-AGC

47K

3S4W

22n

2S14

BS13

AGND
AV4-PR

2S16
22n

AD11
AC11

+CVBS
2S7U

2S15
22n

IS5C

22n

AC12
AF13

2S76

EU:
AP:

AF16
AD16
AE16
AB18
AC18
AF4
AD24
AD25

CVBS_Y1 ATV_CVBS_Y3
R
C3
B AV1
G
CVBS_Y7
C7
SYNCIN1
Y_G1
CVBS1_OUT
PR_R_C1
CVBS2_OUT
PB_B1
RESREF
CVBS_Y2
CURREF
SYNCIN2
Y_G2
1
PR_R_C2
2
PB_B2
3
REF 4
5
R
G VGA
6
B
HSYNC_IN
IF_AGC
RF_AGC
IN
VSYNC
OUT

22n

22n

2S18
22n

ANALOG_VIDEO
AB15
AC13
AD13
AE13

2S19

56R

3S4T

AV3-PB

7S00-1
PNX85500
2S7P

10n

YPBPR1

2S75

56R

YPBPR1

3S4R

AP:

22n

2S7N

AV3-PR

2S7M

YPBPR1-SYNCIN1

EU:

8K2

IS4W
3S09

56R

3S4K

AV1-G

2S77

PNX-IF-P

10n

2S7E
56R

3S4G

AV4-PB

22n

2S78

PNX-IF-N

10n

2S84
56R

3S50

R-VGA

22n

2S85
56R

3S52

G-VGA

22n

2S86

VGA-SDA-EDID

1 3S5V-1 8

100R

3 3S5V-3 6

2 3S5V-2 7

VGA-SCL-EDID

100R

100R
3 3S5T-3 6

4 3S5V-4 5

V-SYNC-VGA

100R

1 3S5T-1 8

100R

H-SYNC-VGA

2 3S5T-2 7

AP: VGA

22n
4 3S5T-4 5

56R

EU: VGA

3S54

B-VGA

100R

100R

VGA-SCL-EDID-TCON

9S14

VGA-SDA-EDID-TCON

9S15

100R

*
*

*
4

= TCON ONLY

10

11

12

13

14

2S14 D12
2S15 D12
2S16 D12
2S18 D12
2S19 D12
2S22 A11
2S40 B11
2S75 F11
2S76 F11
2S77 F12
2S78 G12
2S7E G6
2S7H B6
2S7J A6
2S7K B6
2S7L C6
2S7M C6
2S7N D6
2S7P D6
2S7Q E6
2S7R F6
2S7U F6
2S84 G6
2S85 H6
2S86 H6
2S87 A6
2S8A A11
2S8G E6
3S05 A11
3S08 B11
3S09 C11
3S4G G6
3S4J A6
3S4K C6
3S4L B6
3S4P D6
3S4R D6
3S4T D6
3S4U F6
3S4W F6
3S50 H6
3S52 H6
3S54 I6
3S59 A6
3S5B A11
3S5E B11
3S5L E6
3S5S E9
3S5T-1 I5
3S5T-2 I11
3S5T-3 I5
3S5T-4 I11
3S5V-1 I5
3S5V-2 I12
3S5V-3 I5
3S5V-4 I12
3S75 E12
3S76 F12
7S00-1 D8
9S14 I3
9S15 I3
9S17 A13
BS09 F9
BS10 F10
BS13 E9
BS15 F9
BS17 F10
IS11 F13
IS4V B10
IS4W C10
IS5C D9
IS5D E9
IS5E E9
IS5F E9
IS5G E9
IS5H E9
IS5J E9

PNX85500

2009-12-07

8204 000 8950


18770_519_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 172

10.18 B02 820400089507 PNX85500


10-18-1

PNX NandFlash - Conditional Access

B02A
1

PNX NandFlash - Conditional Access


3

B02A

10

11

12

13

14

A
7S00-5
PNX85500

FLASH

NAND-ALE
NAND-CLE

D22
ALE
NAND
C21
CLE

XIO-A00
XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07
XIO-A08
XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14
XIO-A15

J25
J26
H21
H22
H23
H24
H25
H26
G21
G22
G23
G24
G25
G26
F22
F23

IS25

00
01
02
03
04
05
06
07
XIO_A
08
09
10
11
12
13
14
15

D25
D26
C24
D23
C23
B23
A22
E22
F24
F25
F26
E23
E24
E25
E26
D24

XIO-D00
XIO-D01
XIO-D02
XIO-D03
XIO-D04
XIO-D05
XIO-D06
XIO-D07
XIO-D08
XIO-D09
XIO-D10
XIO-D11

B22
OE_
C22
XIO
WE_

XIO-OEn
XIO-WEn

00
01
02
03
04
05
06
07
XIO_D
08
09
10
11
12
13
14
15

CLK_BURST

INPACK
XIO-D14
XIO-D15

B
IS26

INPACK

3S15
10K

B21

E21
CE1_
D21
CE2_
A20
NAND RDY2
F21
RDY1
A21
WP_

NAND-CE1n

NAND-RDY1n
NAND-WPn

9S08
IS00

7S00-11
PNX85500
CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7

3S01-1 8
33R
3S01-3 6

7 3S01-2 2
3 33R
33R 5 3S02-4 4
7 3S02-2 2
33R
33R 8 3S02-1 1
6
3 33R
3S01-4
3S02-3
4
33R 5
33R

P21
P22
P23
P24
P25
P26
N21
N22

CA-ADDENn

J22

CA-DATADIR

K25

*
CA-DATAENn

K26

+3V3
2S09
100n
7S02
74LVC1G08GW
1

CA-MICLK

3S03

N23
10R

L25

CA-MOCLK
3S04

4
2

9S01

N24
3S31

33R

N25

CA-MIVAL
CA-MISTRT
CA-MOSTRT
CA-MIVAL

33R

L22
L23

CA-MOVAL

J21

CA-RDY

L24

CA-RST

L26
J23
J24

VIDEO_STREAM

0
1
2
3
MDO
4
5
6
7

0
1
2
3
MDI
4
5
6
7

N26
M21
M22
M23
M24
M25
M26
L21

CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

2S09 F3
3S01-1 E5
3S01-2 E6
3S01-3 E5
3S01-4 E6
3S02-1 E6
3S02-2 E6
3S02-3 E5
3S02-4 E6
3S03 F6
3S04-1 F6
3S04-2 F3
3S15 B9
3S1R F10
3S1S F10
3S1T G10
3S1U G10
3S23 G10
3S24 G10
3S28 G10
3S29 G10
7S00-11 E7
7S00-5 A7
7S02 F2
9S00 F8
9S01 F4
9S08 C8
IS00 C8
IS25 C6
IS26 B9

ADD_EN
DATA_DIR

VS

K23
1
K24
2

CD

K21
1
K22
2

DATA_EN
I
MCLK
O

CA-VS1n
CA-MOCLK

9S00
RES

CA-CD1n
CA-CD2n

CA

+3V3

MISTRT
MIVAL

TS-FE-DATA

3S1R

MOSTRT

TS-FE-CLOCK

3S1S

MOVAL

TS-FE-VALID

3S1T

OOB_EN

TS-FE-SOP

3S1U

560R
560R
560R
560R

RDY
RST
VCCEN
VPPEN

TS-FE-DATA

T21
DATA
T23
ERR
T22
TNR_SER1 MICLK
R23
MIVAL
R22
SOP

TS-FE-ERR
TS-FE-CLOCK
TS-FE-VALID
TS-FE-SOP

TS-FE-VALID

3S23
RES
3S24
RES
3S28

TS-FE-SOP

3S29

TS-FE-DATA
TS-FE-CLOCK

G
470R
470R
470R
470R

10

11

12

13

1X06
EMC HOLE

14
7

PNX85500

2010-03-03

8204 000 8950


18770_976_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-18-2

Q552.1E LA

10.

EN 173

PNX SDRAM

B02B

PNX SDRAM
1

B02B
2

10

11
2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
3S06 D3
A 3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
3S6P E10
B 3S6Q E10
7S00-8 B6
FS01 D3
FS02 D2
IS42 E8

FS02

2S12

100u 2.0V

3S06

180R 1%

3S20

180R 1%

+1V8

DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D6
DDR2-D5
DDR2-D4
DDR2-D7
DDR2-D8
DDR2-D9
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15
DDR2-D16
DDR2-D17
DDR2-D19
DDR2-D18
DDR2-D22
DDR2-D23
DDR2-D20
DDR2-D21
DDR2-D24
DDR2-D30
DDR2-D26
DDR2-D25
DDR2-D28
DDR2-D31
DDR2-D27
DDR2-D29

F3
C2
F2
C3
B4
F1
C1
E1
F4
B2
E5
C5
A4
G5
B3
F5
U3
P2
U2
P3
N1
U1
P1
T1
V4
R5
U5
P5
N3
V3
R4
V5

FS01

3S07

DDR2-VREF-CTRL2
180R 1%

3S22

180R 1%

DDR2-VREF-CTRL3

CLK

N
P

DQS0

N
P

DQS1

N
P

DQS2

N
P

DQS3

N
P

CASB
CKE
CSB
ODT
PCAL
RASB
WEB
1
VREF
2

10R

DDR2-CLK_N
DDR2-CLK_P

3S30

N5
N4

3S33
10R

E2
E3

DDR2-DQS0_N
DDR2-DQS0_P

D3
D4

DDR2-DQS1_N
DDR2-DQS1_P

R1
R2

DDR2-DQS2_N
DDR2-DQS2_P

T3
T4

DDR2-DQS3_N
DDR2-DQS3_P

K3
K4
L5
M4
M1
M5
H3

DDR2-CAS
DDR2-CKE
DDR2-CS
DDR2-ODT
DDR2-RAS
DDR2-WE

A2
V1

DDR2-CKE

3S6Q
10K

DDR2-ODT

3S6P
10K

DDR2-VREF-CTRL2
DDR2-VREF-CTRL3

3S0V

2S24

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DQ
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

M0

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13
DDR2-A14

1%

0
1
DM
2
3

J1
J3
K1
G4
L3
G3
L2
H5
L1
J5
J2
M3
J4
M2
K5

IS42
261R

D1
D5
R3
T5

0
1
2
3
4
5
6
7
A 8
9
10
11
12
13
14

100p

DDR2-DQM0
DDR2-DQM1
DDR2-DQM2
DDR2-DQM3

MEMORY

0
1 BA
2

100n
2S25

H1
H2
G1

100n
2S17

DDR2-BA2

100p
2S20

7S00-8
PNX85500
DDR2-BA0
DDR2-BA1

10

11

PNX85500

2010-03-03

8204 000 8950


18770_977_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-18-3

Q552.1E LA

10.

EN 174

PNX Digital Video In

B02C
1

B02C

PNX Digital Video In


2

B02C
4

10

11

12

13

14

B02C

PNX 85500 : DIGITAL VIDEO IN

2S2E F5
3S0W E5
7S00-6 D6
IS01 E6
IS10 E7

D
7S00-6
PNX85500
T25
T26

HDMIA-RX1+
HDMIA-RX1-

U25
P
RX1_A
U26
N

DDCA-SCL
DDCA-SDA
IS10

W25
P
W26
RXC_A
N

HDMIA-RXC+
HDMIA-RXC+3V3

P
RX0_A
N

Y26
SCL
Y25
DDC_A
SDA
V25
P
RX2_A
V26
T24
HOT_PLUG_A
N

HDMIA-RX0+
HDMIA-RX0-

HDMI_DV

HDMIA-RX2+
HDMIA-RX2-

IS01

3S0W

W24

RREF

10u

RES

2S2E

12K

10

11

12

13

14
7

PNX85500

2010-03-03

8204 000 8950


18770_978_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-18-4

Q552.1E LA

10.

EN 175

PNX Audio

B02D

PNX Audio

B02D

10

11

12

13

14

A
3S0Z
+24V-AUDIO-POWER

+2V5-AUDIO

3S53-1

4R7
100R
3S53-2

220n

2S3J
RES

2S31

AUDIO
AE10
AC7
P
L
AIN1
ADACL
AF10
AB7
N
R

8
10K

2S33

AE9
L
AF9
AIN3
R

1u0
3S17-2

2 3S13-2

7
10K

7
1u0

D
IS1B

1u0

IS1A
3S3F

AF5
DBS8

AE5

ADAC(2)

IS03

ADAC(2)

10

1u0

IS1S

7S05-3
LM324 8

3S39

-AUDIO-R

100R
11

3S3G-2
2
7
4 3S3G-4 5
33R

ADAC(3)

33R

ADAC(4)

3S3H

3 3S36-3 6

10K

10K

5 3S36-4 4
2S2H

ADAC(5)

33R
3S3U

47p

ADAC(6)

+24V-AUDIO-VDD

33R

SPDIF_OUT
SPDIF_IN1

IS07
3

ADAC(5)

9S06

100n

10u
2S3G

100n
2S3H

2S3F

10u
2S3E

56R

3S3G-3
33R

AD7
AE7
AF7
AD6
AE6
AF6

1
2
3
4
5
6

ADAC(1)
3

AC6
P
AB6
N

AF8
L
AIN5
AE8
AD4
R
OSCLK
AD1
I2S_OUT
SCK
AB9
AD2
POS
WS
AB8
VR_AADC
NEG
AE1
1
AD8
AF2
VREF_AADC
2
AE3
I2S_OUT_SD 3
AC8
AF3
VCOM_AADC
4

3S10
100R

2S2L

ADAC

AD9
L
AIN4
AC9
R

2S32

IS19

ADACR

1n0

3S17-1

33R

1n0
2S38

AD10
L
AIN2
AC10
R

1u0
1

1
IS1N

1u0

1n0
2S39

2S30

3S3G-1

1n0
2S3A

6
10K

+24V-AUDIO-VDD
2S36

1n0
2S3B

3
3S17-3

47p

7S00-2
PNX85500

1u0

22K

2S2S

4 3S17-4 5
10K

22K

AUDIO-IN4-R

100n

IS0R

100u 4V

10K
8 3S36-1 1
2S2G

1u0

+AUDIO-L

11

10K

3S38
100R

2 3S36-2 7

3S13-3

1 22K

7S05-4
LM324 14

13

1u0

3S13-1

AUDIO-IN4-L

4
IS02

2S2Y

1n0
2S3C

AUDIO-IN3-R

22K

22K

12

ADAC(1)

IS0V

2S3D

3S14
+2V5

2S2Z

22K

IS13

3S16-4 5
4
10K

3S13-4

AUDIO-IN3-L

FS03

1
3

COM

6
10K

2S41

4 3S12-4

INH

2S34

100R

22K
AUDIO-IN2-R

IN

BP

3S16-3 3

OUT

1u0

3S12-3 6

5
IS12

2S2V

22K
AUDIO-IN2-L

FS08

100n

7
10K

100R
3S53-4

2S2T

2 3S12-2

AUDIO-IN1-R

1u0

4R7
2S42

2
3S16-2

3S53-3

10u

22K

2S2W

10u

100R

1 3S16-1 8
10K

7S08
LD3985M25

2S2R

3S12-1

3S51

1
AUDIO-IN1-L

+24V-AUDIO-VDD

+3V3

7S05-1
LM324 1

AUDIO-OUT-L

11

3S37

3S6L

10K

22K
2S2K

+3V3

47p

+3V3-ARC

+24V-AUDIO-VDD
3S11

IS1L

100n

2S3Q

1R0
5

ADAC(6)

IS06

7S05-2
LM324 7

AUDIO-OUT-R

1 3S18-1 8

IS1G

SPDIF-OUT

220R

100n
7

+3V3

2S3K

+3V3

220R

&

3 3S18-3 6

7S09-1
74LVC00APW
1

IS1D

220R

SPDIF-OUT-PNX

2 3S18-2 7

SPDIF-OUT-PNX

14

11

3S34

3S32

10K

22K
2S2J
47p

IS1E

SEL-HDMI-ARC

14

7S09-3
74LVC00APW
9

&

&
8

5
+3V3

10

2S3L

180R

100n

3S6M

IS1K

2S3M

IS44
eHDMI+

100n
68R

3S25

+3V3-ARC
14

10K

3S19

+3V3-ARC
7S09-2
74LVC00APW
4

14

+3V3-ARC
7S09-4
74LVC00APW
12

&
11

13
7

+3V3

10

11

12

13

2S2G C12
2S2H D12
2S2J G12
2S2K F12
2S2L D4
2S2R B7
2S2S B9
2S2T B8
2S2V B3
2S2W B3
2S2Y C3
2S2Z B3
2S30 C3
2S31 C3
2S32 D3
2S33 C3
2S34 B9
2S36 C6
2S38 E9
2S39 E9
2S3A E8
2S3B E8
2S3C E8
2S3D E8
2S3E E3
2S3F E2
2S3G E3
2S3H E3
2S3J B11
2S3K G6
2S3L H8
2S3M H9
2S3Q G5
2S41 C6
2S42 C6
3S0Z A11
3S10 D4
3S11 F5
3S12-1 B2
3S12-2 B2
3S12-3 B2
3S12-4 C2
3S13-1 C2
3S13-2 D2
3S13-3 C2
3S13-4 C2
3S14 B9
3S16-1 B3
3S16-2 B3
3S16-3 B3
3S16-4 C3
3S17-1 C3
3S17-2 D3
3S17-3 C3
3S17-4 C3
3S18-1 G7
3S18-2 G8
3S18-3 G8

3S19 H5
3S25 H9
3S32 G12
3S34 G11
3S36-1 C12
3S36-2 B11
3S36-3 D11
3S36-4 D12
3S37 F11
3S38 B13
3S39 C13
3S3F E4
3S3G-1 C7
3S3G-2 D8
3S3G-3 C8
3S3G-4 D7
3S3H D7
3S3U D8
3S51 C6
3S53-1 A6
3S53-2 B6
3S53-3 B6
3S53-4 B6
3S6L F12
3S6M H8
7S00-2 C5
7S05-1 E12
7S05-2 G12
7S05-3 C12
7S05-4 B12
7S08 B8
7S09-1 G6
7S09-2 H6
7S09-3 H7
7S09-4 I7
9S06 E4
DBS8 E4
FS03 B12
FS08 B7
IS02 B11
IS03 C11
IS06 G11
IS07 E11
IS0R C2
IS0V C2
IS12 B8
IS13 B9
IS19 D3
IS1A D3
IS1B D4
IS1D G5
IS1E H5
IS1G G7
IS1K H9
IS1L F5
IS1N C7
IS1S D7
IS44 H9

14

PNX85500

2010-03-03

8204 000 8950


18770_979_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

B02E

10K
3S82 RES

+3V3
+3V3
+3V3

3S80
3S81

10K

3S21
+3V3
10K
3S62

10K
10K

DS52
BOOST-PWM
FS10 TXD2-MIPS
FS11 RXD2-MIPS
PNX-SPI-CS-AMBIn

IS04
PNX-SPI-CS-BLn

+3V3

R26
DN
R25
USB
IS4Z R24 DP
RREF

USB-DM
USB-DP

FS64

SELECT-SAW

B26
SDA
2
A25
SCL

1 3S58 2
100R

B25
SDA
3
A24
SCL

1 3S5Y 2
100R

B24
SDA
4
A23
SCL

1 3S60 2
100R

TRSTN
TMS
TCK
TDO
TDI

RESET_SYS

5K6

3S64
+3V3

3S55

10K

BL_PWM

10K
CLK_54_OUT

3S83
+3V3

11

12

13

14

1
100R
1
100R
1
100R
1
100R

2 3S57

2 3S5W

SDA-SET
SCL-SET

SDA-SET
SCL-SET

3S5Z

SDA-SSB
SCL-SSB

SDA-SSB
SCL-SSB

3S61

SDA-TUNER
SCL-TUNER

AA25
AA24
AA23
AB26
AB25

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

3S00

AE4

3S69

SDA-UP-MIPS
SCL-UP-MIPS

3S6A

3S6B

4K7

3S6D

2K2

3S6F

4K7

4K7

3S6E

SDA-TUNER
SCL-TUNER

4K7

4K7

3S6C

1F10

2K2

3S6G

FS44

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDI-PNX85500

FS49
FS50
FS51
FS52

EJTAG-DETECTn

FS53
10 9

1
2
3
4
5
6
7
8

FOR FACTORY
USE ONLY

4K7

3S6K

EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500

8 3S6H-1
10K
3
6 3S6H-3
2
10K
10K

1
10K

FS57

+3V3-STANDBY

+3V3

BM08B-SRSS-TBT

7 3S6H-2
5 3S6H-4
4
10K

RESET-SYSTEMn

33R

AD5

BACKLIGHT-PWM

AC5
10K

GPIO1

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_11

SDA-UP-MIPS
SCL-UP-MIPS

3S27

+3V3

Y21
Y22
Y23
Y24
W21
W22
W23
V22
V23
U23

BOOTMODE
GPIO1
RXD1-MIPS
TXD1-MIPS
RXD2-MIPS
TXD2-MIPS
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
BOOST-PWM
SELECT-SAW

10K

10K
3S40

3S26

BOOTMODE

+3V3

C25
SDA
1
C26
SCL

1 3S56 2
100R

3S6J

IS05

3S45

10

+3V3

7S00-3
PNX85500

CONTROL

EN 176

PNX Mips

B02E

10.

PNX Mips

10K

10-18-5

Q552.1E LA

RXD1-MIPS

10K
3S84
+3V3

+3V3
TXD1-MIPS

+3V3
IS40

3S72

PXCLK54

10K
47R

RES

D
+3V3
2S89
100n

VDD

+3V3

7S01
PCA9540B

SCL-SET

SCL

SDA-SET

SDA

INP
FIL

I 2 C
-BUS
CTRL

SC0

SCL-DISP

SC1

SCL-BL

SD0

SDA-DISP

SD1

SDA-BL

SCL-DISP

SCL-BL

SDA-DISP
SDA-BL

3S65

3S66 4K7
1
3S67 4K7
2
1
4K7
3S68
2
1
4K7

VSS

FS31

9S10
IS08

SCL-SET

SDA-SET

IS09

SCL-BL

9S11

FS2W

SCL-DISP

9S12

FS2Y

SDA-DISP

9S13

SDA-BL

7S00-4
PNX85500

AA3

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

Y5
0
Y6
1
RXD ETH
AB4
2
AC1
3

ETH-RXDV
ETH-RXER
SDIO-DAT3
SDIO-CLK
SDIO-CMD
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP

10

11

ETHERNET

ETH-RXCLK

IS50

RXCLK

TXCLK

0
1
TXD
AC2
RXDV
2
Y4
RXER
3
ETH
TXEN
W2
CC_DAT3
TXER
W1
CLK
COL
W6
CMD
CRS
W5
0
MDC
SDIO
W4
1 DAT
MDIO
W3
2
U6
SDCD
V6
SDWP

12

AA2

ETH-TXCLK

AA1
AA4
AB1
AB2
AA5
AB3
AC3
Y2
Y3
Y1

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)
ETH-TXD(3)
ETH-TXEN
ETH-TXER
ETH-COL
ETH-CRS
ETH-MDC
ETH-MDIO

13

1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
3S56 A5
3S57 A6
3S58 A5
3S5W B6
3S5Y B5
3S5Z B6
3S60 B5
3S61 B6
3S62 B1
3S64 C1
3S65 E11
3S66 E11
3S67 E11
3S68 E11
3S69 A9
3S6A A8
3S6B A9
3S6C B8
3S6D B9
3S6E B8
3S6F B9
3S6G B8
3S6H-1 B8
3S6H-2 B9
3S6H-3 B9
3S6H-4 B9
3S6J C5
3S6K B9
3S72 C6
3S80 B1
3S81 B1
3S82 B1
3S83 C1
3S84 C1
7S00-3 A4
7S00-4 G12
7S01 E8
9S10 F8
9S11 F8
9S12 F8
9S13 F8
DS52 B2
FS10 B2
FS11 B2
FS2W F9
FS2Y F9
FS31 F8
FS44 A12
FS49 A12
FS50 A12
FS51 B12
FS52 B12
FS53 B12
FS57 B12
FS64 C2
IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12

14

PNX85500

2010-03-03

8204 000 8950


18770_980_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-18-6

Q552.1E LA

10.

EN 177

PNX Video Out - LVDS

B02F
1

PNX Video Out - LVDS


2

B02F
4

10

11

12

13

14
7S00-7 C8

7S00-7
PNX85500

LVDS

D7
E7

PX1APX1A+

A7
B7

PX1BPX1B+

C8
B8

PX1CLKPX1CLK+

C10
N
B10
CLK
P

PX1CPX1C+

A9
B9

PX1DPX1D+

A11
N
B11
D
P

PX1EPX1E+

C12
N
B12
E
P

E12
N
D12
P

PX3EPX3E+

PX2APX2A+

A14
N
B14
A
P

D14
N
E14
P

PX4APX4A+

PX2BPX2B+

C15
N
B15
B
P

E15
N
D15
B
P

PX4BPX4B+

PX2CLKPX2CLK+

C17
N
B17
CLK
P

E17
N
D17
CLK
P

PX4CLKPX4CLK+

PX2CPX2C+

A16
B16 N
C
P
A18
B18 N
D
P
C19
B19 N
E
P

D16
N
E16
P

PX4CPX4C+

D18
N
E18
P

PX4DPX4D+

E19
N
D19
P

PX4EPX4E+

PX2DPX2D+
PX2EPX2E+

N
A
P
N
B
P

N
C
P

N
P

N
P

PX3APX3A+

E8
D8

PX3BPX3B+

E10
N
D10
CLK
P

PX3CLKPX3CLK+

D9
E9

PX3CPX3C+

D11
N
E11
D
P

PX3DPX3D+

LOUT1 LOUT3
C

LOUT2 LOUT4

N
P

10

11

12

13

14

PNX85500

2010-03-03

8204 000 8950


18770_981_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 178

PNX Stand-by Controller

PNX Stand-by Controller

B02G

B02G
4

+1V1

10

12

11

13

POL

10-18-7

Q552.1E LA

2S13

100n

1u0
2S10

30R

RES
5S04

IS3B

2S37
9S24
RES

1u0

2S11
100n

IS20

DS50

2S4G

10K

3S3M
10K
3S3P
10K
RES 3S3S
10K
3S3T
10K

+3V3-STANDBY
3S1H
10K

RES
10K
3S3N RES
10K
3S3Q RES
10K
3S3R
10K RES

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

3S1G

RXD-UP
TXD-UP

10K
3S2A RES

AC20
0
AD20
1
AE20
2
AF20
3
P2
AA21
4
AB21
5
AC21
6
AD21
7

LCD-PWR-ONn
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n

DETECT2

RESET-SYSTEMn

10K
3S1J

KEYBOARD

100K

2S4E
100n

3S1L

SPI-PROG

10K

RESET_IN
EA
ALE
PSEN

AF22
4
P6
AE22
5

SPI-PROG
PNX-SPI-WPn

1S02

AA26

RESET-STBYn

AB24

EA

AB23

ALE

AC26

AD26
0
AC25
PWM
1

SPI

+3V3-STANDBY

10p

AF17

AC23
SDA
AC24
MC
SCL

AD23
0
AE26
1
AE25
P5
2
AE24
3

RESET-SYSTEMn
AV2-BLK
AV1-BLK
KEYBOARD
LIGHT-SENSOR
AV1-STATUS
AV2-STATUS

AE17

10p
2S4F

AF26

AC17
XTAL_IN
XTAL_OUT

STANDBY

AE21
0
AF21
1
AA22
2
AB22
P3
3
AC22
4
AD22
5

RXD-UP
TXD-UP
DETECT2

10K
3S1K RES

VDD_XTAL

AD19
0
AE19
1
AF19
2 P1
AA20
3
AB20
7

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

54M

3
3S3L

RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM

EA
ALE

100R

3S2G

SDA-UP-MIPS
SCL-UP-MIPS

100R

3S2K

3S2H
100R

LED1
LED2

AE23
SDO
AF25
SDI
AF24
CLK
AF23
CSB

IS3F

3S44

IS3E

10K

3S43

10K 3S42

10K

IS3D

PSEN

PSEN
3S2F
100R

RES

SDA-UP-MIPS
SCL-UP-MIPS

3S6V
4K7
RES

LED1

3S6W

IS2V
IS2Z

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

4K7

3S1P

LED2

10K

RES

3S41
10K

PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
PNX-SPI-CSBn

AB17
0
AA18
1
AD18
2
AE18
3
P0
AF18
4
AA19
5
AB19
6
AC19
7

AD17

3S1E
10K
+3V3-STANDBY

10K
3S1D
27K

VSS_XTAL

RES
10K
RES
3S1F

VDDA_ADC2V5

AA17

2S4D
1n0

3S1B
3S1C

VDDA_1V1_DCS

+3V3-STANDBY

1
7S00-9
PNX85500

D
RES
10K
RES 3S3Y
10K

CTRL-DISP
RESET-DVBS
RESET-USBn
RESET-ETHERNETn
SEL-HDMI-ARC
RESET-AVPIP
RESET-AUDIO
AUDIO-MUTE-UP

10K

3S2L

3S2S
RES
3S3W
4K7

RES
10K
RES
10K

3S46
+3V3-STANDBY

3S47
3S2M
RES
3S49

10K
4K7

7S20
NCP303LSN28
2

FS45
1

INP

IS2U
5

OUTP
CD

FS0Z

RESET-STBYn

NC GND

100n

2S4K

RES

9S0D

10K

1 3S2V 2

+3V3-STANDBY

9S0E

+3V3-STANDBY

10

11

12

1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
2S4D C3
2S4E E2
2S4F B9
2S4G B9
2S4K G10
3S1B C2
3S1C C1
3S1D C2
3S1E C1
3S1F C2
3S1G D2
3S1H D1
3S1J D2
3S1K D1
3S1L E2
3S1P D11
3S2A D2
3S2F D7
3S2G D7
3S2H D7
3S2K D7
3S2L D10
3S2M E10
3S2S E10
3S2V F11
3S3L C2
3S3M C1
3S3N C2
3S3P C1
3S3Q C2
3S3R D2
3S3S D1
3S3T D1
3S3W E9
3S3Y D9
3S41 D12
3S42 C11
3S43 C11
3S44 C11
3S46 D10
3S47 E10
3S49 E10
3S6V C11
3S6W D12
5S04 B6
7S00-9 B6
7S20 G10
9S0D G9
9S0E G9
9S24 B6
DS50 B8
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10

13

PNX85500

2010-03-03

8204 000 8950


18770_982_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-18-8

Q552.1E LA

10.

EN 179

PNX Power

PNX Power

B02H
1

B02H

10

11

13

12

14

5S80

IS3Q

2S5A

RES 10u

100n

2S6A

+1V1
30R

5S81

2S5B

RES 10u

30R

100n

2S6B

+2V5

5S82

IS3S

100n

100n
2S68

100n
2S67

+3V3

VDD_3V3_SBY

2S5D

2S4M

100n

1
10u

2S4P

100n

2S4N

C7
C9
C11
C14
C16
C18

VSSA_USB

VDDA_2V5_VDAC
VDDA_3V3_USB

10u

100n

1
100n
100n

2S4Y

RES 1u0

+2V5

30R
10u

2S50

100n

2S4Z

+1V2

10u

100n

AA7

6.3V

5S84

AA9

30R
c000

SENSE+1V2

Y17
D13
T20

POL

Y13

+2V5-AUDIO

Y10

100n

VDDA_2V5_USB
VDDA_2V5_VADC

30R

R21

R20

+2V5-AUDIO
100n

2S45

VDD_1V1_DDR

VSSA_2V5_LVDS_BG

VDDA_2V5_LVDS_BG

5S95

Y12

2S4W

+1V1
IS3L

2S46

VDDA_2V5_DCS

5S83

B13

2S52

VDDA_2V5_ADAC

2S6P

100n
2S6C

Y19
Y18

2S51

VDDA_2V5_AADC

30R

+3V3-STANDBY

AA15
Y15
VDDA_1V2
AA13
VDDA_2V5

+3V3

2
100n
2S6N
1

2
2S6F
1

W20
P20
M20
K20
V7
Y8

IS3K
VDDA_1V1_LVDS_PLL

5S85

10u
2S4U

VDD_1V1

+2V5-LVDS

N6
N7

2S4V

VDD_3V3

U22

100n
1 2S6G 2

VDD_2V5_LVDS

220u 6.3V

100n
2S6E 2

2S6D

U20
U21

+2V5

30R

1
HDMI_VDDA_2V5

VDD_2V5

C13

HDMI_VDDA_1V1

V20
V21

HDMI_VDDA_3V3_TERM

VSSA_1V1_LVDS_PLL

1u0

2S21

100n

RES

2S4S

G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

J7

30R

VDD

A13

100u 2.0V

100n

5
100n
2S5J-4
4

5S94
+1V1

VSS

VSS

VSS

2S5P

VSS

M7
N2
N20
P10
P12
P14
P16
P18
P4
P6
P7
T10
T12
T14
T16
T18
T2
T6
T7
U4
V10
V12
V14
V16
V18
V2
Y20

10u

VSSA

VDD_1V8

U24
V24 HDMI_AGND

47u

2S23

5
100n

100n
2S5H-4

100n
2S5H-3
3
2

100n
2S5J-2

2
100n
2S5J-1 8

4
5

100n
2S5J-3 6

100n
2S5K-4
4

6
100n
2S5K-3

2S29

AA16
AA8
Y11
Y14
Y16
Y9

100n
2S5K-2

2S5K-1
1

8
100n
2S5H-2

100n
2S5H-1

100n
2S5G-4

6
100n
2S5G-3
3

100n
2S5G-2

2S5G-1
1

22u

22u
2S4R

100n

2S4Q

100n

2S27

2S28

100n

2S43

A1
A10
A12
A15
A17
A19
A26
A3
A8
B1
B20
C20
C4
D2
D20
E13
E20
E4
F10
F12
F14
F16
F18
F20
F8
G10
G12

AF1
AE2
AD3
AC4
AB5
H20
F11
G11
F13
G13
F15
G15
F17
G17
F19
G19
J9
J11
J13
J15
J17
L9
L11
L13
L15
L17
N9
N11
N13
N15
N17
R9
R11
R13
R15
R17
U9
U11
U13
U15
U17
J6
AA6
Y7
W7
F9
G9

+1V1

30R

5S93
L6
L7
R6
R7
U7
A5
A6
B5
B6
C6
D6
E6
F6
G6
F7
G7

7S00-10
PNX85500

7S00-12
PNX85500

RES 10u

c001

SENSE+1V1

100n

2S5C

100n
2S66

100n
2S65

100n
2S64

100n
2S63

100n

2S62

100n
2S61

2S26

47u
2S60

+1V8

5S87
+2V5
1u0

2S56

100n

2S55

30R

5S88
10u

100n
2S57

2S5M

+2V5-LVDS
30R

5S89
100n
2S58

10u

2
100n
2S6K

2
1

2S6H

+2V5
30R

5S90
+2V5
10u

100n

2S53

2S4T

100n

2SHW

30R

I
5S92

IS58

10

1u0

100n
2S59

11

30R

100n
2S6L

2
2S6M
1

+3V3

12

13

2S21 F6
2S23 B6
2S26 A6
2S27 B3
2S28 B3
2S29 C6
2S43 B2
2S45 F11
2S46 F11
2S4M B12
2S4N C11
2S4P C11
2S4Q B3
2S4R B4
2S4S F5
2S4T H11
2S4U D11
2S4V D11
2S4W D11
2S4Y D11
2S4Z E11
2S50 E11
2S51 E9
2S52 E9
2S53 H11
2S55 G11
2S56 G11
2S57 G11
2S58 H11
2S59 I11
2S5A A11
2S5B A11
2S5C B11
2S5D B11
2S5G-1 B4
2S5G-2 B4
2S5G-3 B4
2S5G-4 B5
2S5H-1 B5
2S5H-2 B5
2S5H-3 B5
2S5H-4 B5
2S5J-1 C5
2S5J-2 C5
2S5J-3 C5
2S5J-4 C5
2S5K-1 C4
2S5K-2 C4
2S5K-3 C4
2S5K-4 C5
2S5M G11
2S5P F5
2S60 A6
2S61 A6
2S62 A7
2S63 A7
2S64 A7
2S65 A7
2S66 A7
2S67 A8
2S68 A8
2S6A A11
2S6B A11
2S6C C11
2S6D B11
2S6E B11
2S6F C11
2S6G C11
2S6H H11
2S6K H11
2S6L I11
2S6M I11
2S6N C11
2S6P C12
2SHW I11
5S80 A12
5S81 A12
5S82 A12
5S83 D12
5S84 E12
5S85 C12
5S87 F12
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12
5S94 F5
5S95 E10
7S00-10 B6
7S00-12 C1
IS3K D10
IS3L D10
IS3Q A10
IS3S A10
IS58 I10
c000 E13
c001 B5

14
7

PNX85500

2010-03-03

8204 000 8950


18770_983_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 180

PNX Analog Video

PNX Analog Video


2

10

11

13

12

2S87

AV1-CVBS

2S8A

9S17

2S7J

AV1-R

2S22

3S4J

56R

22n

C-SVHS
22n

EU: SCART1

CVBS-MON-OUT1

56R

3S4L

22n

560R

3S5E

2S7K

AV1-B

Y-SVHS

22n
47R

Connectivity

3S59

47R

22n

AP:

14

3S5B

B02I

56R

B02I

3S05

10-18-9

Q552.1E LA

B
3S08

560R

47p

2S7H

2S40

IS4V

22n

10n
2S7L
56R

3S4P

AV3-Y

22n

AF15
AE15
AC15
AD15

2S8G

AV2-CVBS

47R

3S5L

22n

AB14
AF14
AE14
AC14
AD14

2S7Q

YPBPR2-SYNCIN2

10n

2S7R

AV4-Y

56R

22n
3S4U

SCART2
YPBPR2

AF11
AE11
AB10
AA11
AC16
AB16
AB13
AB12
AA12
AA10

IS5E

3S5S
10K

IS5D
IS5F
IS5G
IS5H
IS5J

3S75

AD12
AB11

BS15

AE12
AF12

BS09

BS17

56R

PNX-IF-AGC

47K

BS10

IS11

3S76
10n

AA14

PNX-RF-AGC

47K

3S4W

22n

2S14

BS13

AGND
2S7U

2S16
22n

AD11
AC11

+CVBS
AV4-PR

2S15
22n

IS5C

22n

AC12
AF13

2S76

EU:
AP:

AF16
AD16
AE16
AB18
AC18
AF4
AD24
AD25

CVBS_Y1 ATV_CVBS_Y3
R
C3
B AV1
G
CVBS_Y7
C7
SYNCIN1
Y_G1
CVBS1_OUT
PR_R_C1
CVBS2_OUT
PB_B1
RESREF
CVBS_Y2
CURREF
SYNCIN2
Y_G2
1
PR_R_C2
2
PB_B2
3
REF 4
R
5
G VGA
6
B
HSYNC_IN
IF_AGC
RF_AGC
IN
VSYNC
OUT
P
SCL VGA_EDID
TUNER N
SDA

22n

22n

2S18
22n

ANALOG_VIDEO
AB15
AC13
AD13
AE13

2S19

56R

3S4T

AV3-PB

7S00-1
PNX85500
2S7P

10n

YPBPR1

2S75

56R

YPBPR1

3S4R

AP:

22n

2S7N

AV3-PR

2S7M

YPBPR1-SYNCIN1

EU:

8K2

IS4W
3S09

56R

3S4K

AV1-G

2S77

PNX-IF-P

10n

2S7E
56R

3S4G

AV4-PB

22n

2S78

PNX-IF-N

10n

2S84
56R

3S50

R-VGA

22n

2S85
56R

3S52

G-VGA

22n

2S86

100R

2 3S5V-2 7

3 3S5V-3 6

100R

VGA-SCL-EDID

4 3S5V-4 5

V-SYNC-VGA

100R

1 3S5T-1 8
100R
3 3S5T-3 6

100R

H-SYNC-VGA

2 3S5T-2 7

AP: VGA

22n
4 3S5T-4 5

56R

EU: VGA

3S54

B-VGA

100R

100R
1 3S5V-1 8

VGA-SDA-EDID

VGA-SCL-EDID-TCON

9S14

VGA-SDA-EDID-TCON

9S15

100R

*
*

*
4

= TCON ONLY

10

11

12

13

2S14 D12
2S15 D12
2S16 D12
2S18 D12
2S19 D12
2S22 A11
2S40 B11
2S75 F11
2S76 F11
2S77 F12
2S78 G12
2S7E G6
2S7H B6
2S7J A6
2S7K B6
2S7L C6
2S7M C6
2S7N D6
2S7P D6
2S7Q E6
2S7R F6
2S7U F6
2S84 G6
2S85 H6
2S86 H6
2S87 A6
2S8A A11
2S8G E6
3S05 A11
3S08 B11
3S09 C11
3S4G G6
3S4J A6
3S4K C6
3S4L B6
3S4P D6
3S4R D6
3S4T D6
3S4U F6
3S4W F6
3S50 H6
3S52 H6
3S54 I6
3S59 A6
3S5B A11
3S5E B11
3S5L E6
3S5S E9
3S5T-1 I5
3S5T-2 I11
3S5T-3 I5
3S5T-4 I11
3S5V-1 I5
3S5V-2 I12
3S5V-3 I5
3S5V-4 I12
3S75 E12
3S76 F12
7S00-1 D8
9S14 I3
9S15 I3
9S17 A13
BS09 F9
BS10 F10
BS13 E9
BS15 F9
BS17 F10
IS11 F13
IS4V B10
IS4W C10
IS5C D9
IS5D E9
IS5E E9
IS5F E9
IS5G E9
IS5H E9
IS5J E9

14
7

PNX85500

2010-03-03

8204 000 8950


18770_984_100713.eps
100713

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 181

10.19 B03 820400089514 CLASS D


Audio

Audio

B03A
2

7D03-1
BC847BS(COL)
6

3D09

+24V-AUDIO-POWER

5
+AVCC

+24V-AUDIO-POWER

220R

GND-AUDIO

3D02-2

7D15-2
BC847BS(COL)
4

4K7

ID19
ID18

6
5
18
17

2D16

GND-AUDIO

ID29

11
7
4
2

1u0

2D17

ID30

1u0
ID37

AUDIO-MUTE-UP

10
12

AVCC

47n

4K7

1u0

IN
L

2D26

2D22
220n

8
1

3D14-1
220n

7
3D14-2
22K
2

3D14-3
22K

5
3D14-4
22K

220n

7D10-1
TPA3120D2PWP

PVCC
BSR

CLASS-D
AUDIO AMP

GND-AUDIO

1
3

2D23

ID15

19
20

2D29

3D02-4

FD03

+AUDIO-L

2D08

220n

2D07

2D20

7D15-1
BC847BS(COL)
1

4K7

47n

22K

A-PLOP

3D02-3

3D02-1

6
6

4K7

1u0

220u 35V

2D24

2D19

ID14

2D28

GND-AUDIO

ID28

FD01

-AUDIO-R

ID27

220u 35V

2D05

10u 35V

22K

220R
5D08

ID11

A
5D07

ID12

220n

3D16

2D06

4R7

FD14

B03A

10-19-1

R
OUT
L

0
GAIN
1

BSL

16

ID32

2D10
5D05
ID06

22u

22
21

5D02

ID10
220n

15

5D01

ID09
ID31

2D09

22u

ID05

2D12

220R

ID08

5D04

ID07

220R

RIGHT-SPEAKER

25V 220u
2D11

LEFT-SPEAKER

25V 220u

220n
VCLAMP
BYPASS
MUTE
SD

2D27

3D10-1
220n
1

2D21
220n

6
3D10-3
22K

3D10-2
22K
2

3D10-4
22K

25

22K

4K7

GND-AUDIO

+3V3-STANDBY
5

3D01-2

DETECT2

47K

VIA

GND-AUDIO

10n

VIA

2D14

VIA

V_NOM

GND-AUDIO

37
36
35
34

1D50

BZX384-C

LEFT-SPEAKER

VIA

VIA

MAINS-OK

1D38

1735
30
31
32
33
3D06-4 FD07

LEFT-SPEAKER
4

100K 5

3D06-2

100K

1735446-3

1735446-4

RIGHT-SPEAKER
1

ID33
1D52

GND-AUDIO
RIGHT-SPEAKER

1
2
3

100K

3D06-3

FD02

1
2
3
4

100K
3D06-1

GND-AUDIO

10n

GND-AUDIO
3 7D03-2
BC847BS(COL)

10n

220R

GND-AUDIO

FD05
FD06

5D03

2D13

GND-AUDIO

2D02

V_NOM

2K2

4K7

26
27
28
29

+AVCC

3D04

4K7

GND-AUDIO
ID13 6D01

2D01

GND-AUDIO
3D15-1
3D15-2
1
8 7
2

GND-AUDIO

GND-AUDIO

40
39
38

100p

7D10-2
TPA3120D2PWP

ID36

7D13-2
BC847BS(COL)
4

GND-AUDIO

ID34

2D03

GND-AUDIO

ID39

13
14

8
9
5
3

CD10

ID35
7D11-2
BC847BS(COL)
4

5
47K

7D13-1
BC847BS(COL)
1

3D01-4

MAINS SWITCH DETECT

GND_HS

47K
2

7D11-1
BC847BS(COL)
1
+3V3-STANDBY

3D15-4

+3V3-STANDBY

3D01-1

L
23
24

PGND
AGND

ID38

A-STBY

6
10u
GND-AUDIO

1735 E8
1D38 E9
1D50 E8
1D52 F8
2D01 F7
2D02 F4
2D03 E3
2D05 A5
2D06 A5
2D07 B5
2D08 B6
2D09 C7
2D10 C7
2D11 C8
2D12 C8
2D13 F8
2D14 E8
2D16 C4
2D17 C4
2D19 B6
2D20 B5
2D21 D8
2D22 B8
2D23 B4
2D24 B4
2D26 B8
2D27 D8
2D28 B2
2D29 B2
3D01-1 D3
3D01-2 D3
3D01-4 E2
3D02 B3
3D02 C3
3D02 B4
3D02 C4
3D04 E2
3D06-1 F4
3D06-2 F4
3D06-3 F3
3D06-4 F3
3D09 A3
3D10-1 D8
3D10-2 D8
3D10-3 D7
3D10-4 D7
3D14-1 B8
3D14-2 B8
3D14-3 B7
3D14-4 B7
3D15-1 E2
3D15-2 E3
3D15-4 D5
3D16 A5
5D01 C7
5D02 C7
5D03 E7
5D04 C8
5D05 C8
5D07 A6
5D08 A6
6D01 E3
7D03-1 A5
7D03-2 F5
7D10-1 B6
7D10-2 E5
7D11-1 D2
7D11-2 D3
7D13-1 E1
7D13-2 E2
7D15 B3
7D15 C3
CD10 D5
FD01 B1
FD02 F8
FD03 B1
FD05 E8

FD06 E8
FD07 F4
FD14 A5
ID05 C8
ID06 C8
ID07 C8
ID08 C8
ID09 C7
ID10 C7
ID11 A4
ID12 A5
ID13 E3
ID14 B3
ID15 B3
ID18 C5
ID19 C5
ID27 B6
ID28 B6
ID29 C5
ID30 C5
ID31 C6
ID32 C6
ID33 F4
ID34 D3
ID35 D3
ID36 E2
ID37 D4
ID38 D5
ID39 E2

9
4

CLASS D

2009-10-22

8204 000 8951


18770_520_100118.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-19-2

Q552.1E LA

10.

EN 182

DC/DC

DC/DC

B03B
2U00 D2
2U01 E3
2U02 D4
2U03 E2

2U04 F4
2U05 F4
2U06 F1
2U07 H3

B03B

2U16 C10
2U17 C9
2U18 D9
2U19 B12

2U12 F11
2U13 F12
2U14 E14
2U15 C10

2U08 G9
2U09 F9
2U10 F10
2U11 F9

2U20 B14
2U21 C6
2U22 D8
2U23 B5

2U24 B5
2U25 B12
2U29 G14
3U00 F1

3U05 E4
3U08 G2
3U09 H3
3U10 H3

3U01 F1
3U02 F2
3U03 F3
3U04 D3

3U11 B6
3U14 D7
3U17 G10
3U18 G10

3U23-1 C9
3U23-2 C9
3U23-3 C9
3U23-4 C8

3U19 G9
3U20 F11
3U21 G13
3U22 G2

5U02 B13
5U03 A13
6U00 E8
7U00 F1

3U27 D5
3U28 D5
5U00 C10
5U01 E10

3U24-1 F9
3U24-2 F9
3U24-3 F9
3U24-4 F8

7U01 D8
7U02-1 B6
7U02-2 C6
7U03 E3

7U04 E8
CU00 H7
FU00 G13
FU01 E14

10

FU06 E8
IU01 F3
IU02 F3
IU03 F1

FU02 B9
FU03 C14
FU04 F4
FU05 B9

11

IU04 G3
IU05 D3
IU06 D3
IU07 D4

12

IU08 D4
IU09 C6
IU10 B 6
IU11 C6

IU12 D7
IU13 D7
IU14 E8
IU15 C9

IU16 E5
IU17 F9
IU18 F9
IU19 G10

14

13

IU20 G9
IU21 H9
IU22 B13
IU23 C9

IU24 E3
IU25 F4

15

A
5U03 RES
30R
5U02

FU05

IU22
+12V

1u0

2U20

10u

10u

7 8

IU10

12V/1V8 CONVERSION

3R3

3U11

2U19

2U25

7U02-1
SI4952DY

10u

10u

2U23

2U24

30R

FU02

2U21

5U00

FU03

22u

47u

2U16

2U15

3u6

47R

47R
1 3U23-1 8

47R

2 3U23-2 7

7U02-2
SI4952DY

47R

3U23-4

220p

3 3U23-3 6

+1V8
IU11

5 6

IU09

1n0

2U17

IU23

IU15

IU08

5 6 7 8

IU12

10R

2U22
IU07

3U28

IU05

22K

GND-SIG

IU02

GND-SIG

20

VIN

2U06

V5FILT
VREG5

10K

2U14

RES 100u 2.0V

22u

2U13

47u

IU17

1u0

2U05

100n

IU18

GND-SIG

1u0

1n0

2U10

GND-SIG

2U09

3U01

FU04

IU25

GND

+1V1

10K

GND-SIG

18
19

10u

3U00

7
17

2U12

1
2

10R
RES

TEST

2u0

3U20

1
TRIP
2

22
15

47R

1
2

47R
3U24-1

PGND

FU01
+1V1

47R

1
2

5U01

FU06

24
13

47R

SW

1
VFB
2

12V/1V1 CONVERSION

1
12

3U24-2

21
16

1
VO
2

1 2 3

2U11

3U03

1
2

IU01

22K

DRVH

5 6 78
4
IU14

2U04

1
EN
2

23
14

3U24-4

GND-SIG
3U02

2
+3V3-STANDBY

5
8

1
2

3U24-3

1n0 RES

2U03
7U00
BC847BW
IU03

4
9

+1V1
+1V8

DRVL

7U04
SI4778DY
IU16

6U00

3
10

ENABLE-1V8

1
VBST
2

220p

STPS2L30A

2
11

IU13

3R3

7U03
TPS53126PW

IU24

RES

3U05

100n

2U01

100n

1n0

2U02

10R

IU06

3R3

3U14

1 2 3

3R3

3U04

10u

2U00

1n0

3U27

2U18

7U01
SI4778DY

3U21

FU00

SENSE+1V1

IU19

3U18

5K6

3U19

100n

IU21

RES 100p

22K

2U07

3U10

RES
2U29

3U17
IU04

1K0 1%

3U09

330R 1%

100p RES

3U22

+1V8

1K0 1%

3U08

2U08

IU20

1% 1K0

1% 330R

100R 1%

GND-SIG

GND-SIG

GND-SIG

CU00

GND-SIG

GND-SIG

GND-SIG
GND-SIG

10

11

12

13

14

15
4

DC/DC

2009-10-22

8204 000 8951


18770_521_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-19-3

Q552.1E LA

10.

EN 183

DC/DC

DC/DC

B03C

B03C

+3V3-STANDBY

+3V3

3U75

+5V +3V3-STANDBY

RES 10K

3U74

RES 10K

LED-2

IU43

3U69

RES 10K

LED-1

10K

3U68

9U41

IU44

optionally 1M99 is a 9 pin connector

LED2

3U59

LED2

10K RES

10K RES

7U42 RES
BC847BW
IU47

2U41 RES

3U41

IU45
9U42
RES

7U43
BC847BW

100p

+3V3

3U70

LED1

3U53

LED1

10K

10K

+12VD

FU49
FU50

10K
3U45

FU07

3U44

1K0 RES

BACKLIGHT-PWM-ANA-DISP

7U48-1
BC857BS(COL)

100K
IU41
2

3U56
+3V3

3U83-4

ENABLE-3V3-5V

BACKLIGHT-BOOST

10n

1n0

3U43

IU64

3U82

100R

2U46

2U45

10n

100p

2U43

2U44

3U65

BACKLIGHT-PWM_BL-VS

10K
IU55

100K

100R

FU54
RES 1K0

1n0

2U53

RES 100p

2U52

2U51

RES 100p

2U72

100p

1K0

3U42

3U83-1

100R

3U64

FU55

LAMP-ON

100R

FU52
FU53

FU51

1-1735446-2

IU56

3U81

+3V3

1u0

100n

1
2
3
4
5
6
7
8
9
10
11
12

RES

POWER-OK

3U66
BL-SPI-SDO

FU56
3U67

RES 100R

BL-SPI-CSn

FU57

+3V3-STANDBY

3U84
BL-SPI-CLK

FU74
100R RES

3U71

2U68

100R RES

2U42

FU48

2U71

1M99

STANDBY

7U48-2
BC857BS(COL)
3U83-3

3U83-2

100K

IU40

100K

DETECT2

3
5

6
1
7U41-1
BC847BS(COL)
1

3K3

3U60-1

IU57
1

ENABLE-3V3n

22K

IU52

10K

3U63

+3V3-STANDBY

22K

3U60-4
4

IU50

4K7

3U80

IU62

7U41-2
BC847BS(COL)

3U84 D2
6U40 E3
7U40-1 F4
7U40-2 E4
7U41-1 F4
7U41-2 F5
7U42 B5
7U43 B3
7U48-1 C6
7U48-2 E6
9U41 B5
9U42 B4
FU07 C3
FU48 C1
FU49 C1
FU50 C1
FU51 C1
FU52 C3
FU53 C2
FU54 C2
FU55 C1
FU56 D1
FU57 D1
FU58 E1
FU59 E1
FU60 E1
FU61 E1
FU62 E1
FU63 E1
FU64 F1
FU65 F1
FU66 F1
FU67 F1
FU68 F1
FU72 F4
FU73 E5
FU74 D1
IU40 E5
IU41 D5
IU43 B5
IU44 B5
IU45 B4
IU47 B4
IU48 E4
IU49 E3
IU50 F4
IU51 F3
IU52 F5
IU55 D3
IU56 C3
IU57 F6
IU61 E4
IU62 F4
IU63 F3
IU64 C6

RES 10K

22K

FU72

IU63

3U62-1

ENABLE-1V8
3U61

22K

7U40-1
BC847BPN(COL)

FU73

10K

3U62-3

7
6

3U60-3

RES 10K

10K

3U62-2

IU49

3U73

3U60-2

6U40

2
10n

100R
10n
2U54

3
IU61

2U55

MAINS-OK

BZX384-C6V2

IU51

+24V-AUDIO-POWER
3U76

100p RES
2U50

2U48

IU48

1u0 RES

FU66

FU68

GND-AUDIO

+12V

T 3.0A 32V

1K0

1U40

FU67

1-1735446-1

3
4

+3V3-STANDBY

3U72

FU58
FU59
FU60
FU61
FU62
FU63
FU64
FU65

100p RES

1
2
3
4
5
6
7
8
9
10
11

10n

1M95

2U49

7U40-2
BC847BPN(COL)

1u0
2U47

10K

3U62-4

100R

1M95 E1
1M99 C1
1U40 E2
2U41 B1
2U42 C2
2U43 D2
2U44 D3
2U45 D3
2U46 D3
2U47 E1
2U48 F1
2U49 F1
2U50 F1
2U51 D1
2U52 D1
2U53 D2
2U54 F2
2U55 F3
2U68 E1
2U71 D5
2U72 D1
3U41 B5
3U42 C3
3U43 C3
3U44 C3
3U45 C3
3U53 B6
3U56 D3
3U59 B6
3U60-1 F5
3U60-2 F4
3U60-3 E5
3U60-4 F5
3U61 E5
3U62-1 F4
3U62-2 E3
3U62-3 E4
3U62-4 E3
3U63 F5
3U64 C2
3U65 D2
3U66 D2
3U67 D2
3U68 B3
3U69 B3
3U70 B4
3U71 D3
3U72 F3
3U73 F3
3U74 A4
3U75 A4
3U76 F2
3U80 F4
3U81 C3
3U82 C5
3U83-1 D6
3U83-2 E5
3U83-3 E5
3U83-4 C5

9
4

DC/DC

2009-10-22

8204 000 8951


18770_522_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-19-4

Q552.1E LA

10.

EN 184

DC/DC

B03D

DC/DC

B03D

RESERVED
+12V

2UA3
2UA2

3UA6

330p

2UA6

1u0

2UA5

22K

3UA8

1u0

3U15-1

+2V5

+3V3

+5V

+2V5-LVDS

3U16-1

100R

IUA7

7UA1-2
LM833
7

FUA2

3UB0

1u0

7UA3
PHD38N02LT

330R
1%

3U13

IU26

IUA5

3U15-3

3U16-2

3U16-3

100R
4

3U16-4

100R

1u0

2UB2

+3V3

100R

100R

1K0

3UA9

IUA8

RES 1u0

2UB1

330p

2UA8

3U15-4

+1V2

1n0

2UA9

FUA3

100R
7

100R

22R

100n

2UA7

470R

3U15-2
100R

IUB4

3UB7-2
7
470R
3UB7-3
3
6
470R
3UB7-1
1
8

+5V

22u

2UB8

7UA7-2
4
BC847BS(COL)

+1V8
+12V

2UB0

7
IUB3
1K0 IUB2
3UB6-3
6
6
1K0
3UB6-4
4
5
2
1K0
3UB6-1
IUB5
7UA7-1
1
8
3 1
BC847BS(COL)
1K0
3UB7-4
4
5
5
3

CUA0

330R
1%

7UA6
BC817-25W
3UB6-2

3U12

+5V-TUN

1u0

B
FUA4

1K0

IUB6

470R

IUA9

3UA7

+5V5-TUN

+2V5-REF

FUA1

IUA2

+12V

22R

IUA4

3UA5

2UA4

2
IUA3

OUT
COM

1n0

IN

1K0

IUA1

2UA1

47K

7UA1-1
LM833
1

7UC0
LF25ABDT

7UA2
PHD38N02LT

100n

7UA0
TS2431

3UA2

3UA3

+2V5-REF
1

3K3 1%

FUA0

1K0

3UA4

2K2

3UA0

3UA1

+3V3
2UA0

100n

+12V

3K3 1%

+2V5-REF

NOT FOR 5000 SERIES

ENABLE-1V8
5

3UB1

SENSE+1V2

RESERVED
5UA0

1K0

30R
3U29-1

RES

+12V

470R

RES
5

470R

2
4

3U29-4

RES

A
NC

REF

470R
1

3U26-1

3U26-2

3U26-3

4K7

IN

OUT

INH

BP

+5V-TUN

IUB1

COM

RES
3UB5

3UB4

100K

1K0

IUB0

2UB3

+5V

470R
+3V3

NC

RES

470R

+5V5-TUN

1u0

3U29-3

7UA4
TS431AILT

2UB7

+3V3

IU30

3UB2

RES

4K7

470R

3UB3

3U29-2

100K RES

3U25-1

6
RES
7U06-1
BC847BS(COL)
1

3
RES
7U06-2
BC847BS(COL)
4

IU29

7UA5
LDS3985M50

1u0

100n
2UB6

3U25-2

100K RES

IUA6

2UB5

3U25-3

100K RES

3U25-4

100K RES

RES

22n
2UB4

470R
4

3U26-4

RES

330p
RES

470R

2UA0 A5
2UA1 A4
2UA2 B5
2UA3 B5
2UA4 A7
2UA5 B6
2UA6 B7
2UA7 D4
2UA8 D5
2UA9 D5
2UB0 C7
2UB1 D6
2UB2 D7
2UB3 F6
2UB4 F6
2UB5 F8
2UB6 F8
2UB7 F7
2UB8 D2
3U12 C3
3U13 C3
3U15-1 C8
3U15-2 C8
3U15-3 D8
3U15-4 D8
3U16-1 C9
3U16-2 C9
3U16-3 D9
3U16-4 D9
3U25-1 E3
3U25-2 E3
3U25-3 E2
3U25-4 E2
3U26-1 F3
3U26-2 F3
3U26-3 F3
3U26-4 F3
3U29-1 E3
3U29-2 E3
3U29-3 E3
3U29-4 F3
3UA0 A2
3UA1 A3
3UA2 B3
3UA3 B4
3UA4 A4
3UA5 A6
3UA6 B5
3UA7 B6
3UA8 B5
3UA9 D5
3UB0 D6
3UB1 E6
3UB2 E6

3UB3 F6
3UB4 F5
3UB5 F5
3UB6-1 C2
3UB6-2 C2
3UB6-3 C2
3UB6-4 C2
3UB7-1 D3
3UB7-2 D2
3UB7-3 D2
3UB7-4 C2
5UA0 E8
7U06-1 F2
7U06-2 F1
7UA0 B2
7UA1-1 A5
7UA1-2 C5
7UA2 A6
7UA3 C6
7UA4 E5
7UA5 E8
7UA6 C3
7UA7-1 C3
7UA7-2 D2
7UC0 A8
CUA0 B9
FUA0 A2
FUA1 A7
FUA2 D5
FUA3 D7
FUA4 B9
IU26 C3
IU29 E2
IU30 F3
IUA1 A4
IUA2 B5
IUA3 A6
IUA4 A6
IUA5 C6
IUA6 E5
IUA7 C4
IUA8 D5
IUA9 B6
IUB0 F6
IUB1 E8
IUB2 C2
IUB3 C3
IUB4 D3
IUB5 C2
IUB6 B3

DC/DC

2009-10-22

8204 000 8951


18770_523_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 185

DC/DC

DC/DC

B03E
2

5UD0

8
2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
2UD4 B5
2UD5 B5
2UD6 B6
2UD7 B6
2UD8 C2
2UD9 C2
2UE0 C3
2UE1 D5
2UE2 D6
2UE3 D6
2UE4 D6
2UE5 E4
2UE6 E6
2UE7 F4
2UE8 F5
2UE9 B8
3U06 B8
3U07 D8
3UD0 B5
3UD1 B5
3UD2 B6
3UD3 D5
3UD4 D5
3UD5 D5
5UD0 A2
5UD1 A5
5UD2 C5
5UD3 C2
6UD0 A6
6UD1 E4
7U05-1 B7
7U05-2 D7
7UD0-1 A4
7UD0-2 B4
7UD1-1 C4
7UD1-2 D4
7UD2 E5
7UD3 F5
FUD2 C5
FUD3 A7
IU27 B8
IU28 D8
IUD0 A2
IUD1 C2
IUD2 D5
IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5

IUD0

+12V

FUD3

2UD7

33K
1%

12

68K
3UD1

1%
3UD0

VIA

10

4n7
3UD2

15

7UD0-2
ST1S10PH

13

IUD6

7U05-1
BC847BS(COL)
RES 1

120K

100n

22u

IU27

10K

RES 3U06

+1V1

RES 2U27

SS36

RES 2UE9

+5V
3u6

VFB
GND
P HS

6UD0

IUD7

220u 16V

SYNC

5UD1

2UD6

IUD3

SW

VIN

22u

INH

22u
2UD5

2UD4

RES 1n0

2UD3

ENABLE-3V3-5V

SW

10u

2UD2

10u

2UD1

10u

2UD0

7UD0-1
ST1S10PH

+5V5-TUN

30R

B03E

10-19-5

Q552.1E LA

14

11

5UD3

C
+3V3

3
7U05-2
RES
4

100n
IU28

D
RES 3U07

33K
1%

12

1M0
3UD5

VIA

10

3UD4

15

7UD1-2
ST1S10PH

13

IUD2

BC847BS(COL)

RES 2U28

220u 16V

2UE4

22u

22u
2UE3

3UD3

+1V1

10K

FUD2

3u6

VFB
GND
P HS

5UD2

2UE2

SYNC

IUD4

SW

VIN

1% 100K

INH

4n7

SW

A
ENABLE-3V3-5V

2UE1

7UD1-1
ST1S10PH

10u

2UE0

10u

2UD9

10u

2UD8

30R

IUD1

+12V

14

11

IN

S1D

OUT

100n

2UE5

+2V5

COM

22u 16V

IUD5

+5V

2UE6

7UD2
LD1117DT25
6UD1

() FOR 5000 SERIES ONLY


() NOT FOR 5000 SERIES

7UD3
LD1117DT33

IN

OUT

+3V3

2UE8

100n

2UE7

COM

22u 16V

DC/DC

2009-10-22

8204 000 8951


18770_524_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-19-6

Q552.1E LA

10.

EN 186

Temp Sensor + AmbiLight

B03F

Temp Sensor + AmbiLight

B03F
3

7
1UM0 A4
5UM0 A3
5UM1 A3
FUM0 A5
IUM0 A4

5UM1

1UM0

IUM0

+3V3

30R
5UM0

FUM0

V-AMBI

T 1.0A 63V

+5V
RES 30R

DC/DC

2009-10-22

8204 000 8951


18770_525_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-19-7

Q552.1E LA

10.

EN 187

Fan Control

B03G

Fan-Control

B03G
2

+12V

+12V

1K0

FAN-CTRL1

IUS3 3US5-3
6
3

IUT1

100n

7
7US1-1
LM339P
14

2US3

10K

3US5-2

3US7

10K

3US4-1

+12V

10K

3US2

+3V3

IUS6

10K

7US2
BC807-25W

12
+12V

IUS7

IUT2
FAN-CTRL2

7US1-2
LM339P
13

22R

IUS4 3US5-4
5
4

10

10K

BC807-25W
7US3

IUS8

12

3US6

IUS9
47R

11

10K

3US3

+12V

10K

3US5-1

3US9

+3V3

FAN-DRV
+3V3

10K

7US1-3
LM339P
2

10K

3US4-3
3

+12V

IUS5

3US4-4

+12V

4
12

TACH01

RES

+12V

10K

3US4-2

9US0

+12V

7US1-4
LM339P
1

IUS0

12

TACH02

TACHO

2US3 A7
3US2 A3
3US3 B3
3US4-1 A4
3US4-2 D4
3US4-3 C4
3US4-4 C5
3US5-1 B6
3US5-2 A6
3US5-3 A5
3US5-4 B5
3US6 C6
3US7 A4
3US9 B6
7US1-1 A5
7US1-2 B5
7US1-3 C5
7US1-4 D5
7US2 A6
7US3 B6
9US0 D4
IUS0 D5
IUS3 A5
IUS4 B5
IUS5 C5
IUS6 A6
IUS7 B7
IUS8 B6
IUS9 B6
IUT1 A4
IUT2 B4

9
4

DC/DC

2009-10-22

8204 000 8951


18770_526_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 188

Vdisp Switch

VDisp-Switch

B03H
2

1 9UU0-1
RES
2 9UU0-2
RES
3 9UU0-3
RES
4 9UU0-4
RES
1 9UU1-1
RES
2 9UU1-2
RES
3 9UU1-3
RES
4 9UU1-4
RES

3UU0-2

6
5

8
7
6
FUU0

+VDISP-INT

2
IUU2

1u0

IUU1

3UU3-2

IUU3
7

47K RES
7UU3 RES
BC847BW

+3V3-STANDBY

47K

2
3

7UU2-1
PUMD12
1

C
IUU4 3UU3-3 IUU5 3UU3-4
6
3
4
5

3UU0-3

3UU0-1

47K

47K

47R
7

47K RES
2UU1

3UU1

IUU0

3UU3-1

7UU1
SI3441BDV

+12VD

7UU0
SI4835DDY
RES

4
PUMD12
7UU2-2

47K RES
2

+3V3

47K RES

100n

B03H

2UU0

10-19-8

Q552.1E LA

IUU6

VDISP-SWITCH

3UU2

+3V3

4K7 RES

D
LCD-PWR-ONn

2UU0 C6
2UU1 C4
3UU0-1 C4
3UU0-2 C4
3UU0-3 C2
3UU1 C4
3UU2 D6
3UU3-1 C4
3UU3-2 C5
3UU3-3 C6
3UU3-4 C7
7UU0 B4
7UU1 B5
7UU2-1 C3
7UU2-2 C3
7UU3 C6
9UU0-1 A4
9UU0-2 A4
9UU0-3 A4
9UU0-4 A4
9UU1-1 A4
9UU1-2 A4
9UU1-3 A4
9UU1-4 A4
FUU0 A5
IUU0 C3
IUU1 C4
IUU2 C5
IUU3 C6
IUU4 C6
IUU5 C7
IUU6 D6

7
4

DC/DC / CLASS D

2009-10-22

8204 000 8951


18770_527_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 189

10.20 B03 820400089515 CLASS D


Audio

Audio

B03A
2

5
+AVCC

7D03-1
BC847BS(COL)
6

3D09

+24V-AUDIO-POWER

+24V-AUDIO-POWER

220R

GND-AUDIO

7D15-2
BC847BS(COL)
4

4K7

ID19
ID18

6
5
18
17

2D16

GND-AUDIO
2D17

ID29

11
7
4
2

1u0
ID30

1u0
ID37

AUDIO-MUTE-UP

10
12

AVCC

47n

3
3D02-2

4K7

1u0

IN
L

2D26

2D22
220n

8
3D14-1
220n

3D14-2
22K
2

6
3

3D14-3
22K

5
3D14-4
22K

2D08

7D10-1
TPA3120D2PWP

PVCC
BSR

CLASS-D
AUDIO AMP

GND-AUDIO

1
3

2D23

ID15

19
20

2D29

3D02-4

FD03

+AUDIO-L

220n

220n

2D07

7D15-1
BC847BS(COL)
1

22K

4K7

2D20

3D02-3

47n

220u 35V

A-PLOP

3D02-1

4K7

1u0

ID28

ID27

2D24

2D19

ID14

2D28

FD01

-AUDIO-R

GND-AUDIO

220u 35V

2D05

10u 35V

22K

220R
5D08

ID11

A
5D07

ID12

220n

3D16

2D06

4R7

FD14

B03A

10-20-1

R
OUT
L

0
GAIN
1

BSL

16

ID32

2D10
ID06

22u

22
21

5D05

5D02

ID10
220n

15

5D01

ID09
ID31

2D09

22u

ID05

2D12

220R

ID08

5D04

ID07

220R

RIGHT-SPEAKER

25V 220u
2D11

LEFT-SPEAKER

25V 220u

220n
VCLAMP
BYPASS
MUTE
SD

2D27

2D21
220n

8
3D10-1
220n

6
3D10-3
22K

3D10-2
22K
2

3D10-4
22K

25

22K

4K7

GND-AUDIO

+3V3-STANDBY
5

3D01-2

DETECT2

47K

GND-AUDIO

10n

2D14

VIA

V_NOM

VIA

37
36
35
34

1D50

GND-AUDIO

BZX384-C

LEFT-SPEAKER

VIA

VIA
VIA

MAINS-OK

1D38

1735
30
31
32
33
3D06-4 FD07

LEFT-SPEAKER
4

100K 5

3D06-2

100K

1735446-3

1735446-4

RIGHT-SPEAKER
1

ID33
1D52

GND-AUDIO
RIGHT-SPEAKER

1
2
3

100K

3D06-3

FD02

1
2
3
4

100K
3D06-1

GND-AUDIO

10n

GND-AUDIO
3 7D03-2
BC847BS(COL)

10n

220R

GND-AUDIO

FD05
FD06

5D03

2D13

GND-AUDIO

2D02

V_NOM

2K2

4K7

26
27
28
29

+AVCC

3D04

4K7

GND-AUDIO
ID13 6D01

2D01

GND-AUDIO
3D15-2
3D15-1
2
1
8 7

GND-AUDIO

GND-AUDIO

40
39
38

100p

7D10-2
TPA3120D2PWP

ID36

7D13-2
BC847BS(COL)
4

GND-AUDIO

ID34

2D03

GND-AUDIO

ID39

13
14

8
9
5
3

CD10

ID35
7D11-2
BC847BS(COL)
4

5
47K

7D13-1
BC847BS(COL)
1

3D01-4

MAINS SWITCH DETECT

GND_HS

47K
2

7D11-1
BC847BS(COL)
1
+3V3-STANDBY

3D15-4

+3V3-STANDBY

3D01-1

L
23
24

PGND
AGND

ID38

A-STBY

6
10u
GND-AUDIO

1735 E8
1D38 E9
1D50 E8
1D52 F8
2D01 F7
2D02 F4
2D03 E3
2D05 A5
2D06 A5
2D07 B5
2D08 B6
2D09 C7
2D10 C7
2D11 C8
2D12 C8
2D13 F8
2D14 E8
2D16 C4
2D17 C4
2D19 B6
2D20 B5
2D21 D8
2D22 B8
2D23 B4
2D24 B4
2D26 B8
2D27 D8
2D28 B2
2D29 B2
3D01-1 D3
3D01-2 D3
3D01-4 E2
3D02 B3
3D02 C3
3D02 B4
3D02 C4
3D04 E2
3D06-1 F4
3D06-2 F4
3D06-3 F3
3D06-4 F3
3D09 A3
3D10-1 D8
3D10-2 D8
3D10-3 D7
3D10-4 D7
3D14-1 B8
3D14-2 B8
3D14-3 B7
3D14-4 B7
3D15-1 E2
3D15-2 E3
3D15-4 D5

3D16 A5
5D01 C7
5D02 C7
5D03 E7
5D04 C8
5D05 C8
5D07 A6
5D08 A6
6D01 E3
7D03-1 A5
7D03-2 F5
7D10-1 B6
7D10-2 E5
7D11-1 D2
7D11-2 D3
7D13-1 E1
7D13-2 E2
7D15 B3
7D15 C3
CD10 D5
FD01 B1
FD02 F8
FD03 B1
FD05 E8
FD06 E8
FD07 F4
FD14 A5
ID05 C8
ID06 C8
ID07 C8
ID08 C8
ID09 C7
ID10 C7
ID11 A4
ID12 A5
ID13 E3
ID14 B3
ID15 B3
ID18 C5
ID19 C5
ID27 B6
ID28 B6
ID29 C5
ID30 C5
ID31 C6
ID32 C6
ID33 F4
ID34 D3
ID35 D3
ID36 E2
ID37 D4
ID38 D5
ID39 E2

9
5

CLASS D

2010-02-19

8204 000 8951


18770_850_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-20-2

Q552.1E LA

10.

EN 190

DC/DC

DC/DC

B03B
1

B03B
2

10

11

14

13

12

15

A
5U03 RES
30R
5U02

FU05

IU22
+12V
1u0

2U20

10u

10u

7 8

IU10

12V/1V8 CONVERSION

3R3

3U11

2U19

2U25

7U02-1
SI4952DY

10u

10u

2U23

2U24

30R

FU02

2U21

5U00

FU03

22u

47u

2U16

2U15

3u6
47R

47R
1 3U23-1 8

47R

2 3U23-2 7

7U02-2
SI4952DY

47R

3U23-4

220p

3 3U23-3 6

+1V8
IU11

5 6

IU09

1n0

2U17

IU23

IU15

IU08

5 6 7 8

IU12

10R

2U22
IU07
3U28

IU05

20

VIN

2U06

10K

2U14

RES 100u 2.0V

22u

2U13

47u

2U12

10R
RES

IU17

1u0

100n

IU18

GND-SIG

1u0

1n0

2U10

GND-SIG
2U09

3U01

FU04

IU25

GND

+1V1

10K

GND-SIG

18
19

2U05

3U00

V5FILT
VREG5

7
17

3U20

1
2

47R

TEST

2u0
47R
3U24-1

1
TRIP
2

22
15

FU01
+1V1

47R

1
2

5U01

47R

PGND

24
13

3U24-2

21
16

1
VFB
2

12V/1V1 CONVERSION
FU06

2U11

IU02

1
SW
2

1
VO
2

1 2 3

1
12

+3V3-STANDBY

3U03
22K

GND-SIG

IU01

22K
GND-SIG

1
2

10u

DRVH

5 6 78
4
IU14

3U24-3

GND-SIG
3U02
3

1
EN
2

23
14

2U04

IU03

5
8

1
2

3U24-4

1n0 RES

2U03
7U00
BC847BW

4
9

+1V1
+1V8

DRVL

7U04
SI4778DY
IU16

6U00

3
10

ENABLE-1V8

1
VBST
2

220p

STPS2L30A

2
11

IU13

3R3

7U03
TPS53126PW

IU24

RES

3U05

100n

2U01

100n

1n0

2U02

10R

IU06

3R3

3U14

1 2 3

3R3

3U04

10u

2U00

1n0

3U27

2U18

7U01
SI4778DY

3U21

FU00

SENSE+1V1

IU19

3U18

5K6

100n

IU21

RES 100p

22K

2U07

3U10

3U09

RES
2U29

3U17
IU04

3U19

2U08

3U22
1K0 1%

1K0 1%

3U08
+1V8
330R 1%

100p RES

IU20

1% 1K0

1% 330R

100R 1%

GND-SIG

GND-SIG

GND-SIG

CU00

GND-SIG

GND-SIG

GND-SIG
GND-SIG

1
2U00 D2
2U01 E3
2U02 D4
2U03 E2

2U04 F4
2U05 F4
2U06 F1
2U07 H3

2
2U08 G9
2U09 F9
2U10 F10
2U11 F9

3
2U12 F11
2U13 F12
2U14 E14
2U15 C10

2U16 C10
2U17 C9
2U18 D9
2U19 B12

4
2U20 B14
2U21 C6
2U22 D8
2U23 B5

5
2U24 B5
2U25 B12
2U29 G14
3U00 F1

3U01 F1
3U02 F2
3U03 F3
3U04 D3

6
3U05 E4
3U08 G2
3U09 H3
3U10 H3

7
3U11 B6
3U14 D7
3U17 G10
3U18 G10

3U19 G9
3U20 F11
3U21 G13
3U22 G2

8
3U23-1 C9
3U23-2 C9
3U23-3 C9
3U23-4 C8

3U24-1 F9
3U24-2 F9
3U24-3 F9
3U24-4 F8

9
3U27 D5
3U28 D5
5U00 C10
5U01 E10

11

10
5U02 B13
5U03 A13
6U00 E8
7U00 F1

7U01 D8
7U02-1 B6
7U02-2 C6
7U03 E3

7U04 E8
CU00 H7
FU00 G13
FU01 E14

12
FU02 B9
FU03 C14
FU04 F4
FU05 B9

FU06 E8
IU01 F3
IU02 F3
IU03 F1

13
IU04 G3
IU05 D3
IU06 D3
IU07 D4

14

IU08 D4
IU09 C6
IU10 B 6
IU11 C6

IU12 D7
IU13 D7
IU14 E8
IU15 C9

15
IU16 E5
IU17 F9
IU18 F9
IU19 G10

IU20 G9
IU21 H9
IU22 B13
IU23 C9

IU24 E3
IU25 F4

DC/DC

2010-02-19

8204 000 8951


18770_851_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-20-3

Q552.1E LA

10.

EN 191

DC/DC

DC/DC

B03C

B03C

+3V3-STANDBY

+3V3

3U75

+5V +3V3-STANDBY

RES 10K

3U74

RES 10K

LED-2

IU43

3U69

RES 10K

LED-1

10K

3U68

9U41

IU44

3U41

IU45
9U42
RES

optionally 1M99 is a 9 pin connector

LED2

3U59

LED2

10K RES

10K RES

7U42 RES
BC847BW
IU47

2U41 RES

7U43
BC847BW

100p

+3V3

3U70

LED1

3U53

LED1

10K

10K

+12VD

FU49
FU50

10K
3U45

7U48-1
BC857BS(COL)

10K
IU55

3U83-1

100K
IU41

3U56

ENABLE-3V3-5V

3U83-4

100K

10n

1n0

BACKLIGHT-PWM-ANA-DISP

100R

2U46

2U45

10n

100p

2U43

2U44

3U65

1K0 RES
BACKLIGHT-BOOST
FU07

3U44

+3V3

IU64

3U82

BACKLIGHT-PWM_BL-VS

3U43

100R

FU54
RES 1K0

1n0

2U53

RES 100p

2U52

2U51

RES 100p

100p

1K0

2U72

3U42

100R

3U64

FU55

LAMP-ON

100R

FU52
FU53

100n

FU51

1-1735446-2

IU56

3U81

+3V3

1u0

RES

POWER-OK

3U66
BL-SPI-SDO

FU56
3U67

RES 100R

BL-SPI-CSn

FU57

+3V3-STANDBY

3U84
BL-SPI-CLK

FU74
100R RES

3U71

2U68

100R RES

2U42

FU48

2U71

1M99
1
2
3
4
5
6
7
8
9
10
11
12

STANDBY

7U48-2
BC857BS(COL)

IU48

3U83-3

3U83-2

100K

IU40

100K

DETECT2

22K

3U60-4
4

IU50

4K7

3U80

IU62

7U41-2
BC847BS(COL)

3U63

3U60-1

IU57
1

ENABLE-3V3n

22K

IU52

10K

RES 10K

22K

FU72

6
1
7U41-1
BC847BS(COL)
1

3K3

ENABLE-1V8
3U61

22K

IU63

3U62-1

+3V3-STANDBY

FU73

10K

3U62-3

7
1

3U60-3

RES 10K

10K

3U62-2

7U40-1
BC847BPN(COL)

3U60-2

6U40

2
10n

3U73

IU49

1u0 RES

MAINS-OK

100R
10n
2U54

3
IU61

2
1K0

+24V-AUDIO-POWER
3U76

100p RES
2U50

100p RES

IU51

BZX384-C6V2

T 3.0A 32V
FU66

FU68

GND-AUDIO

+12V

2U55

1U40

FU67

1-1735446-1

3
4

+3V3-STANDBY

3U72

FU58
FU59
FU60
FU61
FU62
FU63
FU64
FU65

2U48

10n

1M95
1
2
3
4
5
6
7
8
9
10
11

2U49

7U40-2
BC847BPN(COL)

1u0
2U47

10K

3U62-4

100R

1M95 E1
1M99 C1
1U40 E2
2U41 B1
2U42 C2
2U43 D2
2U44 D3
2U45 D3
2U46 D3
2U47 E1
2U48 F1
2U49 F1
2U50 F1
2U51 D1
2U52 D1
2U53 D2
2U54 F2
2U55 F3
2U68 E1
2U71 D5
2U72 D1
3U41 B5
3U42 C3
3U43 C3
3U44 C3
3U45 C3
3U53 B6
3U56 D3
3U59 B6
3U60-1 F5
3U60-2 F4
3U60-3 E5
3U60-4 F5
3U61 E5
3U62-1 F4
3U62-2 E3
3U62-3 E4
3U62-4 E3
3U63 F5
3U64 C2
3U65 D2
3U66 D2
3U67 D2
3U68 B3
3U69 B3
3U70 B4
3U71 D3
3U72 F3
3U73 F3
3U74 A4
3U75 A4
3U76 F2
3U80 F4
3U81 C3
3U82 C5
3U83-1 D6
3U83-2 E5

3U83-3 E5
3U83-4 C5
3U84 D2
6U40 E3
7U40-1 F4
7U40-2 E4
7U41-1 F4
7U41-2 F5
7U42 B5
7U43 B3
7U48-1 C6
7U48-2 E6
9U41 B5
9U42 B4
FU07 C3
FU48 C1
FU49 C1
FU50 C1
FU51 C1
FU52 C3
FU53 C2
FU54 C2
FU55 C1
FU56 D1
FU57 D1
FU58 E1
FU59 E1
FU60 E1
FU61 E1
FU62 E1
FU63 E1
FU64 F1
FU65 F1
FU66 F1
FU67 F1
FU68 F1
FU72 F4
FU73 E5
FU74 D1
IU40 E5
IU41 D5
IU43 B5
IU44 B5
IU45 B4
IU47 B4
IU48 E4
IU49 E3
IU50 F4
IU51 F3
IU52 F5
IU55 D3
IU56 C3
IU57 F6
IU61 E4
IU62 F4
IU63 F3
IU64 C6

9
5

DC/DC

2010-02-19

8204 000 8951


18770_852_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-20-4

Q552.1E LA

10.

EN 192

DC/DC

B03D

DC/DC

B03D

RESERVED

1K0

3UA6

1u0

2UA6

1u0

2UA5

22K

3UA8
5

IUA7

7UA1-2
LM833
7

FUA2

3UB0

1u0

330R
1%

3U13

+3V3

+5V

+2V5-LVDS

3U16-1

100R
7UA3
PHD38N02LT

3U15-2

IUA5

3U15-3

3U16-3

100R
4

3U16-4

100R

1u0

2UB2

2UB1

NOT FOR 5000 SERIES

1K0

RES 1u0

+3V3

100R

100R

1n0

2UA9
330p

IUA8
3UA9

3U15-4

+1V2

2UA8

3U16-2

100R
FUA3

100R
2

100R

22R

100n

2UA7

7
470R
3UB7-3
6
470R
3UB7-1
1
8

3U15-1

IU26

IUB4

3UB7-2

22u

2UB8

7UA7-2
4
BC847BS(COL)

+5V

470R

470R

+1V8
+12V

2UB0

7
IUB3
1K0 IUB2
3UB6-3
6
6
1K0
3UB6-4
4
5
2
1K0
3UB6-1
IUB5
7UA7-1
1
8
3 1
BC847BS(COL)
1K0
3UB7-4
4
5
5
3

CUA0

330R
1%

7UA6
BC817-25W

3U12

+5V-TUN

3UB6-2

+2V5

1K0

IUB6
+5V5-TUN

+2V5-REF

1K0

B
FUA4

3UA7
IUA2

+12V

1u0

IUA9

330p

2UA2

2UA3

FUA1

22R

IUA4

3UA5

2UA4

2
IUA3

COM

7UA1-1
LM833
1

OUT

1n0

IUA1

IN

7UA2
PHD38N02LT

3UA4
2UA1

47K

100n

7UA0
TS2431

3UA2

3UA3

+2V5-REF
1

3K3 1%

FUA0

7UC0
LF25ABDT

2UA0

100n

2K2

3UA0

3UA1

3K3 1%

+12V

+3V3

+12V

+2V5-REF

ENABLE-1V8
5

3UB1

SENSE+1V2

RESERVED
5UA0

1K0

30R
3U29-1

RES

+12V

470R

RES
5

470R

2
4

3U29-4

RES

A
NC

REF

470R
1

3U26-1

3U26-2

3U26-3

4K7

IN

OUT

INH

BP

+5V-TUN

IUB1

COM

RES
3UB5

3UB4

100K

1K0

IUB0

2UB3

+5V

470R
+3V3

NC

RES

470R

+5V5-TUN

1u0

7UA4
TS431AILT

2UB7

+3V3

IU30

3U29-3

3UB2

RES

4K7

470R

3UB3

RES
7U06-1
BC847BS(COL)
1

3U29-2

1
3U25-1

6
5

3
RES
7U06-2
BC847BS(COL)
4

100K RES

IU29

7UA5
LDS3985M50

1u0

100n
2UB6

3U25-2

100K RES

IUA6

2UB5

3U25-3

100K RES

3U25-4

100K RES

RES

22n
2UB4

470R
4

3U26-4

RES

330p
RES

470R

2UA0 A5
2UA1 A4
2UA2 B5
2UA3 B5
2UA4 A7
2UA5 B6
2UA6 B7
2UA7 D4
2UA8 D5
2UA9 D5
2UB0 C7
2UB1 D6
2UB2 D7
2UB3 F6
2UB4 F6
2UB5 F8
2UB6 F8
2UB7 F7
2UB8 D2
3U12 C3
3U13 C3
3U15-1 C8
3U15-2 C8
3U15-3 D8
3U15-4 D8
3U16-1 C9
3U16-2 C9
3U16-3 D9
3U16-4 D9
3U25-1 E3
3U25-2 E3
3U25-3 E2
3U25-4 E2
3U26-1 F3
3U26-2 F3
3U26-3 F3
3U26-4 F3
3U29-1 E3
3U29-2 E3
3U29-3 E3
3U29-4 F3
3UA0 A2
3UA1 A3
3UA2 B3
3UA3 B4
3UA4 A4
3UA5 A6
3UA6 B5
3UA7 B6
3UA8 B5
3UA9 D5
3UB0 D6

3UB1 E6
3UB2 E6
3UB3 F6
3UB4 F5
3UB5 F5
3UB6-1 C2
3UB6-2 C2
3UB6-3 C2
3UB6-4 C2
3UB7-1 D3
3UB7-2 D2
3UB7-3 D2
3UB7-4 C2
5UA0 E8
7U06-1 F2
7U06-2 F1
7UA0 B2
7UA1-1 A5
7UA1-2 C5
7UA2 A6
7UA3 C6
7UA4 E5
7UA5 E8
7UA6 C3
7UA7-1 C3
7UA7-2 D2
7UC0 A8
CUA0 B9
FUA0 A2
FUA1 A7
FUA2 D5
FUA3 D7
FUA4 B9
IU26 C3
IU29 E2
IU30 F3
IUA1 A4
IUA2 B5
IUA3 A6
IUA4 A6
IUA5 C6
IUA6 E5
IUA7 C4
IUA8 D5
IUA9 B6
IUB0 F6
IUB1 E8
IUB2 C2
IUB3 C3
IUB4 D3
IUB5 C2
IUB6 B3

9
5

DC/DC

2010-02-19

8204 000 8951


18770_853_100331.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 193

DC/DC

DC/DC

B03E
2

5UD0

IUD0

+12V

FUD3

2UD7

33K
1%

12

68K
3UD1

1%
3UD0

VIA

10

7U05-1
BC847BS(COL)
RES 1

4n7
3UD2

15

7UD0-2
ST1S10PH

13

IUD6

120K

100n

22u

IU27

10K

+1V1
RES 2U27

SS36

RES 2UE9

+5V
3u6

VFB
GND
P HS

6UD0

IUD7

RES 3U06

SYNC

5UD1

220u 16V

IUD3

SW

VIN

2UD6

INH

22u

22u
2UD5

SW

A
RES 1n0

2UD3

ENABLE-3V3-5V

2UD4

7UD0-1
ST1S10PH

10u

10u

2UD2

2UD1

10u

2UD0

30R

+5V5-TUN

B03E

10-20-5

Q552.1E LA

14

11

5UD3

C
+3V3

3
7U05-2
RES
4

100n
IU28

D
RES 3U07

33K
1%

12

1M0
3UD5

VIA

10

3UD4

15

13

IUD2
7UD1-2
ST1S10PH

BC847BS(COL)

RES 2U28

220u 16V

2UE4

22u

22u
2UE3

3UD3

+1V1

10K

FUD2

3u6

VFB
GND
P HS
8

5UD2

2UE2

SYNC

IUD4

SW

VIN

1% 100K

INH

4n7

SW

A
ENABLE-3V3-5V

2UE1

7UD1-1
ST1S10PH

10u

2UE0

10u

2UD9

10u

2UD8

30R

IUD1

+12V

14

11

IUD5

IN

S1D

OUT

100n

2UE5

+2V5

COM

22u 16V

6UD1
+5V

2UE6

7UD2
LD1117DT25

() FOR 5000 SERIES ONLY


() NOT FOR 5000 SERIES

7UD3
LD1117DT33

IN

OUT

+3V3

2UE8

100n

2UE7

COM

22u 16V

2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
2UD4 B5
2UD5 B5
2UD6 B6
2UD7 B6
2UD8 C2
2UD9 C2
2UE0 C3
2UE1 D5
2UE2 D6
2UE3 D6
2UE4 D6
2UE5 E4
2UE6 E6
2UE7 F4
2UE8 F5
2UE9 B8
3U06 B8
3U07 D8
3UD0 B5
3UD1 B5
3UD2 B6
3UD3 D5
3UD4 D5
3UD5 D5
5UD0 A2
5UD1 A5
5UD2 C5
5UD3 C2
6UD0 A6
6UD1 E4
7U05-1 B7
7U05-2 D7
7UD0-1 A4
7UD0-2 B4
7UD1-1 C4
7UD1-2 D4
7UD2 E5
7UD3 F5
FUD2 C5
FUD3 A7
IU27 B8
IU28 D8
IUD0 A2
IUD1 C2
IUD2 D5
IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5

8
5

DC/DC

2010-02-19

8204 000 8951


18770_854_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-20-6

Q552.1E LA

10.

EN 194

Temp Sensor + AmbiLight

B03F

Temp Sensor + AmbiLight

B03F
3

7
1UM0 A4
5UM0 A3
5UM1 A3
FUM0 A5
IUM0 A4

5UM1

1UM0

IUM0

+3V3

FUM0

V-AMBI

T 1.0A 63V

30R
5UM0
+5V
RES 30R

7
5

DC/DC

2010-02-19

8204 000 8951


18770_855_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-20-7

Q552.1E LA

10.

EN 195

Fan Control

B03G

Fan-Control

B03G
2

+12V

+12V

1K0

FAN-CTRL1

IUS3 3US5-3
6
3

IUT1

100n

7
7US1-1
LM339P
14

2US3

10K

3US5-2

3US7

10K

3US4-1

+12V

10K

3US2

+3V3

IUS6

10K

7US2
BC807-25W

12
+12V

IUS7

IUT2
FAN-CTRL2

7US1-2
LM339P
13

22R

IUS4 3US5-4
5
4

10

10K

BC807-25W
7US3

IUS8

12

3US6

IUS9
47R

11

10K

3US3

+12V

10K

3US5-1

3US9

+3V3

FAN-DRV
+3V3

10K

7US1-3
LM339P
2

10K

3US4-3
3

+12V

IUS5

3US4-4

+12V

4
12

TACH01

2US3 A7
3US2 A3
3US3 B3
3US4-1 A4
3US4-2 D4
3US4-3 C4
3US4-4 C5
3US5-1 B6
3US5-2 A6
3US5-3 A5
3US5-4 B5
3US6 C6
3US7 A4
3US9 B6
7US1-1 A5
7US1-2 B5
7US1-3 C5
7US1-4 D5
7US2 A6
7US3 B6
9US0 D4
IUS0 D5
IUS3 A5
IUS4 B5
IUS5 C5
IUS6 A6
IUS7 B7
IUS8 B6
IUS9 B6
IUT1 A4
IUT2 B4

RES

9US0

+12V

+12V

10K

3US4-2

7US1-4
LM339P
1

IUS0

12

TACH02

TACHO

9
5

DC/DC

2010-02-19

8204 000 8951


18770_856_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 196

Vdisp Switch

VDisp-Switch

B03H
2

1 9UU0-1
RES
2 9UU0-2
RES
3 9UU0-3
RES
4 9UU0-4
RES
1 9UU1-1
RES
2 9UU1-2
RES
3 9UU1-3
RES
4 9UU1-4
RES

3UU0-2

8
7
6
FUU0

2
IUU2

1u0

IUU1

+VDISP-INT

3UU3-2

IUU3
7

47K RES
7UU3 RES
BC847BW

47K

2
3

7UU2-1
PUMD12
1

IUU4 3UU3-3 IUU5 3UU3-4


1
6
3
4
5

3UU0-3
+3V3-STANDBY

3UU0-1

47K

47K

47R
7

7
6

47K RES
2UU1

3UU1

IUU0

3UU3-1

7UU1
SI3441BDV

+12VD

7UU0
SI4835DDY
RES

4
PUMD12
7UU2-2

47K RES
2

+3V3

47K RES
100n

B03H

2UU0

10-20-8

Q552.1E LA

IUU6

VDISP-SWITCH

3UU2

+3V3

4K7 RES

D
LCD-PWR-ONn

2UU0 C6
2UU1 C4
3UU0-1 C4
3UU0-2 C4
3UU0-3 C2
3UU1 C4
3UU2 D6
3UU3-1 C4
3UU3-2 C5
3UU3-3 C6
3UU3-4 C7
7UU0 B4
7UU1 B5
7UU2-1 C3
7UU2-2 C3
7UU3 C6
9UU0-1 A4
9UU0-2 A4
9UU0-3 A4
9UU0-4 A4
9UU1-1 A4
9UU1-2 A4
9UU1-3 A4
9UU1-4 A4
FUU0 A5
IUU0 C3
IUU1 C4
IUU2 C5
IUU3 C6
IUU4 C6
IUU5 C7
IUU6 D6

7
5

DC/DC / CLASS D

2010-02-19

8204 000 8951


18770_857_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 197

10.21 B03 820400089516 CLASS D


Audio

Audio

B03A
2

5
+AVCC

7D03-1
BC847BS(COL)
6

3D09

+24V-AUDIO-POWER

+24V-AUDIO-POWER

220R

GND-AUDIO

3D02-2

7D15-2
BC847BS(COL)
4

4K7

ID19
ID18

6
5
18
17

2D16

GND-AUDIO
2D17

ID29

11
7
4
2

1u0
ID30

1u0
ID37

AUDIO-MUTE-UP

10
12

AVCC

47n

4K7

1u0

IN
L

2D26

2D22
220n

8
1

3D14-1
220n

7
3D14-2
22K
2

6
3

3D14-3
22K

5
22K

220n

7D10-1
TPA3120D2PWP

PVCC
BSR

CLASS-D
AUDIO AMP

GND-AUDIO

1
3

2D23

ID15

19
20

2D29

3D02-4

FD03

+AUDIO-L

2D08

220n

2D07

2D20

7D15-1
BC847BS(COL)
1

3D14-4
22K

4K7

47n

220u 35V

A-PLOP

3D02-1

6
3D02-3

4K7

1u0

ID28

ID27

2D24

2D19

ID14

2D28

FD01

-AUDIO-R

GND-AUDIO

220u 35V

2D05

10u 35V

22K

220R
5D08

ID11

A
5D07

ID12

220n

3D16

2D06

4R7

FD14

B03A

10-21-1

R
OUT
L

0
GAIN
1

BSL

16

ID32

2D10
ID06

22u

22
21

5D05

5D02

ID10
220n

15

5D01

ID09
ID31

2D09

22u

ID05

2D12

220R

ID08

5D04

ID07

220R

RIGHT-SPEAKER

25V 220u
2D11

LEFT-SPEAKER

25V 220u

220n
VCLAMP
BYPASS
MUTE
SD
PGND

2D27

3D10-1
220n
1

2D21
220n

7
3D10-2
22K
2

6
3D10-3
22K
3

22K

3D10-4
22K

25

13
14

4
2

DETECT2

47K

GND-AUDIO

BZX384-C

LEFT-SPEAKER

VIA

VIA

37
36
35
34

GND-AUDIO

10n

VIA

VIA

2D14

4K7

26
27
28
29

+AVCC

3D04

VIA

MAINS-OK

30
31
32
33

1735

3D06-4 FD07

LEFT-SPEAKER
4

100K 5

3D06-2

100K

1735446-3

1735446-4

RIGHT-SPEAKER
1

ID33
1D52

GND-AUDIO
RIGHT-SPEAKER

1
2
3

100K

3D06-3

FD02

1D38
1
2
3
4

100K
3D06-1

GND-AUDIO

10n

GND-AUDIO
3 7D03-2
BC847BS(COL)

10n

220R

GND-AUDIO

FD05
FD06

5D03

2D13

GND-AUDIO

2D02

V_NOM

4K7

GND-AUDIO
ID13 6D01

GND-AUDIO

V_NOM

GND-AUDIO
3D15-1
3D15-2
1
8 7
2

GND-AUDIO

40
39
38

100p

7D10-2
TPA3120D2PWP

1D50

2K2
GND-AUDIO

ID36

7D13-2
BC847BS(COL)
4

GND-AUDIO

+3V3-STANDBY
3D01-2

2D03

GND-AUDIO

ID39

ID34

2D01

CD10

ID35
7D11-2
BC847BS(COL)
4

5
47K

7D13-1
BC847BS(COL)
1

3D01-4

MAINS SWITCH DETECT

GND_HS

47K
2

7D11-1
BC847BS(COL)
1
+3V3-STANDBY

4K7

+3V3-STANDBY

3D01-1

3D15-4

8
9

L
23
24

AGND

ID38

A-STBY

6
10u
GND-AUDIO

1735 E8
1D38 E9
1D50 E8
1D52 F8
2D01 F7
2D02 F4
2D03 E3
2D05 A5
2D06 A5
2D07 B5
2D08 B6
2D09 C7
2D10 C7
2D11 C8
2D12 C8
2D13 F8
2D14 E8
2D16 C4
2D17 C4
2D19 B6
2D20 B5
2D21 D8
2D22 B8
2D23 B4
2D24 B4
2D26 B8
2D27 D8
2D28 B2
2D29 B2
3D01-1 D3
3D01-2 D3
3D01-4 E2
3D02 B3
3D02 C3
3D02 B4
3D02 C4
3D04 E2
3D06-1 F4
3D06-2 F4
3D06-3 F3
3D06-4 F3
3D09 A3
3D10-1 D8
3D10-2 D8
3D10-3 D7
3D10-4 D7
3D14-1 B8
3D14-2 B8
3D14-3 B7
3D14-4 B7
3D15-1 E2
3D15-2 E3
3D15-4 D5
3D16 A5
5D01 C7
5D02 C7
5D03 E7
5D04 C8
5D05 C8
5D07 A6
5D08 A6
6D01 E3
7D03-1 A5
7D03-2 F5
7D10-1 B6
7D10-2 E5
7D11-1 D2
7D11-2 D3
7D13-1 E1
7D13-2 E2
7D15 B3
7D15 C3
CD10 D5
FD01 B1
FD02 F8
FD03 B1
FD05 E8

FD06 E8
FD07 F4
FD14 A5
ID05 C8
ID06 C8
ID07 C8
ID08 C8
ID09 C7
ID10 C7
ID11 A4
ID12 A5
ID13 E3
ID14 B3
ID15 B3
ID18 C5
ID19 C5
ID27 B6
ID28 B6
ID29 C5
ID30 C5
ID31 C6
ID32 C6
ID33 F4
ID34 D3
ID35 D3
ID36 E2
ID37 D4
ID38 D5
ID39 E2

9
6

CLASS D

2010-03-08

8204 000 8951


18773_500_100830.eps
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-21-2

Q552.1E LA

10.

EN 198

DC/DC

DC/DC

B03B

B03B

2U08 G9
2U09 F9
2U10 F10
2U11 F9

2U04 F4
2U05 F4
2U06 F1
2U07 H3

2U00 D2
2U01 E3
2U02 D4
2U03 E2

2U12 F11
2U13 F12
2U14 E14
2U15 C10

2U24 B5
2U25 B12
2U29 G14
3U00 F1

2U20 B14
2U21 C6
2U22 D8
2U23 B5

2U16 C10
2U17 C9
2U18 D9
2U19 B12

3U01 F1
3U02 F2
3U03 F3
3U04 D3

3U19 G9
3U20 F11
3U21 G13
3U22 G2

3U11 B6
3U14 D7
3U17 G10
3U18 G10

3U05 E4
3U08 G2
3U09 H3
3U10 H3

3U27 D5
3U28 D5
5U00 C10
5U01 E10

3U24-1 F9
3U24-2 F9
3U24-3 F9
3U24-4 F8

3U23-1 C9
3U23-2 C9
3U23-3 C9
3U23-4 C8

5U02 B13
5U03 A13
6U00 E8
7U00 F1

7U01 D8
7U02-1 B6
7U02-2 C6
7U03 E3

10

FU02 B9
FU03 C14
FU04 F4
FU05 B9

7U04 E8
CU00 H7
FU00 G13
FU01 E14

11

FU06 E8
IU01 F3
IU02 F3
IU03 F1

IU04 G3
IU05 D3
IU06 D3
IU07 D4

IU08 D4
IU09 C6
IU10 B 6
IU11 C6

IU16 E5
IU17 F9
IU18 F9
IU19 G10

IU12 D7
IU13 D7
IU14 E8
IU15 C9

14

13

12

IU20 G9
IU21 H9
IU22 B13
IU23 C9

15

IU24 E3
IU25 F4

A
1

10

11

13

12

14

15

5U03 RES
30R
5U02

FU05

IU22
+12V
1u0

2U20

10u

10u

2U19

12V/1V8 CONVERSION

3R3

3U11

7 8

IU10

2U25

7U02-1
SI4952DY

10u

10u

2U23

2U24

30R

FU02

2U21

5U00

FU03

2U17

2U11

GND-SIG

2U04 F4
2U05 F4
2U06 F1
2U07 H3

2U08 G9
2U09 F9
2U10 F10
2U11 F9

2U12 F11
2U13 F12
2U14 E14
2U15 C10

2U07

GND-SIG

22u

47u

1u0

2U20

10u

2U19

10u

2U25
22u

RES 100u 2.0V

2U14

22u

2U13

47u

2U12

3U20

10R
RES

2U14

100n

RES
2U29
100n

RES
2U29

1% 330R

GH

1% 1K0

3U18

5K6

3U19

RES 100u 2.0V

22u

2U13

47u

2U12

10R
RES

3U20

1u0

3U18
3U17

GND-SIG

2U16 C10
2U17 C9
2U18 D9
2U19 B12

SENSE+1V1

100R 1%

IU21

RES 100p

22K

3U10

1K0 1%

IU19
GND-SIG

IU20

IU04

3U09

2U00 D2
2U01 E3
2U02 D4
2U03 E2

1% 330R

3U17
GND-SIG

SENSE+1V1

FG

FU00

3U21

GND-SIG

1K0 1%

2U10

47R

47R
3U24-1

IU21

GND-SIG

2U08

3U22

3U08
330R 1%

FU00

3U21

1u01% 1K0

2U09

IU18

2U10

2U08

1u0

GND-SIG

GND-SIG

+1V8

GND-SIG

2U16

47R

47R
3U24-1

1n0

47R2U09

3U24-21n0

47R

3U24-4

IU19

IU17

100p RES

GND-SIG

47u

47R

47R
1 3U23-1 8

1n0

2U17

1n0

2U18

47R

3U24-2

47R

3U24-3

3U24-4

STPS2L30A

6U00
6U00

STPS2L30A

+1V1
2u0

CU00

H G

2U16

2U15

47R

47R
1 3U23-1 8

1n0

2U15

2U18
5
47R

3 3U23-3 6

3U23-4
4

3R3

3U14
10R

3U28

1u0
FU04

IU25

IU20

22K

2U07

3U10

3U09

1K0 1%

1K0 1%

330R 1%

3R3

18
19

GND-SIG

IU04

FU01

100R 1%

RES 100p

10K

3U01

3U22

+1V8

5U01

IU18

GND

+1V1

3U08

GND-SIG

7
17

100n

10K

E F

12V/1V1 CONVERSION

5K6

V5FILT
VREG5

3U14

3R3

3U05

VIN

IU17

1 2 3

FU06

GND-SIG

5 6 78
4

24
13
22
15

2u0

3U19

20

+1V1

100p RES

GND-SIG

2U06

3U00

220p

FU01

1n0

IU02

1
TEST
2

5U01

2U11

22K

GND-SIG

1
2

IU13

IU16

FU04

2U05

PGND

1
TRIP
2

1
2

FU03
+1V8

1n0

3U03

1
VFB
2

21
16

SW

3u6

12V/1V1 CONVERSION

3U24-3

IU01

22K

2
+3V3-STANDBY

3R3

GND-SIG
3U02
3

1 GND-SIG
VO
2

5
8

1
2

1
12

5U00

FU06

IU14

10u

IU03

4
9

+1V1
+1V8

DRVH

5 6 7 8
1 2 3
1 2 3

IU25

2U04

7U00
BC847BW

1 GND
EN
2

4
4

7U04
SI4778DY

GND-SIG

2U05

1n0 RES

10K

100n

IU12
IU14

IU07

7
17

IU15

5 6 78

2U22

23
20 2
1
118
11VIN VBST V5FILT
DRVL 19 14
2
VREG5 2
3
10

3U27
10R

22
1 100n
15
2

PGND

21 7U03
1
1
16 TPS53126PW
TRIP
TEST
2
2

+1V1

ENABLE-1V8
10K

RES

G F

IU24

1
VFB
2

2U06

3U00

2U03

+3V3-STANDBY

3U01

F E

IU02

GND-SIG

IU01

3U03
22K

GND-SIG

IU08

1
12

10u

22K

23
14

24
1
13
SW
2 2U02

IU03

GND-SIG
3U02
3

1
2

DRVH

1
VO
2 IU06

5
8

1
2

DRVL

1
EN
2

4
9

IU05
2U01

7U00
BC847BW

+1V1
+1V8

100n

RES

3U04

2U03

ENABLE-1V8

10u

2U00
1n0 RES

1
VBST
2

3
10

220p

7U04
SI4778DY
7U01
SI4778DY

3U05

2
11

IU24

IU13

IU16

2U04

100n

2U01

100n
7U03
TPS53126PW

IU23

2U22

10R

3U28

IU05

5 6
4

IU07

2U02

3R3

3R3

3U04

10u

2U00

IU06

4
1 2 3

7U02-2
SI4952DY
IU09

5 6 7 8

IU12

220p

47R

FU02

2 3U23-2 7

3R3

3U11

3U27
10R

+12V
30R

IU15
7U01
SI4778DY
2U21

IU22

12V/1V8 CONVERSION

IU11

30R
5U02

IU23
7 8

+1V8

3u6

1n0

3
IU10

IU08

47R

5 6
7U02-1
4 SI4952DY

IU09

10u

10u

2U23

2U24

2 3U23-2 7

FU05

7U02-2
SI4952DY

47R

3U23-4

220p

3 3U23-3 6

5U03 RES

IU11

CU00

GND-SIG

GND-SIG

11

10

12

13

14

15

GND-SIG

2U24 B5
2U25 B12
2U29 G14
3U00 F1

2U20 B14
2U21 C6
2U22 D8
2U23 B5

3U01 F1
3U02 F2
3U03 F3
3U04 D3

3U05 E4
3U08 G2
3U09 H3
3U10 H3

GND-SIG
3U11 B6
3U14 D7
3U17 G10
3U18 G10

3U19 G9
3U20 F11
3U21 G13
3U22 G2

3U23-1 C9
3U23-2 C9
3U23-3 C9
3U23-4 C8

3U24-1 F9
3U24-2 F9
3U24-3 F9
3U24-4 F8

3U27 D5
3U28 D5
5U00 C10
5U01 E10

5U02 B13
5U03 A13
6U00 E8
7U00 F1

7U01 D8
7U02-1 B6
7U02-2 C6
7U03 E3

10

7U04 E8
CU00 H7
FU00 G13
FU01 E14

11

FU02 B9
FU03 C14
FU04 F4
FU05 B9

FU06 E8
IU01 F3
IU02 F3
IU03 F1

12

IU04 G3
IU05 D3
IU06 D3
IU07 D4

IU08 D4
IU09 C6
IU10 B 6
IU11 C6

IU12 D7
IU13 D7
IU14 E8
IU15 C9

13

14

IU16 E5
IU17 F9
IU18 F9
IU19 G10

IU20 G9
IU21 H9
IU22 B13
IU23 C9

H
IU24 E3
IU25 F4

15
5
6

DC/DC

2010-02-19
2010-03-06

8204 000 8951


18770_851_100331.eps
18773_501_100830.eps
100331
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-21-3

Q552.1E LA

10.

EN 199

DC/DC

DC/DC

B03C

B03C

1M95 E1

+3V3-STANDBY

+3V3

+3V3-STANDBY

+3V3

7U43
BC847BW

2U41 RES

100p

RES 10K

3U75

RES 10K

3U75

IU45

3U70

7U43
BC847BW

100p

IU44
IU45
9U42
RES

IU47

2U41 RES

10K

3U69

9U42
RES

optionally 1M99 is a 9 pin connector


optionally 1M99 is a 9 pin connector

3U69

RES 10K

LED-1

IU43

9U41

IU43

9U41

3U68
RES 10K

LED-1

10K

3U68

+5V +3V3-STANDBY
+5V +3V3-STANDBY

3U74 10K
RES

3U74

LED-2

RES 10K

LED-2

3U41
IU44
10K RES

3U59

10K RES

7U42 RES
BC847BW
IU47

3U59
LED2
LED2
LED2
10K RES

LED2
3U41

7U42 RES
BC847BW

10K RES
+3V3
+3V3

3U53
LED1
LED1
LED1
10K

LED1

3U70

10K

3U53
10K

10K

+12VD
+12VD

1u0

10K

3U71

100K

3U83-1

1
100n
100K

2U71
3U83-1
8

100n

100K

3U83-3

7U48-2
7U48-2
BC857BS(COL)BC857BS(COL)

3U83-2
73U83-3 2 7 3U83-2 2
3
6
100K IU40
IU40 100K
100K

IU57
IU57
3U60-1 ENABLE-3V3n
ENABLE-3V3n
8
1

3U63

22K
IU52

4
IU52

3U63

3U60-1
5 1

22K

RES 10K

22K

3U60-4
4

3U80
22K

4K7

DETECT2

7U41-2
7U41-2
BC847BS(COL)
3
BC847BS(COL)

3U61

DETECT2

10K

RES 10K

10K

3U62-3

2
7

3U60-4

68 10K 1
6
1
7U41-1
7U41-1
BC847BS(COL) BC847BS(COL)
2
1
1

ENABLE-1V8 ENABLE-1V8

FU73

FU72

22K

3U60-2

IU62

3U62-1

IU62
IU50 3U62-1 IU50

22K

IU63

3U80

2U55

IU63

3U60-3
3FU73
6

10K

3U62-3

22K

FU72

3U60-2

6
7U40-1
7U40-1
BC847BPN(COL)
BC847BPN(COL)
2
1
1

1u0 RES

1K0

10K

10K
2

6U40
7
10K
BZX384-C6V2

3U62-2

BZX384-C6V2

3K3

IU49

IU51

2
1u0 RES
3U72

2U55

IU49

3U73

10n

10n
2U54

10n RES
100p
2U50

1K0

6U40

100p RES
10n
2U54
2U49

3U72

3U73
+3V3-STANDBY +3V3-STANDBY
3K3

7U40-2
7U40-2
BC847BPN(COL)
BC847BPN(COL)
4
4
IU48
IU48
5
5
3
3
3U60-3
3
6
IU61
IU61
22K
5

5
3U62-4
4

1u0
2U47

100p RES
2U48
2U50

GND-AUDIO

2U49

GND-AUDIO

STANDBY

100R

1M95
E

100p RES

BL-SPI-CLK

STANDBY

3U61

100R

+3V3-STANDBY
+3V3-STANDBY

BL-SPI-CSn

RES 10K

3U71
100R
RES

2
BL-SPI-CLK

POWER-OK
BL-SPI-SDO

3U84

10n
10n
1M95
+3V3-STANDBY +3V3-STANDBY
FU58
FU58
1
FU59
FU59
2
FU60
FU60
3
FU61
FU61
4
FU62
FU62
1U40
+12V
1U40
5
+12V
FU63
FU63
6
FU64
FU64
T
3.0A
32V
IU51
T 3.0A 32V
7
FU65
FU66FU65
8
FU66
+24V-AUDIO-POWER
+24V-AUDIO-POWER
FU67 9
FU67
3U76
10 FU68
3U76
FU68
MAINS-OK
MAINS-OK
11
100R
100R
1-1735446-1
1-1735446-1
1
2
3
4
5
6
7
8
9
10
11

2U48

2U71
BL-SPI-CSn

2U68

1u0
2U47

POWER-OK

2U46

IU55

3U67

100R RES

100K
IU41

10K

BL-SPI-SDO

3U84
100R RES

1K0 RES
7U48-1
7U48-1
BC857BS(COL)
ENABLE-3V3-5V
BC857BS(COL)
3U83-4
5
4
ENABLE-3V3-5V

RES 10K

10n

1n0

100p
2U44

+3V3

IU55

10K

3U67
RES 100R
100R RES

3U83-4

100K
IU41

3U56

10K

2U45

1n0
2U45

2U46 10n
10n
2U43

10n
3U65
2U43

+3V3

100R

3U56

3U66

FU74

2U68

100R

IU64

1K0 RES

BACKLIGHT-BOOST
3U43
BACKLIGHT-BOOST
FU07
100R BACKLIGHT-PWM-ANA-DISP
FU07
BACKLIGHT-PWM-ANA-DISP
3U44

3U44

IU64
3U82

3U82

100R

FU57

3U43

FU54

LAMP-ON

BACKLIGHT-PWM_BL-VS
3U42
BACKLIGHT-PWM_BL-VS

100R

3U62-4

FU57

FU56
RES 100R

100R
100R

2U44 100p
RES 1K0

RES
1n0 1K0

3U66
FU56

FU53

3U64
FU54
1K0

3U65
2U53

RES 100p

1n0
2U52

RES2U53
100p

2U72

RES
2U51100p

1K0

3U64
FU55

100R
FU52
3U42

4K7

FU53

LAMP-ON

3U45

FU52

FU55

IU56

3U81

+3V3
10K

3U45

D
FU74

IU56

3U81

+3V3

FU51

2U52
100p

2U51

2U42

FU49 1u0
FU50

3U62-2

1-1735446-2

2U42
FU48

RES

2U72

1-1735446-2

100p

RES

FU48
1M99
FU49
1
FU50
2
3
4 FU51
5
6
7
8
9
10
11
12
RES 100p

1M99
1
2
3
4
5
6
7
8
9
10
11
12

FU54 C2

1M95 E11M99 C1 3U83-3


FU55E5
C1
FU56C5
D1
1M99 C11U40 E2 3U83-4
2U41 B1
FU57 D1
D2
1U40 E22U42 C2 3U84
FU58 E1
2U41 B12U43 D2 6U40
FU59
E3E1
FU60F4
E1
2U42 C22U44 D3 7U40-1
2U45 D3
FU61 E1
E4
2U43 D22U46 D3 7U40-2
FU62 E1
FU63F4
E1
2U44 D32U47 E1 7U41-1
FU64 F1
2U48 F1
F5
2U45
A D32U49 F1 7U41-2
FU65 F1
2U46 D32U50 F1 7U42
B5F1
FU66
FU67
2U47 E12U51 D1 7U43
B3F1
D1
FU68 F1
7U48-1
C6
2U48 F12U52
2U53 D2
FU72 F4
2U49 F12U54 F2 7U48-2
FU73E6
E5
FU74
2U50 F12U55 F3 9U41
B5D1
IU40 E5
2U68 E1
2U51 D12U71 D5 9U42
B4D5
IU41
2U52 D12U72 D1 FU07
C3B5
IU43
IU44
2U53 D23U41 B5 FU48
C1B5
C3
IU45 B4
B F23U42
2U54
C1B4
3U43 C3 FU49
IU47
IU48
2U55 F33U44 C3 FU50
C1E4
IU49
2U68 E13U45 C3 FU51
C1E3
3U53 B6
IU50 F4
2U71 D53U56 D3 FU52
C3F3
IU51
IU52
C2F5
2U72 D13U59 B6 FU53
3U60-1 F5FU54
IU55
C2D3
3U41 B53U60-2
F4
IU56 C3
C1F6
3U42 C33U60-3 E5FU55
IU57
IU61
D1E4
3U43 C33U60-4 F5FU56
E5
IU62 F4
FU57
D1F3
3U44 C33U61
C 3U62-1 F4 IU63
E1C6
3U45 C33U62-2 E3FU58
IU64
3U53 B63U62-3 E4FU59 E1
3U62-4 E3
3U56 D33U63 F5 FU60 E1
3U59 B63U64 C2 FU61 E1
3U65 D2 FU62 E1
3U60-1 F5
3U66 D2
3U60-2 F4
3U67 D2 FU63 E1
3U68 B3 FU64 F1
3U60-3 E5
3U69 B3 FU65 F1
3U60-4 F5
3U70 B4
3U61
D E53U71 D3 FU66 F1
3U72 F3 FU67 F1
3U62-1 F4
3U73 F3
FU68 F1
3U62-2 E3
3U74 A4
3U62-3 E4
3U75 A4 FU72 F4
3U76 F2 FU73 E5
3U62-4 E3
F4
FU74 D1
3U63 F53U80
3U81 C3
3U64 C23U82 C5 IU40 E5
3U65 D23U83-1 D6IU41 D5
3U83-2 E5
3U66 D23U83-3 E5IU43 B5
E
3U67 D23U83-4 C5IU44 B5
3U68 B33U84 D2 IU45 B4
6U40 E3
3U69 B37U40-1 F4IU47 B4
3U70 B47U40-2 E4IU48 E4
F4IU49 E3
3U71 D37U41-1
7U41-2 F5
3U72 F37U42 B5 IU50 F4
3U73 F37U43 B3 IU51 F3
C6
IU52 F5
3U74 A47U48-1
7U48-2 E6
3U75
A4
F 9U41 B5 IU55 D3
3U76 F29U42 B4 IU56 C3
FU07 C3
3U80 F4FU48 C1 IU57 F6
3U81 C3FU49 C1 IU61 E4
3U82 C5FU50 C1 IU62 F4
FU51 C1
3U83-1 D6
FU52 C3 IU63 F3
FU53 C2 IU64 C6
3U83-2 E5

9
5
6

DC/DC

2010-02-19
2010-03-08

8204 000 8951


18770_852_100331.eps
18773_502_100830.eps
100331
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-21-4

Q552.1E LA

10.

EN 200

DC/DC

B03D

DC/DC

B03D

2UA0 A5

RESERVED

470R
3U26-1
470R
3U26-2
470R
3

3U26-3
470R

3U26-4
470R

470R
3U26-1 RES
RES
8
8 1
470R
3U26-2 RES
RES
7
7 2
470R
3U26-3 RES
RES
6
6 3
470R
3U26-4 RES
RES
4
5
5
470R

+5V

+5V

1u0

1u0

1u0

1u0

2UA6

1u0

2UA5
2UA6

1u0

1u0

1u0
2UB0

1u0

1u0
2UB2

1K0

3UB5

3UB5

3UB4

100K

100K

1K0

IUB0
3UB4 2UB3
IUB0
1K0

2UB4
330p
RES

BP
INH

4
BP

+5V-TUN
+5V-TUN

4 IUB1 IUB1
1u0

100n
1u0
2UB6

100n
2UB5
2UB6

1 NC
NC
NC NC
REF
REF

5
OUT

OUT
IN

COM COM

30R

2UB5

KA

3
INH
1u0

IN1

1u0
2UB7

470R
RES
3U29-4 RES
5
5 4

+5V5-TUN
+5V5-TUN

2UB7

3U29-4

7UA4
7UA4
TS431AILTTS431AILT

4K7

470R
3U29-3 RES
3
6 3 3U29-3 6 RES

NOTNOT
FORFOR
50005000
SERIES
SERIES

4K7

470R

4K7

470R
RES
7 2 3U29-2 7 RES

7UA5 7UA5
LDS3985M50
LDS3985M50

+12V

3UB2

470R
3U29-2

+12V

+5V

RESERVED
RESERVED
5UA0 5UA0

1K0

3UB3

RES
8 1 3U29-1 8 RES

3UB2

3U29-1

470R

+3V3

SENSE+1V2
SENSE+1V2
3UB1

1K0

IUA6

4K7

+3V3

30R
1

2UA5
2UB1

1n0

330p

1K0

3UA9

IUA8

RES 1u0
2UB1

1n0
IUA8

+1V2

2UA9

2UA9
330p

3UA9 2UA8

FUA3 +1V2

3UB3

+3V3

2UA4

2
3

1n0

2UA3
3UA6

FUA3

2UA8
100K RES

7
3U25-2

+3V3
IU30
2

22K

22R

IUA6

IUA5

+3V3
3U16-1
8
+3V3
3U16-1
1
8
100R
3U16-2100R
2
7
3U16-2
2
7
100R
3U16-3100R
3
6
3U16-3
3
6
100R
3U16-4100R
4
5
3U16-4
4
5
100R
100R
1

3U25-1
8

3
6
3
6
RES
RES
RES IU30
RES
5
5
2
7U06-1
7U06-2
7U06-1
7U06-2
BC847BS(COL)BC847BS(COL)BC847BS(COL)BC847BS(COL)
4
1
4
1

3UA8

IU29

100K RES

IU29

3U25-3

3U25-1

100K RES

IUA5
3UB0

22R

3UB1
3U25-2

3U25-3

3UB0

FUA2

100K RES

100K RES

100K RES

100K RES

3U25-4

100K RES

3U25-4

2UA4

7UA1-2
FUA2
LM833
7

100n

2UA7

100n

2UA7

2UB0

7UA1-2
LM833
7

2UB2
RES 1u0

IUA7

IUA7

ENABLE-1V8
ENABLE-1V8
4

22K

3UA8

330R
1%
330R
1%

3U13

330R
1%

3U12

3U12

+5V

+2V5-LVDS

+3V3
3U15-1
8
+3V3 +5V
3U15-1
8
100R1
3U15-2 100R
2
7
3U15-2
2
7
100R
3U15-3 100R
3
6
3U15-3
3
6
100R
3U15-4 100R
4
5
3U15-4
4
5
100R
100R
1

+5V

IU26

+2V5

+2V5-LVDS
CUA0

+1V8
+12V

7UA3
PHD38N02LT
7UA3
PHD38N02LT

+2V5
FUA4

CUA0

+1V8
+12V

470R

470R
3UB7-3
3
6
470R
3UB7-1
1
8
3UB7-2
2
470R7
470R
3UB7-3
3
6
470R
3UB7-1
1
8

2UB8

22u

2UB8

+2V5-REF

3UB7-2
2 22u
7

3U13

330R
1%

7UA6
BC817-25W
7
IUB3
3UB6-2
1K0 IUB2
2
7
+12V
IUB3
3UB6-3
3
6
6 1K0 IUB2
1K0 3 3UB6-3 6
6
3UB6-4
4
5
2
1K0
IU26
1K0 4 3UB6-4 5
2
3UB6-1
IUB5
7UA7-1
1
8
3 1 1K0
3UB6-1
BC847BS(COL)
IUB5
7UA7-1
3 1
8
1K0 1
3UB7-4
BC847BS(COL)
4+2V5-REF5
5 1K0
3UB7-4
4
5
5
470R
7UA7-2
4
IUB4
470R
BC847BS(COL)7UA7-2
4
IUB4
BC847BS(COL)

+12V

1K0

+5V-TUN

7UA6
BC817-25W

3UA7

1K0

+5V-TUN
IUB6
+5V5-TUN

3UB6-2

FUA4

3UA7

IUA2

+5V5-TUN

FUA1

IUA2
IUB6

OUT
COM

IUA9

3
3

1COM
IN

1K0

2UA2
3UA6

2
A

3UA5
IUA3
22R

IUA9

330p

2UA2

100n

2UA3

1n0

IUA1
2

7UA2
PHD38N02LT
7UA2
PHD38N02LT
IUA4
1
3UA5 IUA4
1 FUA1
22R

2UA0
100n
IUA3
7UA1-1
LM833
1

7UA1-1
LM833
1

7UC0
3
IN LF25ABDT
OUT

330p
1K0

1K0

3UA4

1K0

3UA4
2UA1
47K

47K

3UA2

7UC0
LF25ABDT
+3V3

100n

7UA0
TS2431

3UA2

+2V5-REF
1

3UA3

+2V5-REF
FUA0

3K3 1%

FUA0

1
7UA0
TS2431

IUA1

2UA1

2K2

3UA0

2K2

3UA0

3UA1

3UA3

+12V
2UA0

100n

+12V

3K3 1%

3UA1

3K3 1%

3K3 1%

+2V5-REF

+12V

+3V3

+12V

+2V5-REF
RESERVED

22n
2UB4

2UB3
22n

330p
RES

7 7

8 8

7UA7-2 D2

2UA0 A5
2UA1 A4 3UB1
7UC0 E6
A8
CUA0 E6
B9
2UA2 B5 3UB2
2UA1 A4
2UA3 B5
FUA0 A2
3UB3
F6
2UA2 B5
2UA4 A7
FUA1 A7
FUA2 F5
D5
2UA5 B6 3UB4
2UA3 B5
FUA3 D7
2UA6 B7
3UB5
F5
2UA4 A7
FUA4 B9
2UA7 D4
IU26 C3 C2
D5 3UB6-1
A 2UA5 B62UA8
IU29 E2
2UA9 D5
2UA6 B7
3UB6-2
IU30 F3 C2
2UB0 C7
A2UA7 D4
2UB1 D6 3UB6-3
IUA1 A4 C2
2UB2 D7
IUA2 B5
2UA8 D5
IUA3 A6 C2
2UB3 F6 3UB6-4
IUA4 A6 D3
2UB4 F6 3UB7-1
2UA9 D5
IUA5 C6
2UB5 F8
2UB0 C7
IUA6 E5 D2
2UB6 F8 3UB7-2
IUA7 C4 D2
2UB7 F7 3UB7-3
2UB1 D6
IUA8 D5
2UB8 D2
3UB7-4
C2
2UB2 D7
IUA9 B6
3U12 C3
IUB0 F6
3U13 C3 5UA0
E8
2UB3 F6
B 2UB4 F63U15-1 C8 7U06-1
IUB1 E8
F2
3U15-2 C8
IUB2 C2
B
IUB3 C3 F1
3U15-3 D8 7U06-2
2UB5 F8
3U15-4 D8
IUB4 D3
2UB6 F8
7UA0
B2
IUB5 C2
3U16-1 C9
2UB7 F7
3U16-2 C9 7UA1-1
IUB6 B3 A5
3U16-3 D9
7UA1-2 C5
2UB8 D2
3U16-4 D9
3U12 C3
3U25-1 E3 7UA2 A6
3U25-2 E3
3U13 C3
7UA3 C6
3U25-3 E2
3U15-1 3U25-4
C8 E2 7UA4 E5
C 3U15-23U26-1
C8 F3 7UA5 E8
C
3U26-2 F3
3U15-3 3U26-3
D8 F3 7UA6 C3
3U15-4 3U26-4
D8 F3 7UA7-1 C3
3U29-1 E3
3U16-1 3U29-2
C9 E3 7UA7-2 D2
3U16-2 3U29-3
C9 E3 7UC0 A8
3U29-4 F3
3U16-3 3UA0
D9 A2 CUA0 B9
3U16-4 3UA1
D9 A3 FUA0 A2
3UA2 B3
3U25-1 3UA3
E3 B4 FUA1 A7
D D3U25-23UA4
E3 A4 FUA2 D5
3UA5 A6
3U25-3 3UA6
E2 B5 FUA3 D7
3U25-4 3UA7
E2 B6 FUA4 B9
3UA8 B5
3U26-1 3UA9
F3 D5 IU26 C3
3U26-2 3UB0
F3 D6 IU29 E2
3UB1 E6
3U26-3 3UB2
F3 E6 IU30 F3
3U26-4 3UB3
F3 F6 IUA1 A4
3U29-1 3UB4
E3 F5
3UB5
F5 IUA2 B5
E E3U29-23UB6-1
E3 C2 IUA3 A6
3U29-3 3UB6-2
E3 C2 IUA4 A6
3UB6-3 C2
3U29-4 3UB6-4
F3 C2 IUA5 C6
3UB7-1 D3
3UA0 A2
IUA6 E5
3UB7-2 D2
3UA1 A3
3UB7-3 D2 IUA7 C4
3UB7-4 C2
3UA2 B3
IUA8 D5
5UA0 E8
3UA3 B4
7U06-1 F2 IUA9 B6
7U06-2 F1
3UA4 A4
IUB0 F6
7UA0 B2
3UA5
A6
7UA1-1 A5 IUB1 E8
F F3UA6 B57UA1-2 C5 IUB2 C2
7UA2 A6
3UA7 B6
7UA3 C6 IUB3 C3
7UA4 E5 IUB4 D3
3UA8 B5
7UA5 E8
3UA9 D5
7UA6 C3 IUB5 C2
7UA7-1 C3 IUB6 B3
3UB0 D6

9 9
5
6

DC/DC

2010-02-19
2010-03-08

8204 000 8951


18770_853_100331.eps
18773_503_100830.eps
100118
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

B03E
2

5UD0

120K

22u

RES 2UE9

22u
RES 2U27

RES 2UE9

100n
10K

120K

IU27

RES 3U06

4n7
3UD2

IU27 2

7U05-1
BC847BS(COL)
RES 1

10K

4n7
3UD2

100n

RES 2U27

7U05-1
BC847BS(COL)
2UD7
RES 1

RES 3U06

33K
1%

68K
3UD1

1%
3UD0

+5V

14

IN

100n

RES 2U28

100n
IU28 5

IU28

10K

D
RES 3U07

RES 3U07

33K
1%

BC847BS(COL)

10K

RES 2U28

220u 16V

2UE4

22u

22u
1% 100K
2UE4
2UE2
220u 16V
22u
2UE3

1M0
3UD5

3UD4

33K
1%

1M0
3UD5

+2V5

OUT

FOR 5000 SERIES ONLY

SERIES ONLY
() FOR 5000(*)
NOT FOR 5000 SERIES
(**)
5000 SERIES
() NOT FOR
2UE6

22u 16V

+2V5

+3V3

100n

2UE8

22u 16V

+3V3

COM

2UE8

100n

2UE7

IN

OUT
2UE7

IN

COM

2UE6

2UE5

7U05-2
RES
4

7UD3
LD1117DT33

7UD3
LD1117DT33

OUT

100n

COM

COM
2UE5

OUT

22u 16V

3
IN
S1D

IUD5

S1D

7UD2
LD1117DT25

7UD2
6UD1LD1117DT25
IUD5

22u 116V

6UD1
+5V

12

100n

+5V

7U05-2
RES
4

BC847BS(COL)

14

14

11

11

+3V3

+1V1

+1V1

15

VIA

10

12

3UD3

IUD2

3UD4

VIA

10

13

15

13

7UD1-2
ST1S10PH

2UE1
22u
2UE3
4n7

2UE2

3UD3

1% 100K

4n7

SW

GND
P HS

FUD2

+3V3
2UE1

GND
P HS

5UD2
3u6

3
SYNC

IUD4
FUD2

5UD2
7
SW
3u6 3
VFB

VIN

IUD2
7UD1-2
ST1S10PH

+1V1

1
A

IUD4

7
INH

5
VFB

2
SW

SYNC

SW

2ENABLE-3V3-5V
INH
VIN

7UD1-1
ST1S10PH

+5V

11

10u

2UE0

10u

2UD9

10u

7UD1-1
ST1S10PH

2UD7

FUD3

+1V1

SS36

IUD6

33K
1%

68K
3UD1

1%
3UD0

12

FUD3

2UD6

22u
2UD6
2UD5

2UD4

220u
22u 16V

SS36

3u6

22u

22u
2UD5

2UD4

SW

6UD0

IUD1

2UD8
10u

10u

2UD9

10u

2UD8

15

VIA

10

14
IUD1

30R

5UD3

+12V

ENABLE-3V3-5V

5UD1

220u 16V

1
A

12

13

15

13

7UD0-2
ST1S10PH

VIA

**

2UE0

5UD3
30R

IUD7
IUD3

7
3

VFB
GND
P HS

11

5UD1
SW3u6

6UD0
IUD7

GND
P HS

IUD3

VIN

VFB
5

42UD3

7
INH
3
SYNC

SW
2

RES 1n0
8

SYNC

7UD0-1
ST1S10PH

SW

1
A

2
ENABLE-3V3-5V
INH
VIN
5

RES 1n0

2UD3

ENABLE-3V3-5V

10

+12V

+5V5-TUN

7UD0-1
ST1S10PH
10u

2UD2

10u

2UD1

10u

2UD0
10u

30R

IUD6

+5V5-TUN

7UD0-2
ST1S10PH

IUD0

+12V

2UD0

IUD0

5UD0

+12V
30R

10u

2UD2

EN 201

DC/DC

2UD1

B03E

10.

DC/DC

10u

10-21-5

Q552.1E LA

2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
2UD4 A
B5
2UD5 B5
2UD6 B6
2UD7 B6
2UD8 C2
2UD9 C2
2UE0 C3
2UE1 D5
2UE2 D6
B
2UE3 D6
2UE4 D6
2UE5 E4
2UE6 E6
2UE7 F4
2UE8 F5
2UE9 B8
3U06 B8
3U07 D8
C
3UD0 B5
3UD1 B5
3UD2 B6
3UD3 D5
3UD4 D5
3UD5 D5
5UD0 A2
5UD1 A5
5UD2 D
C5
5UD3 C2
6UD0 A6
6UD1 E4
7U05-1 B7
7U05-2 D7
7UD0-1 A4
7UD0-2 B4
7UD1-1 C4
ED4
7UD1-2
7UD2 E5
7UD3 F5
FUD2 C5
FUD3 A7
IU27 B8
IU28 D8
IUD0 A2
IUD1 C2
F
IUD2 D5
IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5

2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
2UD4 B5
2UD5 B5
2UD6 B6
2UD7 B6
2UD8 C2
2UD9 C2
2UE0 C3
2UE1 D5
2UE2 D6
2UE3 D6
2UE4 D6
2UE5 E4
2UE6 E6
2UE7 F4
2UE8 F5
2UE9 B8
3U06 B8
3U07 D8
3UD0 B5
3UD1 B5
3UD2 B6
3UD3 D5
3UD4 D5
3UD5 D5
5UD0 A2
5UD1 A5
5UD2 C5
5UD3 C2
6UD0 A6
6UD1 E4
7U05-1 B7
7U05-2 D7
7UD0-1 A4
7UD0-2 B4
7UD1-1 C4
7UD1-2 D4
7UD2 E5
7UD3 F5
FUD2 C5
FUD3 A7
IU27 B8
IU28 D8
IUD0 A2
IUD1 C2
IUD2 D5
IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5

5
6

DC/DC

2010-02-19
2010-03-08

8204 000 8951


18770_854_100331.eps
18773_504_100830.eps
100331
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-21-6

Q552.1E LA

10.

EN 202

Temp Sensor + AmbiLight

B03F

Temp Sensor + AmbiLight

B03F
2

5UM1

1UM0

IUM0

+3V3

FUM0

V-AMBI

T 1.0A 63V

30R
5UM0

1UM0 A4
5UM0 A3
5UM1 A3
FUM0 A5
IUM0 A4

+5V
RES 30R

7
6

DC/DC

2010-03-08

8204 000 8951


18773_505_100830.eps
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 203

Fan Control

Fan-Control

B03G
1

+12V

+12V

1K0

FAN-CTRL1

IUS3 3US5-3
6
3

IUT1

100n

7
7US1-1
LM339P
14

2US3

10K

3US5-2

3US7

10K

3US4-1

+12V

10K

3US2

+3V3

IUS6

10K

7US2
BC807-25W

12
+12V

IUS7

11

IUT2

7US1-2
LM339P
13

22R

IUS4 3US5-4
5
4

10

FAN-CTRL2

10K

BC807-25W
7US3

IUS8

12

3US6

IUS9
47R

+12V

10K

3US5-1

3US9

+3V3

10K

FAN-DRV
+3V3

2US3 A7
3US2 A3
3US3 B3
3US4-1 A4
3US4-2 D4
3US4-3 C4
3US4-4 C5
3US5-1 B6
3US5-2 A6
3US5-3 A5
3US5-4 B5
3US6 C6
3US7 A4
3US9 B6
7US1-1 A5
7US1-2 B5
7US1-3 C5
7US1-4 D5
7US2 A6
7US3 B6
9US0 D4
IUS0 D5
IUS3 A5
IUS4 B5
IUS5 C5
IUS6 A6
IUS7 B7
IUS8 B6
IUS9 B6
IUT1 A4
IUT2 B4

10K

7US1-3
LM339P
2

10K

3US4-3
3

+12V

IUS5

3US4-4

+12V

4
12

TACH01

+12V

10K

3US4-2

RES

+12V
9US0

7US1-4
LM339P
1

TACH02

IUS0

12

B03G

3US3

10-21-7

Q552.1E LA

TACHO

DC/DC

2010-03-08

8204 000 8951


18773_506_100830.eps
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 204

Vdisp Switch

VDisp-Switch

B03H
3

1 9UU0-1
RES
2 9UU0-2
RES
3 9UU0-3
RES
4 9UU0-4
RES
1 9UU1-1
RES
2 9UU1-2
RES
3 9UU1-3
RES
4 9UU1-4
RES

3UU0-2

6
5

8
7
6
FUU0

2
IUU2

1u0

IUU1

+VDISP-INT

3UU3-2

IUU3

47K RES
7UU3 RES
BC847BW

3UU0-3
+3V3-STANDBY

47K

2
3

7UU2-1
PUMD12
1

47K

47K

2UU0 C6
2UU1 C4
3UU0-1 C4
3UU0-2 C4
3UU0-3 C2
3UU1 C4
3UU2 D6
3UU3-1 C4
3UU3-2 C5
3UU3-3 C6
3UU3-4 C7
7UU0 B4
7UU1 B5
7UU2-1 C3
7UU2-2 C3
7UU3 C6
9UU0-1 A4
9UU0-2 A4
9UU0-3 A4
9UU0-4 A4
9UU1-1 A4
9UU1-2 A4
9UU1-3 A4
9UU1-4 A4
FUU0 A5
IUU0 C3
IUU1 C4
IUU2 C5
IUU3 C6
IUU4 C6
IUU5 C7
IUU6 D6

47R
7

47K RES
2UU1

3UU1

IUU0

3UU3-1

7UU1
SI3441BDV

+12VD

7UU0
SI4835DDY
RES

4
PUMD12
7UU2-2

IUU4 3UU3-3 IUU5 3UU3-4


1
6
3
4
5
47K RES

+3V3

47K RES
100n

2UU0

3UU0-1

B03H

10-21-8

Q552.1E LA

IUU6

VDISP-SWITCH

3UU2

+3V3

4K7 RES

D
LCD-PWR-ONn

7
6

DC/DC / CLASS D

2010-03-08

8204 000 8951


18773_507_100830.eps
100830

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 205

10.22 B04 820400089524 Analog I/O


10-22-1

Analogue Externals A

Analogue Externals A

B04A
1

B04A

10

11

12

13

RESET-AVPIP

2E50

1E45

CDS4C12GTA
12V

100p
100p

2E51

1E46

100p

2E82

1E48

CDS4C12GTA
12V

RES 6E14

100p

2E16

1E49

RES 6E24

CDS4C12GTA
12V

100p

2E33

12V

1E56

CDS4C12GTA

RES 6E02

4K7

3E17

100p

2E17

1E57

CDS4C12GTA
12V

RES 6E34

100p

2E19

18
19

20
21

+3V3

100n 16V

2E13

4K7

3E73
IE51

FE76
100p

75R

RES 6E36

3E61
68R

7E09-2
PUMH7

RES 2E77

AV2-BLK

MTJ-505H-01 NI LF

RES
3E48

3E37-2
2 100R 7
3E37-3
FE78

100n

2E73
3EB9-1

RES 6E37

27R

IE94
8

FE77

100p

RES 2E78

1E24

RES 6E31

CDS4C12GTA
12V

3E52
68R

10

11

12

470R

470R
3EB6-3

2 3EB9-2 7

1X02
REF EMC HOLE

3E63-2
100R
3E63-3

1K0
3E11-3
1K0

470R
3 3EB9-3 6

100R
3E11-2

100p

RES 2E76

2 3EB6-2 7

2 470R 7
3EA7-3

68R

1K0

3 470R 6

1K0

3EA7-2

RES
3E49
1E23

CDS4C12GTA
12V

470R

4 3EB9-4 5

100p

2E44

1E25

CDS4C12GTA
12V

RES 6E32
CVBS-OUT-SC1
RES 6E30

IE93

100R
3E07-2

3E07-3
3

470R
7E04
BC847BW

100p

3E39

2E41

IE62

1E27

100p

RES 2E75

AV2-CVBS

CDS4C12GTA
12V

+5V

22

MRC-021V-29 PC

3E62

10K

15

17
1E52

RES 6E35

150p

2E95

150p

2E96

3E25

100p

2E70

1E47

CDS4C12GTA
12V

RES 6E12

100p

2E32

100p

2E31
2E92

150p
150p

2E93

150p

2E94

18p

39p

2E97

2E98

1u0

39K
18K

FE67

100n

CVBS-OUT-SC1

68R

1E01-2
23
1E22

CDS4C12GTA
12V

RES 6E29

75R

3E43

3E45

MRC-021V-29 PC

27R

14

MT

AV1-CVBS

3E18 2
1
2

4 3EB6-4 5

FE85

13

1E26

100p
100p

2E74

IE92

7E05
BC847BW

12
11
10
9
8
7
6
5
4
3
2
1

11

FE79

IE91

20

9
10

FE66

1EP2

470R

19

IE52

3E19
1

330R

100p

2E18
2E14
2E12

100n

2E24

4K7

3E44

9E02

1K0

3EA1

100n

1 3EB6-1 8

IE48

150p

1R0

3EA2
IE96

18

16

3E86
18R

1u8

FE64

18R

17
IE17

FE84

BEC2

5E79

12

RES

16

9E09
9E06

IE57

FE68

3E84
18R

15

FE82
1E19

CDS4C12GTA
12V

RES 6E28

150p

2E86

2E85

+5V

21

7E09-1
PUMH7

BEC1

1u8

RES

AV4-PR

14

FE81

+3V3

AV1-BLK

5E78

IE56

AV4-Y

13

9E10

FE83

CVBS-MON-OUT1

12

9E07

3E79

* EU

10u

11

9E05

RES

5p6
5E80

FE63

3E16 12K

3E83 18R

IE14

18R

18R

2E99

IE59

* EU

3E85
1E18

CDS4C12GTA
12V

6E26

BEC5

5E76
1u8

10

IE16
3E78

IE55

BC847BPN(COL)

820R

9E55

9E54

AV1-R

RES

RES

AP

9E08

18R

YPBPR2-SYNCIN2

2u2

IE05

2E81

1E02

3E82

AV2-STATUS

IE70

(AV2)

RES

2
IE60
1 3EB1 2
1

IE08

18R

7E06-1

3 BC847BPN(COL)

FE80

3E77

150p

1u8

2E84

150p

2E83
YPBPR1-PR

150p

BEC4

5E74

IE54

7E06-2
5

FE74
FE75

1u8

BEC0

470R

3E76 18R

AV1-G

FE73
1E55

RES 6E22

9E53

4K7

9E52

3E32

AP

IE61

12K

5E77

IE89

2EB3

3E31

FE55

IE13

CDS4C12GTA
12V

IE18

2EB1

2
3

AV1-STATUS

YPBPR1-SYNCIN1

9E01

* EU

IE90

1 3EB3 2

RES

100p

1E01-1

AV4-PB

2E89

100p

2E91

18R

1K0

CDS4C12GTA
12V

100p

2E90

1E53
1E54

(AV1)

150p

2E80

150p

2E79

1u8

SCART1

3E75

SCART2

3E11-4

3E80 18R

+5V

2E15

BEC3

IE21
4

1E12

5E73

CDS4C12GTA
12V

IE53

RES 6E23

AV1-B

CDS4C12GTA
12V

3E74 18R

AUDIO-IN2-L

* EU

RES 6E09

2E04

9E51

9E50

YPBPR1-PB

A-PLOP

1K0 8

100p

100R

2K2

3E07-1

AUDIO-IN1-L

AP

CDS4C12GTA
12V

RES 6E07

100p

2E10
IE23

3E24

FE62

3E63-4

AP-SCART-OUT-L

PUMH7

FE72

1 100R 8

FEC8
+3V3

3E37-1

CDS4C12GTA
12V

RES 6E08

100p

2E30

AP-SCART-OUT-R

1K0

CDS4C12GTA
12V

100p

2E88

1u0 16V

FE61

3E11-1
1

IE68

2EA5

AUDIO-OUT-R

5 470R 4
FEA1

7E01-2 3
1E31

IE20

AUDIO-IN2-R
IEC2

AP-SCART-OUT-L

5
RES 6E03

100p

FE71

100p

2E06

1K0

AP-SCART-OUT-L

PUMH7

CDS4C12GTA
12V

100R

IEC1

3E07-4

AUDIO-IN1-R

1u0 16V

RES 6E10

100p

2E87

1E00

CDS4C12GTA
12V

RES 6E01

100p

7E01-1 6

IE67

2EA4

AUDIO-OUT-L

8 470R 1
FEA0

3EA7-4

IE22

IEC0

3EA7-1

4 100R 5

2E29

FE70

3E37-4

AP-SCART-OUT-R

2E01

FE60

3E63-1

AP-SCART-OUT-R

13

470R

1E00 A4
1E01-1 D5
1E01-2 H5
1E02 C13
1E12 D4
1E18 F4
1E19 F4
1E22 H4
1E23 I4
1E24 I11
1E25 I4
1E26 G11
1E27 H11
1E31 B4
1E45 A11
1E46 B11
1E47 C11
1E48 C11
1E49 D11
1E52 F11
1E53 C4
1E54 D4
1E55 E4
1E56 E11
1E57 E11
1EP2 F13
2E01 A3
2E04 D3
2E06 B3
2E10 C3
2E12 F4
2E13 G11
2E14 F4
2E15 D4
2E16 D12
2E17 E12
2E18 E4
2E19 F12
2E24 G2
2E29 A10
2E30 B10
2E31 C10
2E32 C10
2E33 E12
2E41 H12
2E44 I4
2E50 A12
2E51 B12
2E70 C12
2E73 H7
2E74 F7
2E75 H4
2E76 I4
2E77 G12
2E78 I12
2E79 D1
2E80 D2
2E81 E7
2E82 C12
2E83 F1
2E84 F2
2E85 F1
2E86 F2
2E87 A4
2E88 B4
2E89 D9
2E90 C4
2E91 D4
2E92 D10
2E93 E10
2E94 E9
2E95 F10
2E96 F9
2E97 E8
2E98 E8
2E99 E8
2EA4 A7
2EA5 B7
2EB1 D6
2EB3 E7
3E07-1 C3
3E07-2 H13
3E07-3 H13
3E07-4 B3
3E11-1 B11
3E11-2 I13
3E11-3 I13
3E11-4 C11
3E16 D11
3E17 E10
3E18 E7
3E19 E7
3E24 C7
3E25 C13
3E31 E3
3E32 E3
3E37-1 C3
3E37-2 G13
3E37-3 H13
3E37-4 A3
3E39 H10
3E43 H2
3E44 G2
3E45 G7
3E48 G7
3E49 I7
3E52 H7
3E61 G11
3E62 H2
3E63-1 A11
3E63-2 I13
3E63-3 I13
3E63-4 B11
3E73 G10
3E74 D2
3E75 D2
3E76 E2
3E77 E2

3E78 F2
3E79 F2
3E80 C10
3E82 D10
3E83 E10
3E84 E10
3E85 F10
3E86 F10
3EA1 D6
3EA2 D6
3EA7-1 A7
3EA7-2 H13
3EA7-3 H13
3EA7-4 B7
3EB1 E6
3EB3 E6
3EB6-1 G6
3EB6-2 H13
3EB6-3 H13
3EB6-4 G6
3EB9-1 H6
3EB9-2 I13
3EB9-3 I13
3EB9-4 I6
5E73 D2
5E74 E2
5E76 F2
5E77 D10
5E78 E10
5E79 F10
5E80 E8
6E01 A3
6E02 E11
6E03 B3
6E07 C3
6E08 B11
6E09 D3
6E10 A11
6E12 C11
6E14 C11
6E22 E3
6E23 D3
6E24 D11
6E26 F3
6E28 F3
6E29 H3
6E30 I3
6E31 I11
6E32 I3
6E34 E11
6E35 F11
6E36 G11
6E37 H11
7E01-1 A6
7E01-2 B6
7E04 H6
7E05 G6
7E06-1 E7
7E06-2 E6
7E09-1 H2
7E09-2 G10
9E01 D6
9E02 D7
9E05 F4
9E06 G4
9E07 F4
9E08 F4
9E09 G4
9E10 F4
9E50 D1
9E51 D2
9E52 E1
9E53 E2
9E54 F1
9E55 F2
BEC0 D10
BEC1 E10
BEC2 F10
BEC3 D2
BEC4 E2
BEC5 F2
FE55 D9
FE60 A12
FE61 B12
FE62 B12
FE63 D12
FE64 D12
FE66 E12
FE67 E12
FE68 D12
FE70 A5
FE71 B4
FE72 C4
FE73 E4
FE74 E4
FE75 E4
FE76 G12
FE77 H12
FE78 H12
FE79 F13
FE80 E4
FE81 F4
FE82 F4
FE83 G4
FE84 G4
FE85 G5
FEA0 A7
FEA1 B7
FEC8 B13
IE05 D10
IE08 E5
IE13 D6
IE14 F5
IE16 F5
IE17 G5
IE18 E3
IE20 B10
IE21 C10

IE22 B2
IE23 C2
IE48 G2
IE51 G10
IE52 H2
IE53 D1
IE54 E1
IE55 F1
IE56 E9
IE57 F9
IE59 E8
IE60 E6
IE61 E6
IE62 H10
IE67 A8
IE68 B8
IE70 E7
IE89 D7
IE90 D7
IE91 G6
IE92 G7
IE93 H7
IE94 H6
IE96 G6
IEC0 A7
IEC1 A6
IEC2 B7

CLASS D

2009-10-22

8204 000 8952


18770_528_100118.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-22-2

Q552.1E LA

10.

EN 206

Analogue Externals B

B04B
1

Analogue Externals B
2

B04B
4

10

11

12

13

14

A
SPDIF out
YPBPR

FE42

5E06

CDS4C12GTA
12V

3E89

IE76

9E58

3E90

RES 6E46

10p

AV2-CVBS

IE75

1E07
CON_JACK

FE59

30R

CDS4C12GTA
12V

SPDIF-OUT

YPBPR1-SYNCIN1
IE73

1
2 YKB11-0946V
FE41

AV3-PB

18R

YPBPR1-PB

IE77

AV3-PR

18R

CDS4C12GTA
12V

RES 6E52

1E39

100p

2E68

IE74

9E57

EU

1E04

AV3-Y

27R

FE48

MTJ-032-21B-41 NI FE
2

3E88

9E04

EU
RES 6E51

1E28

100p

2E67

IE15

IE72

1E44

AP

FE51

MTJ-032-21B-41 NI FE
2
1E03

3E87

2E22

RES 6E40

IE71

9E29

18R

CDS4C12GTA
12V

1E43

100p

1
YELLOW

EU

FE54

YKC21-5598
2
2E27

1E08-1

YPBPR1-PR

YPBPR AUDIO

FE49
CDS4C12GTA
12V

100p

2E72

IE29

3E96

RES 6E38

1E42

100p

3
WHITE

2E40

YKC21-5598
4

AUDIO-IN3-L

1K0
100p

FE43

AUDIO-IN3-R
IE31

1K0

2E71

100p

RED

RES 6E06

FE50

1E08-2

CDS4C12GTA
12V

3E97

YKC21-5598
6
1E29

1E08-3

2E39

VGA ( OR DVI ) AUDIO

IE09
AUDIO-IN4-L

1K0

100p

6E19

3E21
CDS4C12GTA
12V

1n0
1E37

2E36

V_NOM

FE02

3
7
MSJ-035-10A B AG PPO 8
1

2E35

5
4
2

1E09

FE01

IE10
AUDIO-IN4-R

100p

1K0
2E38

6E20

3E20
CDS4C12GTA
12V

1n0
1E38

2E37

V_NOM

FE03

SVHS IN
BE20

2
4

H
3E15

CDS4C12GTA
12V

RES 6E16

BE22

1E76

FE46

2E21

100p

MDC-066H-A LF
1ECB

C-SVHS

18R

BE21

FE45

3
1

3E14

CDS4C12GTA
12V

RES 6E15

1E75

2E20

100p

FE44

Y-SVHS

27R

10

11

12

13

1E03 B3
1E04 C3
1E07 A12
1E08-1 B3
1E08-2 E3
1E08-3 D3
1E09 F3
1E28 B4
1E29 D4
1E37 F4
1E38 G4
1E39 C4
1E42 E4
1E43 B4
1E44 B10
1E75 H5
1E76 I5
1ECB I4
2E20 H4
2E21 I4
2E22 B9
2E27 B4
2E35 F6
2E36 F4
2E37 G4
2E38 G6
2E39 D4
2E40 E4
2E67 B4
2E68 C4
2E71 E5
2E72 D5
3E14 H6
3E15 H6
3E20 G5
3E21 F5
3E87 B6
3E88 B6
3E89 B6
3E90 C6
3E96 E5
3E97 D5
5E06 B9
6E06 D5
6E15 H5
6E16 I5
6E19 F5
6E20 G5
6E38 E5
6E40 B5
6E46 B11
6E51 B4
6E52 C4
9E04 B5
9E29 B5
9E57 B5
9E58 C5
BE20 H6
BE21 H6
BE22 I4
FE01 F4
FE02 F5
FE03 G5
FE41 B12
FE42 C4
FE43 D4
FE44 H5
FE45 H5
FE46 I4
FE48 C4
FE49 E4
FE50 D4
FE51 B4
FE54 B4
FE59 B10
IE09 F6
IE10 G6
IE15 B9
IE29 E6
IE31 D6
IE71 B6
IE72 B7
IE73 B7
IE74 B6
IE75 B7
IE76 C6
IE77 C7

14
4

ANALOG I/O

2009-10-22

8204 000 8952


18770_529_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 207

Ethernet + Service

Ethernet + Service
2

10

12

13

14

IE07

5E08
+3V3

+3V3-ET-ANA

TXD1-MIPS

IE49

2 3E53-2 7

47R
4 3E53-4 5

RXD1-MIPS

6E43
IE38

IE32
3E30

3E53-1
47R
3E53-3

FE56

1E06
3

FE57

2
3
1

47R

YKB21-5157V

UART
SERVICE
CONNECTOR

FE58

10u

2E48

100n

2E49

4n7

100n
2E53

2E52

IE33

1M0
1E70
NX3225GA

+3V3

IE06

BZX384-C5V1

47R

+3V3

+3V3-ET-ANA

IE50

1E86

100n

100n
2E66

2E62

10u
2E63

30R

11

1E85

B04C

6E44

B04C

BZX384-C5V1

10-22-3

Q552.1E LA

19

ETH-COL

3E69
RES
10K

3E70
RES

15
3E71
RES

21

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)

22
23
24
25
18

ETH-TXD(3)
ETH-TXER

1K5

12

RXER
RXD4
0
PHYAD
1
RXCLK

0
1
2 TXD
3
4
INT
TXER

REGOFF
1
LED
2
INTSEL
CRS
RBIAS

31
30

ETH-RXP
ETH-RXN

29
28

ETH-TXP
ETH-TXN

20

ETH-TXCLK

26

ETH-RXDV

IE63

13

10K

+3V3

RES

ETH-RXCLK

10K

3E65

+3V3

RES

3
10K

3E34

10K

3E72

14

3E68
RES
3E35
RES

ETH-REGOFF

10K

+3V3
ETH-INTSEL

10K

+3V3

9E42

ETH-CRS

32
IE39

MDC
MDIO

ETH-RXER

3E64
IE64

VSS

+3V3

33

3E51

P
N

RXDV

TXEN

17
16

ETH-MDC
ETH-MDIO

P
N

TXCLK

COL
CRS_DV
MODE2

10K

ETH-TXEN

TX

0
MODE
1
RMIISEL
PHYAD2
RXD<0:3>

10K

9E43

RX

RST

11
10
9
8

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

IO

12K1
1%

IE26

1A 2A
VDD

3E40

27

CR
CLKIN
1
XTAL
2

5
4
RESET-ETHERNETn

10p

2E54

10p

7E10-1
LAN8710A-EZK

2E55

10K

10K

3E33

10K
3E67 RES

3E66 RES

25M

7E10-2
LAN8710A-EZK
34
35

36
37

VIA

+3V3-ET-ANA

F
22R

3E98

22R

3E26

CONFIGURATION RESISTOR SETTINGS

6E50
RES

NUP1301ML3

3E95-4

5 100R 4

6 100R 3

6E49
RES

NUP1301ML3

3E95-3

7 100R 2

3E95-1
NUP1301ML3

6E48
RES

8 100R 1
3E95-2

2 100R 7

1 100R 8
3E22-2

6E47
RES 3E22-1

4 100R 5
NUP1301ML3

3E22-3

3 100R 6
3E22-4

EMPTY

POP

Resistor

ETHERNET CONNECTOR

1N00
FE27

ETH-TXP
ETH-TXN
ETH-RXP

FE29
FE30
FE31

22n

2E60

15p

2E59

BE03

3E64 (RES)

1
2
3
4
5
6
7
8
1551151-1

RES

15p

2E58
RES

15p

RES 2E57

15p

RES 2E56

ETH-RXN

BE00
BE01
BE02

FE28

FE34

PHYADD(0) = 1

PHYADD(0) = 0

3E65 (RES)

PHYADD(1) = 1

PHYADD(1) = 0

3E66 (RES)

PHYADD(2) = 1

PHYADD(2) = 0

3E67 (RES)

RMII mode selected

MII mode selected

3E68 (RES)

Internal 1.2V reg. disabled

Internal 1.2V reg. enabled

3E69 (RES)

MODE(0) = 0

MODE(0) = 1
MODE(1) = 1

3E70 (RES)

MODE(1) = 0

3E71 (RES)

MODE(2) = 0

MODE(2) = 1

3E72

INTERRUPT FUNCTION

INTERRUPT FUNCTION

DISABLED ON

ENABLED ON

nINT/TXER/TXD4 SIGNAL

nINT/TXER/TXD4 SIGNAL

FE32

ETH-INTSEL
ETH-REGOFF

FE33

10

11

12

13

14

1E06 A13
1E70 B3
1E85 A11
1E86 A11
1N00 G7
2E48 B5
2E49 B5
2E52 B3
2E53 B4
2E54 B3
2E55 B3
2E56 H2
2E57 H2
2E58 H3
2E59 H4
2E60 H5
2E62 A3
2E63 A3
2E66 A3
3E22-1 F2
3E22-2 F3
3E22-3 F2
3E22-4 F2
3E26 F5
3E30 B3
3E33 B2
3E34 D6
3E35 D6
3E40 D5
3E51 E1
3E53-1 A10
3E53-2 A9
3E53-3 A10
3E53-4 A9
3E64 C6
3E65 D6
3E66 B2
3E67 B2
3E68 D6
3E69 C2
3E70 C1
3E71 C3
3E72 D6
3E95-1 F3
3E95-2 F3
3E95-3 F4
3E95-4 F4
3E98 F5
5E08 A3
6E43 A9
6E44 A10
6E47 G2
6E48 G3
6E49 G4
6E50 G5
7E10-1 B4
7E10-2 E4
9E42 D5
9E43 C3
BE00 G6
BE01 G6
BE02 G6
BE03 H6
FE27 G6
FE28 G6
FE29 G6
FE30 G6
FE31 H6
FE32 I5
FE33 I5
FE34 H6
FE56 A11
FE57 A11
FE58 A11
IE06 B4
IE07 A3
IE26 C2
IE32 B3
IE33 B3
IE38 B4
IE39 D5
IE49 A10
IE50 A9
IE63 C6
IE64 C6

ANALOG I/O

2009-10-22

8204 000 8952


18770_530_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-22-4

Q552.1E LA

10.

EN 208

HDMI

B04D

HDMI

B04D

10

11

12

13

14

I2C Address

ARX1ARX0+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FECG 21

10K

3ECH

1u0

10u

100n

2EC0

2ECV

BRX2BRX1+

ARX1ARX1+

69
70

ARX2ARX2+

71
72

BIN-5V
BRX-HOTPLUG

BRX-DDC-SCL
BRX-DDC-SDA

FECE
FECF

BIN-5V

47K

BRXCPCEC-HDMI

BIN-5V

10R

BRX-DDC-SDA
BRX-DDC-SCL

7
100K

1u0

BRX-HOTPLUG

HDMI CONNECTOR 1

CIN-5V
CRX2+

2 3ECM-2 7

3
3ECN-3

10R

CRX-DDC-SDA
CRX-DDC-SCL

1u0

CRX2CRX1+
CRX1CRX0+

FECA

47K

CIN-5V
CRX-HOTPLUG

20
23 22

3E23
RES
7E02
BC847BW

PCEC-HDMI

100R

1u0

5EC2

eHDMI+

30R
ARC-eHDMI+

CIN-5V

IEC4

4
3ECN-4

10R

DRX-DDC-SDA
DRX-DDC-SCL

22K
RES

7EC0
BC847BW

3ECD

+3V3-STANDBY

DIN-5V

1 3ECM-1 8

2ECC

33
34
1
2

BRX0BRX0+

3
4

BRX1BRX1+

5
6

BRX2BRX2+

7
8

6
100K

IE44

2ECP

41
42
39
40

CRXCCRXC+

11
12

CRX0CRX0+

13
14

CRX1CRX1+

15
16

CRX2CRX2+

17
18

DRX-HOTPLUG

47K

FECM
FECN

CRX-DDC-SCL
CRX-DDC-SDA
3 3ECA-3 6

FECJ

5 3ECA-4 4

CIN-5V

CRX0CRXC+

FECK
FECL

2ECN

35
36

CRX-HOTPLUG

1P02

CRXCPCEC-HDMI
ARC-eHDMI+
CRX-DDC-SCL
CRX-DDC-SDA

IE43

BRXCBRXC+

BRX-DDC-SCL
BRX-DDC-SDA

20

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FECP19
21

3 3ECM-3 6

2
3ECN-2

5
100K

IE45

2ECQ

45
46
43
44

DRXCDRXC+

19
20

DRX0DRX0+

21
22

DRX1DRX1+

23
24

DRX2DRX2+

25
26

CEC-HDMI

IEC5

100n

10u

RES 2ECW

N
R0XC
P

DSCL4
DSDA4

N
R0X0
P

CEC_D

3ECP-1 3ECP-3
49

10K

+5V-EDID

R4PWR5V

48
47

VGA-SCL-EDID-HDMI
VGA-SDA-EDID-HDMI
9EC2

51

CEC-HDMI

RES

N
R0X1
P
N
R0X2
P
TX2

(CBUS) HPD1
R1PWR5V
DSDA1
DSCL1
N
R1XC
P

N
P

TX1

N
P

TX0

N
P

TXC

N
R1X0
P

N
P

57
56

HDMIA-RX2HDMIA-RX2+

59
58

HDMIA-RX1HDMIA-RX1+

61
60

HDMIA-RX0HDMIA-RX0+

63
62

HDMIA-RXCHDMIA-RXC+
3ECJ RES

N
R1X1
P

TPWR_CI2CA

N
R1X2
P

CEC_A

(CBUS) HPD2
R2PWR5V

INT

4K7

55

50

52

IE12
FECR

RES
3ECK

MICOM-VCC33

4K7
9EC3
RES

FECY

PCEC-HDMI
3ECL RES

+3V3

4K7

DSDA2
DSCL2
N
R2XC
P

CSCL
CSDA

N
R2X0
P
RSVDL

N
R2X1
P

54
53 3EC3
3EC5

100R
100R

SCL-SSB
SDA-SSB

10
28

N
R2X2
P

(CBUS) HPD3
R3PWR5V
DSDA3
DSCL3
N
R3XC
P
VIA

N
R3X0
P
N
R3X1
P

IEC6
9EC0

38

37

DSDA0
DSCL0

SBVCC33

9
27
64
(CBUS) HPD0
R0PWR5V

10K

29
30

BRX2+

BRX0BRXC+

FECC
FECD

+3V3

30R

2ECM

31
32

MICOM_VCC33

IE42

67
68

BRX1BRX0+

100n

100n
2EC8

100n
2EC7

2EC6
8
100K

ARX0ARX0+

BIN-5V

1u0

AIN-5V

23 22

10R
ARX-DDC-SDA
ARX-DDC-SCL

10p

1
3ECN-1

65
66

47K

AIN-5V

3ECM-4

ARXCARXC+

HDMI CONNECTOR 2

1P03

3 3EC1-3 6

47K
47K

ARX-HOTPLUG

20
23 22

VCC33

ARX-HOTPLUG

8 3EC1-1 1

FEC5

7EC1
SII9287B

ARX-DDC-SCL
ARX-DDC-SDA

FEC4
AIN-5V

RES
5EC3

+3V3-HDMI

ARXCPCEC-HDMI
ARX-DDC-SCL
ARX-DDC-SDA

FEC7

AIN-5V

ARX0ARXC+

FEC1
FEC2

SII9187A = 0xB2

FECB

ARX2ARX1+

7 3ECA-2 2

30R

MICOM-VCC33

2EC3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FEC6 21

1 3ECA-1 8

ARX2+

220u 16V

RES 2EC1

+3V3

HDMI CONNECTOR 3
1P04

FEC3

FEC0

2EC2

5EC0

N
R3X2
P

74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89

1P02 E2
1P03 C2
1P04 A2
2EC0 A9
2EC1 A8
2EC2 A10
2EC3 B10
2EC6 B9
2EC7 B9
2EC8 B9
2ECC G8
2ECM B8
2ECN D8
2ECP E8
2ECQ F8
2ECU I3
2ECV A9
2ECW B10
3E23 F4
3EC1-1 B4
3EC1-3 B4
3EC3 E10
3EC5 E10
3ECA-1 D4
3ECA-2 D4
3ECA-3 F4
3ECA-4 F4
3ECD G3
3ECE H3
3ECF I3
3ECG I3
3ECH A10
3ECJ D10
3ECK D11
3ECL E11
3ECM-1 F8
3ECM-2 E8
3ECM-3 D8
3ECM-4 B8
3ECN-1 B8
3ECN-2 D8
3ECN-3 E8
3ECN-4 F8
3ECP-1 B10
3ECP-3 B10
3ECU-2 I8
3ECU-4 I8

5EC0 A8
5EC2 F7
5EC3 A11
6EC1 H3
7E02 G3
7EC0 G3
7EC1 B9
9EC0 G4
9EC2 C11
9EC3 E11
FEC0 A9
FEC1 B2
FEC2 B2
FEC3 A10
FEC4 B2
FEC5 B2
FEC6 B2
FEC7 A10
FECA F3
FECB A10
FECC D2
FECD D2
FECE D2
FECF D2
FECG D2
FECJ F2
FECK F2
FECL F2
FECM F2
FECN F2
FECP F2
FECR E10
FECW H9
FECY E10
FECZ I3
IE11 I3
IE12 D10
IE42 B8
IE43 D8
IE44 E8
IE45 F8
IE65 I7
IE66 I7
IEC4 G3
IEC5 G3
IEC6 G4
IEC7 H3

73

EPAD

22K

3ECE

IEC7

7EC1

3ECN

NON-INSTAPORT

9187A

4X 3K3

3K3

INSTAPORT

9287B

4X 100K

100K

FECW
+3V3-STANDBY

H
6EC1

3ECF

+5V-VGA

+5V
BAT54

3ECF

4R7

3ECG

IE11

FECZ

100K

DDCA-SDA

DDCA-SCL

2ECU

IE65

2 3ECU-2 7

IE66

10K
4 3ECU-4 5

+3V3

10K
1u0

+5V-EDID

10

11

12

13

14
4

HDMI

2009-10-22

8204 000 8952


18770_531_100118.eps
100118

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-22-5

Q552.1E LA

10.

EN 209

Headphone

B04E

Headphone

B04E
2

+3V3-STANDBY

4
PUMD12
7EE0-2
A-PLOP
3

B
6

A-STBY

FEE0
RESET-AUDIO

7EE0-1
PUMD12
1

C
2EE0

22K

22K

3EE1-2

3EE1-4

3EE1-3

22K

47p
3EE1-1

22K
2EE5

7EE1
TPA6111A2DGN

100n

2EE1

47p +3V3

ADAC(3)
IEE2
ADAC(4)

2EE3
1u0

IEE1
2EE4

3EE0-1
10K

IEE3
1

2
5

3EE0-4
10K

1u0

6
IEE4

5
2EE2

IEE6

AMPLIFIER

3EE0-3
10K

2EE6

IEE7

3EE2-2

FE36
7

VO

BYPASS

2EE7

IEE8

3EE2-3

FE35
6

AMP2

33R

4V 100u

10
11

AMP1

33R

4V 100u

SHUTDOWN

4
3

IN2

3EE2-1
33R

VIA
GND GND_HS

1u0

A-PLOP

VDD

3EE2-4

33R

IEE0

6
IEE5

2EE0 C5
2EE1 D5
2EE2 E4
2EE3 E2
2EE4 E3
2EE5 D5
2EE6 E6
2EE7 E6
3EE0-1 E3
3EE0-3 F3
3EE0-4 E3
3EE1-1 C5
3EE1-2 D8
3EE1-3 D8
3EE1-4 D5
3EE2-1 D7
3EE2-2 E7
3EE2-3 E7
3EE2-4 E7
7EE0-1 B5
7EE0-2 B6
7EE1 D4
FE35 E7
FE36 E7
FEE0 B4
IEE0 E2
IEE1 E2
IEE2 E2
IEE3 E3
IEE4 E3
IEE5 F3
IEE6 E4
IEE7 E6
IEE8 E6

9
4

AUDIO

2009-10-22

8204 000 8952


18770_532_100119.eps
100119

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 210

10.23 B04 820400089525 Analog I/O


10-23-1

Analogue Externals A

Analogue Externals A

B04A
1

B04A

10

11

12

13

RESET-AVPIP

100p

2E50

1E45

100p

1E46

100p
100p

2E16

1E49

100p

1E56

2E33

12V

CDS4C12GTA

100p

2E17

1E57

CDS4C12GTA
12V

RES 6E34

100p

2E19

1E52

RES 6E35

150p

2E95

150p

2E96

3E25

100p

1E47

2E70
2E82

1E48

RES 6E14

CDS4C12GTA
12V
CDS4C12GTA
12V

RES 6E24
RES 6E02

4K7

150p

2E93

150p

2E94

18p

2E98

39p

2E97

18K

CDS4C12GTA
12V

RES 6E12

100p

2E32
150p

2E92

3E17

39K

1u0

3E18 2
1
2
3E19
1

15

18
19

IE51

100n 16V

100p

FE76
1E26

75R

RES 6E36

68R

7E09-2
PUMH7

RES 2E77

AV2-BLK

MTJ-505H-01 NI LF

RES
3E48

3E37-2
2 100R 7
3E37-3
FE78

100n

2E73
3EB9-1

RES 6E37

27R

IE94
8

FE77

100p

1E24

RES 2E78

RES 6E31

CDS4C12GTA
12V

3E52
68R

1K0

2 3EB6-2 7

470R
3EB6-3

3 470R 6

470R

3E63-2

2 3EB9-2 7

100R
3E63-3

100R

470R
3 3EB9-3 6

470R

1X02
REF EMC HOLE

3E11-2

100p

1E23

1K0

2 470R 7
3EA7-3

68R

3EA7-2

RES
3E49
RES 2E76

CDS4C12GTA
12V

470R

4 3EB9-4 5

100p

2E44

1E25

CDS4C12GTA
12V

RES 6E32
CVBS-OUT-SC1
RES 6E30

IE93

100R
3E07-2

3E07-3
3

470R
7E04
BC847BW

100p

3E39

2E41

IE62

1E27

100p

1E22

AV2-CVBS

CDS4C12GTA
12V

+5V

22

MRC-021V-29 PC

3E62

17

100n

CVBS-OUT-SC1

68R

1E01-2
23
RES 2E75

CDS4C12GTA
12V

RES 6E29

75R

3E43

FE67

MT

27R

3E45

MRC-021V-29 PC

2
1

AV1-CVBS

14

21

3E61

FE85

IE52

100p

2E31
9E02

1K0
4 3EB6-4 5

100n

2E24

4K7

3E44

IE92

7E05
BC847BW

13

FE79

IE91

20

12
11
10
9
8
7
6
5
4
3
2
1

11

20

470R

19

10
FE66

+3V3

2E13

1 3EB6-1 8

1EP2

3E86

4K7

IE96

18

16

18R

1u8

FE64

18R

3E73

IE17

FE84

BEC2

5E79

12

18R

17

IE48

150p

1R0

3EA1

16

9E09
9E06

IE57

FE68

3E84

RES

21

7E09-1
PUMH7

BEC1

1u8

15
2E74

100p

2E12

+5V

14

FE82
1E19

CDS4C12GTA
12V

150p

2E86

2E85

AV4-PR

13

FE81

+3V3

AV1-BLK

5E78

IE56

AV4-Y

RES

12

9E10

FE83

330R

1E55

100p
100p

2E14

9E07

3E79

* EU

CVBS-MON-OUT1

11

9E05

RES

10u

IE14

18R

18R

3E83 18R
5E80

FE63

3E16 12K

5p6

3E85
1E18

CDS4C12GTA
12V

6E26

BEC5

5E76
1u8

10

IE16
3E78

IE55

BC847BPN(COL)

820R

9
9E08

9E55

9E54

AV1-R

RES

RES

AP

2E99

IE59

* EU

YPBPR2-SYNCIN2

2u2

18R

IE05

2E81

1E02

3E82

AV2-STATUS

IE70

(AV2)

RES

2
IE60
1
1 3EB1 2

IE08

18R

7E06-1

3 BC847BPN(COL)

FE80

3E77

150p

2E84

150p

1u8

RES 6E28

YPBPR1-PR

150p

BEC4

5E74

IE54
2E83

AV1-G

FE74
FE75

1u8

BEC0

470R

3E76 18R

7E06-2
6

FE73
2E18

RES 6E22

9E53

4K7

9E52

3E32

AP
YPBPR1-SYNCIN1

IE61

12K

5E77

IE89

2EB3

3E31
CDS4C12GTA
12V

IE18

FE55

IE13

* EU

3EA2

2
3

AV1-STATUS

100n

1 3EB3 2

RES

IE90

9E01

1E01-1

AV4-PB

2E89

100p

18R

100p

(AV1)

1K0

CDS4C12GTA
12V

100p

2E90

1E53
1E54

2E91

3E75

150p

150p

2E80

1u8

SCART1

SCART2

3E11-4

3E80 18R

+5V

1E12

BEC3

IE21
4

2E15

5E73

CDS4C12GTA
12V

IE53

RES 6E23

AV1-B

2E79

AUDIO-IN2-L

2EB1

3E74 18R

CDS4C12GTA
12V

9E51

A-PLOP

* EU

RES 6E09

2E04

9E50

100R

2K2

1K0 8

100p

YPBPR1-PB

CDS4C12GTA
12V

RES 6E07

100p

2E10
AUDIO-IN1-L

AP

3E24

FE62

3E63-4

10K

AP-SCART-OUT-L

FE72

3E07-1

FEC8
+3V3

4
PUMH7

1 100R 8

IE23

2E51

RES 6E08

CDS4C12GTA
12V

100p
100p

AP-SCART-OUT-R

1K0

CDS4C12GTA
12V

100p

1E31

AUDIO-OUT-R
1u0 16V

FE61

3E11-1
1

IE68

2EA5

CDS4C12GTA
12V

IEC2

5 470R 4
FEA1

7E01-2 3
2E88

CDS4C12GTA
12V

RES 6E03

IE20

AUDIO-IN2-R

3E37-1

AP-SCART-OUT-L

FE71

100p

2E06

1K0

2E29

PUMH7

3E07-4
4

AP-SCART-OUT-L

IEC1

2E30

IE22

1u0 16V

100R

RES 6E10

100p

2E87

1E00

CDS4C12GTA
12V

RES 6E01

100p

8 470R 1
FEA0

7E01-1 6

IE67

2EA4

AUDIO-OUT-L

3EA7-4

AUDIO-IN1-R

IEC0

3EA7-1

4 100R 5
2E01

FE70

3E37-4

AP-SCART-OUT-R

FE60

3E63-1

AP-SCART-OUT-R

10

11

12

1K0
3E11-3
1K0

13

1E00 A4
1E01-1 D5
1E01-2 H5
1E02 C13
1E12 D4
1E18 F4
1E19 F4
1E22 H4
1E23 I4
1E24 I11
1E25 I4
1E26 G11
1E27 H11
1E31 B4
1E45 A11
1E46 B11
1E47 C11
1E48 C11
1E49 D11
1E52 F11
1E53 C4
1E54 D4
1E55 E4
1E56 E11
1E57 E11
1EP2 F13
2E01 A3
2E04 D3
2E06 B3
2E10 C3
2E12 F4
2E13 G11
2E14 F4
2E15 D4
2E16 D12
2E17 E12
2E18 E4
2E19 F12
2E24 G2
2E29 A10
2E30 B10
2E31 C10
2E32 C10
2E33 E12
2E41 H12
2E44 I4
2E50 A12
2E51 B12
2E70 C12
2E73 H7
2E74 F7
2E75 H4
2E76 I4
2E77 G12
2E78 I12
2E79 D1
2E80 D2
2E81 E7
2E82 C12
2E83 F1
2E84 F2
2E85 F1
2E86 F2
2E87 A4
2E88 B4
2E89 D9
2E90 C4
2E91 D4
2E92 D10
2E93 E10
2E94 E9
2E95 F10
2E96 F9
2E97 E8
2E98 E8
2E99 E8
2EA4 A7
2EA5 B7
2EB1 D6
2EB3 E7
3E07-1 C3
3E07-2 H13
3E07-3 H13
3E07-4 B3
3E11-1 B11
3E11-2 I13
3E11-3 I13
3E11-4 C11

3E16 D11
3E17 E10
3E18 E7
3E19 E7
3E24 C7
3E25 C13
3E31 E3
3E32 E3
3E37-1 C3
3E37-2 G13
3E37-3 H13
3E37-4 A3
3E39 H10
3E43 H2
3E44 G2
3E45 G7
3E48 G7
3E49 I7
3E52 H7
3E61 G11
3E62 H2
3E63-1 A11
3E63-2 I13
3E63-3 I13
3E63-4 B11
3E73 G10
3E74 D2
3E75 D2
3E76 E2
3E77 E2
3E78 F2
3E79 F2
3E80 C10
3E82 D10
3E83 E10
3E84 E10
3E85 F10
3E86 F10
3EA1 D6
3EA2 D6
3EA7-1 A7
3EA7-2 H13
3EA7-3 H13
3EA7-4 B7
3EB1 E6
3EB3 E6
3EB6-1 G6
3EB6-2 H13
3EB6-3 H13
3EB6-4 G6
3EB9-1 H6
3EB9-2 I13
3EB9-3 I13
3EB9-4 I6
5E73 D2
5E74 E2
5E76 F2
5E77 D10
5E78 E10
5E79 F10
5E80 E8
6E01 A3
6E02 E11
6E03 B3
6E07 C3
6E08 B11
6E09 D3
6E10 A11
6E12 C11
6E14 C11
6E22 E3
6E23 D3
6E24 D11
6E26 F3
6E28 F3
6E29 H3
6E30 I3
6E31 I11
6E32 I3
6E34 E11
6E35 F11
6E36 G11
6E37 H11
7E01-1 A6
7E01-2 B6
7E04 H6
7E05 G6
7E06-1 E7

7E06-2 E6
7E09-1 H2
7E09-2 G10
9E01 D6
9E02 D7
9E05 F4
9E06 G4
9E07 F4
9E08 F4
9E09 G4
9E10 F4
9E50 D1
9E51 D2
9E52 E1
9E53 E2
9E54 F1
9E55 F2
BEC0 D10
BEC1 E10
BEC2 F10
BEC3 D2
BEC4 E2
BEC5 F2
FE55 D9
FE60 A12
FE61 B12
FE62 B12
FE63 D12
FE64 D12
FE66 E12
FE67 E12
FE68 D12
FE70 A5
FE71 B4
FE72 C4
FE73 E4
FE74 E4
FE75 E4
FE76 G12
FE77 H12
FE78 H12
FE79 F13
FE80 E4
FE81 F4
FE82 F4
FE83 G4
FE84 G4
FE85 G5
FEA0 A7
FEA1 B7
FEC8 B13
IE05 D10
IE08 E5
IE13 D6
IE14 F5
IE16 F5
IE17 G5
IE18 E3
IE20 B10
IE21 C10
IE22 B2
IE23 C2
IE48 G2
IE51 G10
IE52 H2
IE53 D1
IE54 E1
IE55 F1
IE56 E9
IE57 F9
IE59 E8
IE60 E6
IE61 E6
IE62 H10
IE67 A8
IE68 B8
IE70 E7
IE89 D7
IE90 D7
IE91 G6
IE92 G7
IE93 H7
IE94 H6
IE96 G6
IEC0 A7
IEC1 A6
IEC2 B7

CLASS D

2009-10-22

8204 000 8952


18770_858_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-23-2

Q552.1E LA

10.

EN 211

Analogue Externals B

B04B
1

Analogue Externals B
2

B04B
4

10

12

11

13

14

A
SPDIF out
YPBPR

FE42

5E06

CDS4C12GTA
12V

3E89

IE76

9E58

3E90

RES 6E46

10p

30R

AV2-CVBS

IE75

1E07
CON_JACK

FE59
CDS4C12GTA
12V

SPDIF-OUT

YPBPR1-SYNCIN1
IE73

1
2 YKB11-0946V
FE41

AV3-PB

18R

YPBPR1-PB

IE77

AV3-PR

18R

CDS4C12GTA
12V

RES 6E52

1E39

100p

2E68

IE74

9E57

EU

1E04

AV3-Y

27R

FE48

MTJ-032-21B-41 NI FE
2

3E88

9E04

EU
RES 6E51

1E28

100p

2E67

IE15

IE72

1E44

AP

FE51

MTJ-032-21B-41 NI FE
2
1E03

3E87

2E22

RES 6E40

IE71

9E29

18R

CDS4C12GTA
12V

1E43

100p

2E27

1
YELLOW

EU

FE54

YKC21-5598
2
1E08-1

YPBPR1-PR

YPBPR AUDIO

FE49

AUDIO-IN3-L

1K0
100p

CDS4C12GTA
12V

IE29

3E96

RES 6E38

1E42

100p

3
WHITE

2E40

YKC21-5598
4

2E71

FE43

100p

RES 6E06

100p

AUDIO-IN3-R
IE31

1K0
2E72

FE50

RED

1E08-2

CDS4C12GTA
12V

3E97

YKC21-5598
6
1E29

1E08-3

2E39

VGA ( OR DVI ) AUDIO

IE09
AUDIO-IN4-L

1K0

100p

6E19

3E21
CDS4C12GTA
12V

V_NOM

2E36

1n0
1E37

FE02

3
7
MSJ-035-10A B AG PPO 8
1

2E35

5
4
2

1E09

FE01

AUDIO-IN4-R

100p

1K0
2E38

6E20

CDS4C12GTA
12V

V_NOM

1n0
1E38

2E37

IE10

3E20

FE03

SVHS IN
BE20

2
4

FE45

H
3E15

CDS4C12GTA
12V

1E76

RES 6E16

BE22

2E21

100p

1
FE46

C-SVHS

18R

BE21

MDC-066H-A LF
1ECB

3E14

CDS4C12GTA
12V

RES 6E15

1E75

2E20

100p

FE44

Y-SVHS

27R

10

11

12

13

1E03 B3
1E04 C3
1E07 A12
1E08-1 B3
1E08-2 E3
1E08-3 D3
1E09 F3
1E28 B4
1E29 D4
1E37 F4
1E38 G4
1E39 C4
1E42 E4
1E43 B4
1E44 B10
1E75 H5
1E76 I5
1ECB I4
2E20 H4
2E21 I4
2E22 B9
2E27 B4
2E35 F6
2E36 F4
2E37 G4
2E38 G6
2E39 D4
2E40 E4
2E67 B4
2E68 C4
2E71 E5
2E72 D5
3E14 H6
3E15 H6
3E20 G5
3E21 F5
3E87 B6
3E88 B6
3E89 B6
3E90 C6
3E96 E5
3E97 D5
5E06 B9
6E06 D5
6E15 H5
6E16 I5
6E19 F5
6E20 G5
6E38 E5
6E40 B5
6E46 B11
6E51 B4
6E52 C4
9E04 B5
9E29 B5
9E57 B5
9E58 C5
BE20 H6
BE21 H6
BE22 I4
FE01 F4
FE02 F5
FE03 G5
FE41 B12
FE42 C4
FE43 D4
FE44 H5
FE45 H5
FE46 I4
FE48 C4
FE49 E4
FE50 D4
FE51 B4
FE54 B4
FE59 B10
IE09 F6
IE10 G6
IE15 B9
IE29 E6
IE31 D6
IE71 B6
IE72 B7
IE73 B7
IE74 B6
IE75 B7
IE76 C6
IE77 C7

14
5

ANALOG I/O

2010-02-16

8204 000 8952


18770_859_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 212

Ethernet + Service

Ethernet + Service
2

10

12

14

13

IE07

5E08
+3V3

+3V3-ET-ANA

TXD1-MIPS

IE49

2 3E53-2 7

47R
4 3E53-4 5

RXD1-MIPS

47R
6E43

+3V3

IE38

IE32
3E30

3E53-1
47R
3E53-3

FE56

1E06
3

FE57

2
3
1

47R

YKB21-5157V

UART
SERVICE
CONNECTOR

FE58

10u

2E48

100n

2E49

4n7

2E52

100n
2E53

IE33

1M0
1E70
NX3225GA

+3V3

IE06

BZX384-C5V1

+3V3-ET-ANA

IE50

1E85

100n

100n
2E66

2E62

10u
2E63

30R

11

1E86

B04C

6E44

B04C

BZX384-C5V1

10-23-3

Q552.1E LA

19

ETH-COL

3E69
RES
10K

3E70
RES

15
3E71
RES

ETH-TXEN

21
22
23
24
25
18

ETH-TXD(3)
ETH-TXER

1K5

12
P
N

RXER
RXD4
0
PHYAD
1
RXCLK

0
1
2 TXD
3
4
INT
TXER

REGOFF
1
LED
2
INTSEL
CRS
RBIAS

31
30

ETH-RXP
ETH-RXN

29
28

ETH-TXP
ETH-TXN

20

ETH-TXCLK

26

ETH-RXDV

IE63

13

10K

+3V3

RES

3E65

ETH-RXCLK

10K

+3V3

RES

3
10K

3E34

10K

3E72

3E68
RES
3E35
RES

ETH-REGOFF

10K

+3V3
ETH-INTSEL

10K

+3V3

9E42

14

ETH-CRS

32
IE39

MDC
MDIO

ETH-RXER

3E64
IE64

VSS

+3V3

33

3E51

TX

RXDV

TXEN

17
16

ETH-MDC
ETH-MDIO

P
N

TXCLK

COL
CRS_DV
MODE2

10K

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)

0
MODE
1
RMIISEL
PHYAD2
RXD<0:3>

10K

9E43

RX

RST

11
10
9
8

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

IO

12K1
1%

IE26

1A 2A
VDD

3E40

27

CR
CLKIN
1
XTAL
2

5
4
RESET-ETHERNETn

10p

2E54

10p

7E10-1
LAN8710A-EZK

2E55

10K

10K

3E33

10K
3E67 RES

3E66 RES

25M

7E10-2
LAN8710A-EZK
34
35

36
37

VIA

+3V3-ET-ANA

F
22R

22R

3E98

CONFIGURATION RESISTOR SETTINGS

6E50
RES

NUP1301ML3

3E26

5 100R 4

3E95-4

6 100R 3

6E49
RES

NUP1301ML3

3E95-3

7 100R 2

3E95-1

8 100R 1
3E95-2

6E48
RES

NUP1301ML3

1 100R 8
3E22-2

2 100R 7

6E47
RES 3E22-1

4 100R 5
NUP1301ML3

3E22-3

3 100R 6
3E22-4

POP

Resistor

ETHERNET CONNECTOR

EMPTY

1N00
FE27

ETH-TXP
ETH-TXN
ETH-RXP

FE31

22n

2E60

15p

2E59

BE03

1
2
3
4
5
6
7
8
1551151-1

RES

15p

2E58
RES

15p

RES 2E57

15p

RES 2E56

ETH-RXN

BE00
FE28
BE01
FE29
BE02
FE30

FE34

3E64 (RES)

PHYADD(0) = 1

PHYADD(0) = 0

3E65 (RES)

PHYADD(1) = 1

PHYADD(1) = 0

3E66 (RES)

PHYADD(2) = 1

PHYADD(2) = 0

3E67 (RES)

RMII mode selected

MII mode selected

3E68 (RES)

Internal 1.2V reg. disabled

Internal 1.2V reg. enabled

3E69 (RES)

MODE(0) = 0

MODE(0) = 1

3E70 (RES)

MODE(1) = 0

MODE(1) = 1

3E71 (RES)

MODE(2) = 0

MODE(2) = 1

FE32

3E72

ETH-INTSEL
ETH-REGOFF

FE33

INTERRUPT FUNCTION

INTERRUPT FUNCTION

DISABLED ON

ENABLED ON

nINT/TXER/TXD4 SIGNAL

nINT/TXER/TXD4 SIGNAL

10

11

12

13

1E06 A13
1E70 B3
1E85 A11
1E86 A11
1N00 G7
2E48 B5
2E49 B5
2E52 B3
2E53 B4
2E54 B3
2E55 B3
2E56 H2
2E57 H2
2E58 H3
2E59 H4
2E60 H5
2E62 A3
2E63 A3
2E66 A3
3E22-1 F2
3E22-2 F3
3E22-3 F2
3E22-4 F2
3E26 F5
3E30 B3
3E33 B2
3E34 D6
3E35 D6
3E40 D5
3E51 E1
3E53-1 A10
3E53-2 A9
3E53-3 A10
3E53-4 A9
3E64 C6
3E65 D6
3E66 B2
3E67 B2
3E68 D6
3E69 C2
3E70 C1
3E71 C3
3E72 D6
3E95-1 F3
3E95-2 F3
3E95-3 F4
3E95-4 F4
3E98 F5
5E08 A3
6E43 A9
6E44 A10
6E47 G2
6E48 G3
6E49 G4
6E50 G5
7E10-1 B4
7E10-2 E4
9E42 D5
9E43 C3
BE00 G6
BE01 G6
BE02 G6
BE03 H6
FE27 G6
FE28 G6
FE29 G6
FE30 G6
FE31 H6
FE32 I5
FE33 I5
FE34 H6
FE56 A11
FE57 A11
FE58 A11
IE06 B4
IE07 A3
IE26 C2
IE32 B3
IE33 B3
IE38 B4
IE39 D5
IE49 A10
IE50 A9
IE63 C6
IE64 C6

14
5

ANALOG I/O

2010-02-16

8204 000 8952


18770_860_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-23-4

Q552.1E LA

10.

EN 213

HDMI

B04D

HDMI

B04D
2

10

11

12

13

14

I2C Address

ARX1ARX0+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FECG 21

10K

3ECH

1u0

10u

100n

2EC0

2ECV

BRX2BRX1+

ARX1ARX1+

69
70

ARX2ARX2+

71
72

BIN-5V
BRX-HOTPLUG

BRX-DDC-SCL
BRX-DDC-SDA

FECE
FECF

BIN-5V

47K

BRXCPCEC-HDMI

BIN-5V

10R

BRX-DDC-SDA
BRX-DDC-SCL

7
100K
1u0

BRX-HOTPLUG

CIN-5V
CRX2+

2 3ECM-2 7

3
3ECN-3

10R

CRX-DDC-SDA
CRX-DDC-SCL

1u0

CRX2CRX1+

FECA

47K

CIN-5V
CRX-HOTPLUG

20
23 22

3E23

PCEC-HDMI

100R

IEC4

4
3ECN-4

10R

DRX-DDC-SDA
DRX-DDC-SCL

1u0

5EC2

eHDMI+

30R
ARC-eHDMI+

CIN-5V

7EC0
BC847BW

3ECD

1 3ECM-1 8

2ECC

+3V3-STANDBY

DIN-5V

22K
RES

RES
7E02
BC847BW

1
2

BRX0BRX0+

3
4

BRX1BRX1+

5
6

6
100K

7
8

IE44

41
42
39
40

2ECP

CRXCCRXC+

11
12

CRX0CRX0+

13
14

CRX1CRX1+

15
16

CRX2CRX2+

17
18

DRX-HOTPLUG

47K

FECM
FECN

CRX-DDC-SCL
CRX-DDC-SDA
3 3ECA-3 6

FECJ

5 3ECA-4 4

CIN-5V

CRX0CRXC+

FECK
FECL

33
34

2ECN

BRX2BRX2+

HDMI CONNECTOR 1

CRX1CRX0+

35
36

CRX-HOTPLUG

1P02

CRXCPCEC-HDMI
ARC-eHDMI+
CRX-DDC-SCL
CRX-DDC-SDA

IE43

BRXCBRXC+

BRX-DDC-SCL
BRX-DDC-SDA

20

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FECP19
21

3 3ECM-3 6

2
3ECN-2

5
100K

IE45

2ECQ

45
46
43
44

DRXCDRXC+

19
20

DRX0DRX0+

21
22

DRX1DRX1+

23
24

DRX2DRX2+

25
26

CEC-HDMI

IEC5

100n

10u

RES 2ECW

3ECP-1 3ECP-3

N
R0XC
P

DSCL4
DSDA4

N
R0X0
P

CEC_D

49

10K

+5V-EDID

R4PWR5V

48
47

VGA-SCL-EDID-HDMI
VGA-SDA-EDID-HDMI

51

9EC2

CEC-HDMI

RES

N
R0X1
P
N
R0X2
P
TX2

(CBUS) HPD1
R1PWR5V
DSDA1
DSCL1
N
R1XC
P

N
P

TX1

N
P

TX0

N
P

TXC

N
R1X0
P

N
P

57
56

HDMIA-RX2HDMIA-RX2+

59
58

HDMIA-RX1HDMIA-RX1+

61
60

HDMIA-RX0HDMIA-RX0+

63
62

N
R1X1
P

TPWR_CI2CA

N
R1X2
P

CEC_A

(CBUS) HPD2
R2PWR5V

INT

55

50

52

HDMIA-RXCHDMIA-RXC+
3ECJ RES
4K7
IE12
FECR

RES
3ECK

MICOM-VCC33

4K7
9EC3
RES

FECY

PCEC-HDMI
3ECL RES

+3V3

4K7

DSDA2
DSCL2
N
R2XC
P

CSCL
CSDA

N
R2X0
P
RSVDL

N
R2X1
P

54
53 3EC3
3EC5

100R
100R

SCL-SSB
SDA-SSB

10
28

N
R2X2
P

(CBUS) HPD3
R3PWR5V
DSDA3
DSCL3
N
R3XC
P
VIA

N
R3X0
P
N
R3X1
P

IEC6
9EC0

38

37

DSDA0
DSCL0

SBVCC33

9
27
64
(CBUS) HPD0
R0PWR5V

10K

29
30

BRX2+

BRX0BRXC+

FECC
FECD

+3V3

30R

2ECM

31
32

MICOM_VCC33

IE42

67
68

BRX1BRX0+

100n

100n
2EC8

100n
2EC7

2EC6
8
100K

ARX0ARX0+

BIN-5V

1u0

AIN-5V

23 22

10R
ARX-DDC-SDA
ARX-DDC-SCL

10p

1
3ECN-1

65
66

47K

AIN-5V

3ECM-4

ARXCARXC+

HDMI CONNECTOR 2

1P03

3 3EC1-3 6

47K
47K

ARX-HOTPLUG

20
23 22

VCC33

ARX-HOTPLUG

8 3EC1-1 1

FEC5

7EC1
SII9287B

ARX-DDC-SCL
ARX-DDC-SDA

FEC4
AIN-5V

RES
5EC3

+3V3-HDMI

ARXCPCEC-HDMI
ARX-DDC-SCL
ARX-DDC-SDA

FEC7

AIN-5V

ARX0ARXC+

FEC1
FEC2

SII9187A = 0xB2

FECB

ARX2ARX1+

7 3ECA-2 2

30R

MICOM-VCC33

2EC3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FEC6 21

1 3ECA-1 8

ARX2+

220u 16V

RES 2EC1

+3V3

HDMI CONNECTOR 3
1P04

FEC3

FEC0

2EC2

5EC0

N
R3X2
P

74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89

73

EPAD

22K

3ECE

IEC7

7EC1

3ECN

NON-INSTAPORT

9187A

4X 3K3

3K3

INSTAPORT

9287B

4X 100K

100K

FECW
+3V3-STANDBY

H
6EC1
+5V

3ECF

+5V-VGA
BAT54

3ECF

4R7

3ECG

IE11

FECZ

100K

DDCA-SDA

DDCA-SCL

2ECU

IE65

2 3ECU-2 7

IE66

10K
4 3ECU-4 5

+3V3

10K
1u0

+5V-EDID

10

11

12

13

1P02 E2
1P03 C2
1P04 A2
2EC0 A9
2EC1 A8
2EC2 A10
2EC3 B10
2EC6 B9
2EC7 B9
2EC8 B9
2ECC G8
2ECM B8
2ECN D8
2ECP E8
2ECQ F8
2ECU I3
2ECV A9
2ECW B10
3E23 F4
3EC1-1 B4
3EC1-3 B4
3EC3 E10
3EC5 E10
3ECA-1 D4
3ECA-2 D4
3ECA-3 F4
3ECA-4 F4
3ECD G3
3ECE H3
3ECF I3
3ECG I3
3ECH A10
3ECJ D10
3ECK D11
3ECL E11
3ECM-1 F8
3ECM-2 E8
3ECM-3 D8
3ECM-4 B8
3ECN-1 B8
3ECN-2 D8
3ECN-3 E8
3ECN-4 F8
3ECP-1 B10
3ECP-3 B10
3ECU-2 I8
3ECU-4 I8
5EC0 A8
5EC2 F7
5EC3 A11
6EC1 H3
7E02 G3
7EC0 G3
7EC1 B9
9EC0 G4
9EC2 C11
9EC3 E11
FEC0 A9
FEC1 B2
FEC2 B2
FEC3 A10
FEC4 B2
FEC5 B2
FEC6 B2
FEC7 A10
FECA F3
FECB A10
FECC D2
FECD D2
FECE D2
FECF D2
FECG D2
FECJ F2
FECK F2
FECL F2
FECM F2
FECN F2
FECP F2
FECR E10
FECW H9
FECY E10
FECZ I3
IE11 I3
IE12 D10
IE42 B8
IE43 D8
IE44 E8
IE45 F8
IE65 I7
IE66 I7
IEC4 G3
IEC5 G3
IEC6 G4
IEC7 H3

14
5

HDMI

2010-02-16

8204 000 8952


18770_861_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-23-5

Q552.1E LA

10.

EN 214

Headphone

B04E

Headphone

B04E
2

+3V3-STANDBY

4
PUMD12
7EE0-2
A-PLOP
3

B
6

A-STBY

FEE0
RESET-AUDIO

7EE0-1
PUMD12
1

C
2EE0

6
22K

22K

3EE1-3

3EE1-4

3EE1-2

22K

47p
3EE1-1

22K
2EE5

7EE1
TPA6111A2DGN

100n

2EE1

47p +3V3

IEE2
ADAC(4)

2EE3
1u0

IEE1
2EE4

3EE0-1
10K

IEE3
1

2
5

3EE0-4

10K

1u0

6
IEE4

5
2EE2

IEE6

AMPLIFIER

3EE0-3
10K

IEE7

3EE2-2

FE36
7

BYPASS

2EE7

IEE8

3EE2-3

FE35
6

AMP2

33R

4V 100u

10
11

AMP1

33R

VO

SHUTDOWN

4
3

2EE6

4V 100u

VIA
GND GND_HS

1u0

A-PLOP

IN2

3EE2-1
33R

3EE2-4

33R

IEE0
ADAC(3)

VDD

2EE0 C5
2EE1 D5
2EE2 E4
2EE3 E2
2EE4 E3
2EE5 D5
2EE6 E6
2EE7 E6
3EE0-1 E3
3EE0-3 F3
3EE0-4 E3
3EE1-1 C5
3EE1-2 D8
3EE1-3 D8
3EE1-4 D5
3EE2-1 D7
3EE2-2 E7
3EE2-3 E7
3EE2-4 E7
7EE0-1 B5
7EE0-2 B6
7EE1 D4
FE35 E7
FE36 E7
FEE0 B4
IEE0 E2
IEE1 E2
IEE2 E2
IEE3 E3
IEE4 E3
IEE5 F3
IEE6 E4
IEE7 E6
IEE8 E6

6
IEE5

9
5

AUDIO

2010-02-16

8204 000 8952


18770_862_100331.eps
100331

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 215

10.24 B04 820400089526 Analog I/O


10-24-1

Analogue Externals A

Analogue Externals A

B04A
1

B04A

10

11

12

13

RESET-AVPIP

100p

2E50

1E45

100p

1E46

100p
100p

2E16

1E49

100p

1E56

12V

CDS4C12GTA

2E33

100p

2E17

1E57

RES 6E34

100p

1E52

2E19

RES 6E35

150p

2E95

150p

2E96

19

IE51

100n 16V

2E13

7E09-2
PUMH7

75R

RES 6E36

3E61

FE76
100p

AV2-BLK

MTJ-505H-01 NI LF

1E26

CVBS-OUT-SC1

3E37-2
2 100R 7
3E37-3
FE78

3EB9-1

IE94
8

100p

1E24

RES 2E78

CDS4C12GTA
12V

68R

10

11

12

470R
2 3EB9-2 7

68R

470R
3EB6-3

3E63-2
100R
3E63-3

1K0
3E11-3
1K0

470R
3 3EB9-3 6

100R
3E11-2

100p

1E23

RES 2E76

2 3EB6-2 7

3 470R 6
2

RES
3E49

1K0

2 470R 7
3EA7-3

1K0

3EA7-2
FE77

3E52

RES 6E31

470R

4 3EB9-4 5

100p

2E44

1E25

RES 6E32

CDS4C12GTA
12V
CDS4C12GTA
12V

CVBS-OUT-SC1
RES 6E30

IE93

100R
3E07-2

3E07-3
3

470R
7E04
BC847BW

100p

100n

2E73

RES 6E37

27R

2E41

3E39

1E27

100p

1E22

MRC-021V-29 PC

IE62

CDS4C12GTA
12V

+5V

22

AV2-CVBS

3E62

10K

3E25

100p

1E47

2E70
2E82

1E48

RES 6E14

CDS4C12GTA
12V
CDS4C12GTA
12V

RES 6E24
RES 6E02

4K7

150p

2E93

150p

2E94

18p

2E98

39p

2E97

18K

CDS4C12GTA
12V

RES 6E12

100p

2E32
150p

2E92

3E17

39K

1u0

68R

23
RES 2E75

CDS4C12GTA
12V

RES 6E29

75R

3E43

3E18 2
1
2
RES
3E48

1E01-2
2

27R

18

MT

AV1-CVBS

17

21

MRC-021V-29 PC
6

IE52

100p

2E31

FE85

3E45
68R

IE48

3E19
1

IE92

7E05
BC847BW

FE79

IE91

20

15

20

470R

19

FE67

+3V3

4K7

1 3EB6-1 8

14

1EP2

3E86

3E73

IE96

13

16

17
18

12
11
10
9
8
7
6
5
4
3
2
1

11

18R

18R

1u8

8
9
10

FE66

100n

16

4 3EB6-4 5

100n

2E24

4K7

3E44

9E02

1K0

3EA1

2E74

100p

1E19

FE84

BEC2

5E79

FE64

12

RES

IE17
9E06

IE57

3E84
18R

15

FE82
2E12

+5V

14

21

7E09-1
PUMH7

150p

1R0

3EA2

AV4-PR

13

9E09

FE83

AV1-BLK

BEC1

1u8

RES

12

9E10

+3V3

* EU

5E78

IE56

AV4-Y

FE68

RES 2E77

100p

9E07

FE81

18R

CVBS-MON-OUT1

11

9E05

RES

10

10u

IE14

3E79

150p

2E86

2E85

1u8

100n

330R

100p

1E55

2E18
2E14

1E18

CDS4C12GTA
12V

RES

6E26

BEC5

5E76

3E83 18R

3E85

18R

CDS4C12GTA
12V

IE55

BC847BPN(COL)

820R

IE16
3E78

AV1-R

9E08

9E55

9E54

YPBPR2-SYNCIN2

5E80

FE63

3E16 12K

5p6
IE59

* EU

2E99

2u2

18R

IE05

2E81

1E02

3E82

AV2-STATUS

IE70

(AV2)

RES

2
IE60
1 3EB1 2
1

IE08

RES

AP

7E06-1

3 BC847BPN(COL)

FE80

18R

150p

2E84

150p

1u8

FE74
FE75

3E77

RES 6E28

YPBPR1-PR

150p

BEC4

5E74

IE54
2E83

AV1-G

7E06-2
6

FE73

1u8

BEC0

470R

3E76 18R

CDS4C12GTA
12V

RES 6E22

9E53

4K7

9E52

3E32

AP

IE61

12K

5E77

IE89

2EB3

3E31

FE55

IE13

* EU
IE18

YPBPR1-SYNCIN1

9E01

2
3

AV1-STATUS

IE90

1 3EB3 2

RES

AV4-PB

2E89

100p

1E01-1
100p

18R

1K0

CDS4C12GTA
12V

100p

2E90

1E53
1E54

2E91

(AV1)

150p

150p

2E80

1u8

3E75

1E12

BEC3

SCART1

SCART2

3E11-4

3E80 18R

+5V

2E15

5E73

CDS4C12GTA
12V

IE53

RES 6E23

AV1-B

2E79

IE21
4

2EB1

3E74 18R

CDS4C12GTA
12V

9E51

AUDIO-IN2-L

* EU

RES 6E09

2E04

9E50

A-PLOP

2K2

1K0 8

100p

YPBPR1-PB

CDS4C12GTA
12V

RES 6E07

100p

2E10
AUDIO-IN1-L

AP

3E24

100R

CDS4C12GTA
12V

PUMH7

FE62

3E63-4

AP-SCART-OUT-L

FE72

3E07-1

FEC8
+3V3

1 100R 8

IE23

2E51

RES 6E08

CDS4C12GTA
12V

100p
100p

2E30

AP-SCART-OUT-R

1K0

CDS4C12GTA
12V

100p

2E88

AUDIO-OUT-R
1u0 16V

FE61

3E11-1
1

IE68

2EA5

CDS4C12GTA
12V

IEC2

5 470R 4
FEA1

7E01-2 3
1E31

RES 6E03

IE20

AUDIO-IN2-R

3E37-1

AP-SCART-OUT-L

FE71

100p

2E06

1K0

RES 6E10

100p

2E87

1E00

PUMH7

CDS4C12GTA
12V

AP-SCART-OUT-L

100R

IEC1

3E07-4

AUDIO-IN1-R

1u0 16V

2E29

8 470R 1
FEA0

7E01-1 6

IE67

2EA4

AUDIO-OUT-L

3EA7-4

IE22

CDS4C12GTA
12V

100p

RES 6E01

4 100R 5
2E01

IEC0

3EA7-1

FE60

3E63-1

AP-SCART-OUT-R
FE70

3E37-4

AP-SCART-OUT-R

470R

1E00 A4
1E01-1 D5
1E01-2 H5
1E02 C13
1E12 D4
1E18 F4
1E19 F4
1E22 H4
1E23 I4
1E24 I11
1E25 I4
1E26 G11
1E27 H11
1E31 B4
1E45 A11
1E46 B11
1E47 C11
1E48 C11
1E49 D11
1E52 F11
1E53 C4
1E54 D4
1E55 E4
1E56 E11
1E57 E11
1EP2 F13
2E01 A3
2E04 D3
2E06 B3
2E10 C3
2E12 F4
2E13 G11
2E14 F4
2E15 D4
2E16 D12
2E17 E12
2E18 E4
2E19 F12
2E24 G2
2E29 A10
2E30 B10
2E31 C10
2E32 C10
2E33 E12
2E41 H12
2E44 I4
2E50 A12
2E51 B12
2E70 C12
2E73 H7
2E74 F7
2E75 H4
2E76 I4
2E77 G12
2E78 I12
2E79 D1
2E80 D2
2E81 E7
2E82 C12
2E83 F1
2E84 F2
2E85 F1
2E86 F2
2E87 A4
2E88 B4
2E89 D9
2E90 C4
2E91 D4
2E92 D10
2E93 E10
2E94 E9
2E95 F10
2E96 F9
2E97 E8
2E98 E8
2E99 E8
2EA4 A7
2EA5 B7
2EB1 D6
2EB3 E7
3E07-1 C3
3E07-2 H13
3E07-3 H13
3E07-4 B3
3E11-1 B11
3E11-2 I13
3E11-3 I13
3E11-4 C11
3E16 D11
3E17 E10
3E18 E7
3E19 E7
3E24 C7
3E25 C13
3E31 E3
3E32 E3
3E37-1 C3
3E37-2 G13
3E37-3 H13
3E37-4 A3
3E39 H10

3E43 H2
3E44 G2
3E45 G7
3E48 G7
3E49 I7
3E52 H7
3E61 G11
3E62 H2
3E63-1 A11
3E63-2 I13
3E63-3 I13
3E63-4 B11
3E73 G10
3E74 D2
3E75 D2
3E76 E2
3E77 E2
3E78 F2
3E79 F2
3E80 C10
3E82 D10
3E83 E10
3E84 E10
3E85 F10
3E86 F10
3EA1 D6
3EA2 D6
3EA7-1 A7
3EA7-2 H13
3EA7-3 H13
3EA7-4 B7
3EB1 E6
3EB3 E6
3EB6-1 G6
3EB6-2 H13
3EB6-3 H13
3EB6-4 G6
3EB9-1 H6
3EB9-2 I13
3EB9-3 I13
3EB9-4 I6
5E73 D2
5E74 E2
5E76 F2
5E77 D10
5E78 E10
5E79 F10
5E80 E8
6E01 A3
6E02 E11
6E03 B3
6E07 C3
6E08 B11
6E09 D3
6E10 A11
6E12 C11
6E14 C11
6E22 E3
6E23 D3
6E24 D11
6E26 F3
6E28 F3
6E29 H3
6E30 I3
6E31 I11
6E32 I3
6E34 E11
6E35 F11
6E36 G11
6E37 H11
7E01-1 A6
7E01-2 B6
7E04 H6
7E05 G6
7E06-1 E7
7E06-2 E6
7E09-1 H2
7E09-2 G10
9E01 D6
9E02 D7
9E05 F4

9E06 G4
9E07 F4
9E08 F4
9E09 G4
9E10 F4
9E50 D1
9E51 D2
9E52 E1
9E53 E2
9E54 F1
9E55 F2
BEC0 D10
BEC1 E10
BEC2 F10
BEC3 D2
BEC4 E2
BEC5 F2
FE55 D9
FE60 A12
FE61 B12
FE62 B12
FE63 D12
FE64 D12
FE66 E12
FE67 E12
FE68 D12
FE70 A5
FE71 B4
FE72 C4
FE73 E4
FE74 E4
FE75 E4
FE76 G12
FE77 H12
FE78 H12
FE79 F13
FE80 E4
FE81 F4
FE82 F4
FE83 G4
FE84 G4
FE85 G5
FEA0 A7
FEA1 B7
FEC8 B13
IE05 D10
IE08 E5
IE13 D6
IE14 F5
IE16 F5
IE17 G5
IE18 E3
IE20 B10
IE21 C10
IE22 B2
IE23 C2
IE48 G2
IE51 G10
IE52 H2
IE53 D1
IE54 E1
IE55 F1
IE56 E9
IE57 F9
IE59 E8
IE60 E6
IE61 E6
IE62 H10
IE67 A8
IE68 B8
IE70 E7
IE89 D7
IE90 D7
IE91 G6
IE92 G7
IE93 H7
IE94 H6
IE96 G6
IEC0 A7
IEC1 A6
IEC2 B7

1X02
REF EMC HOLE

13

CLASS D

2010-03-12

8204 000 8952


18770_993_100714.eps
100714

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-24-2

Q552.1E LA

10.

EN 216

Analogue Externals B

B04B
1

Analogue Externals B
2

B04B

10

12

11

13

14

A
SPDIF out
YPBPR

FE42

5E06

CDS4C12GTA
12V

3E89

IE76

9E58

3E90

RES 6E46

10p

AV2-CVBS

IE75

1E07
CON_JACK

FE59

30R

CDS4C12GTA
12V

SPDIF-OUT

YPBPR1-SYNCIN1
IE73

1
2 YKB11-0946V
FE41

AV3-PB

18R

YPBPR1-PB

IE77

AV3-PR

18R

CDS4C12GTA
12V

RES 6E52

1E39

100p

2E68

IE74

9E57

EU

1E04

AV3-Y

27R

FE48

MTJ-032-21B-41 NI FE
2

3E88

9E04

EU
RES 6E51

1E28

100p

2E67

IE15

IE72

1E44

AP

FE51

MTJ-032-21B-41 NI FE
2
1E03

3E87

2E22

RES 6E40

IE71

9E29

18R

CDS4C12GTA
12V

1E43

100p

1
YELLOW

EU

FE54

YKC21-5598
2
2E27

1E08-1

YPBPR1-PR

YPBPR AUDIO

FE49

AUDIO-IN3-L

1K0
100p

CDS4C12GTA
12V

IE29

3E96

RES 6E38

1E42

100p

3
WHITE

2E40

YKC21-5598
4

2E71

FE43

100p

RES 6E06

100p

RED

AUDIO-IN3-R
IE31

1K0
2E72

FE50

1E08-2

CDS4C12GTA
12V

3E97

YKC21-5598
6
1E29

1E08-3

2E39

VGA ( OR DVI ) AUDIO

IE09
AUDIO-IN4-L

1K0

100p

CDS4C12GTA
12V

3E21

6E19

1n0
1E37

2E36

V_NOM

FE02

3
7
MSJ-035-10A B AG PPO 8
1

2E35

5
4
2

1E09

FE01

AUDIO-IN4-R

100p

1K0
2E38

CDS4C12GTA
12V

6E20

V_NOM

1n0
1E38

2E37

IE10

3E20

FE03

SVHS IN
BE20

2
4

H
3E15

CDS4C12GTA
12V

RES 6E16

BE22

1E76

FE46

2E21

100p

MDC-066H-A LF
1ECB

C-SVHS

18R

BE21

FE45

3
1

3E14

CDS4C12GTA
12V

RES 6E15

1E75

2E20

100p

FE44

Y-SVHS

27R

10

11

12

1E03 B3
1E04 C3
1E07 A12
1E08-1 B3
1E08-2 E3
1E08-3 D3
1E09 F3
1E28 B4
1E29 D4
1E37 F4
1E38 G4
1E39 C4
1E42 E4
1E43 B4
1E44 B10
1E75 H5
1E76 I5
1ECB I4
2E20 H4
2E21 I4
2E22 B9
2E27 B4
2E35 F6
2E36 F4
2E37 G4
2E38 G6
2E39 D4
2E40 E4
2E67 B4
2E68 C4
2E71 E5
2E72 D5
3E14 H6
3E15 H6
3E20 G5
3E21 F5
3E87 B6
3E88 B6
3E89 B6
3E90 C6
3E96 E5
3E97 D5
5E06 B9
6E06 D5
6E15 H5
6E16 I5
6E19 F5
6E20 G5
6E38 E5
6E40 B5
6E46 B11
6E51 B4
6E52 C4
9E04 B5
9E29 B5
9E57 B5
9E58 C5
BE20 H6
BE21 H6
BE22 I4
FE01 F4
FE02 F5
FE03 G5
FE41 B12
FE42 C4
FE43 D4
FE44 H5
FE45 H5
FE46 I4
FE48 C4
FE49 E4
FE50 D4
FE51 B4
FE54 B4
FE59 B10
IE09 F6
IE10 G6
IE15 B9
IE29 E6
IE31 D6
IE71 B6
IE72 B7
IE73 B7
IE74 B6
IE75 B7
IE76 C6
IE77 C7

14

13

ANALOG I/O

2010-03-12

8204 000 8952


18770_994_100714.eps
100714

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 217

Ethernet + Service

Ethernet + Service
2

10

12

14

13

IE07

5E08
+3V3

+3V3-ET-ANA

TXD1-MIPS

IE49

2 3E53-2 7

47R
4 3E53-4 5

RXD1-MIPS

47R
6E43

+3V3

IE38

IE32
3E30

3E53-1
47R
3E53-3

FE56

1E06
3

FE57

2
3
1

47R

YKB21-5157V

UART
SERVICE
CONNECTOR

FE58

10u

2E48

100n

2E49

4n7

2E52

100n
2E53

IE33

1M0
1E70
NX3225GA

+3V3

IE06

BZX384-C5V1

+3V3-ET-ANA

IE50

1E86

100n

100n
2E66

10u
2E63

2E62

30R

11

1E85

B04C

6E44

B04C

BZX384-C5V1

10-24-3

Q552.1E LA

19

ETH-COL

15
9E43

3E71
RES

21

ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)

22
23
24
25
18

ETH-TXD(3)
ETH-TXER

1K5

12

RXER
RXD4
0
PHYAD
1
RXCLK

0
1
2 TXD
3
4
INT
TXER

REGOFF
1
LED
2
INTSEL
CRS
RBIAS

31
30

ETH-RXP
ETH-RXN

29
28

ETH-TXP
ETH-TXN

20

ETH-TXCLK

26

ETH-RXDV

IE63

13

10K

+3V3

RES

3E65

ETH-RXCLK

10K

+3V3

RES

3
10K

3E34

10K

3E72

14

3E68
RES
3E35
RES

ETH-REGOFF

10K

+3V3
ETH-INTSEL

10K

+3V3

9E42

ETH-CRS

32
IE39

MDC
MDIO

ETH-RXER

3E64
IE64

VSS

+3V3

33

3E51

P
N

RXDV

TXEN

17
16

ETH-MDC
ETH-MDIO

P
N

TXCLK

COL
CRS_DV
MODE2

10K

ETH-TXEN

TX

0
MODE
1
RMIISEL
PHYAD2
RXD<0:3>

10K

3E69
RES
10K

3E70
RES

RX

RST

11
10
9
8

ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
ETH-RXD(3)

IO

12K1
1%

IE26

1A 2A
VDD

3E40

27

CR
CLKIN
1
XTAL
2

5
4
RESET-ETHERNETn

10p

2E54

10p

7E10-1
LAN8710A-EZK

2E55

10K

10K

3E33

10K
3E67 RES

3E66 RES

25M

7E10-2
LAN8710A-EZK
34
35

36
37

VIA

+3V3-ET-ANA

F
22R

3E98

22R

3E26

CONFIGURATION RESISTOR SETTINGS

6E50
RES

NUP1301ML3

3E95-4

5 100R 4

6 100R 3

6E49
RES

NUP1301ML3

3E95-3

7 100R 2

3E95-1
NUP1301ML3

6E48
RES

8 100R 1
3E95-2

2 100R 7

1 100R 8
3E22-2

6E47
RES 3E22-1

4 100R 5
NUP1301ML3

3E22-3

3 100R 6
3E22-4

POP

Resistor

ETHERNET CONNECTOR

EMPTY

1N00
FE27

ETH-TXP
ETH-TXN
ETH-RXP

FE31

22n

2E60

15p

2E59

BE03

3E64 (RES)

1
2
3
4
5
6
7
8
1551151-1

RES

15p

2E58
RES

15p

RES 2E57

15p

RES 2E56

ETH-RXN

BE00
FE28
BE01
FE29
BE02
FE30

FE34

PHYADD(0) = 1

PHYADD(0) = 0

3E65 (RES)

PHYADD(1) = 1

PHYADD(1) = 0

3E66 (RES)

PHYADD(2) = 1

PHYADD(2) = 0

3E67 (RES)

RMII mode selected

MII mode selected

3E68 (RES)

Internal 1.2V reg. disabled

Internal 1.2V reg. enabled

3E69 (RES)

MODE(0) = 0

MODE(0) = 1

3E70 (RES)

MODE(1) = 0

MODE(1) = 1

3E71 (RES)

MODE(2) = 0

MODE(2) = 1

3E72

INTERRUPT FUNCTION

INTERRUPT FUNCTION

DISABLED ON

ENABLED ON

nINT/TXER/TXD4 SIGNAL

nINT/TXER/TXD4 SIGNAL

FE32

ETH-INTSEL
ETH-REGOFF

FE33

10

11

12

1E06 A13
1E70 B3
1E85 A11
1E86 A11
1N00 G7
2E48 B5
2E49 B5
2E52 B3
2E53 B4
2E54 B3
2E55 B3
2E56 H2
2E57 H2
2E58 H3
2E59 H4
2E60 H5
2E62 A3
2E63 A3
2E66 A3
3E22-1 F2
3E22-2 F3
3E22-3 F2
3E22-4 F2
3E26 F5
3E30 B3
3E33 B2
3E34 D6
3E35 D6
3E40 D5
3E51 E1
3E53-1 A10
3E53-2 A9
3E53-3 A10
3E53-4 A9
3E64 C6
3E65 D6
3E66 B2
3E67 B2
3E68 D6
3E69 C2
3E70 C1
3E71 C3
3E72 D6
3E95-1 F3
3E95-2 F3
3E95-3 F4
3E95-4 F4
3E98 F5
5E08 A3
6E43 A9
6E44 A10
6E47 G2
6E48 G3
6E49 G4
6E50 G5
7E10-1 B4
7E10-2 E4
9E42 D5
9E43 C3
BE00 G6
BE01 G6
BE02 G6
BE03 H6
FE27 G6
FE28 G6
FE29 G6
FE30 G6
FE31 H6
FE32 I5
FE33 I5
FE34 H6
FE56 A11
FE57 A11
FE58 A11
IE06 B4
IE07 A3
IE26 C2
IE32 B3
IE33 B3
IE38 B4
IE39 D5
IE49 A10
IE50 A9
IE63 C6
IE64 C6

14

13

ANALOG I/O

2010-03-12

8204 000 8952


18770_995_100714.eps
100714

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-24-4

Q552.1E LA

10.

EN 218

HDMI

B04D

HDMI

B04D

10

11

12

13

14

I2C Address

ARX1ARX0+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FECG 21

10K

3ECH

1u0

10u

2ECV

2EC0

100n

BRX2+
BRX2BRX1+

ARX1ARX1+

69
70

ARX2ARX2+

BIN-5V

71
72

BRX-HOTPLUG
BRX0BRXC+

BRX-DDC-SCL
BRX-DDC-SDA

FECE
FECF

BIN-5V

47K

BRXCPCEC-HDMI
FECC
FECD

BIN-5V

3 3ECM-3 6

2
3ECN-2

10R

BRX-DDC-SDA
BRX-DDC-SCL

7
100K
1u0

BRX-DDC-SCL
BRX-DDC-SDA

BRX-HOTPLUG

20

CIN-5V
CRX2+

2 3ECM-2 7

3
3ECN-3

10R

CRX-DDC-SDA
CRX-DDC-SCL

1u0

FECA

CRX-DDC-SCL
CRX-DDC-SDA

CIN-5V
CRX-HOTPLUG

20
23 22

3E23
RES
7E02
BC847BW

PCEC-HDMI

100R

BRX0BRX0+

3
4

BRX1BRX1+

5
6

IE44

7
8
41
42
39
40

2ECP

CRXCCRXC+

11
12

CRX0CRX0+

13
14

CRX1CRX1+

15
16

CRX2CRX2+

17
18

5
100K

1u0

5EC2

eHDMI+

30R
ARC-eHDMI+

CIN-5V

IEC4

4
3ECN-4

10R

DRX-DDC-SDA
DRX-DDC-SCL

22K
RES

7EC0
BC847BW

3ECD

+3V3-STANDBY

DIN-5V

1 3ECM-1 8

2ECC

1
2

DRX-HOTPLUG

47K

FECM
FECN

47K

FECJ
FECK
FECL

5 3ECA-4 4

CIN-5V

3 3ECA-3 6

CRXCPCEC-HDMI
ARC-eHDMI+
CRX-DDC-SCL
CRX-DDC-SDA

33
34

BRXCBRXC+

6
100K

CRX2CRX1+

CRX0CRXC+

2ECN

BRX2BRX2+

HDMI CONNECTOR 1

CRX1CRX0+

IE43

35
36

CRX-HOTPLUG

1P02
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FECP19
21

+3V3

IE45

2ECQ

45
46
43
44

DRXCDRXC+

19
20

DRX0DRX0+

21
22

DRX1DRX1+

23
24

DRX2DRX2+

25
26

CEC-HDMI

IEC5

N
R0XC
P

100n

10K

8
10K

CEC_D

49

3ECP-1 3ECP-3

DSCL4
DSDA4

N
R0X0
P

10u

RES 2ECW
37

38

+5V-EDID

R4PWR5V

48
47

VGA-SCL-EDID-HDMI
VGA-SDA-EDID-HDMI
9EC2

51

CEC-HDMI

RES

N
R0X1
P
N
R0X2
P
(CBUS) HPD1
R1PWR5V
DSDA1
DSCL1
N
R1XC
P
N
R1X0
P

TX2

N
P

TX1

N
P

TX0

N
P

TXC

N
P

57
56

HDMIA-RX2HDMIA-RX2+

59
58

HDMIA-RX1HDMIA-RX1+

61
60

HDMIA-RX0HDMIA-RX0+

63
62

N
R1X1
P

TPWR_CI2CA

N
R1X2
P

CEC_A

(CBUS) HPD2
R2PWR5V

INT

4K7

55

50

52

HDMIA-RXCHDMIA-RXC+
3ECJ RES
IE12
FECR

RES
3ECK

MICOM-VCC33

4K7
9EC3
RES

FECY

PCEC-HDMI
3ECL RES

+3V3

4K7

DSDA2
DSCL2
N
R2XC
P

CSCL
CSDA

N
R2X0
P
RSVDL

N
R2X1
P

54
53 3EC3
3EC5

100R
100R

SCL-SSB
SDA-SSB

10
28

N
R2X2
P

(CBUS) HPD3
R3PWR5V
DSDA3
DSCL3
N
R3XC
P
VIA

N
R3X0
P
N
R3X1
P

IEC6
9EC0

SBVCC33

9
27
64
DSDA0
DSCL0

30R

29
30

(CBUS) HPD0
R0PWR5V

MICOM_VCC33

2ECM

31
32

67
68

BRX1BRX0+

100n

100n
2EC8

100n
2EC7

2EC6
1u0

IE42

65
66

BIN-5V

8
100K

ARX0ARX0+

23 22

10R
ARX-DDC-SDA
ARX-DDC-SCL

10p

1
3ECN-1

ARXCARXC+

47K

AIN-5V

3ECM-4

AIN-5V

HDMI CONNECTOR 2

1P03

3 3EC1-3 6

47K
47K

ARX-HOTPLUG

20
23 22

VCC33

ARX-HOTPLUG

8 3EC1-1 1

FEC5

7EC1
SII9287B

ARX-DDC-SCL
ARX-DDC-SDA

FEC4
AIN-5V

RES
5EC3

+3V3-HDMI

ARXCPCEC-HDMI
ARX-DDC-SCL
ARX-DDC-SDA

FEC7

AIN-5V

ARX0ARXC+

FEC1
FEC2

SII9187A = 0xB2

FECB

ARX2ARX1+

7 3ECA-2 2

30R

MICOM-VCC33

2EC3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
FEC6 21

1 3ECA-1 8

ARX2+

220u 16V

RES 2EC1

+3V3

HDMI CONNECTOR 3
1P04

FEC3

FEC0

2EC2

5EC0

N
R3X2
P

74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89

73

EPAD

22K

3ECE

IEC7

7EC1

3ECN

NON-INSTAPORT

9187A

4X 3K3

3K3

INSTAPORT

9287B

4X 100K

100K

FECW
+3V3-STANDBY

H
6EC1

3ECF

+5V-VGA

+5V
BAT54

3ECF

4R7

3ECG

IE11

FECZ

100K

DDCA-SDA

DDCA-SCL

2ECU

IE65

2 3ECU-2 7

IE66

10K
4 3ECU-4 5

+3V3

10K
1u0

+5V-EDID

10

11

12

13

1P02 E2
1P03 C2
1P04 A2
2EC0 A9
2EC1 A8
2EC2 A10
2EC3 B10
2EC6 B9
2EC7 B9
2EC8 B9
2ECC G8
2ECM B8
2ECN D8
2ECP E8
2ECQ F8
2ECU I3
2ECV A9
2ECW B10
3E23 F4
3EC1-1 B4
3EC1-3 B4
3EC3 E10
3EC5 E10
3ECA-1 D4
3ECA-2 D4
3ECA-3 F4
3ECA-4 F4
3ECD G3
3ECE H3
3ECF I3
3ECG I3
3ECH A10
3ECJ D10
3ECK D11
3ECL E11
3ECM-1 F8
3ECM-2 E8
3ECM-3 D8
3ECM-4 B8
3ECN-1 B8
3ECN-2 D8
3ECN-3 E8
3ECN-4 F8
3ECP-1 B10
3ECP-3 B10
3ECU-2 I8
3ECU-4 I8
5EC0 A8
5EC2 F7
5EC3 A11
6EC1 H3
7E02 G3
7EC0 G3
7EC1 B9
9EC0 G4
9EC2 C11
9EC3 E11
FEC0 A9
FEC1 B2
FEC2 B2
FEC3 A10
FEC4 B2
FEC5 B2
FEC6 B2
FEC7 A10
FECA F3
FECB A10
FECC D2
FECD D2
FECE D2
FECF D2
FECG D2
FECJ F2
FECK F2
FECL F2
FECM F2
FECN F2
FECP F2
FECR E10
FECW H9
FECY E10
FECZ I3
IE11 I3
IE12 D10
IE42 B8
IE43 D8
IE44 E8
IE45 F8
IE65 I7
IE66 I7
IEC4 G3
IEC5 G3
IEC6 G4
IEC7 H3

14
6

HDMI

2010-03-12

8204 000 8952


18770_996_100714.eps
100714

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-24-5

Q552.1E LA

10.

EN 219

Headphone

B04E

Headphone

B04E
2

+3V3-STANDBY

4
PUMD12
7EE0-2
A-PLOP
3

B
6

A-STBY

FEE0
RESET-AUDIO

7EE0-1
PUMD12
1

C
2EE0

22K

22K

3EE1-2

3EE1-4

3EE1-3

22K

47p
3EE1-1

22K
2EE5

7EE1
TPA6111A2DGN

100n

2EE1

47p +3V3

IEE2
ADAC(4)

2EE3
1u0

IEE1
2EE4

3EE0-1
10K

IEE3
2

1
5

3EE0-4
10K

1u0

4
IEE4

5
2EE2

IEE6

AMPLIFIER

3EE0-3
10K

IEE7

3EE2-2

FE36
7

SHUTDOWN
BYPASS

2EE7

IEE8

3EE2-3

FE35
6

AMP2

33R

4V 100u

10
11

AMP1

33R

VO

4
3

2EE6

4V 100u

VIA
GND GND_HS

1u0

A-PLOP

IN2

3EE2-1
33R

3EE2-4

33R

IEE0
ADAC(3)

VDD

2EE0 C5
2EE1 D5
2EE2 E4
2EE3 E2
2EE4 E3
2EE5 D5
2EE6 E6
2EE7 E6
3EE0-1 E3
3EE0-3 F3
3EE0-4 E3
3EE1-1 C5
3EE1-2 D8
3EE1-3 D8
3EE1-4 D5
3EE2-1 D7
3EE2-2 E7
3EE2-3 E7
3EE2-4 E7
7EE0-1 B5
7EE0-2 B6
7EE1 D4
FE35 E7
FE36 E7
FEE0 B4
IEE0 E2
IEE1 E2
IEE2 E2
IEE3 E3
IEE4 E3
IEE5 F3
IEE6 E4
IEE7 E6
IEE8 E6

6
IEE5

9
6

AUDIO

2010-03-12

8204 000 8952


18770_997_100714.eps
100714

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 220

10.25 B05 820400089535 DDR


10-25-1

DDR

DDR

B05A
1

B05A
2

+1V8

10

11

+1V8

DDR2-VREF-DDR

13

12

DDR2-VREF-DDR

DDR2-CLK_P
DDR2-CLK_N

3B28

DDR2-CLK_P

240R

DDR2-CLK_N

G2
G3
G1

DDR2-BA2

DDR2-ODT
RES
240R

3B01
DDR2-CLK_P
DDR2-CLK_N
DDR2-CKE
DDR2-CS
DDR2-RAS
DDR2-CAS
DDR2-WE
DDR2-DQM2

F9
E8
F8
F2
G8
F7
G7
F3
B3

3B23

DQ

0
1
2
3
4
5
6
7

DQS

NU|RDQS

C8
C23B02-4 4
D7
D33B02-2 2
D1
D93B00-4 4
B1
B9 3B00-1 1

3B00-2

5
33R 3
7
33R 1
5
33R
3
8
33R

B7
A8

2p2

7
33R
6 3B00-3
33R
8 3B02-1
33R
6 3B02-3
33R

3B12
33R

3B13
2B44
RES

0
1 BA
2

DDR2-D16
DDR2-D17
DDR2-D18
DDR2-D19
DDR2-D20
DDR2-D21
DDR2-D22
DDR2-D23

DDR2-DQS2_P
DDR2-DQS2_N

33R

A2

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

DDR2-BA0
DDR2-BA1

G2
G3
G1

DDR2-BA2

DDR2-ODT

ODT

3B03

CK
CKE
CS
RAS
CAS
WE
DM|RDQS
VSS

L3
L7

NC

VSSQ

VSSDL
E7

DDR2-A14

DDR2-CLK_P
DDR2-CLK_N
DDR2-CKE
DDR2-CS
DDR2-RAS
DDR2-CAS
DDR2-WE
DDR2-DQM3

F9
E8
F8
F2
G8
F7
G7
F3
B3

RES
240R

3B24
33R

2B17
100n
2B37
100p
VDD

VDDL

E2

A9
C1
C3
C7
C9

E1

A1
E9
L1
H9

100n

100n
2B16

100n
2B15

100n
2B14

100n
2B13

100n
2B12

100n
2B11

100n
2B10

47u
2B09

E2

E1

SDRAM

A3
E3
J1
K9

33R

2B41

2B36
100p
2B08
100n

DDR2-BA0
DDR2-BA1

7B03
EDE1108AGBG-1J-F

VREF

VDDQ

VREF

VDDQ

0
1
2
3
4
5
6 A
7
8
9
10
11
12
13

SDRAM
DQ

0
1
2
3
4
5
6
7

DQS

C8
3B05-3
C2
3B04-3
D7
D3
D1
D93B04-4
B1
B93B04-1

4
1

B7
A8

3B15
RES
2p2

2B45

0
1 BA
2

NU|RDQS

2 3B04-2 7
6
33R
6 33R
33R
33R 2
7 3B05-2
1
8 3B05-1
33R
5
5 3B05-4
4
33R
33R
8
33R

3
3

3B14
33R

DDR2-D24
DDR2-D25
DDR2-D26
DDR2-D27
DDR2-D28
DDR2-D29
DDR2-D30
DDR2-D31

DDR2-DQS3_P
DDR2-DQS3_N

33R

A2

ODT
CK
CKE
CS
RAS
CAS
WE
DM|RDQS
VSS

NC

L3
L7

DDR2-A14

VSSQ

VSSDL

A7
B2
B8
D2
D8

3B27
240R

VDDL

E7

DDR2-CLK_P
DDR2-CLK_N

VDD
0
1
2
3
4
5
6 A
7
8
9
10
11
12
13

A3
E3
J1
K9

3B22
240R

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

A7
B2
B8
D2
D8

AT T-POINT

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13

A1
E9
L1
H9

7B02
EDE1108AGBG-1J-F

A9
C1
C3
C7
C9

100n

100n
2B07

100n
2B06

100n
2B05

100n
2B04

100n
2B03

100n
2B02

100n
2B01

47u
2B00

2B40

E
+1V8

+1V8
DDR2-VREF-DDR

3B21

180R 1%

3B25
33R

DQS

C8
C23B08-4 4
D7
D3 3B08-2 2
D1
D9 3B07-4 4
B1
B9 3B07-1 1

B7
A8
2B46

0
1 BA
2

NU|RDQS

5
33R
7
33R
5
33R
8
33R

3B17
RES
2p2

2 3B07-2 7
33R
3
6 3B07-3
33R
1
8 3B08-1
33R
3
6 3B08-3
33R

3B16
33R

DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D4
DDR2-D5
DDR2-D6
DDR2-D7

DDR2-DQS0_P
DDR2-DQS0_N

33R

A2

DDR2-BA0
DDR2-BA1

G2
G3
G1

DDR2-BA2

DDR2-ODT

ODT

3B09

CK
CKE
CS
RAS
CAS
WE
DM|RDQS
VSS

L3
L7

NC

VSSDL

DDR2-A14

VSSQ

DDR2-CLK_P
DDR2-CLK_N
DDR2-CKE
DDR2-CS
DDR2-RAS
DDR2-CAS
DDR2-WE
DDR2-DQM1

RES
240R

3B26
33R

F9
E8
F8
F2
G8
F7
G7
F3
B3

2B35
100n
2B39
100p
VDD

VDDL

VDDQ

E2

E1

A9
C1
C3
C7
C9

100n

100n
2B34

100n
2B33

100n
2B32

100n
2B31

100n
2B30

100n
2B29

100n
2B28

47u
2B27

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

A1
E9
L1
H9

E1

E2

0
1
2
3
4
5
6
7

VREF

0
1
2
3
4
5
6 A
7
8
9
10
11
12
13

SDRAM
DQ

0
1
2
3
4
5
6
7

DQS

C8
C2
3B11-3 3
D7
3B10-3 33R 3
D3
D1
D93B10-4 4
B1
B93B10-1 1

B7
A8
2B47

0
1 BA
2

NU|RDQS

2
6
6 33R
2
1
5 3B11-1
33R
4
8
33R

3B19
RES
2p2

3B10-2

7
33R

7 3B11-2
8 33R
33R
5 3B11-4
33R

3B18
33R

DDR2-D8
DDR2-D9
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15

DDR2-DQS1_P
DDR2-DQS1_N

33R

A2

3B02-1 C7
3B02-2 B6
3B02-3 C7
3B02-4 B6
3B03 D9
3B04-1 C12
3B04-2 B13
3B04-3 B12
3B04-4 C12
3B05-1 C13
3B05-2 C13
3B05-3 B12
3B05-4 C13
3B06 H3
3B07-1 G6
3B07-2 G7
3B07-3 G7
3B07-4 G6
3B08-1 G7
3B08-2 G6
3B08-3 G7
3B08-4 G6
3B09 H9
3B10-1 G12
3B10-2 G13
3B10-3 G12
3B10-4 G12
3B11-1 G12
3B11-2 G13
3B11-3 G12
3B11-4 G13
3B12 C7
3B13 C6
3B14 C13
3B15 C12
3B16 H7
3B17 H7
3B18 H13
3B19 H12
3B20 H1
3B21 I1
3B22 B1
3B23 D3
3B24 D9
3B25 I3
3B26 I9
3B27 C1
3B28 C1
7B00 G4
7B01 G10
7B02 B4
7B03 B10
FB00 H1

ODT
CK
CKE
CS
RAS
CAS
WE
DM|RDQS
VSS

NC

VSSDL

L3
L7

DDR2-A14

VSSQ
A7
B2
B8
D2
D8

FB00
DDR2-VREF-DDR

F9
E8
F8
F2
G8
F7
G7
F3
B3

RES
240R

3B06

DQ

A3
E3
J1
K9

3B20

180R 1%

DDR2-ODT
DDR2-CLK_P
DDR2-CLK_N
DDR2-CKE
DDR2-CS
DDR2-RAS
DDR2-CAS
DDR2-WE
DDR2-DQM0

SDRAM

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13

E7

DDR2-BA2

7B01
EDE1108AGBG-1J-F

VREF

A3
E3
J1
K9

G2
G3
G1

VDDQ

2B43

2B26
100n
2B38
100p

DDR2-BA0
DDR2-BA1

VDDL

A7
B2
B8
D2
D8

+1V8

VDD
0
1
2
3
4
5
6 A
7
8
9
10
11
12
13

E7

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

A1
E9
L1
H9

7B00
EDE1108AGBG-1J-F
DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A13

A9
C1
C3
C7
C9

100n

100n
2B25

100n
2B24

100n
2B23

100n
2B22

100n
2B21

100n
2B20

100n
2B19

47u
2B18

2B42

DDR2-VREF-DDR

2B00 A2
2B01 A3
2B02 A3
2B03 A3
2B04 A3
2B05 A3
2B06 A4
2B07 A4
2B08 A6
2B09 B8
2B10 B8
2B11 B9
2B12 B9
2B13 B9
2B14 B9
2B15 B9
2B16 B10
2B17 A11
2B18 F2
2B19 F3
2B20 F3
2B21 F3
2B22 F3
2B23 F3
2B24 F4
2B25 F4
2B26 F6
2B27 F8
2B28 F8
2B29 F9
2B30 F9
2B31 F9
2B32 F9
2B33 F9
2B34 F10
2B35 F11
2B36 A6
2B37 A11
2B38 F6
2B39 F11
2B40 A2
2B41 B8
2B42 F2
2B43 F8
2B44 C6
2B45 C12
2B46 H6
2B47 H12
3B00-1 C6
3B00-2 B7
3B00-3 B7
3B00-4 C6
3B01 C3

10

11

12

13
5

DDR 4

2009-12-07

8204 000 8953


18770_534_100119.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 221

10.26 B05 820400089832 DDR


10-26-1

DDR

B05A

DDR

B05A
3

10

11

12

13

14

3B43
33R

DDR2-DQS1_P
DDR2-DQS1_N

3B47
33R

3B45
2B52
2p2

33R
3B49
33R

LDQS

B7
A8

UDQS

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

UDM
LDM
VREF

3B53

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

3B39

B3
F3

3B57

3B11
33R
3B15
33R
3B19
33R
3B23
33R
3B27
33R
3B31
33R
3B35
33R
33R

33R
3B13
33R
3B17
33R
3B21
33R
3B25
33R
3B29
33R
3B33
33R
3B37
33R

DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D4
DDR2-D5
DDR2-D6
DDR2-D7
DDR2-D8
DDR2-D9
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15

3B56
33R

DDR2-DQM1
DDR2-DQM0

33R

J2

A3
E3
J3
N1
P9

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

DDR2-VREF-DDR

100n
2B50

RES
220R

DDR2-CLK_P
DDR2-CLK_N
DDR2-DQS2_P
DDR2-DQS2_N

3B44
33R

DDR2-DQS3_P
DDR2-DQS3_N

3B48
33R
33R

VSSQ

2B53
2p2
3B50

100p

J1

1u0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
NC

0
1 BA
2
0
1
2
3
4
5
6 A
7
8
9
10
11
12

J8
K8

3B46
33R

VDDL

L2
L3
L1

A1
E1
J9
M9
R1

100n

100n
2B38

100n
2B37

100n
2B36

100n
2B35

100n
2B34

DDR2-BA0
DDR2-BA1
DDR2-BA2

3B40

2B48

VSS

100n
2B33

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
DQ

CK

F7
E8

2B54
2p2

J1

0
1
2
3
4
5
6 A
7
8
9
10
11
12

DDR2-A13

VDDQ

SDRAM

LDQS

B7
A8

UDQS

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

UDM
LDM

CK

F7
E8

2B55
2p2

DQ

VREF

A2
E2
R3
R7
R8

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
B3
F3

DDR2-A14

DDR2-A13
3B10
3B12
33R
3B16
33R
3B20
33R
3B24
33R
3B28
33R
3B32
33R
3B36
33R
3B41
33R
3B58

33R
3B14
33R
3B18
33R
3B22
33R
3B26
33R
3B30
33R
3B34
33R
3B38
33R

DDR2-D16
DDR2-D17
DDR2-D18
DDR2-D19
DDR2-D20
DDR2-D21
DDR2-D22
DDR2-D23
DDR2-D24
DDR2-D25
DDR2-D26
DDR2-D27
DDR2-D28
DDR2-D29
DDR2-D30
DDR2-D31

3B55
33R

DDR2-DQM3
DDR2-DQM2

33R

J2

DDR2-VREF-DDR
2B49

VSS

VSSDL

DDR2-DQS0_P
DDR2-DQS0_N

J8
K8

0
1 BA
2

DDR2-A14

VDD
ODT
CKE
WE
CS
RAS
CAS

J7

RES
220R

NC

K9
K2
K3
L8
K7
L7

100n
2B51

VSSQ
100p

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

3B42
DDR2-CLK_P
DDR2-CLK_N

SDRAM

A2
E2
R3
R7
R8

DDR2-ODT
DDR2-CKE
DDR2-WE
DDR2-CS
DDR2-RAS
DDR2-CAS

A3
E3
J3
N1
P9

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

100n
2B32

2B31

DDR2-A0
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-A10
DDR2-A11
DDR2-A12

VDDL

L2
L3
L1

7B02
EDE1116AGBG-1J-F

VDDQ

VSSDL

DDR2-BA0
DDR2-BA1
DDR2-BA2

VDD
ODT
CKE
WE
CS
RAS
CAS

J7

K9
K2
K3
L8
K7
L7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

DDR2-ODT
DDR2-CKE
DDR2-WE
DDR2-CS
DDR2-RAS
DDR2-CAS

A1
E1
J9
M9
R1

7B00
EDE1116AGBG-1J-F

100n

100n
2B21

100n
2B20

100n
2B19

100n
2B18

100n
2B17

100n
2B16

100n
2B15

2B14

47u
2B13

RES 2B11

1u0

RES

2B10

+1V8

47u
2B12

+1V8

3B54

DDR2-CLK_N

100R

DDR2-CLK_P

AT T-POINT

+1V8

H
3B51

180R 1%

3B52

180R 1%

FB00
DDR2-VREF-DDR

10

11

12

13

14

2B10 C5
2B11 C11
2B12 C5
2B13 C11
2B14 C2
2B15 C2
2B16 C2
2B17 C2
2B18 C3
2B19 C3
2B20 C3
2B21 C3
2B31 C8
2B32 C8
2B33 C8
2B34 C9
2B35 C9
2B36 C9
2B37 C9
2B38 C9
2B48 F6
2B49 F12
2B50 F6
2B51 F12
2B52 F3
2B53 F10
2B54 F3
2B55 F10
3B10 D13
3B11 D6
3B12 D12
3B13 D7
3B14 D13
3B15 E6
3B16 E12
3B17 E7
3B18 E13
3B19 E6
3B20 E12
3B21 E7
3B22 E13
3B23 E6
3B24 E12
3B25 E7
3B26 E13
3B27 E6
3B28 E12
3B29 E7
3B30 E13
3B31 E6
3B32 E12
3B33 E7
3B34 E13
3B35 E6
3B36 E12
3B37 E7
3B38 E13
3B39 E6
3B40 E9
3B41 E12
3B42 E3
3B43 F2
3B44 F9
3B45 F3
3B46 F9
3B47 F2
3B48 F9
3B49 F3
3B50 F9
3B51 H2
3B52 I2
3B53 D7
3B54 F3
3B55 E13
3B56 F7
3B57 F6
3B58 F12
7B00 D4
7B02 D10
FB00 I2
2

DDR 2

2009-10-30

8204 000 8983


18770_533_100119.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 222

10.27 B06 820400089572 LVDS Non DVBS


10-27-1

Display Interfacing - VDisp

B06A

Display Interfacing - VDisp

B06A
3

1G03

1G00 C4
1G03 B4
2G43 C4
2G44 C3
3G28 C5
5G01 C3
5G02 C3
6G00 C6
FG0H C5
IG11 C5

T 3.0A 32V

FG0H

1G00 RES
T 3.0A 32V

5G02

+VDISP

100n

30R RES

2G43

5G01
+VDISP-INT

30R RES

22u
RES

2G44

3G28

IG11

2K2

6G00
LTST-C190KGKT

8
2

LVDS Non DVBS

2009-10-22

8204 000 8957


18770_565_100125.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-27-2

Q552.1E LA

10.

EN 223

Video Out - LVDS

B06B

Video Out - LVDS

B06B
3

10

11

12

13

+3V3

10p

10p

10p

10p

100p

100p

10p

100p

FG34

3G32
100R
3G2W
FG2H
100R
3G2Y
FG2G
100R
3G2Z
RES
FG2K
BACKLIGHT-PWM_BL-VS
3G37 RES
100R
BACKLIGHT-BOOST
100R
BACKLIGHT-PWM-ANA-DISP 3G36
100R RES
FG04
3G30
CTRL-DISP
3G31 RES
100R
CTRL-DISP
CTRL-DISP

RES
10p
RES
10p
RES
10p
RES
10p

RES
10p
RES
10p

2G92
2G93

FG2J

2G94

2G96
RES
10p

RES
10p
2G97

2G98
FG1C

PX3APX3A+
PX3BPX3B+
PX3CPX3C+

FG1D
FG1E
FG1F
FG1G
FG1H
FG11

PX3CLKPX3CLK+

FG1J
FG1K
FG1L
FG1M
FG1N

PX3DPX3D+
PX3EPX3E+

FG12
FG13
FG14

PX4APX4A+
PX4BPX4B+
PX4CPX4C+

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

2G99

FG15
FG16
FG17
FG18

PX4CLKPX4CLK+

FG19
FG1A
FG1B
FG1Q
FG1P

PX4DPX4D+
PX4EPX4E+

60 61
58 59
56 57
54 55
52 53

SDA-DISP
SCL-DISP

FI-RE41S-HF
50
51
48
49
46
47
45
44
42
43

FG30
FG31
FG32
FG33

2G95

FI-RE51S-HF

2G78
RES
2G79
RES
2G7A
RES
2G24
RES
2G25
RES
2G26
RES
2G27
RES

2G76

10K

100p
10p

RES
3G35

10K

RES

RES
2G77
2G75

1
2
3
4

3G33

9G0K-1
9G0K-2
9G0K-3
9G0K-4

8
7
6
5

RES

3G34

RES

10K

RES

+VDISP

FG2M

100R RES

PX1APX1A+
PX1BPX1B+
PX1CPX1C+

FG2R

FG2L

FG2E
FG2F
FG1Y
FG1Z
FG20
FG21
FG22

PX1CLKPX1CLK+

FG23
FG24

PX1DPX1D+
PX1EPX1E+

FG25
FG26
FG27

10p

FG28

PX2APX2A+
PX2BPX2B+
PX2CPX2C+

10p 2G28
2G29

FG29
FG2A
FG2B
FG2C
FG2D
FG1R

PX2CLKPX2CLK+

FG1S
FG1T

PX2DPX2D+
PX2EPX2E+

FG1U
FG1W
FG1V
FG2P

+VDISP

RES 9G0G

FG2N

1G50

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1G51

TO DISPLAY

TO DISPLAY
1X05
EMC HOLE

10

11

12

1G50 G5
1G51 G11
1X05 G1
2G24 C10
2G25 C11
2G26 C11
2G27 C11
2G28 E11
2G29 E11
2G75 C10
2G76 C10
2G77 C10
2G78 C10
2G79 C10
2G7A C10
2G92 C4
2G93 C4
2G94 D4
2G95 D4
2G96 D4
2G97 D4
2G98 D4
2G99 D4
3G2W C8
3G2Y C8
3G2Z D8
3G30 D9
3G31 D8
3G32 C8
3G33 C9
3G34 B9
3G35 C9
3G36 D8
3G37 D9
9G0G G11
9G0K-1 C4
9G0K-2 C4
9G0K-3 C4
9G0K-4 C4
FG04 D8
FG11 E4
FG12 F4
FG13 F4
FG14 F4
FG15 F4
FG16 F4
FG17 F4
FG18 F4
FG19 F4
FG1A F4
FG1B F4

FG1C D4
FG1D D4
FG1E E4
FG1F E4
FG1G E4
FG1H E4
FG1J E4
FG1K E4
FG1L E4
FG1M E4
FG1N E4
FG1P F4
FG1Q F4
FG1R F9
FG1S F9
FG1T F9
FG1U F9
FG1V F9
FG1W F9
FG1Y D9
FG1Z D9
FG20 D9
FG21 D9
FG22 E9
FG23 E9
FG24 E9
FG25 E9
FG26 E9
FG27 E9
FG28 E9
FG29 E9
FG2A E9
FG2B E9
FG2C E9
FG2D F9
FG2E D9
FG2F D9
FG2G C9
FG2H C9
FG2J D5
FG2K D9
FG2L D10
FG2M D10
FG2N G11
FG2P F11
FG2R D11
FG30 D5
FG31 D5
FG32 D5
FG33 D5
FG34 C11

13

LVDS Non DVBS

2009-10-22

8204 000 8957


18770_566_100125.eps
100125

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-27-3

Q552.1E LA

10.

EN 224

AmbiLight CPLD

B06C
1G35 G2
1G36 G2
1G37 B13

AmbiLight CPLD

2G10 F3
2G11 F3
2G12 F3

B06C

2G16 F8
2G17 F8
2G18 F9

2G13 F7
2G14 F8
2G15 F8

2G19 F9
2GA0 B3
2GA1 B4

2GA2 B4
2GA3 B3
2GA4 G3

3G10-3 E6
3G10-4 E7
3G11-1 E6

2GA5 B3
3G10-1 E6
3G10-2 E7

3G11-2 E3
3G11-4 E4
3G12 E6

3G13 E7
3G14 E4
3G15 E2

3GA1 E6
3GA2-1 G3
3GA2-2 G3

3GA2-3 G3
3GA2-4 G3
3GA5-1 B12

3GA5-2 B12
3GA5-3 B12
3GA5-4 B12

3GA6-1 F13
3GA6-2 F13
3GA6-3 F12

3GA6-4 F12
5GA0 A3
5GA1 B2

6GA0 F12
6GA1 F12
6GA2 F13

10

6GA3 F13
7GA0 D5
7GA1-1 D13

7GA1-2 D13
7GA2-1 E12
7GA2-2 E12

11

9GA0 H5
9GA1 D7
FGA0 A5

12

FGA1 B4
FGA2 G3
FGA3 G5

13

FGA4 G4
FGA5 G5
FGA6 G4

14

IGA3 C11

IGA0 C11
IGA1 C11
IGA2 C11

15

DEBUG ONLY
5GA0

FGA0

+3V3

VINT
100n

100n
2GA2

2GA1

1u0

2GA0

30R

1G37

B
FGA1

100n

1u0

2GA5

30R
2GA3

3GA5-4
3GA5-3
3GA5-2
3GA5-1

GCK3
GTS1
GTS2
GSR

VIO

4
3
2
1

1
2
3
4
5
6

+3V3
5GA1
+3V3

5
6 100R
7 100R
8 100R
100R

SD51022
IGA0
CPLED1
IGA1
CPLED2

IGA2
CPLED3
VINT

VIO

IGA3
GCK2

3
5

+3V3

6
2

15
35

6GA3

LTST-C190KGKT

6GA2

LTST-C190KGKT

6GA1

LTST-C190KGKT

6GA0

LTST-C190KGKT

4
17
25

3GA6-1

7GA2-1
BC847BS(COL)
1
8 330R 1

GSR

GND

7GA2-2
BC847BS(COL)
4

3GA6-2

100R
5
100R

GTS2

7 330R 2

3G13
4
3G10-4

AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-SDO-OUT
AMBI-LATCH2_DIS

3GA6-3

10R
1
100R

7
100R

6 330R 3

3G12
8
3G11-1

2
3G10-2

7GA1-1
BC847BS(COL)
1

+3V3

3GA6-4

6
100R
8
100R

5 330R 4

3
3G10-3
1
3G10-1

GTS1

10p

19
20
21
22
23
27
28

TCK
TDI
TDO
TMS

+3V3

7GA1-2
BC847BS(COL)
4

CPLED1
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BACKLIGHT-PWM_BL-VS
BL-SPI-CLK

10p
2G19 RES

11
9
24
10

IXO2_29
IXO2_30
IXO2_31
IXO2_32
IXO2_37
IXO2_38

47R

10p
2G18 RES

100R
5
100R

3GA1

10p
2G17 RES

3G14
4
3G11-4

IXO4_19
IXO4_20
IXO4_21
IXO4_22
IXO4_23
IXO4_27
IXO4_28

PNX-SPI-CSBn
BACKLIGHT-PWM

9GA1

10p
2G16 RES

7
100R

10p

10p
2G12 RES

RES
10K

10p
2G11 RES

2
3G11-2

29
30
31
32
37
38

IXO2_36|GTS1
IXO2_34|GTS2
IXO2_33|GSR

5
6
7
8
12
13
14
16
18

10p
2G15 RES

36
34
33

IXO3_5
IXO3_6
IXO3_7
IXO3_8
IXO3_12
IXO3_13
IXO3_14
IXO3_16
IXO3_18

GCK3

+3V3

RES

GTS1
GTS2
GSR
AMBI-SPI-CS-OUTn_R2-R
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-TEMP
CPLED3
CPLED2

IXO1_2
IXO1_3
IXO1_39
IXO1_40
IXO1_41
IXO1_42

AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-SDO-OUT-R

10p
2G14 RES

2
3
39
40
41
42

3G15

PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK

2G10

VCCINT VCCIO
IXO1_43|GCK1
IXO1_44|GCK2
IXO1_1|GCK3

2G13

43
44
1

PXCLK54
GCK2
GCK3

26

+3V3
7GA0
XC9572XL-10VQG44C0100

DEBUG ONLY
1G36

1G35

7
SD51022

8
2GA4

3GA2-1
3GA2-2
3GA2-3
3GA2-4
FGA2

1
2
3
4

8
7
6
5

100R
100R
100R
100R

FGA6
FGA4
FGA5
FGA3

+3V3

100n RES

1
2
3
4
5
6

1
2
3
4
5
6

BACKLIGHT-PWM

9GA0

BACKLIGHT-PWM_BL-VS

10

11

12

13

14

15
2

LVDS Non DVBS

2009-10-22

8204 000 8957


18770_567_100125.eps
100125

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-27-4

Q552.1E LA

10.

EN 225

SPI-Buffer

B06D

SPI-Buffer

B06D

+3V3
+3V3

3EN1
3EN2
G3
18

PNX-SPI-CLK

IGE0

19

2
2

3GE0-3
47R

3
4
5
6
7
8
9

3GE1-3 6

3GE4

3
47R RES
3GE3
47R

BL-SPI-CLK
1

3GE0-1

8
47R
4 3GE1-4
47R RES

BL-SPI-SDO
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDO-OUT-R
PNX-SPI-SDI

RES

47R

10

AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDI

PNX-SPI-CSBn

7GE0
74LVC245A
1

17
16
15
14
13
12
11

PNX-SPI-SDO

7GE1
PDTC114EU

10K

3GE2
20

100n

2GE0

2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
3GE1-4 B3
3GE2 A4
3GE3 B4
3GE4 B3
7GE0 B3
7GE1 A4
9GE0-1 C3
9GE0-2 C3
9GE0-3 D3
9GE1 C3
9GE2 D3
9GE3 D3
IGE0 B3
IGE1 D2

PNX-SPI-CLK

PNX-SPI-SDO

9GE0-2

9GE0-3

BL-SPI-CLK

9GE2
IGE1

PNX-SPI-CS-BLn

5 9GE0-4

PNX-SPI-SDI

*
**

BL-SPI-CSn

9GE3

PNX-SPI-CS-AMBIn

BL-SPI-SDO

9GE1

BL-SPI-SDI

AMBI-SPI-CS-OUTn_R2-R

Buffer

*
**

Direct

6
2

LVDS Non DVBS

2009-10-22

8204 000 8957


18770_568_100125.eps
100125

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 226

10.28 B06 820400089573 LVDS Non DVBS


Display Interfacing - VDisp

Display Interfacing - VDisp

B06A
2

1G00 C4
1G03 B4
2G43 C4
2G44 C3
3G28 C5
5G01 C3
5G02 C3
6G00 C6
FG0H C5
IG11 C5

1G03
T 3.0A 32V

1G00

T 3.0A 32V

5G02

FG0H

RES

+VDISP
100n

30R RES

2G43

5G01
+VDISP-INT

30R RES

22u
RES

B06A

2G44

10-28-1

3G28

IG11

2K2

6G00
LTST-C190KGKT

8
LVDS Non DVBS

2010-03-09

2009-10-22

8204 000 8957


18773_513_100831.eps
100831

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-28-2

Q552.1E LA

10.

EN 227

Video Out - LVDS

Video Out - LVDS

B06B
1

B06B
3

10

12

11

1G50 G5
1G51 G11
1X05 G1
2G24 C10
2G25 C11
2G26 C11
2G27 C11
2G28 E11
2G29 E11
2G75 C10
2G76 C10
2G77 C10
2G78 C10
2G79 C10
2G7A C10
2G92 C4
2G93 C4
2G94 D4
2G95 D4
2G96 D4
2G97 D4
2G98 D4
2G99 D4
3G2W C8
3G2Y C8
3G2Z D8
3G30 D9
3G31 D8
3G32 C8
3G33 C9
3G34 B9
3G35 C9
3G36 D8
3G37 D9
9G0G G11
9G0K-1 C4
9G0K-2 C4
9G0K-3 C4
9G0K-4 C4
FG04 D8
FG11 E4
FG12 F4
FG13 F4
FG14 F4
FG15 F4
FG16 F4
FG17 F4
FG18 F4
FG19 F4
FG1A F4
FG1B F4
FG1C D4
FG1D D4
FG1E E4
FG1F E4
FG1G E4
FG1H E4
FG1J E4
FG1K E4
FG1L E4
FG1M E4
FG1N E4
FG1P F4
FG1Q F4
FG1R F9
FG1S F9
FG1T F9
FG1U F9
FG1V F9
FG1W F9
FG1Y D9
FG1Z D9
FG20 D9
FG21 D9
FG22 E9
FG23 E9
FG24 E9
FG25 E9
FG26 E9
FG27 E9
FG28 E9
FG29 E9
FG2A E9
FG2B E9
FG2C E9
FG2D F9
FG2E D9
FG2F D9
FG2G C9
FG2H C9
FG2J D5
FG2K D9
FG2L D10
FG2M D10
FG2N G11
FG2P F11
FG2R D11
FG30 D5

13

+3V3

RES
10p
RES
10p
RES
10p
RES
10p

RES
10p
RES
10p

2G93

FG2J

2G94
2G95

2G96
RES
10p

RES
10p
2G97

2G98
FG1C
FG1D
FG1E
FG1F
FG1G
FG1H
FG11

PX3CLKPX3CLK+

FG1J
FG1K
FG1L
FG1M
FG1N

PX3DPX3D+
PX3EPX3E+

FG12
FG13
FG14

PX4APX4A+
PX4BPX4B+
PX4CPX4C+

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

2G99

FG15
FG16
FG17
FG18

PX4CLKPX4CLK+

FG19
FG1A
FG1B
FG1Q
FG1P

PX4DPX4D+
PX4EPX4E+

10p

10p

10p

10p

100p

100p

100p

10p
2G76

2G78
RES
2G79
RES
2G7A
RES
2G24
RES
2G25
RES
2G26
RES
2G27
RES

100p
10p

10K
10K

3G34

60 61
58 59
56 57
54 55
52 53

SDA-DISP
SCL-DISP

FI-RE41S-HF
50
51
48
49
46
47
44
45
43
42

FG30
FG31
FG32
FG33

FI-RE51S-HF

FG34

3G32
100R
3G2W
FG2H
100R
FG2G
3G2Y
100R
RES 3G2Z
FG2K
BACKLIGHT-PWM_BL-VS
3G37 RES
100R
BACKLIGHT-BOOST
100R
BACKLIGHT-PWM-ANA-DISP 3G36
100R RES
FG04
3G30
CTRL-DISP
3G31
RES
100R
CTRL-DISP
CTRL-DISP

2G92

PX3APX3A+
PX3BPX3B+
PX3CPX3C+

RES

RES
2G77
2G75

1
2
3
4

10K

9G0K-1
9G0K-2
9G0K-3
9G0K-4

8
7
6
5

3G33 RES

RES

3G35 RES

RES

+VDISP

FG2L
FG2M

100R RES

PX1APX1A+
PX1BPX1B+
PX1CPX1C+

FG2R

FG2E
FG2F
FG1Y
FG1Z
FG20
FG21
FG22

PX1CLKPX1CLK+

FG23
FG24

PX1DPX1D+
PX1EPX1E+

FG25
FG26
FG27
10p
10p

FG28

PX2APX2A+
PX2BPX2B+
PX2CPX2C+

2G28

2G29

FG29
FG2A
FG2B
FG2C
FG2D
FG1R

PX2CLKPX2CLK+

FG1S
FG1T

PX2DPX2D+
PX2EPX2E+

FG1U
FG1W
FG1V
FG2P

+VDISP

RES 9G0G

FG2N

1G50

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1G51

TO DISPLAY

TO DISPLAY
1X05
EMC HOLE

10

11

12
LVDS Non DVBS

13
3

2010-03-09

2009-10-22

8204 000 8957


18773_514_100831.eps
100831

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-28-3

Q552.1E LA

10.

EN 228

AmbiLight CPLD

AmbiLight CPLD

B06C
1G35 G2
1G36 G2
1G37 B13

2G10 F3
2G11 F3
2G12 F3

2G13 F7
2G14 F8
2G15 F8

B06C
2GA5 B3
3G10-1 E6
3G10-2 E7

2GA2 B4
2GA3 B3
2GA4 G3

2G19 F9
2GA0 B3
2GA1 B4

2G16 F8
2G17 F8
2G18 F9

3G13 E7
3G14 E4
3G15 E2

3G11-2 E3
3G11-4 E4
3G12 E6

3G10-3 E6
3G10-4 E7
3G11-1 E6

3GA1 E6
3GA2-1 G3
3GA2-2 G3

3GA2-3 G3
3GA2-4 G3
3GA5-1 B12

3GA5-2 B12
3GA5-3 B12
3GA5-4 B12

3GA6-1 F13
3GA6-2 F13
3GA6-3 F12

6GA3 F13
7GA0 D5
7GA1-1 D13

6GA0 F12
6GA1 F12
6GA2 F13

3GA6-4 F12
5GA0 A3
5GA1 B2

7GA1-2 D13
7GA2-1 E12
7GA2-2 E12

9GA0 H5
9GA1 D7
FGA0 A5

FGA1 B4
FGA2 G3
FGA3 G5

10

IGA0 C11
IGA1 C11
IGA2 C11

FGA4 G4
FGA5 G5
FGA6 G4

11

IGA3 C11

12

13

14

15

DEBUG ONLY
5GA0

FGA0
VINT

+3V3
100n

2GA1

100n
2GA2

1u0

2GA0

30R

1G37

B
FGA1

+3V3

GCK3
GTS1
GTS2
GSR

VIO
100n

2GA5

1u0

2GA3

30R

3GA5-4
3GA5-3
3GA5-2
3GA5-1

4
3
2
1

1
2
3
4
5
6

+3V3
5GA1

5
6 100R
7 100R
8 100R
100R

SD51022
IGA0
CPLED1
IGA1
CPLED2

IGA2
CPLED3
VINT

VIO

IGA3
GCK2

3
5

6
2

7GA2-1
BC847BS(COL)
1

15
35

6GA3

LTST-C190KGKT

6GA2

LTST-C190KGKT

6GA1

LTST-C190KGKT

6GA0

LTST-C190KGKT

4
17
25

3GA6-1

GSR

GND

7GA2-2
BC847BS(COL)
4

+3V3

8 330R 1

100R
5
100R

GTS2

3GA6-2

3G13
4
3G10-4

AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-SDO-OUT
AMBI-LATCH2_DIS

7 330R 2

10R
1
100R

7
100R

3GA6-3

3G12
8
3G11-1

2
3G10-2

6 330R 3

6
100R
8
100R

7GA1-1
BC847BS(COL)
1

+3V3

3GA6-4

3
3G10-3
1
3G10-1

10p

19
20
21
22
23
27
28

GTS1

5 330R 4

47R

TCK
TDI
TDO
TMS

+3V3

7GA1-2
BC847BS(COL)
4

CPLED1
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BACKLIGHT-PWM_BL-VS
BL-SPI-CLK

10p
2G19 RES

11
9
24
10

IXO2_29
IXO2_30
IXO2_31
IXO2_32
IXO2_37
IXO2_38

3GA1

10p
2G18 RES

100R
5
100R

IXO4_19
IXO4_20
IXO4_21
IXO4_22
IXO4_23
IXO4_27
IXO4_28

PNX-SPI-CSBn
BACKLIGHT-PWM

9GA1

10p
2G17 RES

3G14
4
3G11-4

IXO2_36|GTS1
IXO2_34|GTS2
IXO2_33|GSR

5
6
7
8
12
13
14
16
18

10p
2G16 RES

7
100R

10p

10p
2G12 RES

RES
10K

10p
2G11 RES

2
3G11-2

29
30
31
32
37
38

IXO3_5
IXO3_6
IXO3_7
IXO3_8
IXO3_12
IXO3_13
IXO3_14
IXO3_16
IXO3_18

GCK3

+3V3

10p
2G15 RES

36
34
33

IXO1_2
IXO1_3
IXO1_39
IXO1_40
IXO1_41
IXO1_42

3
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-SDO-OUT-R

RES

GTS1
GTS2
GSR
AMBI-SPI-CS-OUTn_R2-R
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-TEMP
CPLED3
CPLED2

VCCIO

10p
2G14 RES

2
3
39
40
41
42

3G15

PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK

2G10

VCCINT
IXO1_43|GCK1
IXO1_44|GCK2
IXO1_1|GCK3

2G13

43
44
1

PXCLK54
GCK2
GCK3

26

+3V3
7GA0
XC9572XL-10VQG44C0100

DEBUG ONLY
1G36

1G35

3GA2-1
3GA2-2
3GA2-3
3GA2-4
FGA2

8
2GA4

SD51022

1
2
3
4

8
7
6
5

100R
100R
100R
100R

FGA6
FGA4
FGA5
FGA3

+3V3

100n RES

1
2
3
4
5
6

1
2
3
4
5
6

BACKLIGHT-PWM

9GA0

BACKLIGHT-PWM_BL-VS

10

11

12

13

14

LVDS Non DVBS

15
3

2010-03-09

2009-10-22

8204 000 8957


18773_515_100831.eps
100831

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

10.

EN 229

SPI-Buffer

SPI-Buffer

B06D
1

+3V3
+3V3

20
3EN1
3EN2
G3
18

PNX-SPI-CLK

3GE0-3

47R

3
4
5
6
7
8
9

3GE1-3 6

3GE4

3
47R RES
3GE3
47R

BL-SPI-CLK
1

3GE0-1

8
47R
4 3GE1-4
47R RES

BL-SPI-SDO
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDO-OUT-R
PNX-SPI-SDI

RES

47R

10

AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDI

IGE0

19

2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
3GE1-4 B3
3GE2 A4
3GE3 B4
3GE4 B3
7GE0 B3
7GE1 A4
9GE0-1 C3
9GE0-2 C3
9GE0-3 D3
9GE1 C3
9GE2 D3
9GE3 D3
IGE0 B3
IGE1 D2

PNX-SPI-CSBn

7GE0
74LVC245A
1

17
16
15
14
13
12
11

PNX-SPI-SDO

7GE1
PDTC114EU

10K

3GE2

A
100n

B06D

2GE0

10-28-4

Q552.1E LA

PNX-SPI-CLK

PNX-SPI-SDO

9GE0-2

9GE0-3

BL-SPI-CLK

9GE2
IGE1

PNX-SPI-CS-BLn

5 9GE0-4

PNX-SPI-SDI

*
**

BL-SPI-CSn

9GE3

PNX-SPI-CS-AMBIn

BL-SPI-SDO

9GE1

BL-SPI-SDI

AMBI-SPI-CS-OUTn_R2-R

Buffer

*
**

Direct

6
LVDS Non DVBS

2010-03-09

2009-10-22

8204 000 8957


18773_516_100831.eps
100831

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 230

10.29 B06 820400089962 LVDS DVBS


10-29-1

Display Interfacing - VDisp

B06A

Display Interfacing - VDisp

B06A
3

1G03
T 3.0A 32V

5G01

FG0H

1G00

+VDISP-INT

5G02

100n

T 3.0A 32V

2G43

+VDISP
30R

30R

22u
RES

2G44

3G28

IG11

2K2

6G00
LTST-C190KGKT

1G00 C4
1G03 B4
2G43 C4
2G44 C3
3G28 C5
5G01 C3
5G02 C3
6G00 C6
FG0H C5
IG11 C5

8
2

LVDS DVBS

2009-10-22

8204 000 8996


18770_535_100119.eps
100218

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-29-2

Q552.1E LA

10.

EN 231

Video Out - LVDS

B06B

Video Out - LVDS

B06B
3

10

11

12

13

+3V3

10p

2G92

10p

2G93

10p

2G94

10p

10p

FG2J

2G96
10p
10p

10p

2G98
FG1C
FG1D
FG1E
FG1F
FG1G
FG1H
FG11

PX3CLKPX3CLK+

FG1J
FG1K
FG1L
FG1M
FG1N

PX3DPX3D+
PX3EPX3E+

FG12
FG13
FG14

PX4APX4A+
PX4BPX4B+
PX4CPX4C+

2G99

2G97

PX3APX3A+
PX3BPX3B+
PX3CPX3C+

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

FG15
FG16
FG17
FG18

PX4CLKPX4CLK+

FG19
FG1A
FG1B
FG1Q
FG1P

PX4DPX4D+
PX4EPX4E+

100R

FG04

CTRL-DISP
CTRL-DISP

3G31 RES

10p

10p
2G27

10p

10p

2G26

2G25

100p

100p

10p

100p

2G78
RES
2G79
RES
2G7A
RES
2G24

10K

10K

3G35

60 61
58 59
56 57
54 55
52 53

FG2R

FG2L

3G30
100R

FG2M

100R RES

PX1APX1A+
PX1BPX1B+
PX1CPX1C+

FI-RE51S-HF

FG34

3G32
3G2W
3G2Y

100R
FG2H
100R
FG2G
100R
3G2Z
FG2K
BACKLIGHT-PWM_BL-VS
3G37
100R
BACKLIGHT-BOOST
100R
BACKLIGHT-PWM-ANA-DISP 3G36

FI-RE41S-HF
50
51
48
49
46
47
44
45
42
43

FG30
FG31
FG32
FG33

2G95

SDA-DISP
SCL-DISP

2G76

RES
CTRL-DISP

RES
2G77
2G75

1
2
3
4

3G33

9G0K-1
9G0K-2
9G0K-3
9G0K-4

8
7
6
5

100p
10p

3G34

RES

10K

+VDISP

FG2E
FG2F
FG1Y
FG1Z
FG20
FG21
FG22

PX1CLKPX1CLK+

FG23
FG24

PX1DPX1D+
PX1EPX1E+

FG25
FG26
FG27

10p

FG28

PX2APX2A+
PX2BPX2B+
PX2CPX2C+

10p 2G28
2G29

FG29
FG2A
FG2B
FG2C
FG2D
FG1R

PX2CLKPX2CLK+

FG1S
FG1T

PX2DPX2D+
PX2EPX2E+

FG1U
FG1W
FG1V
FG2P

+VDISP

RES 9G0G

FG2N

1G50

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1G51

TO DISPLAY

TO DISPLAY
1X05
EMC HOLE

10

11

12

FG1C D4
FG1D D4
FG1E E4
FG1F E4
FG1G E4
FG1H E4
FG1J E4
FG1K E4
FG1L E4
FG1M E4
FG1N E4
FG1P F4
FG1Q F4
FG1R F9
FG1S F9
FG1T F9
FG1U F9
FG1V F9
FG1W F9
FG1Y D9
FG1Z D9
FG20 D9
FG21 D9
FG22 E9
FG23 E9
FG24 E9
FG25 E9
FG26 E9
FG27 E9
FG28 E9
FG29 E9
FG2A E9
FG2B E9
FG2C E9
FG2D F9
FG2E D9
FG2F D9
FG2G C9
FG2H C9
FG2J D5
FG2K D9
FG2L D10
FG2M D10
FG2N G11
FG2P F11
FG2R D11
FG30 D5
FG31 D5
FG32 D5
FG33 D5
FG34 C11

1G50 G5
1G51 G11
1X05 G1
2G24 C10
2G25 C11
2G26 C11
2G27 C11
2G28 E11
2G29 E11
2G75 C10
2G76 C10
2G77 C10
2G78 C10
2G79 C10
2G7A C10
2G92 C4
2G93 C4
2G94 D4
2G95 D4
2G96 D4
2G97 D4
2G98 D4
2G99 D4
3G2W C8
3G2Y C8
3G2Z D8
3G30 D9
3G31 D8
3G32 C8
3G33 C9
3G34 B9
3G35 C9
3G36 D8
3G37 D9
9G0G G11
9G0K-1 C4
9G0K-2 C4
9G0K-3 C4
9G0K-4 C4
FG04 D8
FG11 E4
FG12 F4
FG13 F4
FG14 F4
FG15 F4
FG16 F4
FG17 F4
FG18 F4
FG19 F4
FG1A F4
FG1B F4

13

LVDS DVBS

2009-10-22

8204 000 8996


18770_536_100119.eps
100119

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-29-3

Q552.1E LA

10.

EN 232

AmbiLight CPLD

B06C

AmbiLight CPLD

2G10 E3
2G11 E3
2G12 E3

1G35 F2
1G36 F2
1G37 B14

2G13 E8
2G14 E8
2G15 E8

B06C

2G16 E8
2G17 E9
2G18 E9

2G19 E9
2GA0 A3
2GA1 A3

2GA5 B3
3G10-1 D7
3G10-2 D7

2GA2 A3
2GA3 B3
2GA4 F3

3G10-3 D7
3G10-4 D7
3G11-1 D4

3G11-2 D3
3G11-3 D7
3G12 D7

5GA0

3GA2-3 F3
3GA2-4 F3
3GA5-1 B13

3GA1 D7
3GA2-1 F3
3GA2-2 F3

3G13 D7
3G14 D4
3G15 E2

3GA5-2 B13
3GA5-3 B13
3GA5-4 B13

3GA6-1 E14
3GA6-2 E14
3GA6-3 E13

3GA6-4 E13
5GA0 A2
5GA1 A2

10

6GA0 F13
6GA1 F13
6GA2 F14

6GA3 F14
7GA0 C5
7GA1-1 D14

11

7GA1-2 D14
7GA2-1 E13
7GA2-2 E13

FGA1 A3
FGA2 F3
FGA3 F4

9GA0 H5
9GA1 C7
FGA0 A5

12

FGA4 F4
FGA5 F4
FGA6 F4

13

IGA0 C12
IGA1 C12
IGA2 C12

14

IGA3 C12

15

FGA0

+3V3

VINT
100n

2GA1

5GA1

100n
2GA2

1u0

2GA0

30R

DEBUG ONLY

FGA1

+3V3

VIO
100n

2GA5

1u0

2GA3

30R

1G37
1
2
3
4
5
6

+3V3

3GA5-4
3GA5-3
3GA5-2
3GA5-1

GCK3
GTS1
GTS2
GSR
VINT

4
3
2
1

5
6 100R
7 100R
8 100R
100R

VIO

SD51022
IGA0

26

4
3G10-4
2
3G10-2

19
20
21
22
23
27
28

3G12
3
3G11-3

RES
47R
5
100R
3
7 3G10-3
100R
3G13
10R
1
6 3G10-1
100R

TCK
TDI
TDO
TMS

100R
8
100R

6
2

GTS1

7GA1-1
BC847BS(COL)
1

+3V3
3
5

GTS2

7GA2-2
BC847BS(COL)
4

GND
4
17
25

+3V3

7GA1-2
BC847BS(COL)
4

+3V3

AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-SDO-OUT
AMBI-LATCH2_DIS

6
100R

GCK3

10p

3GA1

+3V3

CPLED1
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BACKLIGHT-PWM_BL-VS
BL-SPI-CLK

10p
2G19 RES

11
9
24
10

IXO4_19
IXO4_20
IXO4_21
IXO4_22
IXO4_23
IXO4_27
IXO4_28

IXO2_29
IXO2_30
IXO2_31
IXO2_32
IXO2_37
IXO2_38

IGA3
GCK2

10p
2G18 RES

29
30
31
32
37
38

IGA2
PNX-SPI-CSBn
BACKLIGHT-PWM

9GA1 RES

10p
2G17 RES

100R
1
100R

IGA1
CPLED2

CPLED3
5
6
7
8
12
13
14
16
18

10p
2G16 RES

2
3G14
100R
8
3G11-1

10p

10p
2G11 RES

10p
2G12 RES

7
3G11-2

IXO2_36|GTS1
IXO2_34|GTS2
IXO2_33|GSR

IXO3_5
IXO3_6
IXO3_7
IXO3_8
IXO3_12
IXO3_13
IXO3_14
IXO3_16
IXO3_18

10p
2G15 RES

36
34
33

IXO1_2
IXO1_3
IXO1_39
IXO1_40
IXO1_41
IXO1_42

AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-SDO-OUT-R

2G13 RES

GTS1
GTS2
GSR
AMBI-SPI-CS-OUTn_R2-R
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-TEMP
CPLED3
CPLED2

CPLED1

VCCINT VCCIO
IXO1_43|GCK1
IXO1_44|GCK2
IXO1_1|GCK3

10p
2G14 RES

2
3
39
40
41
42

10K

PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK

3G15

43
44
1

2G10 RES

PXCLK54
GCK2
GCK3

15
35

7GA0
XC9572XL-10VQG44C0100

+3V3
6
2

+3V3

8 330R 1

3GA6-2

7 330R 2

3GA6-1
6GA3

FGA3

LTST-C190KGKT

FGA5

6GA2

FGA4

LTST-C190KGKT

FGA6

6GA1

100R
100R
100R
100R

LTST-C190KGKT

2GA4

8
7
6
5

6GA0

SD51022

1
2
3
4

LTST-C190KGKT

3GA2-1
3GA2-2
3GA2-3
3GA2-4
FGA2
100n RES

1
2
3
4
5
6

3GA6-3

1G35
1
2
3
4
5
6

3GA6-4

DEBUG ONLY
1G36

7GA2-1
BC847BS(COL)
1
6 330R 3

GSR

5 330R 4

BACKLIGHT-PWM

9GA0

BACKLIGHT-PWM_BL-VS

10

11

12

13

14

15
2

LVDS DVBS

2009-10-22

8204 000 8996


18770_537_100119.eps
100119

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts


10-29-4

Q552.1E LA

10.

EN 233

SPI-Buffer

B06D

SPI-Buffer

B06D
1

+3V3
+3V3

3EN1
3EN2
G3
18

PNX-SPI-CLK

IGE0

19

2
2

3GE0-3
47R

3
4
5
6
7
8
9

3GE1-3 6

3GE4

3
47R RES
3GE3
47R

BL-SPI-CLK
1

3GE0-1

8
47R
4 3GE1-4
47R RES

BL-SPI-SDO
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDO-OUT-R
PNX-SPI-SDI

RES

47R

10

AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDI

PNX-SPI-CSBn

7GE0
74LVC245A
1

17
16
15
14
13
12
11

PNX-SPI-SDO

7GE1
PDTC114EU

10K

3GE2
20

100n

2GE0

PNX-SPI-CLK

PNX-SPI-SDO

9GE0-2

9GE0-3

9GE2
IGE1

PNX-SPI-CS-BLn

5 9GE0-4

BL-SPI-SDO

PNX-SPI-SDI

BL-SPI-CSn

9GE3

PNX-SPI-CS-AMBIn

BL-SPI-CLK

9GE1

BL-SPI-SDI

2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
3GE1-4 B3
3GE2 A4
3GE3 B4
3GE4 B3
7GE0 B3
7GE1 A4
9GE0-1 C3
9GE0-2 C3
9GE0-3 D3
9GE1 C3
9GE2 D3
9GE3 D3
IGE0 B3
IGE1 D2

AMBI-SPI-CS-OUTn_R2-R

Buffer
Direct

6
2

LVDS DVBS

2009-10-22

8204 000 8996


18770_538_100119.eps
100119

2013-Jan-29 back to

div. table

Circuit Diagrams and PWB Layouts

Q552.1E LA

10.

EN 234

10.30 B07 820400089604 DVBS FE


DVBS-FE

DVBS-FE

B07A
1

B07A

10

11

12

13

7R01-1

+3V3-DEMOD

+3V3-DVBS

+3V3-DEMOD

10n

10n

2R52

10n

2R51

100n

2R50

100n

2R49

100n

2R48

2R47

100n

2R46

22u

2R16

30R

VIA

VDD3V3

2
3
100n

2R17

+1V-DVBS

VDDA2V5

60
56
RES 2R21

DISECQ-DET
F22-DISECQ-TX

1n0

128
20
126
NC
107
NC
IR04
47p
97
98
3R00 IR03
19
18

RES 2R22
SCL-SSB
SDA-SSB

100R
RES 2R23

3R01
47p
100R

SCLT
SDAT

RESET-DVBS
9R00
RES

IR02

26
23
24
29
27

FR02
FR03
FR04
FR05
FR06

3R11
+3V3-DVBS
10K

62
58

XTALO

VS
AGCRF1

I2C-ADDRESS : D0
DIRCLK
CLKI
CLKI2
CLKOUT27
N
I1
P

N
Q1
P

0
1
2
3
D
4
5
6
7
CLKOUT
STROUT
DPN
ERROR

0
CS
1
DISEQCIN1
DISEQCOUT1
FSKRX_IN
FSKRX_OUT
NC
SCL
SDA
SCLT
1
SDAT

RESETB
STDBY
TCK
TDI
TDO
TMS
TRST

FR07

COMP

0
1

1
2
3
4
5
6
GPIO 7
8
9
10
11
12
13

52

SENSE+1V0-DVBS

63
64
65
67
68
70
71
73
74
75
78
79
82
83
84