Lecture 330 Low Power Op Amps (3/27/02)

Page 330-1

LECTURE 330 LOW POWER OP AMPS

(READING: AH 393-402) Objective The objective of this presentation is: 1.) Examine op amps that have minimum static power - Minimize power dissipation - Work at low values of power supply - Tradeoff speed for less power Outline Weak inversion Methods of creating an overdrive Examples Summary

ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02)

P.E. Allen - 2002 Page 330-2

Subthreshold Operation Most micropower op amps use transistors in the subthreshold region. Subthreshold characteristics:
iD 1A 100nA

;;;;
Square Law Exponential

iD

Strong Inversion Transition 100nA

vGS =VT vGS VT

0 0 1V

Weak Inversion

vGS VT

vDS 2V Fig. 7.4-0A

qv W GS (1+vDS) iD = L IDO exp nkT

qID gm = nkT

and gds ID

Operation with channel length = Lmin also will normally be in weak inversion.

ECE 6412 - Analog Integrated Circuit Design - II

P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-3

Two-Stage, Miller Op Amp Operating in Weak Inversion

VDD M6 M3 M4

Cc
vout

vin +

M1

M2

CL

+ VBias -

M5 VSS

M7
Fig.7.4-1

Low frequency response: ro2ro4 ro6ro7 1 1 Avo = gm2gm6 = (No longer ) r n2n6(kT/q)2(2 + 4)(6 + 7) o2 + ro4 ro6 + ro7 ID GB and SR: ID5 ID1 ID 1 kT and SR = C = 2 C = 2GB n = 2GBn1Vt GB = (n1kT/q)C 1 q
ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02) P.E. Allen - 2002 Page 330-4

Example 7.4-1 Gain and GB Calculations for Subthreshold Op Amp. Calculate the gain, GB, and SR of the op amp shown above. The currents are ID5 = 200 nA and ID7 = 500 nA. The device lengths are 1 m. Values for n are 1.5 and 2.5 for p-channel and n-channel transistors respectively. The compensation capacitor is 5 pF. Use Table 3.1-2 as required. Assume that the temperature is 27 C. If VDD = 1.5V and VSS = -1.5V, what is the power dissipation of this op amp? Solution The low-frequency small-signal gain is, 1 Av = (1.5)(2.5)(0.026)2(0.04 + 0.05)(0.04 + 0.05) = 43,701 V/V The gain bandwidth is 100 10-9 GB = 2.5(0.026)(5 10-12) = 307,690 rps 49.0 kHz The slew rate is SR = (2)(307690)(2.5)(0.026) = 0.04 V/s The power dissipation is, Pdiss = 3(0.7A) =2.1W

ECE 6412 - Analog Integrated Circuit Design - II

P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-5

Push-Pull Output Op Amp in Weak Inversion First stage gain is, gm2 ID2n4Vt ID2n4 Avo = gm4 = ID4n2Vt = ID4n2 1
M8
VDD

M3 vi2

M4 M6

Total gain is, gm1(S6/S4) (S6/S4) Avo = (gds6 + gds7) = (6 + 7)n1Vt At room temperature (Vt = 0.0259V) and for typical device lengths, gains of 60dB M9 can be obtained. The GB is, S gm1b gm1 6 GB = C S4 = C

M1

M2
vout

+ VBias -

M5 M7
VSS

Cc

Fig. 7.4-2

ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02)

P.E. Allen - 2002 Page 330-6

Increasing the Gain of the Previous Op Amp 1.) Can reduce the currents in M3 and M4 and introduce gain in the M8 current mirrors. 2.) Use a cascode output stage (cant use self-biased cascode, currents are too low). vi2

VDD

+
M6

M3

M4 VT+2VON M13 M14

M10
vout

M1 M5

M2

vi1

Cc I5 gm1+gm2 + M11 M12 M15 + R Av = out 2 VT+2VON VBias M9 gm1 M7 =g g ds6 ds10 gds7gds11 Fig. 7.4-3A VSS + gm10 gm11 I5 I5 2nnV t 1 = = 2I7 nnVt2(nnn2+npp2) I72n2 I72p2 + I7 I7 nnV t npV t Can easily achieve gains greater than 80dB with power dissipation of less than 1W.
ECE 6412 - Analog Integrated Circuit Design - II P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-7

Increasing the Output Current for Weak Inversion Operation A significant disadvantage of the weak inversion is that very small currents are available to drive output capacitance so the slew rate becomes very small. Dynamically biased differential amplifier input stage:
VDD

M20 i1

M18 i1v i2

M3 i1 M1

M4 i2 M2 i vi1 2

M19 i2

M21

A(i2-i1) M5 M22 M24 M26 M28

I5

A(i1-i2) M23
Fig. 7.4-4

+ M29 M25 VBias M27 -

VSS

Note that the sinking current for M1 and M2 is Isink = I5 + A(i2-i1) + A(i1-i2) where (i2-i1) and (i1-i2) are only positive or zero. If vi1>vi2, then i2>i1 and the sinking current is increased by A(i2-i1). If vi2>vi1, then i1>i2 and the sinking current is increased by A(i1-i2).
ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02) P.E. Allen - 2002 Page 330-8

Dynamically Biased Differential Amplifier - Continued How much output current is available from this circuit if there is no current gain from the input to output stage? Assume transistors M18 through M21 are equal to M3 and M4 and that transistors M22 through M27 are all equal. W 26 W 27 W 28 W 29 Let = A and = A L L L28 L29 26 27 The output current available can be found by assuming that vin = vi1-vi2 > 0. i1 + i2 = I5 + A(i2-i1) The ratio of i2 to i1 can be expressed as vin i2 = exp nV i1 t Defining the output current as iOUT = b(i2-i1) and combining the above two equations gives, vin bI5 exp nV - 1 vin t i = when A = 2.16 and iOUT = OUT vin nVt = 1 (1+A) - (A-1)expnVt where b corresponds to any current gain through current mirrors (M5-M4 and M8-M3).
ECE 6412 - Analog Integrated Circuit Design - II P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-9

Overdrive of the Dynamically Biased Differential Amplifier The enhanced output current is accomplished by the use of positive feedback (M28-M2-M19-M28). The loop gain is, gm28 gm19 gm19 LG = gm4 gm26 = A gm4 = A
2

A=2

A = 1.5 A=1 A = 0.3 A=0

Note that as the output current IOUT increases, the transistors leave the weak I5 1 inversion region and the above analysis is no longer valid.

1 vIN nVt

2
Fig. 7.4-5

ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02)

P.E. Allen - 2002 Page 330-10

Increasing the Output Current for Strong Inversion Operation An interesting technique is to bias the output transistor of a current mirror in the active region and then during large overdrive cause the output transistor to become saturated causing a significant current gain. Illustration:
531A
Current

i1 M1

i2 M2 + Vds2 -

i2 for W2/L2 = 5.31(W1/L1) i1

100A 0.1Vds1(sat) Vds1(sat) Volts

Fig. 7.4-6

ECE 6412 - Analog Integrated Circuit Design - II

P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-11

Example 7.4-2 Current Mirror with M2 operating in the Active Region Assume that M2 has a voltage across the drain-source of 0.1Vds(sat). Design the W2/L2 ratio so that I1 = I2 = 100A if W1/L1 = 10. Find the value of I2 if M2 is saturated. Solution Using the parameters of Table 3.1-2, we find that the saturation voltage of M2 is 2 I1 200 Vds1(sat) = KN (W 2/L2) = 11010 = 0.4264V Now using the active equation of M2, we set I2 = 100A and solve for W2/L2. 100A = KN(W2/L2)[Vds1(sat)Vds2 - 0.5Vds22] = 110A/V2(W2/L2)[0.4260.0426 - 0.50.04262]V2 = 1.883x106(W2/L2) Thus, W2 100 =1.883(W2/L2) L2 = 53.12 Now if M2 should become saturated, the value of the output current of the mirror with 100A input would be 531A or a boosting of 5.31 times I1.

ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02)

P.E. Allen - 2002 Page 330-12

Implementation of the Current Mirror Boosting Concept

VDD

M8 M17 M9 M13 ki1 vo1 ki2 M25

+

M7 M18 i1 i2
vi2

M10

M21

vi1

M22

M14 ki2

M1 M2

M29 i1 i2 M27
M3 M4

M30 M28 i1 i2

vo2 ki1

M26 i2 i1 M24 M20 M16

M15 M11 M19

M23 VBias

M5

M12
-

M6
VSS
Fig.7.4-7

k = overdrive factor of the current mirror

ECE 6412 - Analog Integrated Circuit Design - II P.E. Allen - 2002

Lecture 330 Low Power Op Amps (3/27/02)

Page 330-13

A Better Way to Achieve the Current Mirror Boosting It was found that when the current mirror boosting idea illustrated on the previous slide was used that when the current increased through the cascode device (M16) that VGS16 increased limiting the increase of VDS12. This can be overcome by the following circuit.
VDD iin+IB iin IB kiin M3 50/1 M5 M4 1/1 M1 1/1 1/1 M2 210/1
Fig. 7.4-7A

ECE 6412 - Analog Integrated Circuit Design - II Lecture 330 Low Power Op Amps (3/27/02)

P.E. Allen - 2002 Page 330-14

SUMMARY Operation of transistors is generally in weak inversion Boosting techniques are needed to get output sourcing and sinking currents that are larger than that available during quiescent operation Be careful about using circuits at weak inversion, i.e. the self-biased cascode will cause the resistor to be too large

ECE 6412 - Analog Integrated Circuit Design - II

P.E. Allen - 2002