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Seventh Semester B.E. Degree Examination, Dec. 20l3lJan.2Ol4
DSP Algorithms and Architecture
Time: 3 hrs.
i.
Max. Marks:100
Note: Answer FIVEfull questions, selecting
atleast TWO questions
from
each purt.
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a. With a.neht',,,block diagram, explain the scheme of a DSP systemrwith typical signals in a
DSP scheme,,,,,.
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(10 Marks)
b. Briefly explain the-,decimation process.
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(04 Marks)
c. An analog signal is"sampled at arate of 8 KHz. If 512 samples of the signal are used to
compute DSP, X(K)l ilelermine the analog and digital frequency spacing between adjacent
X(K) elements. Also, determine analog and digital-ftequencies corresponding to K:64.
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(06 Marks)
a. Investigate to basic features that",should be provided in to DSP architecture to be used to
provided in to DSP architecture to b,ufu$ed to implement to following Nth
-order
FIR filter.
(06 Marks)
b.
With a neat diagram, explain trr" ;r;i.;" level parallelism and pipelining with pipelined
implementation of an 8
-
tap FIR filter using eight MACs and parallel implementation of an
8
-
tap FIR filter, using two'MAC units.
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c.
Explain the indirect addressing mode.
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a. Explain the maiu'arUhitectural features of TMS 320 C 54 XX processor. (06 Marks)
b. Explain the bit'ionfiguration of PMST register. (08 Marks)
c. With an ex,ample each, explain immediate addressing mode, absolute addressing mode,
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,
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a-
,.
Describe the operation of the following MAC instructions :
;.
i,"., MAC
x
AR 3 +, # 2463 h, A
'i"":
MAC
*
AR 3
-,
*
AR 5 +, B, A.
b.
Explain the operations of the following instructions :
MPY*ARZ_,*AR4+O,B
SUBxARI+, 14,A
suB # 2345h,9, A, B.
Write a program to find the sum of sum of series of signed numbers as specified
4lFh
A
-
Ir(i)
i=4lOh
Assume ARl as pointer to x(i) and AR2 as counter for the numbers.
Briefly explain the clock generator of TMS320C54XX. d.
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