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LCD TV SERVICE MANUAL


CHASSIS : LA92B

MODEL : 55LH40/41 55LH400C


CAUTION

55LH40-UA/UE 55LH400C-UA

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL58436002 (0911-REV01)

Printed in Korea

CONTENTS

CONTENTS .............................................................................................. 2 PRODUCT SAFETY ..................................................................................3 SPECIFICATION ........................................................................................6 ADJUSTMENT INSTRUCTION ...............................................................10 TROUBLE SHOOTING ............................................................................15 BLOCK DIAGRAM...................................................................................19 EXPLODED VIEW .................................................................................. 21 SVC. SHEET ...............................................................................................

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit


AC Volt-meter

Before returning the receiver to the customer,


always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1M and 5.2M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

To Instrument's exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc. 0.15uF

1.5 Kohm/10W

When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1 *Base on Adjustment standard

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the
Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500F to 600F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500F to 600F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500F to 600F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.

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LGE Internal Use Only

IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink. Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.

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LGE Internal Use Only

SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range
This specification is applied to the LCD TV used LA92B chassis.

3. Test method
1) Performance: LGE TV test method followed 2) Demanded other specification - Safety: UL, CSA, IEC specification, CE - EMC: FCC, ICES, IEC specification, CE

2. Requirement for Test


Each part is tested as below without special appointment. 1) Temperature : 255C (779F), CST : 405C 2) Relative Humidity : 6510% 3) Power Voltage : Standard input voltage(100~240V@50/60Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 5 minutes prior to the adjustment.

4. Electrical specification
4.1 General Specification
No 1 2 3 Item Receiving System Aspect Ratio LCD Module 16:9 LC470WUF-SBM1(Without Inverter) LC550WUD-SBA1(With Inverter) LC550WUD-SBM1(With Inverter) 4 Available Channel 1) VHF : 02 ~ 13 2) UHF : 14 ~ 69 3) DTV : 02 ~ 69 4) CATV : 01 ~135 5) CADTV : 01 ~ 135 5 6 7 8 Operating Environment Storage Environment Input Voltage Tuning system Temp.:0 ~ 40 deg Humidity : ~ 80 % Temp.:-20 ~ 60 deg Humidity : ~ 85 % AC100 ~240V,50/60Hz FS FHD+Trumotion240Hz FHD+120Hz FHD+Trumotion240Hz 47LH55-UA 55LH40-UA 55LH55-UA Specification ATSC/ NTSC-M Remark

4.2 EyeQ-Green Motion Characters.


Ambient Illumination 500 300 200 50 Calculative Sensor Illumination 300 180 120 42 100 55 25 0 100 90 90 90 50 50 50 50 70 62 58 52 70 50 54 65 Backlight UI Contrast Brightness Sharpness Color

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

5 Safety and Regulation


No Item 1. Force Stability Incline Plane Tip Test 2. Force Stability Level Tip Test 3. Isolation Gap,AC-AC 4. Isolation Gap,AC-DC 5. Isolation Gap,Primary <-> GND Isolation Gap,Primary <-> Secondary 6. Power Consumption,Max (1/8W non-clipped max.audio signal &Input voltage 110Vac/60HZ(North America) International VideoSignal) 7. Power Consumption,Stand by (Input voltage110Vac/60HZ(North America) 8. Power Consumption,Switch off 9. Energy Saving Off Minimum Medium Maximum Screen Off 10. OPC Black luminance difference of OPC on/off mode 11. Dielectric Voltage 12. Isolation Resistance 13. Leakage Current 14. UL Compliance 15. CSA Compliance Safety EMC Safety EMC UL1492 FCC Class B CSA C22.2. IC Class B GND SIGNAL 1500 V/min at 100mA 3000 V/min at 100mA 4 0.35 M mA rms 54 70 48 22 100 75 53 27 15 60 66 80 58 32 0.02 W % % % % % % 150 Gray Input difference 1.5KV 3KV <Test Condition> *255 Gray Input Case:white/black No Luminance difference IEC60065 -white No Luminance Vivid mode,4% window white pattern <Test Condition> Full white pattern 0.5 1W (ST-BY power saving circuit) 360W 55LH40/55-UA Min 10 weigthx0.13x9.8 3 3 3 6.0 280W Typ Max Unit deg N mm mm mm mm 47LH55-UA Remark IEC60065

6. DIGITAL Part
No 1. Item VSB Receiving Standard CH.2 ~69CH 1 ~135CH(CATV) 1 ~135CH(CADTV)) 2. 3. 4. 5. Video Resolution Audio Bit Resolution VSB RF Input Sync Stable Time ATSC 18 FORMAT 32,40,48,56,64,80,96,112,128,160, 192,224,256,320,384,448,512,576,640 75 unbalanced, F type Connector input Under 3.0 <None>SEC Kbps Unit Remark

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LGE Internal Use Only

7. Chroma& Brightness
7.1 Module optical specification
No. 1. 2. 3. Item Max Luminance (Center1-point/ Ful white pattern) Luminance uniformity Contrast Ratio WX White 4. Color Coordinates RED Green Blue 5. Color Temperatue Cool Medium Warm 6. 7. 8. 9. Color Distortion, DG Color Distortion,DP Color S/N,AM/FM Color Killer Sensitivity 43.0 -80 WY Xr Yr Xg Yg Xb Yb Typ -0.015 Specification Modele Luminance Min. 400 77 1000: 1 Typ -0.03 1400: 1 0.279 0.292 0.637 0.333 0.287 0.605 0.145 0.064 0.276 0.283 0.285 0.293 0.313 0.329 10.0 10.0 Typ +0.015 85% Full white pattern **The W/B Tolerance is 0.015 for Adjustment Dynamic contrast :off Dynamic color :off Energy saving mode :off % deg dB dB Typ +0.03 55LH40/55-UA 55LH40-UA 40000: 1(DCR) 50000:1(DCR) Typ. 500 Max. cd/m2 Remark

7.2Max Luminance &Contrast measure standard specification


- Max Luminance measure specification 1) In non-impressed condition, measure peak brightness displayable as much as possible LCD module. 2) Measuring instrument: CA-210 or a sort of Color Analyzer. 3) Pattern Generator :VG- 828 or a sort of digital pattern generator (displayable Full White &1/25 White Window pattern) 4) Measure condition Test pattern: in center,1/5(H)*1/5(V) of Window Pattern (white pattern in non-impressed condition) SET condition: Contrast &Brightness Level 100% Environment condition : Dark room in the non outside light Video menu option condition
Signal RF AV Component RGB HDMI NTSC-M NTSC-J 720P 1024x768 DTV 720P Picture Mode Vivid Vivid Vivid Vivid Vivid Dynamic Contrast High High High High High Dynamic Color High High High NA High Black Level Low High High NA Low OPC Off Off Off Off Off

5) Measurement Do heat-run LCD module at 30minutes in normal temperature (25C)by using full white pattern of 15%signal level(38 gray level). Impress test pattern signal in 1/5(H)*1/5(V)White Window of 100%(255Gray Level) measure 3 times brightness of central white window,and mark peak brightness in max brightness degree measure the same condition in video signal /RGB signal. - Luminance uniformity measure specification 1) Impress 100%(255Gray Level) full white pattern at the same peak brightness measurement. 2) Measure average brightness in 5 points.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

A: H/ 4mm B: V/ 4mm @ H,V: Active Area

- Contrast ratio measure specification 1) Test display signal :30*30 dots White Window signal &all Black Raster signal 2) Dark room measure condition: Using touch type Color analyzer CA-210 Dark room in the non outside light 3) Bright room measure condition: In bright room of 150Lx illumination in the panel surface, locate a source of light on the above 45 of the panel surface. 4) Measure method In standard test condition,impress 30*30 dots White Window Pattern signal . Measure center peak brightness degree Lw of white window Impress black Raster signal as contrast ratio measurement signal. Measure black brightness degree Lb of PDP central Calculate the following numerical formula. Contrast ratio =Lw /Lb If it does not use Prior measurement, use generally simple test measurement. The Correct measure specification is followed by IEC61988-2/CD,JAPAN EIAJ-2710

8. Component Video Input (Y, CB/PB, CR/PR)


No Resolution 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 720*480 720*480 720*480 720*480 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 Specification H-freq(kHz) 15.73 15.73 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 60 59.94 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 V-freq(Hz) Pixel Clock(MHz) 13.5135 13.5 27.027 27.0 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 SDTV ,DVD 480I SDTV ,DVD 480I SDTV 480P DTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P Remark

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LGE Internal Use Only

9. RGB
9.1 PC INPUT

No Resolution 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 640*350 720*400 640*480 800*600 1024*768 1280*768 1360*768 1366*768 1280*1024 1600*1200 1920*1080

Specification H-freq(kHz) 31.468 31.469 31.469 37.879 48.363 47.776 47.712 47.13 63.981 75.00 66.587 V-freq(Hz) 70.09 70.08 59.94 60.31 60.00 59.870 60.015 59.65 60.020 60.00 59.934 Pixel Clock(MHz) 25.17 28.32 25.17 40.00 65.00 79.5 85.50 72 108.00 162 148.5 EGA DOS

Remark DDC X O O O O X X X O O O

VESA(VGA) VESA(SVGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA(WXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P

10. HDMI Input (PC/DTV)


10.1 PC Mode No 1 2 3 4 5 6 7 8 9 10 Resolution 640*350 720*400 640*480 800*600 1024*768 1280*768 1360*768 1280*1024 1600*1200 1920*1080 H-freq(kHz) 31.468 31.469 31.469 37.879 48.363 47.776 47.712 63.981 75.00 7.5 V-freq.(Hz) 70.09 70.08 59.94 60.31 60.00 59.870 60.015 60.020 60.00 60 Pixel clock(MHz) 25.17 28.32 25.17 40.00 65.00 79.5 85.50 108.00 162 148.5 Proposed EGA DOS VESA(VGA) VESA(SVGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P Remark

10.2 DTV Mode No 1 2 3 4 5 6 7 8 9 10 11 12 Resolution 720*480 720*480 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 V-freq.(Hz) 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 Pixel clock(MHz) 27.027 27.00 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 Proposed SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P Remark

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LGE Internal Use Only

11. EDID(The Extended Display Identification Data) / DDC(Display Data Channel) download
11.1 Overview It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of Plug and Play. Equpment 11.2 Equipment Adj. R/C Since embedded EDID data is used, EDID download jig, HDMI cable and D-sub cable are not need. 11.3 Download method Press Adj. key On the Adj. R/C, press Adj. key then select EDID D/L. By pressing Enter key, EDID download will begin. 1) If Download is successful, OK is displayed. 2) If Download is a failure, NG is displayed. 3) Re-try download. 11.4 EDID Data Reference: Download is only possible in POWER ON MODE. RGB [C/S: 36FF] EDID Block 0, Bytes 0-127 [00H-7FH] Block Type: EDID 1.3
0 0 10 20 30 40 50 60 70 00 01 09 01 45 6E 3F 00 1 FF 13 48 01 00 28 1F 4C 2 FF 01 4C 01 7E 55 52 47 3 FF 03 A1 01 8A 00 10 20 4 FF 68 08 01 42 7E 00 54 5 FF 73 00 01 00 8A 0A 56 6 FF 41 A9 02 00 42 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 81 80 01 00 20 20 9 6D CF 80 18 1D 1E 20 20 A 02 74 61 71 00 00 20 20 B 00 A3 40 38 72 00 20 20 C 01 57 45 2D 51 00 00 20 D 01 4C 40 40 D0 FD 00 20 E 01 B0 31 58 1E 00 00 00 F 01 23 40 2C 20 39 FC 36

HDMI I [C/S: 1BCA] EDID Block 0, Bytes 0-127 [00H-7FH] Block Type: EDID 1.3
0 0 10 20 30 40 50 60 70 00 03 09 01 45 6E 3F 00 1 FF 13 48 01 00 28 1F 4C 2 FF 01 4C 01 7E 55 52 47 3 FF 03 A1 01 8A 00 10 20 4 FF 80 08 01 42 7E 00 54 5 FF 73 00 01 00 8A 0A 56 6 FF 41 A9 02 00 42 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 81 80 01 00 20 20 9 6D CF 80 18 1D 1E 20 20 A 02 74 61 71 00 00 20 20 B 00 A3 40 38 72 00 20 20 C 01 57 45 2D 51 00 00 20 D 01 4C 40 40 D0 FD 00 20 E 01 B0 31 58 1E 00 00 01 F 01 23 40 2C 20 39 FC 1B

EDID Block 1, Bytes 128-255 [80H-FFH] Block Type: CEA EDID Timing Extension Version3
0 0 10 20 30 40 50 60 70 02 09 3A 1E 00 8A 00 20 1 03 07 80 01 00 42 7E 25 2 1F 07 18 1D 9E 00 8A 00 3 F1 67 71 80 01 00 42 7E 4 47 03 38 18 1D 1E 00 8A 5 90 0C 2D 71 00 8C 00 42 6 22 00 40 1C 72 0A 18 00 7 20 10 58 16 51 D0 26 00 8 05 00 2C 20 D0 8A 36 1A 9 04 B8 04 58 1E 20 80 00 A 03 2D 05 2C 20 E0 A0 00 B 02 E3 7E 25 6E 2D 70 00 C 26 05 8A 00 28 10 38 00 D 15 03 42 7E 55 10 1F 00 E 07 01 00 8A 00 3E 40 00 F 50 02 00 42 7E 96 30 9A

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HDMI II [C/S: 1BBA] EDID Block 0, Bytes 0-127 [00H-7FH] Block Type: EDID 1.3
0 0 10 20 30 40 50 60 70 00 03 09 01 45 6E 3F 00 1 FF 13 48 01 00 28 1F 4C 2 FF 01 4C 01 7E 55 52 47 3 FF 03 A1 01 8A 00 10 20 4 FF 80 08 01 42 7E 00 54 5 FF 73 00 01 00 8A 0A 56 6 FF 41 A9 02 00 42 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 81 80 01 00 20 20 9 6D CF 80 18 1D 1E 20 20 A 02 74 61 71 00 00 20 20 B 00 A3 40 38 72 00 20 20 C 01 57 45 2D 51 00 00 20 D 01 4C 40 40 D0 FD 00 20 E 01 B0 31 58 1E 00 00 01 F 01 23 40 2C 20 39 FC 1B

EDID Block 1, Bytes 128-255 [80H-FFH] Block Type: CEA EDID Timing Extension Version3
0 0 10 20 30 40 50 60 70 02 09 3A 1E 00 8A 00 20 1 03 07 80 01 00 42 7E 25 2 1F 07 18 1D 9E 00 8A 00 3 F1 67 71 80 01 00 42 7E 4 47 03 38 18 1D 1E 00 8A 5 90 0C 2D 71 00 8C 00 42 6 22 00 40 1C 72 0A 18 00 7 20 10 58 16 51 D0 26 00 8 05 00 2C 20 D0 8A 36 1A 9 04 B8 04 58 1E 20 80 00 A 03 2D 05 2C 20 E0 A0 00 B 02 E3 7E 25 6E 2D 70 00 C 26 05 8A 00 28 10 38 00 D 15 03 42 7E 55 10 1F 00 E 07 01 00 8A 00 3E 40 00 F 50 02 00 42 7E 96 30 9A

HDMI III [C/S: 1BAA] EDID Block 0, Bytes 0-127 [00H-7FH] Block Type: EDID 1.3
0 0 10 20 30 40 50 60 70 00 03 09 01 45 6E 3F 00 1 FF 13 48 01 00 28 1F 4C 2 FF 01 4C 01 7E 55 52 47 3 FF 03 A1 01 8A 00 10 20 4 FF 80 08 01 42 7E 00 54 5 FF 73 00 01 00 8A 0A 56 6 FF 41 A9 02 00 42 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 81 80 01 00 20 20 9 6D CF 80 18 1D 1E 20 20 A 02 74 61 71 00 00 20 20 B 00 A3 40 38 72 00 20 20 C 01 57 45 2D 51 00 00 20 D 01 4C 40 40 D0 FD 00 20 E 01 B0 31 58 1E 00 00 01 F 01 23 40 2C 20 39 FC 1B

EDID Block 1, Bytes 128-255 [80H-FFH] Block Type: CEA EDID Timing Extension Version3
0 0 10 20 30 40 50 60 70 02 09 3A 1E 00 8A 00 20 1 03 07 80 01 00 42 7E 25 2 1F 07 18 1D 9E 00 8A 00 3 F1 67 71 80 01 00 42 7E 4 47 03 38 18 1D 1E 00 8A 5 90 0C 2D 71 00 8C 00 42 6 22 00 40 1C 72 0A 18 00 7 20 30 58 16 51 D0 26 00 8 05 00 2C 20 D0 8A 36 1A 9 04 B8 04 58 1E 20 80 00 A 03 2D 05 2C 20 E0 A0 00 B 02 E3 7E 25 6E 2D 70 00 C 26 05 8A 00 28 10 38 00 D 15 03 42 7E 55 10 1F 00 E 07 01 00 8A 00 3E 40 00 F 50 02 00 42 7E 96 30 9A

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LGE Internal Use Only

HDMI IV [C/S: 8091] EDID Block 0, Bytes 0-127 [00H-7FH] Block Type: EDID 1.3
0 0 10 20 30 40 50 60 70 00 03 09 01 45 6E 3F 00 1 FF 13 48 01 00 28 1F 4C 2 FF 01 4C 01 7E 55 52 47 3 FF 03 A1 01 8A 00 10 20 4 FF 80 08 01 42 7E 00 54 5 FF 73 00 01 00 8A 0A 56 6 FF 41 A9 02 00 42 20 0A 7 00 78 40 3A 1E 00 20 20 8 1E 0A 81 80 01 00 20 20 9 6D CF 80 18 1D 1E 20 20 A 02 74 61 71 00 00 20 20 B 00 A3 40 38 72 00 20 20 C 01 57 45 2D 51 00 00 20 D 01 4C 40 40 D0 FD 00 20 E 01 B0 31 58 1E 00 00 01 F 01 23 40 2C 20 39 FC 1B

EDID Block 1, Bytes 128-255 [80H-FFH] Block Type: CEA EDID Timing Extension Version3
0 0 10 20 30 40 50 60 70 02 09 3A 1E 00 8A 00 20 1 03 07 80 01 00 42 7E 25 2 1F 07 18 1D 9E 00 8A 00 3 F1 67 71 80 01 00 42 7E 4 47 03 38 18 1D 1E 00 8A 5 90 0C 2D 71 00 8C 00 42 6 22 00 40 1C 72 0A 18 00 7 20 40 58 16 51 D0 26 00 8 05 00 2C 20 D0 8A 36 1A 9 04 B8 04 58 1E 20 80 00 A 03 2D 05 2C 20 E0 A0 00 B 02 E3 7E 25 6E 2D 70 00 C 26 05 8A 00 28 10 38 00 D 15 03 42 7E 55 10 1F 00 E 07 01 00 8A 00 3E 40 00 F 50 02 00 42 7E 96 30 9A

12. Power
No 1. 2. DC Voltage Item Power On/Off Inverter Voltage Logic Voltage(Vcc) Sound Amp Vcc Micom B+ Tuner 5V VSC Vcc 24V 20V 12V 5V No operation 3. AC Power Shut Down Voltage Min 10000 21.6 4.8 19 22 3.25 4.75 22.0 19.0 11.0 4.5 0 90 24 5 20 24 3.4 5.0 24.0 20.0 12.0 5.0 0.5 26.4 5.3 22 26 3.55 5.25 26.0 21.0 13.0 5.5 1 264 Typ Max Unit times V V V V V V V V V V V V Wide Range PSU Inside Temp.Under 20deg. PSU 24V Lips 20 Lips 20 PSU 24V Remark

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 13 -

LGE Internal Use Only

13. Mechanical specification


* Refer to Minerva Gap SPEC. inch top A B C D E F 0.8 0.7 0.7 32 side 1.0 top 0.8 0.7 0.7 37 side 1.2 top 1.0 0.7 0.7 42 side 1.5 top 1.0 0.7 0.7 47 side 1.5 top 1.0 0.7 0.7 55 side 1.7

Control Button -Back cover gap :0.8mm Side Bracket -Back cover around gap :1.0mm Display shift :|A-B| 2.0mm |C-D| 2.0mm

1) Gap between Front Frame /Back cover and Middle Cabinet 2) Gap between Front Frame /Middle Cabinet

Top View
Back Cover "b Middle Cabinet "b

Front Frame Gap b between Front Frame (Back cover) and Middle Cabinet -> 0 b B (Side gap)

"b

Gap a between Front Frame and Middle Cabine -> 0 a A (Side gap)

"a Gap a between Front Frame and Middle Cabine -> 0 a A (Left/ Right gap)

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 14 -

LGE Internal Use Only

3) Gap between Back Cover and Side AV

Back View

Side View

Side AV

Back Cover

Gap f between Back Cover and Side AV -> 0 f 1.0 Gap g between Back Cover and Side AV -> 0 g 1.0
4)Gap between Back Cover and Side AV

Side View

"h"

Control Braket

Back Cove

Gap hbetween Back Cover and Control Bracket -> 0 h 0.8


*Active area 1. Active area of LCD PANEL is in bezel of cabinet 2. Interval between active area and bezel |A-B|< 2.0 mm ,|C-D|< 2.0 mm A:Interval between left of active area and bezel B:Interval between right of active area and bezel C:Interval between top of active area and bezel D:Interval between bottom of active area and beze

C Active Area A B

Bezel

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 15 -

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with LA92G chassis. 4. Click Connect tab. If Cant is displayed, Check connection between computer, jig, and set.

(3)

2. Specification
1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. 2) Adjustment must be done in the correct order. 3) The adjustment must be performed in the circumstance of 25 5C of temperature and 6510% of relative humidity if there is no specific designation. 4) The input voltage of the receiver must keep 100~240V, 50/60Hz. 5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15. In case of keeping module is in the circumstance of 0C, it should be placed in the circumstance of above 15C for 2 hours. In case of keeping module is in the circumstance of below 20C, it should be placed in the circumstance of above 15C for 3 hours,. *Caution When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.
filexxx.bin

5. Click Auto tab and set as below. 6. Click Run. 7. After downloading, check OK message.

(3)
filexxx.bin

3. Main PCB check process


*APC - After Manual-Insert, executing APC

3.2 USB DOWNLOAD(*.epk file download)


1. Put the USB Stick to the USB socket 2. Automatically detecting update file in USB Stick - If your downloaded program version in USB Stick is Low, it didnt work. But your downloaded version is High, USB data is automatically detecting 3. Show the message Copying files from memory

3.1 Boot file Download


1. Execute ISP program Mstar ISP Utility and then click Config tab. 2. Set as below, and then click Auto Detect and check OK message. If Error is displayed, Check connection between computer, jig, and set. 3. Click Read tab, and then load download file (XXXX.bin) by clicking Read

(3)
filexxx.bin

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 16 -

LGE Internal Use Only

4. Updating is staring.

4.2 Final assembly adjustment


White Balance adjustment RS-232C functionality check Factory Option setting per destination Ship-out mode setting (In-Stop)

4.3 Etc.
Ship-out mode Service Option Default USB Download(S/W Update, Option)

5. Board-level adjustment
5.1 ADC adjustment
5.1.1 Overview ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate RGB deviation. 5.1.2 Equipment & Condition 1) Jig (RS-232C protocol) 2) Input : MSPG-925FS(Model : 209 ,Pattern : 65, Only component)) 3) RGB Adjust use internal pattern.5.1.3 Adjustment 5.1.3 Adjustment 5.1.2.1 Method Using RS-232, adjust items listed in 3.1 in the order shown in 5.1.2.3 Adj. protocol
Protocol Enter adj. mode Begin adj. Return adj. ad 00 10 OKx (Success) NGx (Fail) (main) ad 00 20 (sub ) ad 00 21 Confirm adj. ad 00 99 (main) 000000000000000000000000007c007b006dx (Sub) 000000070000000000000000007c00830077x NG 03 00x (Fail) NG 03 01x (Fail) NG 03 02x (Fail) OK 03 03x (Success) Command ad 00 00 d 00 OK00x Set ack

5. Updating Completed, The TV will restart automatically. 6. If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage) * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didnt have a DTV/ATV test on production line. * After downloading, have to adjust TOOL OPTION again. 1. Push "IN-START" key in service remote controller. 2. Select "Tool Option 1" and Push OK button. 3. Punch in the number. (Each model has their number.) 4. Completed selecting Tool option.
Model 47LH55-UA 55LH55-UA 55LH40-UA Tool option1 Tool option2 Tool option3 33281 45569 45313 3400 3400 3400 35748 35748 35748 Tool option4 1024 1024 1024

result Read adj. data

4. Board-level adjustment
4.1 Board-level adjustment
Adjust 480i Comp1 adj.(Comp1080i & RGB Adjust use internal pattern). EDID/DDC download Above adjustment items can be also performed in Final Assembly if needed. Both Board-level and Final assembly adjustment items can be check using In-Start Menu 1. Adjust Check. * After Board level adjustment, set volume setting value 0

End adj.

ad 00 90

d 00 OK90x

Ref.) ADC adj. RS232C Protocol_Ver1.0 5.1.2.3 Adj. order ad 00 00 [Enter ADC adj. mode] ad 00 10 [Adjust 480i Comp1/1080i Comp1/1024*768 RGB] ad 00 90 End adj.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 17 -

LGE Internal Use Only

6. Final Assembly adjustment


6.1 White Balance adjstment
6.1.1 Overview W/B adj.: Objective & How-it-works - Objective: To reduce each Panels W/B deviation - How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. 6.1.2 Equipment 1) Color Analyzer : CA-210 (NCG: CH 9 / WCG: CH12 /LED Module:CH14) 2) Adjustment Computer (During auto adj., RS-232C protocol is needed) 3) Adjustment R/C 4) Video Signal Generator MSPG-925F 720p/216Gray (Model:217, Pattern:78) -> Only when internal pattern is not available Color Analyzer Matrix should be calibrated using CS-1000 6.1.3 Equipment connection map
Color Analyzer
Probe

6.1.4 Adjustment method 6.1.4.1 Auto adjustment method 1) Set TV in adj. mode using POWER On Key 2) Zero calibrate probe then place it on the center of the Display 3) Connect Cable(RS-232C) 4) Select mode in adj. Program and begin adj. 5) When adj. is complete (OK Sign), check adj. status per mode (Warm, Medium, Cool) 6) Remove probe and RS-232C cable to complete adj. adj. must begin w/ command Wb 00 00, and end w/wb 00 ff and adjustment offset if needed. 6.1.4.2 Manual adj. method Dynamic contrast : off Dynamic color : off OPC : Off Energy saving mode : Off 1) Set TV in adj. mode using POWER On Key 2) Press ADJ key EZ adjust using adj. R/C 3) Using CH + / - KEY, select 7.TEST PATTERN then press Enter to place inHEAT RUN mode and wait for 5 minutes. 4) Zero calibrate the probe of Color Analyzer, then place iton the center of LCD module within 10 cm of the surface. 5) Press ADJ key 6. White-Balance then press the cursor to the right (KEY ) (When is pressed Full White internal pattern will be displayed) 6) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. 7) Adjustment is performed in COOL, MEDIUM, WARM 3 modes of color temperature If internal pattern is not available, use RF input(Full white 216 gray) In EZ Adjustment menu 6.White Balance, you can select one of 2 options: Test pattern ON, Test pattern OFF. Default is ON By selecting OFF, you can adjust using RF signal.

RS-232C

RS-232C

Computer
RS-232C

# Pattern Generator
Signal Source

* If TV internal pattern is used,not needed

Protocol <Command Format>


START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP

Adjustment condition and cautionary items


1) Lighting condition in surrounding area Surrounding lighting should be lower than 10 lux. Try to isolate adj. area into dark surrounding. 2) Probe location - Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80~ 100) - B/L on should be checked using no signal or Full white Pattern 6.1.5 Reference (White Balance adj. coordinate and color temperature) Luminance: Full white 216 Gray Standard color coordinate and temperature using CS-1000 Coordinate Mode Cool Medium Warm x 0.276 0.285 0.313 y 0.283 0.293 0.329 Temp 11000K 9300K 6500K uv 0.0000 0.0000 0.0000

- LEN: Number of Data Byte to be send - CMD: Command - VAL: FOS Data - CS: Checksum of sent Data - A: Acknowledge Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX] RS-232C Command used during auto-adjustment CMD wb wb ID 00 00 DATA 00 ff Explanation Begin White Balance adj. End White Balance adj. (internal pattern disappears) Ex) wb 00 00 -> Begin white balance auto-adj. wb 00 10 -> Gain adj. ja 00 ff -> Adj. data jb 00 c0 ... ... wb 00 1f -> Gain adj. complete *(wb 00 20(Start), wb 00 2f(End)) -> Off-set adjustment wb 00 ff -> End white balance auto-adjustment
Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 18 -

LGE Internal Use Only

55LH40-UA, 47/55LH55-UA (N-America) Standard color coordinate and temperature using CA210(CH 09) Coordinate Mode Cool Warm x 0.2760.002 0.3130.002 y 0.2830.002 0.2930.002 0.3290.002 Temp 11000K 9300K 6500K uv 0.0000 0.0000 0.0000

7. GND and Internal Pressure check


7.1 Method 1) GND & Internal Pressure auto-check preparation - Check that Power Cord is fully inserted to the set (If loose, re-insert) 2) Perform GND & Internal Pressure auto-check - Unit w/ fully inserted power cord and A/V arrives to the autocheck process. - Connect D-terminal AV JACK TESTER - Auto CONTROLLER(GWS103-4) ON - Perform GND TEST - If NG, Buzzer will sound to inform the operator - If OK, changeover to I/P check automatically (Remove CORD,A/V from AV Jack Box) - Perform I/P test - If NG, Buzzer will sound to inform the operator - If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process. 7.2 Checkpoint TEST voltage - GND: 1.5KV/min at 100mA - Signal: 3KV/min at 100mA Test time: 1 second Test point - GND test = Power cord GND & signal cable metal GND - Internal pressure TEST = POWER CORD GND & LIVE & NEUTRAL LEAKAGE CURRENT: At 0.5mArms

Medium 0.2850.002

6.2 Option selection per country


6.2.1 Overview Option selection is only done for models in Non-USA North America due to rating Applied model: LA92B Chassis applied None USA Model(Canada, Mexico) 6.2.2 Method 1) Press ADJ key on the Adjustment R/C, then select Country Group Menu 2) Depending on destination, select KR or US, then on the lower option, select US, CA, MX. Selection is done using +, - KEY

6.3 EYE-Q function check


Step 1) Turn on TV Step 2) Press EYE key of Adj. R/C Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds Step 4) Confirm that R/G/B value is lower than 10 of the Raw Data (R: G: B: ) . If after 6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds Step 6) Confirm that B. Light(xxx) value increases from 0. If change is not seen, replace Eye Q II sensor

Green Eye-Check Sensor Data: Backlight: O.K 1 0

< step 2>

< step 3>

< step 4>

Green Eye-Check Sensor Data: Backli ght : 215 100

< step 5>

< step 6>

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 19 -

LGE Internal Use Only

SCL, SDA_3.3V

DDR2
Qimonda/Hynix

VIDEO PATH

IF +/TR Buffer SIF SDA/SCL_5V Reset / IF_AGC LVDS TS_clk, SOP, Val TU_CVBS

VSB Demod.
TS In[07]

FRC IC (LGE7329) LCD Module


(FHD+120Hz)

Compone nt 1
Y Pb Pr, L/R

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

Compone nt 2
EEPROM

D-sub RGB

Half-NIM Tuner FRC Block


CVBS, Y/C, L/R Y Pb Pr, L/R

(FHD+Trumotion240Hz)

AV

Saturn5 (ATSC US)

RGB/H/V

VIDEO TROUBLESHOOTING

- 20 LGE3159 MPEG2
HDMI S/W

HDMI 1

REAR JACK PACK

HDMI 2

Linux Scaler

HDMI 3

RS-232C (Ctrl./SVC)
CVBS, L/R

RX/TX

MAX3232

RX/TX

Side A V

HDMI4

SIDE JACK PACK

LGE Internal Use Only

1. Side effect of OPC Function


A change of Brightness or OSD Flicker problem YES Check OPC Status in the picture-Advanced Control menu YES Recheck After OPC Off

YES This problem is side effect of OPC Function 1)A change of Brightness means Backlight dimming is operating by dark image because of OPC function 2)A phenomenon of flicker a specially bright areais Side effect because of OPC function

Ex1) A change of total brightness adding local bright image or caption

<In excluding a caption >

< In including a caption >

Ex2) A phenomenon of moment flicker a specially bright area after changing channel or input mode CATV-2 CATV-3 CATV-3

<Before changing channel>

<After changing channel>

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 21 -

LGE Internal Use Only

2. AV
Check JK1202, JK1206 Can you see the normal waveform?
NO

JK1202,JK1206 may have problem. Replace this Jack.

YES

Check the input (Pin AN17,AM19) of LGE3159(IC100). Measure waveform at C112,C118 because its more easy to check. Can you see the normal waveform? YES Check all power domain of LGE7329 (IC801) (3.3V, 1.9V_CORE,1.26V) & crystal output (X800 / 12MHz)&FRC_RESET Measure Power & waveform at L800,L801,L802,L803, L804,L806 because its more easy to check. Can you see the normal waveform?

NO

This board has big problem because Main chip (L GE3159) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE3159 or n

YES This board has big problem because FRC chip(LGE7329) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE7329. Although you replace it, you cannot see normal display, decide to replace
Main chip(LGE3159)

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 22 -

LGE Internal Use Only

3. Component
Check JK1206 NO JK1206 may have problem. Replace this Jack.

Can you see the normal waveform?

YES

Check the input (Pin R1,R3,P2 and Pin V1,V2,U1) of LGE3159(IC100). Measure waveform at C101,C102,C103 and C115,C116,C117 because its more easy to check. Can you see the normal waveform? YES

Check all power domain of LGE7329 (IC801) (3.3V, 1.9V_CORE,1.26V) & crystal output (X800 / 12MHz)&FRC_RESET Measure Power & waveform at L800,L801,L802,L803, L804,L806 because its more easy to check. Can you see the normal waveform?

NO

This board has big problem because Main chip (L GE3159) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE3159 or no

YES This board has big problem because FRC chip(LGE7329) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE7329. Although you replace it, you cannot see normal display, decide to replace
Main chip(LGE3159)

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 23 -

LGE Internal Use Only

4. RGB PC
Check JK1201 Can you see the normal waveform?
NO

JK1201 may have problem. Replace this Jack.

YES

Check the input (Pin K1,K2,K3,L1,L3) of LGE3159(IC100). Measure waveform at C113,C114,C108 and R146,R149 because its more easy to check. Can you see the normal waveform? YES

Check all power domain of LGE7329 (IC801) (3.3V, 1.9V_CORE,1.26V) & crystal output (X800 / 12MHz)&FRC_RESET Measure Power & waveform at L800,L801,L802,L803, L804,L806 because its more easy to check. Can you see the normal waveform?

NO

This board has big problem because Main chip (L GE3159) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE3159 or no

YES This board has big problem because FRC chip(LGE7329) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE7329. Although you replace it, you cannot see normal display, decide to replace
Main chip(LGE3159)

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 24 -

LGE Internal Use Only

5. HDMI
Check input connect JK500,JK501,JK502,JK503 Can you see the normal waveform? YES Check DDC communication lines (IC502) YES Check HDCP communication lines(IC105) YES Check the output of TDA9996HL(IC502) _HDMI1,2,3 or HDMI4. . Can you see the normal waveform? YES NO After checking the Power of this chip, you should decide to replace this or not. NO After checking the Power of this chip, you should decide to replace this or not. NO
JK500,JK501,JK502,JK503 may have problem. Replace this Jack.

Check all power domain of LGE7329 (IC801) (3.3V, 1.9V_CORE,1.26V) & crystal output (X800 / 12MHz)&FRC_RESET Measure Power & waveform at L800,L801,L802,L803, L804,L806 because its more easy to check. Can you see the normal waveform?

NO

This board has big problem because Main chip (L GE3159) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE3159 or not

YES This board has big problem because FRC chip(LGE7329) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE7329. Although you replace it, you cannot see normal display, decide to replace
Main chip(LGE3159)

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 25 -

LGE Internal Use Only

AUDIO TROUBLESHOOTING
AUDIO PATH

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 26 -

LGE Internal Use Only

1. TV/ CATV
Check TU1 Pin16(SIF) Can you see the normal signal? NO Could you measure voltage of TU1001 & IIC lines? Are they all normal? YES YES You should replace TUNER. NO You should check power line & IIC lines.

Check the input (Pin W2) of LGE3159((IC100). Measure waveform at C147 because its more easy to check. Can you see the normal waveform?

NO

After checking audio signal line, you should decide to replace item or not.

2. AV/ Component/ RGB- PC


Check JK1206, JK1202, JK1205 Can you see the normal waveform? YES Check the input (PinAA3,Y1,AE1,AF3,AE3,AE2,AA1 AB1,AB2,AC2,AB3,AC3) of LGE3159(IC100). Can you see the normal waveform? YES Check the Output (Pin Audio_MASTER_CLK ,MS_LRCK MS_SCK,MS_LRCH) of LGE3159(IC100). Can you see the normal waveform?
NO NO

JK701, JK707, JK700, JK702, JK703 may have problem. Replace this Jack.

After checking audio signal line, you should decide to replace item or not.

NO

After checking audio signal line, you should decide to replace item or not.

YES Check IC600(NTP-3100L) L606/L607


NO

After checking audio signal line, you should decide to replace item or not.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 27 -

LGE Internal Use Only

3. HDMI
Check input connect JK500,JK501,JK502,JK503 Can you see the normal waveform? YES Check DDC communication lines (IC502) YES NO Check HDCP communication lines(IC105) YES After checking the Power of this chip you should decide to replace this or not. NO After checking the Power of this chip you should decide to replace this or not. NO JK500,JK501,JK502,JK503 may have problem. Replace this Jack.

Check the output of TDA9996HL(IC502) _HDMI1,2,3 or HDMI4. . Can you see the normal waveform? YES Check the Output (Pin Audio_MASTER_CLK ,MS_LRCK MS_SCK,MS_LRCH) of LGE3159(IC100). Can you see the normal waveform? YES

NO

After checking the Power & Select Pin & Etc of this chip y ou should decide to replace this or not.

NO

After checking the Power & Select Pin & Etc of this chip y ou should decide to replace this or not.

NO Check IC600(NTP-3100L) L606/L607

After checking the Power & Select Pin & Etc of this chip y ou should decide to replace this or not.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 28 -

LGE Internal Use Only

4. Speaker
Check the output (Pin A8,B7,C7,D8) of LGE3159(IC100). Measure waveform at R160,R161,R162,R163 because its more easy to check. Can you see the normal signal? YES NO NO This board has big problem because Main chip(BCM3553) have some troubles. After checking thoroughly all path once again, You should decide to replace BCM3553 or not

Check the input (Pin 7,17,18,19) of NTP3100((IC600). Can you see the normal waveform? YES

After checking audio signal line, yo u should decide to replace item or not.

Check the Output (Pin Audio_MASTER_CLK ,MS_LRCK MS_SCK,MS_LRCH) of LGE3159(IC100). Can you see the normal waveform? YES Check IC600(NTP-3100L) L606/L607 YES Check the connector & Speaker

NO

After checking the Power & I2C & Reset of this chip, you should decide to replace this or not

NO

After checking audio signal line, you should decide to replace item or not.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 29 -

LGE Internal Use Only

5. SPDIF
Check the output (Pin E9) of LGE3159(IC100). Measure waveform at R159 because its more easy to check. Can you see the normal signal? NO This board has big problem because Main chip(LGE3159) have some troubles. After checking thoroughly all path once again, You should decide to replace LGE3159 or not

YES

Check the input of JK601. Can you see the normal waveform?

NO

After checking audio signal line, yo u should decide to replace item or not.

YES

After checking the Jack, you should decide to replace item or not.

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 30 -

LGE Internal Use Only

SCL, SDA_3.3V IF +/TR Buffer SIF TS_clk, SOP, Val TU_CVBS

VSB Demod.
Qimonda/Hynix TS In[07]

LCD Module
(FHD, 60Hz)

DDR2

Option
LVDS

FRC IC (LGE7329) FRC Block

LCD Module
(FHD+120Hz) (FHD+Trumotion240Hz)

SDA/SCL_5V Reset / IF_AGC DP/DM CVBS, Y/C, L/R Y Pb Pr, L/R Y Pb Pr, L/R

Component 1

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
Bluetooth Dongle (Option)

Component 2
Reset Switch X-tal
EEPROM

D-sub RGB
Data [0 7] Audio L/R

Audio L/R (for RGB)

BLOCK DIAGRAM

- 31 MPEG2
HDMI S/W

HDMI 1

Half-NIM Tuner

AV

Saturn5 (ATSC US)


12MH z

Reset IC

RGB/H/V

LGE3159

Addr[01], CS

NAND Flash (256Mb)

REAR JACK PACK

HDMI 2

Linux Scaler
Addr.[ ], ctrl. data

DDR_Data[0:15], DQS, DM

DDR2 (512Mbit)
Qimonda / Hynix

HDMI 3
SPDIF

Digital Audio (Optic)

DDR2 (512Mbit)
Qimonda / Hynix Data[16:31]

Digital Audio (Coaxial)


RX/TX

RS-232C (Ctrl./SVC)
CVBS, L/R

MAX3232

RX/TX

I2S LRCK LRCH Master CLK

Digital AMP NTP3100L

Side AV

SCL, SDA_3.3V DP/DM +5V

HDMI4 O.C. Protector


+5V CLK,TDI,TDO,MS,RST

EEPROM 512Kb

SIDE JACK PACK

USB2.0

LGE Internal Use Only

Headphone

JTAG

I2C Map
+5V_GENERAL
MEMC_SDA, MEMC_SCL FE_DEMOD_SDA, FE_DEMOD_SCL

SDA_0, SCL_0 LGE7329 (FRC) LGDT3305 +3.3V


SDA_SUB/AMP, SCL_SUB/AMP TDA9996_SDA, TDA9996_SCL

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes

SDA_1, SCL_1 NTP3100L +5V_GENERAL


OPTION

IR(Eye-Q)

TDA9996HL

+5V_TU

FE_TUNER_SDA, FE_TUNER_SCL +3.3V TUNER


HDCP

I2C Map

- 32 -

EEPROM_SDA, EEPROM_SCL +5V_ST


Saturn 5 ISP Debug Port

AT24C512

CAT24WC08

ISP_RXD, ISP_TXD +3.3V_HDMI

LGE3159

HDMI_SDA, HDMI_SCL TDA9996HL

LGE Internal Use Only

+12V

POWER MANAGEMENT
+12V +5V_EXT MP2212 EN TPS2042 +3.3V_ST AP1117 +3.3V EN MP2212 TDA9996 AZ1117 EN +1.8V_AMP +1.8V_DDR SC4215 MSD3158 HYB18TC512160B2F NTP3100L +1.8V_S_DDR NTP3100L +1.8V_HDMI +3.3V_AVDD_MPLL MSD3158v TDVH-103 KIA78R05F AS7809D +5V_TU +9V

12V_TCON

SI4925

EN

Module-Tcon

PANEL_CTL

+24V(PSU),20V(Lips)

+24V_AMP(PSU),20V_AMP(Lips)

L602

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
MX25L3205 +3.3V_MEMC AT24C512BW +5V SI4925 EN EN MP2212 L711 L717 JST1223 AVDD AVDD_MEMPLL MAX810 AVDD_LPLL MAX3232C Eye-Q:CM3212 MSD3158 AVDD_DM +3.3V_PVSB EN SC156515 +1.2V_PVSB SC4215 +3.3V_VDDP +1.2V_DVDD_PVSB LGDT3305 MSD3158v VSB_CTRL AVDD_OTG 0V=>+3.3V=>0 V Reset +5V_GENERAL +1.26V_VDDC MSD3158v AVDD_AU L715 CAT24WC W25X20 MST7329Nc
L1201

NTP3100L

+3.3V_HDMI

+5.2V

+5V_ST

TDA9996

POWER MANAGEMENT

- 33 LED/IR

L706

AT24C02BN

+3.3V_ST

IC705

AP1117 L1209 L1200

POWER_ON/OFF, L709 POWER_ON_DELA Y

MSD3158 SSM6N15FU +5V_EXT EN

L703 +3.3V_AVDD_MPLL

+12V

+5V_GENERAL

EN

MP2212

+1.26V_MEMC MP2212DN

+1.8V_MEMC +3.3V_AVDD_PVSB, +3.3V_DVDD_PVSB

APE8953

LGE Internal Use Only

MST7329N

MST7329N

Main IC => POWER MANAGEMENT


Saturn5/LGE3159
W7 AVDD_AU J7~N7 AVDD_33_1~5

L109 AVDD_AU

L103 H17,T20,V20 AVDD_MEMPLL R20 AVDD_LPLL W8 AVDD_DM H8 AVDD_USB H9~W10 VDDP_1~8 G12~W18 AVDD_DDR_1~11 +1.8V_DDR

AVDD

L106 AVDD_MEMPLL +5V

+5V_ST

IC704
L108 AVDD_LPLL L107 L102 L101 +3.3V_VDDP EN SC4215 EN +5V_GENERAL AVDD_OTG AVDD_DM MP2305DS L720 EN

+3.3V

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
L715

SI4925

Q706

EN

POWER_ON/OFF, POWER_ON_DELAY

MAIN IC => POWER MANAGEMENT

- 34 IC701
L709 L711 MP2212DN

+1.26V_VDDC D16~Y22 VDDC_1~27 L717

IC705

+5V_ST L703 +3.3V_ST MAX810 Reset +3.3V_AVDD_MPLL

H7 AVDD_MPLL

AP1117E33G D4 HWRESET

IC702 IC103

IC100

LGE Internal Use Only

FRC IC => POWER MANAGEMENT


Ursa1/LGE7329

+12V EN +5V_EXT +1.8V_MEMC

IC707
MP2212DN L800 EN

MP2212

K6~J11 AVDD_DDR1~7

IC706
+5V

+5V_ST

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
IC704
MP2305DS L715 EN EN L714 +3.3V +3.3V_MEMC L9 AVDD_MEMPLL SI4925 +5V_GENERAL EN L709 +3.3V_ST +1.26V_MEMC

Q706

MAIN IC => POWER MANAGEMENT

- 35 IC708
APE8953

POWER_ON/OFF, POWER_ON_DELAY

L803

E5~H6 VDDC_1~5

IC100
MSD3158 R248:100 MEMC_RESET

M11 RESET

IC801

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

LV1

400

520

540

804

820

910

A10

803

802

530

810

806

801

200

805

550

120

121

300

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

510

310

500

122

A2

- 36 -

LGE Internal Use Only

900

+1.26V_VDDC
L101 BLM18PG121SN1D

+3.3V_VDDP

+3.3V

IC100 MSD3159GV
+1.8V_DDR
008:L28 MEMC_RXE0+ MEMC_RXE0MEMC_RXE1+ MEMC_RXE1MEMC_RXE2+ MEMC_RXE2MEMC_RXE3+ MEMC_RXE3MEMC_RXE4+ MEMC_RXE4D4 HWRESET XIN XOUT PCMD0/CI_D0 PCMD1/CI_D1 TESTPIN/GND PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 SPI_DI SPI_DO /SPI_CS SPI_CK AD11 R227 001:I11 SPI_CK 33 AE12 R226 001:E12 SPI_CS 33 AF12 001:E11 SPI_DO PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7 PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2 PM GPIO assigned followed by CoP R257 100 RL_ON R119 OPT 100 LED_MOVING/LED_R R108 OPT 100 POWER_DET DBG_TX INV_CTL GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137 OPT R272 100 GPIO_PM4/GPIO138 Interrupt for ISP Wake up in STB Mode POWER_EN 008:AA28 LVDS_SEL Flash_WP_1 SDA1 SCL1 +5V_GENERAL I2C for Tuner_5V LHSYNC2/I2S_OUT_MUTE/RX1 LVSYNC/GPIO133 UART2_TX/SCKM GPIO79/LVSYNC2/TX1 UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87 DDCA_CLK GPIO42/PCM2_CE_N GPIO43/PCM2_IRQA_N OPT AA8 TS_DATA[0] TS_DATA[1] TS_DATA[2] TS_DATA[3] TS_DATA[4] TS_DATA[5] TS_DATA[6] TS_DATA[7] 010:AC19;010:AK20 TS_SYNC 010:AC20;010:AK19 TS_VALID 010:AC19;010:AK19 TS_CLK R2173 100 100 100 004:K12 AV_CVBS_DET SIDEAV_DET COMP2_DET 004:AC22 004:AB27 010:D9 010:AJ26 VSB_CTRL VSB_RESET COMP1_DET DSUB_DET VGA_EEPROM_WP R235 100 100 100 100 100 100 OPT100 004:AJ16 R243 R110 R2188 R249 R250 R2189 R111 100 004:AA7 004:W16 R2175 R2174 R2176 100 R2206 OPT RESET IC107 NCP803SN293 2 1 GND 3 VCC Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4 AB19 AA20 AC19 AA19 C10 B11 A9 C11 C9 B10 A10 B9 A11 TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7 TS0_SYNC TS0_VLD TS0_CLK TS1_D0 PWM0 PWM1 PWM2 AA13 PWM3 ET_TXD1 SAR0 SAR1 SAR2 SAR3 ET_TX_EN ET_MDC ET_MDIO 0 GPIO44 GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102 E16 E17 E18 F7 L9 L10 L11 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 POWER_ON_DELAY C R188 B E IC103 MAX810RTR 3 1 VCC 3 +3.3V_ST 4 2 1 GND R228 100 R236 100 C R230 B E C212 4.7uF 10V R247 10K S5/S6_Reset C213 10uF 6.3V Q106 2SC3052 GPIO67 GPIO68 10K A7 B8 2 RESET M10 M11 M12 M13 M14 M15 M16 100 100 USB_CTL 004:AM28 M17 M18 N4 N9 N10 N11 N12 N13 N14 R224 R242 OPT GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 N15 N16 N17 N18 P4 +3.3V A_DIM NC_1 1 48 47 46 45 NC_25 NC_26 PCM_A[0-7] NC_27 C181 1uF C182 1uF OPT 2 NC_28 NC_2 NC_3 3 4 1K NC_4 PWM_DIM 007:N20 R186 R189 R195 007:B19 R185 IC102 HY27US08121B-TPCB +3.3V P9 1.2K 100 OPT 100 1.2K P10 001:N11;001:AB24 001:N10;001:AB24 001:N10;001:AB24 001:N10;001:AB24 PWM0 PWM1 PWM2 PWM3 P11 P12 GND_40 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 AVDD_DDR_1 AVDD_DDR_2 AVDD_DDR_3 AVDD_DDR_4 GND_41 AVDD_DDR_5 G12 G13 H13 H14 H15 AVDD_AU W7 +1.8V_DDR C215 0.1uF C219 0.1uF VDDP_1 VDDP_2 VDDP_3 VDDP_4 VDDP_5 VDDP_6 VDDP_7 VDDP_8 H9 H10 H11 H12 N20 P20 W9 W10 R118 0 OPT R187 0 +5V_ST+3.3V_ST 4.7K Q105 2SC3052 VDDC_9 L12 L13 L14 L15 L16 L17 L18 M9 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 D16 D17 D18 D19 D20 H18 H19 H20 J20 K20 L20 M20 P7 R7 T7 T22 U7 U20 U22 V7 V22 W11 W12 W19 W20 W22 Y22 100 100 100 D7 E11 E8 E10 D6 D5 C5 100 100 100 100 100 OPT 22 OPT D10 D9 AC11 ET_COL IRIN ET_RXD1 ET_RXD0 ET_TX_CLK ET_TXD0 004:B27 004:B27 0 E4 0 C4 F4 B4 A4 PWM2 001:N10;001:AL12 PWM3 Stand-by GPIO(SAR[0-3]) KEY1 +3.3V_ST KEY2 001:H16 R2190 R2191 LED_MOVING/LED_R SB_MUTE 0 IR R274 OPT 004:G23;004:AD4 R112 R196 R200 R248 R221 ERROR_OUT NTP_MUTE D6 R255 BIT_SEL R2160 001:H15 R179 R284 0 OPT R285 0 OPT R286 0CL40 R287 0 OPT D7 E11 B9 001:H15 R219 007:B24 R201 R193 -----------------------------HIGH LOW D6 LCD PDP D7 FRC Non-FRC E11 MovinLED BlinkinLED B9 FullHD WXGA -----------------------------R28010K 10K R281 10K R282 Except_CL40 10K R283 LED_B AMP_RST MEMC_RESET 008:Y7 001:H16 006:K19 POWER_DET 001:N10;001:AL12 AD12 PWM1 TS1_CLK 001:N10;001:AL12 AB12 PWM0 TS1_VLD 001:N11;001:AL12 AB13 TS1_SYNC AF10 R2187 22 R2196 7.5K TS_DATA[0-7] 010:AD18 DDCA_DA UART_RX2 UART_TX2 AF5 R2194 B6 R268 22 OPT 22 OPT 1K E A6 R267 22 OPT OPT R132 F10 USB_OCD 004:AN27 F9 22 OPT R2186 R2195 15K UART2_RX/SDAM DDCR_DA DDCR_CK C6 0 AC18 R2185 R203 OPC_EN 0 0 1 : A I 8 ; 0 1 0 : N 2 5 FE_TUNER_SDA 22OPC_EN E7 R202 5V_HDMI_2 5V_HDMI_3 5V_HDMI_1 OPT 0 +12V 0 0 1 : A I 8 ; 0 1 0 : N 2 5 FE_TUNER_SCL R2200 10K OPT R2192 0 C B OPT C B OPT 1K E OPT Q102 2SC3052 R2199 2.2K Q103 2SC3052 R2201 30K R262 OPT 30K R2205 OPT POWER_DET 001:AR32 +24V +3.3V_ST R2203 12V_DET 0 001:C11 001:AO6;001:AO5 001:AO5;001:AO5 F6 OPT ISP_TXD POWER_DET H5 100 R245 R241 100 RL_ON G5 100 DBG_RX OPT R246 100 R261 100 R244 F5 100 POWER_ON/OFF R251 E5 PANEL_CTL R259 100 SB_MUTE 100 +3.3V_ST R237 OPT R253 10K AB10 USB_DP 004:AL26 AC10 USB_DM USB 004:AL26 A5 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14 PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_AD15 F_RBZ R240 0 R239 0 R238 100 R220 100 R2193 100 B5 R222 OPT R223 OPT 0 0 AE11 R225 001:I10 SPI_DI 33 E6 R232 0 20pF A3 R231 0 C187 B3 AC16 AA15 AA16 008:N28 MEMC_RXO0+ MEMC_RXO0MEMC_RXO1+ PCM_A[0-7] Y12 Y13 PCM_A[0] AB16 AC15 AC14 AB14 AC12 AB8 AC13 AA9 AB5 AA4 V4 Y4 AB9 AA7 AD6 AA14 AB18 Y5 AB15 AA10 AC8 5V_HDMI_4 AA5 AR103 T4 AE6 AF6 AR102 22 AA11 AC9 Y14 22 R215 R216 0 0 22 22 22 22 V5 W5 J2 J1 AC21 AB21 R217 R218 R191 R192 R183 R184 0 D11 0 F8 AB11 AA12 /PF_CE0 /PF_CE1 /PF_OE 006:D6 SPDIF_OUT PF_ALE PF_WP /F_RB 001:S11 001:R7 001:T8 /PF_WE 001:T7 001:S10 001:T8 001:S10 W4 R171 010:N21 FE_SIF SIFMO 010:N20 R2220 0 R172 47 47 AC7 PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] 008:M28 MEMC_RXOC+ MEMC_RXOCPCM_A[7] PCM_A[6] PCM_A[5] 008:M28 MEMC_RXO1MEMC_RXO2+ MEMC_RXO2MEMC_RXO3+ MEMC_RXO3MEMC_RXO4+ MEMC_RXO4Y11 Y10 AC6 008:O28 008:N28 008:N28 008:N28 008:N28 008:M28 008:M28 008:L28 008:M28 MEMC_RXEC+ MEMC_RXECR252 1M 20pF X100 12MHz C186 S5/S6_Reset 001:V17 C165 330uF 4V C168 0.1uF C171 0.1uF C174 0.1uF C177 0.1uF C180 0.1uF C185 0.1uF C190 0.1uF C194 0.1uF C199 0.1uF C2105 0.1uF C2110 0.1uF C2136 10uF 008:L28 008:K28 008:K28 008:K28 008:K28 008:J28 008:J28 008:J28 008:J28 008:J28 008:K28

C163 330uF 4V

C166 0.1uF

C169 0.1uF

C172 0.1uF

C175 0.1uF

C178 0.1uF

C183 0.1uF

C188 0.1uF

C193 0.1uF

C198 0.1uF

C2104 0.1uF

C2109 0.1uF

C2115 0.1uF

C2119 0.1uF

C2137 0.1uF

C2120 0.1uF

C2123 0.1uF

C2124 0.1uF

C2125 0.1uF

C2126 0.1uF

C2127 0.1uF

C2128 0.1uF

C2129 0.1uF

C2130 0.1uF

C2131 0.1uF

C2132 0.1uF

C2133 0.1uF

C2134 0.1uF

C2135 10uF

C164 0.1uF

C167 0.1uF

C170 0.1uF

C173 0.1uF

C176 0.1uF

C179 0.1uF

C184 0.1uF

C189 0.1uF

C195 0.1uF

C196 0.1uF

F1 RXACKP F2 RXACKN

LVA0P

AE16

LVA0M

AD16

G2 RXA0P G3 RXA0N

LVA1P

AD15

LVA1M

AF16

LVA2P

AF15

H3 RXA1P G1 RXA1N H1 RXA2P

LVA2M

AE15

LVA3P

AD13

H2 RXA2N A1 DDCD_A_DA

LVA3M

AF14

IC100 MSD3159GV

LVA4P

AF13

B2 DDCD_A_CK A2 HOTPLUG_A

LVA4M

AE13

LVACKP

AE14

LVACKM

AD14

C3 RXBCKP B1 RXBCKN C1 RXB0P

C2 RXB0N

LVB0P

AE20

LVB0M

AD20

LVB1P

AD19

D2 RXB1P D3 RXB1N E3 RXB2P

LVB1M

AF20

LVB2P

AF19

D1 RXB2N E1 DDCD_B_DA

LVB2M

AE19

LVB3P

AD17

F3 DDCD_B_CK E2 HOTPLUG_B

LVB3M

AF18

LVB4P

AF17

HDMI_CLK+

005:AB20

AE8

LVB4M

AE17

RXCCKP

HDMI_CLK-

005:AB20

AD8

RXCCKN

HDMI_RX0+

005:AC20

AD9

LVBCKP

AE18

RXC0P

005:AB20

AF8

LVBCKM

AD18

RXC0N

HDMI_RX0HDMI_RX1+ 004:AA6 SIDEAV_R_IN SIDEAV_L_IN R178 OPT 33 COMP1_R_IN COMP1_L_IN AV_R_IN AV_L_IN COMP2_R_IN COMP2_L_IN PC_R_IN PC_L_IN 004:AA5 004:AL12 004:AL11 004:K13 004:K14 004:Y12 004:Y11 004:AO20 004:AO21 OPT 33 R2172 OPT 33 R2123 OPT 33 R2124

005:AC20

AF9

RXC1P

HDMI_RX1-

005:AC20

HDMI_RX2+

005:AD20

AUR0

AA3

C134

2.2uF

HDMI

HDMI_RX2-

005:AD20

AE9 RXC1N AE10 RXC2P AD10 RXC2N

HDMI_SDA

005:AA20

R142

AUL0

Y1

C135

2.2uF

HDMI_SCL

005:AA20

R143

AE7 DDCD_C_DA AF7 DDCD_C_CK

AUR1

AE1

C136

2.2uF

R144

0 100

AUL1

AF3

C137

AE3

C138

2.2uF 2.2uF

HDMI_CEC

005:R27

R145

100

AD7 HOTPLUG_C J 3 CEC

AUR2 AUL2

AE2

C139

AUR3

AA1

C140

2.2uF 2.2uF

AUL3

AB1

C141

2.2uF

AUR4

AB2

C142

2.2uF

N2 HSYNC0/SC1_ID N1 VSYNC0/SC1_FB

AUL4

AC2

C143

2.2uF

COMP1_PR

004:AL13

R120

47

C101

0.047uF

AUR5

AB3

C144

2.2uF

COMP1_Y

004:AL15

R121

COMP1_PB

004:AL14

R122

47 47

C102

C103

0.047uF 0.047uF

P2 RIN0P/SC1_R R3 GIN0P/SC1_G

AUL5

AC3

C145

2.2uF

R123

470

1000pF

R1 BIN0P/SC1_B P3 SOGIN0/SC1_CVBS

POWER DETECT

R124

47

C104 C105

0.047uF

COMPONENT1

R125

R126

47 47

C106

C107

0.047uF 0.047uF

P1 RINM T3 BINM

SIF0P

W3

C146

0.1uF

R2 GINM

SIF0M

W2

C147

0.1uF

G6 GPIO_PM5/INT1/GPIO139 H6 GPIO_PM6/INT2/GPIO140 AC17 GPIO131/LDE/SPI_WPn1 AB17 GPIO130/LCK AF11 GPIO132/LHSYNC/SPI_WPn AA18 GPIO60/PCM2_RESET/RX1 AA17 GPIO62/PCM2_CD_N/TX1

R107 10K

R109 10K

DSUB_HSYNC

004:R23

R146

22

K3

SPDIF_IN

F11

OPTR269

22

HSYNC1/DSUB_HSYNC

DSUB_VSYNC

004:R24

R149

K2

SPDIF_OUT

E9

R159

100

DSUB_R

004:R20

R127

47

DSUB

DSUB_G EEPROM_SCL 001:H6;001:O16;001:AO6 EEPROM_SDA 001:H5;001:O16;001:AO6 SDA0 SCL0 I S P D e b u g p o r t f o r S 5ISP_RXD 004:AB26 001:AR31;004:AB26 OPT OPT R174 22K R175 22K R176 22K R177 22K DBG_RX DBG_TX 006:K18 006:K13 MS_LRCK MS_SCK MS_LRCH 006:K13 006:K13 C152 22pF OPT C155 22pF OPT C157 22pF OPT C150 0.1uF C148 0.1uF C149 0.1uF C154 22pF OPT AUDIO_MASTER_CLK OPT OPT OPT OPT OPT ISP_TXD R173 22K OPT C158 0.01uF C159 0.01uF C156 0.01uF OPT C160 0.01uF 001:AO6;001:AO7 001:AO7;001:AO7

004:R21

R128

C113 C108

22 0.047uF

VSYNC1/DSUB_VSYNC L1 RIN1P/DSUB_R L3 GIN1P/DSUB_G

DSUB_B

004:R23

R129

C114

0.047uF 0.047uF

K1

R130

47 47 470

C109

1000pF

BIN1P/DSUB_B L2 SOGIN1

AUOUTR0/HP_ROUT

AF1

R2197 10K OPT R2198

AUOUTL0/HP_LOUT

AF2

COMP2_PR

004:Y13

R133

0.047uF

V1

AUOUTR1/SC1_ROUT

AD3

R164OPT 100 R165OPT 100 R166OPT 100

RIN2P/COMP_PR+

COMP2_Y OPT R170 22K

004:Y15

R134

47 47

C115 C116

AUOUTL1/SC1_LOUT

AD1

COMP2_PB

004:Y14 C151 0.01uF OPT C153 0.01uF

R135

R136

47 470

C117

0.047uF 0.047uF

AUOUTR2/SC2_ROUT

AC1

R167OPT 100 R168OPT 100

C110

1000pF

V2 GIN2P/COMP_Y+ U1 BIN2P/COMP_PB+ V3 SOGIN2

AUOUTL2/SC2_LOUT

AD2

R169OPT 100

J 5 VSYNC2 OPT

CVBS COMPONENT2

OPT OPT

TV/MNT

001:AR30

R105 4.7K

SPI_CS

CS#

+3.3V

001:AR36

$0.76

VCC

L110

R103 10K

33

0.1uF C126

Flash_WP_1

3.9K

R156

R158

1K

0.1uF

C131

EEPROM
VCC_1 12 13 14 15 16 17 18 19 30 29 28 27 26 25 NC_16 NC_17 NC_18 NC_19 I/O0 PCM_A[0] 20 21 22 23 24 I/O1 PCM_A[1] 31 I/O2 PCM_A[2] 32 I/O3 PCM_A[3] 33 NC_20 34 NC_21 35 NC_22 36 VSS_2 C162 0.1uF 37 VSS_1 NC_9 NC_10 CLE 10K R153 ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15 VCC_2 R157 +3.3V OPT R154 1K

OPT

L104

R197 4.7K OPT

R260 3.3K

R2106 4.7K OPT

R2107 1.2K

R2108 1.2K

R2109 1.2K

$0.418
R180 OPT 0 R258 10K R155 1K

0 R2125 A1

C100 0.1uF

+3.3V_ST

R2110 1.2K

R266 3.3K

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
0 R2204 20V_DET R2202 7.5K

I2S_OUT_MCK

A8

R160

22

R113

47

C111

0.047uF

I2S_OUT_WS

B7

R161

22

SIDEAV_CVBS_IN

004:AA8

R114

47

C112

0.047uF

U3 CVBS1/SC1_CVBS U2 CVBS2/SC2_CVBS

I2S_OUT_BCK

C7

R162

22

AV_CVBS_IN

004:K11

R137

47

C118

0.047uF

I2S_OUT_SD

D8

R163

22

R138

47

C119

0.047uF

T1 CVBS3/SIDE_CVBS T2 VCOM1

I2S_IN_SD

C8

R115 OPT 47

C120

0.047uF

M1

CVBS4/S-VIDEO_Y

+3.3V

R116 OPT 47

C121

0.047uF

M2

CVBS6/S-VIDEO_C

VCLAMP

K4

C127

0.1uF

R140

47

C124

0.047uF

N3 CVBS5

REFP

H4

R141

47

C125

0.047uF

M3

REFM

J4

CVBS7

REXT

G4

R152

390

1%

FE_VMAIN

010:N16

R139

C122

0.047uF

W1

CVBS0/RF_CVBS

VCOMO

010:I14

R117

100 100

C123

0.047uF

Y3

VCOM0

AUCOM

AE5

C128

0.1uF

R229

R2122

100

Y2

AUVRM

AE4

CVBSOUT0/SC2_MNTOUT

AA2

AUVRP

AF4

C129

10uF 10V

CVBSOUT1

AUVAG

AD4

C130

0.1uF

C132

C133

1uF 4.7uF

Close to IC as close as possible

IC100 MSD3159GV

+1.26V_VDDC VDDC : 970mA

MAIN IC

Audio Mute S5 Reset

HDCP EEPROM

+5V

+3.3V_ST

IC105 CAT24WC08W-T

R106 4.7K

A0

8 VCC

Addr:10101--

R131 3.3K

A1

$0.199WP

R2221 4.7K

A2

6 SCL

R181

22

001:H6;001:AB28;001:AO6 EEPROM_SCL

D102 ENKMC2838-T112 A1

001:AB22

VSS 4

5 SDA

AMP_MUTE

006:W10

SB_MUTE

R182

A2

22 EEPROM_SDA 001:H5;001:AB28;001:AO6

001:AB20

NTP_MUTE

SCHEMATIC DIAGRAM

+3.3V_VDDP

VDDP : 102.3mA

Serial FLASH MEMORY for BOOT

MCU BOOT STRAP

NAND FLASH MEMORY

PWM Dimming

AVDD_AU : 36.11mA
+3.3V L109 BLM18PG121SN1D

+3.3V

IC101 MX25L3205DM2I-12G+3.3V

10 : BOOT 51 11 : BOOT RISC

+3.3V

001:AR36

SPI_DO

R104

SO

HOLD#

R150

1K

WP#

SCLK

SPI_CK

OPT

PWM0

1386 WON

R147

1K

001:AB24;001:AL12

OPT

P13 P14 P15 P16 P17 P18 R4

GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 R9 R10 R11 R12 R13 R14 R15 +5V_GENERAL +3.3V R16 R17 R18 T5 T9 T10 T11 T12 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 FE_TUNER_SDA GND_63

AVDD_DDR_6 AVDD_DDR_7 AVDD_DDR_8 AVDD_DDR_9 AVDD_DDR_10 AVDD_DDR_11 AVDD_MEMPLL_1 AVDD_MEMPLL_2 AVDD_MEMPLL_3

H16 W14 W15 W16 W17 W18 H17 T20 V20 C200 C206 0.1uF 0.1uF

R101 OPT B 0

GND

4 NC_5 5 44 43 42 41 40 39 38 PRE NC_23 C161 10uF6.3V NC_24 I/O4 PCM_A[4] I/O5 PCM_A[5] I/O6 PCM_A[6] 6 7 8 9 I/O7 NC_6 R/B RE CE NC_7 10 11 NC_8 PCM_A[7]

SI

001:AR35 001:AR36 SPI_DI

OPT

R151

1K

/PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit

PWM1

001:AB24;001:AL12

AR100

R102

R148

1K

AVDD_MEMPLL : 23.77mA
+3.3V L106 BLM18PG121SN1D C209 0.1uF C216 0.1uF +3.3V L108 BLM18PG121SN1D AVDD_LPLL R20 +3.3V_AVDD_MPLL AVDD_MPLL H7 C191 0.1uF C211 0.1uF C201 10uF 10V

Q100 KRC103S

22

/F_RB 001:AB29 /PF_OE 001:AB29 /PF_CE0 001:AB30

I2C

AVDD_LPLL : 4.69mA
C218 0.1uF

+3.3V

IC104 AT24C512BW-SH-T

AR101

0 R2127 A0

VCC

AVDD_MPLL : 7.76mA
001:AR28;010:N25 CH6 001:AR29;010:N25 008:C22 008:C22 010:AK21 010:AK22 J7 FE_TUNER_SCL MEMC_SDA MEMC_SCL R198 R199 0 0 001:AB28;001:AO7 T13 T14 T15 AVDD_33_1 GND_64 GND_65 SDA0 SCL0 GND_66 AVDD_33_2 AVDD_33_3 AVDD_33_4 K7 L7 M7 C204 001:AB28;001:AO6 C205 C202 C203 C207 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

+3.3V L103 BLM18PG121SN1D

AVDD_33 : 281mA
C214 0.1uF

WP

0 R2126 A2

SCL

33 R2111

/PF_CE1 001:AB30 PF_ALE 001:AB29 /PF_WE 001:AB29

EEPROM_SCL 001:O16;001:AB28;001:AO6

GND

SDA

R2112

22

EEPROM_SDA 001:O16;001:AB28;001:AO6

PF_WP 001:AB29

Q101 KRC103S OPT

CH2

T16 FE_DEMOD_SDA FE_DEMOD_SCL R2100 R2101 0 0 OPT R2113 OPT R2114 005:AH5 005:AI5 006:K12;004:K27 006:K12;004:K27 TDA9996_SDA TDA9996_SCL SDA_SUB/AMP SCL_SUB/AMP R2102 R2103 R2104 R2105 0 0 0 0 001:AO6;001:AR30 0 0 HW IIC EEPROM_SDA EEPROM_SCL T17 T18 U5

GND_67 GND_68 GND_69 GND_70

AVDD_33_5

N7 +3.3V W8 L107

33

AVDD_DM : 0.03mA

CH1

001:H5;001:O16;001:AB28 001:H6;001:O16;001:AB28

W13 Y21 AA23

AVDD_DM GND_71 GND_72 GND_73 AVDD_USB

H8

+3.3V L102 BLM18PG121SN1D C192 SDA1 SCL1 C208

BLM18PG121SN1D C217 C210 0.1uF 0.1uF

CH4

0.1uF 001:AO5;001:AR30

0.1uF

AVDD_OTG : 22.96mA

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

4 4

COMPONENT1/2,AV1
+3.3V

+3.3V +5V_ST +3.3V

AV
COMPONENT1 RGB PC
C A2 R1283 1K COMP2_DET D1231 ADMC5M03200L_AMODIODE 5.6V
IC1200

COMPONENT2
D1223 ENKMC2838-T112 A1 001:AR23

R1204 10K R1237 10K R1240 1K COMP1_DET 001:AR23 R1277 10K

Neet to pull up 3.3V

AV_CVBS_DET D1220 ADMC5M03200L_AMODIODE 5.6V R1253 4.7K R1262 10K R1269 100 VGA_EEPROM_WP 001:AR22
SCL

R1212 1K

001:AR23

JK1206

PPJ227-01 001:D31
A0 AT24C02BN-10SU-1.8

D1244 C1206 ADMC5M03200L_AMODIODE 100pF 5.6V 50V OPT R1249 4.7K C1228 0.1uF 16V

9N COMP2_Y
A1 2 7 W P 1 8 VCC

[GN]E-LUG

5K

[GN]O-SPRING-L

6K
A2 3 6

[GN]CONTACT-L 001:D27 ISP_RXD


SDA

D1226 R1286 ADUC30S03010L_AMODIODE 75 30V ZENER 001:AB27 001:AB27;001:AR31


GND 4 5

4E COMP1_Y R1257 22 R1265 22 ISP_TXD

[GN]O-SPRING-S

3E D1208 R1241 ADUC30S03010L_AMODIODE 75 30V ZENER 001:D31 COMP2_PB 001:D27 COMP1_PB D1224 D1222 ADMC5M03200L_AMODIODE ADMC5M03200L_AMODIODE 5.6V 5.6V OPT OPT C1222 18pF 50V C1223 18pF 50V

[GN]CONTACT-S

9 M

[BL]E-LUG

7J [BL]C-LUG-L

8D

[BL]C-LUG-S

D1227 R1287 ADUC30S03010L_AMODIODE 75 30V ZENER

9L D1209 R1242 ADUC30S03010L_AMODIODE 75 30V ZENER ZENER ZENER D1216 D1207 ADUC30S03010L_AMODIODE ADUC30S03010L_AMODIODE 30V 30V

[YL]E-LUG

4L

[YL]O-SPRING-S

AV_CVBS_IN

3L 001:D31 0 001:D29 DSUB_VSYNC COMP2_PR 0 001:D28 DSUB_HSYNC 001:D29 COMP1_PR D1210 R1243 ADUC30S03010L_AMODIODE 75 30V 001:D28 R1234 75 C1216 OPT R1292 10K COMP2_L_IN R1294 12K 001:R32 COMP1_L_IN ZENER R1235 75 C1217 OPT D1218 ADUC30S03010L_AMODIODE 30V 001:D29 DSUB_G D1229 ADMC5M03200L_AMODIODE 5.6V R1289 470K ZENER C1237 1000pF 50V 001:R33 D1217 ADUC30S03010L_AMODIODE 30V DSUB_B ZENER ZENER D1228 R1288 ADUC30S03010L_AMODIODE 75 30V ZENER R1233 R1232

[YL]CONTACT-S

R1215 D1245 75 ADUC30S03010L_AMODIODE 1% 30V

C1252 47pF 50V

001:D26

8C

[RD]C-LUG-S

9G

[WH]E-LUG

ZENER

7H

[RD]C-LUG-L

8 M

[WH]C-LUG-S_1

L1217 BG2012B080TF

R1211 10K

AV_L_IN

ZENER

7G

[WH]C-LUG-L

D1243 R1208 ADMC5M03200L_AMODIODE 470K 5.6V

C1251 100pF 50V

R1210 12K

8B R1256 12K R1244 470K

[WH]C-LUG-S_2

R1252 10K

+5V_GENERAL

9F D1211 ADMC5M03200L_AMODIODE 5.6V ZENER 001:R33 R1291 10K COMP2_R_IN R1293 12K C1238 1000pF 50V 001:D29 R1236 75 C1218 OPT DSUB_R ZENER D1219 ADUC30S03010L_AMODIODE 30V D1230 R1290 ADMC5M03200L_AMODIODE 470K 5.6V ZENER R1251 10K COMP1_R_IN D1212 R1245 ADMC5M03200L_AMODIODE 470K 5.6V ZENER C1221 1000pF 50V R1255 12K 001:R32 C1220 1000pF 50V

[RD]E-LUG

4N

[RD]O-SPRING-S_1

L1218 BG2012B080TF

R1205 10K

AV_R_IN

ZENER

3A

[RD]CONTACT-S_2

11

12

13

14

JK1202

001:D26 SIDEAV_CVBS_IN

PPJ218-01

4A 001:AR23 SIDEAV_DET

[YL]O_SPRING

C1227 100pF OPT

IN / OUT

5A

[YL]CONTACT

10K R1248

R1254 1K

2A

[YL]U_CAN

D1221 ADMC5M03200L_AMODIODE 5.6V

C1219 100pF

JK1201 KCN-DS-1-0089

3B

[WH]C_LUG

2B 001:R33 SIDEAV_L_IN

[WH]U_CAN

L1206 BG2012B080TF

R1259

4C

[RD]O_SPRING

5C

[RD]CONTACT

2C 001:R33 SIDEAV_R_IN

[RD]U_CAN

D1213 R1246 ADMC5M03200L_AMODIODE 470K 5.6V ZENER L1207 BG2012B080TF

C1224 100pF

10K

PC AUDIO
JK1205 PEJ024-01 3 6A 7A 4 5 7B 6B E_SPRING T_TERMINAL1 B_TERMINAL1 PC_R_IN 001:R31 R_SPRING T_SPRING B_TERMINAL2 T_TERMINAL2 SHIELD_PLATE 8 D1235 C1241 R1298 ADMC5M03200L_AMODIODE 100pF 470K 5.6V 50V OPT R1301 10K R1304 12K R1307 0 PC_L_IN 001:R32 D1234 C1240 ADMC5M03200L_AMODIODE R1297 100pF 5.6V 470K 50V OPT R1300 10K R1303 12K R1305 0

50V

R1264 12K

R1258

10K

D1214 ADMC5M03200L_AMODIODE 5.6V ZENER

R1247 470K

C1225 100pF 50V

R1263 12K

RS-232C

+3.3V_ST

C1229 0 . 3 3 u F

L1209 BLM18PG121SN1D

R1279 4.7K

R1278 4.7K

C1234 0.1uF 16V

IC1201 MAX3232CDR
1 6 RxD 220 TxD 3 8 C1243 47pF 50V 4 9 5 10 R1299 220 7 2 R1302

R1276

JK1203 KCN-DS-1-0088

DBG_RX

C1231

0.1uF

C1+

16

VCC

R1275

DBG_TX

C1230

0.1uF

V+

15

GND

R1284 100 OPT

C1-

14

DOUT1

C1232 50V 220pF C1235

0.1uF

C2+

13

RIN1

SPDIF OPTIC JACK


JK601 JST1223-001 +3.3V +5V_GENERAL 1 GND R638 1K

C2-

12

ROUT1

R1285 100 OPT

ADUC30S03010LADUC30S03010L D1236 C1242 50V D1237 220pF 30V 47pF 30V C1239 50V OPT OPT

V-

11

DIN1

C1233 0 . 1 u F

+5V_ST +5V_ST
3.3K R1274

DOUT2

10

DIN2

male
C B E SPDIF_OUT OPT 100K R1272

Fiber Optic

VINPUT

8 Q1200 2SC3052

R1216 0 3.3K R1218

Serial Port
001:W29 OPT D610 C660 0.1uF 50V

RIN2

ROUT2

VCC

FIX_POLE

C 10K IR R1217 OPT E B OPT

100K R1273 Q1201 2SC3052

R1281 100

R1282 100

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

D1215 30V ZENER

R1238 75

+3.3V

10

16

SIDE_AV

ADUC30S03010L_AMODIODE

L1208 BG2012B080TF

15

OPT 0 R1268

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
R1270 10K DSUB_DET R1271 1K D1225 ADMC5M03200L_AMODIODE 5.6V

3N

[RD]CONTACT-S_1

R1206 D1242 470K ADMC5M03200L_AMODIODE 5.6V

C1250 100pF 50V

R1207 12K

5F

[RD]O-SPRING-L

6F

[RD]CONTACT-L

4A

[RD]O-SPRING-S_2

+3.3V_ST

+3.3V_ST 001:AU28;005:AI18;005:AK27 5V_HDMI_4 R519 0 +3.3V_ST L500 CB3216PA501E L501 BLM18PG121SN1D +1.8V_AMP +1.8V_HDMI +3.3V +3.3V_HDMI 68K R528 IC501 SSM6N15FU R529 9.1K C530 0.1uF C504 0.1uF

* HDMI CEC

5V_HDMI_3

R513 0 JACK_GND 20 19 HPD OPT 3.6K +5V_POWER DDC/CEC_GND SDA GATE2 5 DRAIN2 2 GATE1 SCL 005:H8;005:H26;005:H17;005:L27;005:AM11 NC 0 SOURCE2 4 3 CEC_REMOTE 005:AH20 CK-_HDMI4 C503 0.1uF 16V 0 CEC CLKR527 CLK_SHIELD CLK+ GND OPT 0 R596 0 R597 DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD +3.3V_HDMI DATA1+ DATA2DATA2_SHIELD DATA2+ 0 R526 005:AF20 D2+_HDMI4 R544 0 0 R599 0 R598 0 R595 GND 0 R593 0 R594 R525 R523 0 OPT 6 HDMI_CEC 1 CEC_REMOTE R520 005:H8;005:H26;005:H17;005:R8;005:AM11 R518 0 0 DRAIN1 SOURCE1 001:C32 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C505 0.1uF 16V R524 R1506 1K OPT OPT OPT

R1500 47K OPT

22

OPT

HPD3 005:AD6

R1507 47K 005:AI20 OPT HPD4 R521 1K

3.6K

R501

17

OPT

JP502

R510

16

OPT

JP503

VR500 AVRL161A1R1NT

14

R509

13

0 R590

12

005:H8;005:H17;005:L27;005:R8;005:AM11 CEC_REMOTE 005:AE6 CK-_HDMI3

10

0 R591

CK+_HDMI3 005:AF6 D0-_HDMI3

005:AH20 CK+_HDMI4 005:AG20 D0-_HDMI4

0 R586

0 R587

005:AF6 D0+_HDMI3 005:AF6 D1-_HDMI3 005:AG20 D0+_HDMI4 005:AG20 D1-_HDMI4

0 R592

0 R588

005:AF6 D1+_HDMI3 005:AG6 D2-_HDMI3 005:AF20 D1+_HDMI4 005:AF20 D2-_HDMI4

0 R589

005:AG6 D2+_HDMI3

20 KJA-ET-0-0032 JK503 GND 0.1uF C511 0.1uF C513 0.1uF C514 0.1uF C515 0.1uF C516 0.1uF C517

21

QJ41193-CFEE1-7F JK502

GND

UI_HW_PORT3 SIDE_HDMI_PORT4

+3.3V_ST C525 +3.3V_HDMI 5V_HDMI_1 0 HPD4 5V_HDMI_2 0.1uF C526 0.1uF C527 0.1uF C528 0.1uF 5V_HDMI_4 R534 47K 47K 47K DDC_SDA_2 DDC_SCL_2 C518 0.1uF 16V DDC_SDA_1 DDC_SCL_1 R546 47K R535 R547 R541 2K

001:Y20;005:W27;005:AK15 5V_HDMI_2

D2+_HDMI4

D2-_HDMI4 D1+_HDMI4 D1-_HDMI4

HDMI_CLK-

HDMI_CLK+

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

CK+_HDMI4 CK-_HDMI4 DDC_SCL_4 DDC_SDA_4

HDMI_RX2-

18

C502 0.1uF 16V

OPT

R502

3.6K OPT

R506

VR504 AVRL161A1R1NT OPT

17

OPT

1K R517

14

VR501 AVRL161A1R1NT

OUT_D0-

OUT_D0+

VSS_12

OUT_D1-

OUT_D1+

VDDO[1V8]

OUT_D2-

OUT_D2+

VSS_11

VDDC[1V8]_3

RXD_D2+

RXD_D2-

VDDH[3V3]_8

RXD_D1+

RXD_D1-

VSS_10

RXD_D0+

RXD_D0-

VDDH[3V3]_7

RXD_DC+

RXD_DC-

RXD_DDC_CLK

RXD_DDC_DAT

RXD_5V

7 99 98 97 96 95 VSS_1 1 2 3 4 5 6 7 8 9 10 11 12 RXA_CCK-_HDMI1 CK+_HDMI1 D0-_HDMI1 D0+_HDMI1 D1-_HDMI1 D1+_HDMI1 RXA_C+ VDDH[3V3]_1 RXA_D0RXA_D0+ VSS_3 RXA_D1RXA_D1+ VDDH[3V3]_2 RXA_D2D2-_HDMI1 D2+_HDMI1 RXA_D2+ VDDH[1V8]_1 NC +5V_ST R543 For Only TDA9996 ES3 C507 0.1uF 0 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 5V_HDMI_1 OUT_C+ OUT_CVDDO[3V3] R537 47K 47K 47K DDC_SDA_4 DDC_SCL_4 DDC_SCL_3 DDC_SDA_1 DDC_SCL_1 HPD1 VDDC[1V8]_1 RXA_HPD RXA_5V RXA_DDC_DAT RXA_DDC_CLK VSS_2 R559 47K OUT_DDC_DAT DDC_SDA_3 R561 C509 0.1uF 16V R538 OUT_DDC_CLK 100 R536 R558

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

R573

005:AM13 D0+_HDMI2 005:AM13 D1-_HDMI2

RXD_HPD

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

OPT

OPT

VSS_4

VSS_5

R500

RXB_5V

RXB_C-

RXB_C+

RXB_D0-

RXB_D1-

RXB_D0+

RXB_D1+

RXB_D2-

3.6K OPT

RXB_D2+

RXB_HPD

VDDH[3V3]_3

VR502 AVRL161A1R1NT

RXB_DDC_CLK

+1.8V_HDMI

14

R505

005:H26;005:H17;005:L27;005:R8;005:AM11 0 OPT C519 0.1uF 16V 5V_HDMI_3 R550 C506 0.1uF 16V C508 0.1uF 16V C510 0.1uF 16V 0 C520 0.1uF 16V

13

0 R577

12

CEC_REMOTE 005:Z12 CK-_HDMI1

11

0 R579

10

0 R580

RXB_DDC_DAT

R504

R548 0MODE

15

VDDH[3V3]_4

VDDC[1V8]_2

DDC_SDA_1 005:R20;005:Y13 DDC_SCL_1

CDEC_DDC

VDDC[3V3]

16

SDA/SEL1

JP501

SCL/SEL0

R503

VR505 AVRL161A1R1NT OPT

JP500 005:R19;005:Y13

VSS_6

17

TEST

PD

18

C500 0.1uF 16V

1K R515

19

R1504 1K

50

0 R555

R551

005:Z12 CK+_HDMI1 005:Z12 D0-_HDMI1

+3.3V_HDMI C512 0.1uF 16V R552 4.7K OPT R553 R549 OPT R554 HPD3 OPT

0 R581

0 R578

005:Z12 D0+_HDMI1 005:Z11 D1-_HDMI1

0 R582

0 R583

D0-_HDMI3

DDC_SDA_3

DDC_SCL_3 CK-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

0 R584

005:Z10 D2+_HDMI1 Net Labels changed for HDMI3

TDA9996_SDA

21

QJ41193-CFEE1-7F GND JK500

UI_HW_PORT1

HDMI S/W For MSTAR Platform

VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options in case HDMI Switch doesnt support ESD protection

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TDA9996_SCL

20

CK+_HDMI3

D2-_HDMI3 D2+_HDMI3

005:Z11 D1+_HDMI1 005:Z11 D2-_HDMI1

C521 0.1uF

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
VR507 AVRL161A1R1NT OPT VR506 AVRL161A1R1NT JP506 005:AH20;005:AM25 DDC_SDA_4 JP507 005:AH20;005:AM25 DDC_SCL_4 AVRL161A1R1NT VR508 MMBD301LT1G D500 R539 R533 R545 R542 2K HDMI_SDA HDMI_SCL HDMI_RX2+ D0+_HDMI4 D0-_HDMI4 +1.8V_HDMI C522 0.1uF 16V C524 0.1uF 16V C529 0.1uF 16V 5V_HDMI_3 5V_HDMI_4 5V_HDMI_2 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 VDDH[1V8]_2 R556 R12K VSS_9 RXC_D2+ RXC_D2VDDH[3V3]_6 RXC_D1+ RXC_D1VSS_8 RXC_D0+ RXC_D0VDDH[3V3]_5 RXC_C+ RXC_CRXC_DDC_CLK RXC_DDCC_DAT RXC_5V RXC_HPD CEC VSS_7 VDDS[3V3] CDEC_STBY INT/HP_CTRL XTAL_OUT XTAL_IN R560 0 OPT Net Labels changed for HDMI2 0 R557 HPD2 CEC_REMOTE CK+_HDMI2 CK-_HDMI2 DDC_SCL_2 DDC_SDA_2 12K C523 0.1uF 16V D2+_HDMI2 D2-_HDMI2

18

OPT

C501 0.1uF 16V

15

R511

VR503 AVRL161A1R1NT OPT

1K R516

R522 1K

OPT

19

DDC_SDA_3 005:AE6;005:AF26 DDC_SCL_3 005:AE6;005:AF25

11

0 R585

005:AE6

R514 0

R1503 47K OPT

22

005:AM11 HPD2

OPT

OPT

19

R1501 1K

JP504 005:Y26;005:AM12

16

JP505

15

R507

DDC_SDA_2 005:Y25;005:AM12 DDC_SCL_2

R508

005:H8;005:H26;005:L27;005:R8;005:AM11

13

0 R569

12

CEC_REMOTE 005:AM12 CK-_HDMI2

11

0 R570

10

0 R571

005:AM12 CK+_HDMI2 005:AM13 D0-_HDMI2

0 R572

0 R574

HDMI

0 R575

005:AM14 D1+_HDMI2 005:AM14 D2-_HDMI2

0 R576

005:AM14 D2+_HDMI2

D1+_HDMI2 D1-_HDMI2

20

21

IC502 TDA9996HL

D0+_HDMI2 D0-_HDMI2

QJ41193-CFEE1-7F GND JK501

UI_HW_PORT2

EDID Pull-up

+3.3V_ST

001:AT28;005:Q22;005:AA14 5V_HDMI_1

R512 0

R1505 47K OPT

22

005:Z13 HPD1

OPT

OPT

IC601

+3.3V

AZ1117H-1.8TRE1(EH13A)

+1.8V_AMP

INPUT

ADJ/GND

C646 22uF 16V

OUTPUT

C647 0.1uF 16V

GND

C648 0.1uF 16V C649 22uF 16V

+24V

L602 MLB-201209-0120P-N2 +24V_AMP R613 5.6 C629 1000pF 50V C633 0.47uF 50V 1S C630 1000pF 50V C636 0.1uF 50V R618 4.7K 3.3 C640 0.01uF 50V R614 5.6 D602 1N4148W 100V OPT 1F R622 3.3 2S C635 0.1uF 50V 4.7K R621 R617 R625 3.3 D601 1N4148W 100V OPT L606 DA-8580 EAP38319001 2F C639 0.01uF 50V

+24V_AMP SPK_L+ 006:AH11

SPEAKER_L

C615 0.01uF 50V C620 0.1uF 50V C621 0.1uF 50V 0.01uF 50V C643

C602 68uF 35V

+3.3V C618 22000pF 50V C619 1uF 16V

C614 22000pF 50V

SPK_L- 006:AH10

L605

R601 BST1B 44 43 VDR1B

100

PGND1A_2 OUT1A_2

PGND1A_1 OUT1A_1

PVDD1A_2

PVDD1A_1

PVDD1B_2 OUT1B_2

PVDD1B_1 OUT1B_1 47 46 45

PGND1B_2

MLB-201209-0120P-N2

56

55

54

53

52

51 50

49

C606 1000pF 50V R603 0 C611 1uF 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 +24V_AMP R626 3.3 C626 0.1uF 50V C623 22000pF 50V 0.1uF 50V 0.1uF 50V C644 0.01uF 50V C627 C645 29 PGND2B_2 30 OUT2B_1 31 OUT2B_2 5.6 NTP-3100L 32 PVDD2B_1 R616 33 PVDD2B_2 D604 1N4148W 100V OPT EAN60664001 34 PVDD2A_1 C632 1000pF 50V 35 PVDD2A_2 1S 1F 36 OUT2A_1 IC600 37 OUT2A_2 C631 1000pF 50V 38 PGND2A_1 5.6 C634 0.47uF 50V 39 PGND2A_2 50V R615 D603 1N4148W 100V OPT L607 DA-8580 EAP38319001 2F 2S 40 BST2A AD DVSS_1 VSS_IO CLK_I VDD_IO DGND_PLL AGND_PLL LFM AVDD_PLL DVDD_PLL TEST0 C607 1000pF 50V R602 3.3K C608 0.1uF VDR1A 10V RESET 2 41 VDR2A C624 22000pF BST1A 1 42 NC C622 16V 1uF 48

R600 0

MLB-201209-0120P-N2

MLB-201209-0120P-N2

DVDD

WCK

BCK

FAULT

MONITOR_0

MONITOR_1

C610 10uF 10V C613 0.1uF 50V

C617 1uF 10V

001:W26 R605 R606 R607 POWER_DET 0 R608 100 100 OPT R627 100 100

MS_LRCH

R604 OPT C616 33pF 50V

100

001:W26

MS_LRCK

001:W26

MS_SCK

001:AI5;004:K2 7 SDA_SUB/AMP

001:AI5;004:K2 7 SCL_SUB/AMP

MONITOR_2

PGND2B_1

Mstar Application

DVSS_2

SDATA

VDR2B

BST2B

+1.8V_AMP C628 68uF 35V

SDA

SCL

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
PGND1B_1 SPK_R+ 006:AH10 C641 C637 0.1uF 50V R619 4.7K 0.01uF 50V R623 3.3 R624 C638 0.1uF 50V R620 4.7K 3.3 C642 0.01uF 50V

001:AB21

AMP_RST

001:W26 AUDIO_MASTER_CLK

+1.8V_AMP

+1.8V_AMP

L604

SPEAKER_R

L603

C604

100pF 50V

SPK_R- 006:AH9

AUDI

C600 10uF 16V

C601 0.1uF 50V

C603 10uF 16V

C605 0.1uF 50V

C609 33pF 50V +3.3V_ST

C612 33pF 50V

WAFER-ANGLE L608 120-ohm

R610 0 Q600 2SC3052 AMP_MUTE 10K 001:D16 E B R612 C

R611 10K

006:AJ22

SPK_L+ L609 120-ohm 006:AJ20 SPK_LL611 120-ohm 006:AJ18 SPK_R+ L610 120-ohm 006:AJ16 SPK_R-

4 SPK_L+ 3 SPK_L2 SPK_R+ 1 SPK_RP600

MCLK SDATA WCK BCK TP is necessory R609 Monitor0_1_2 TP is necessory 33K OPT

2A => 5A

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

ROM LIPS & POWER B/D


+5V_+12V
+12V +3.3V_ST +5V_ST C749 AP1117E33G-13 C756 10uF IN 3 2 OUT C710 0.1uF 16V 1 ADJ/GND 0.1uF POWER_ON_DELAY +3.3V_ST +5V_ST OPT C742 10uF
G1 2 7 D1_1 S2 3 6 D2_2 S1 1 8 D1_2 Q706 SI4925BDY

Stand-by +3.3V
L708 CB3216PA501E +5V CB3216PA501E L715 CB3216PA501E +5V_ST +3.3V_ST

+5V_ST IC702

0 R776

RT1P141C-T112 L701 Q701 BLM15BD121SN1 +5V_ST L709 CB3216PA501E 1 001:AR32 C B +3.3V_ST +3.3V_AVDD_MPLL L703 BLM18PG121SN1D R739 47K 12V_TCON R732 22K R740 47K C B C E Q704 2SC3052 E R735 22K C748 22uF 25V Q705 2SC3052 C755 1uF 25V C1130 L728 C717 0.1uF 16V C740 4.7uF 25V OPT C OPT 120K R701 POWER_ON_DELAY 0 C E B OPT 2SC3052 Q707 E R758 +5V_ST 0 R743 0 B 001:AR32
G2 4 5 D2_1

R775 OPT

L724
C758 0.1uF 16V +5V_GENERAL C704 C705 10uF 0 . 1 u F 10V 16V C708 10uF 6.3V

+3.3V_ST OPT R772 0 R771 RL_ON 0 OPT 10K R747 10K R730 560 Q703 2SC3052 C752 22uF 16V R729 10K C757 10uF 10V C760 0.1uF 16V

Q700 2SC3052 E

R702 10K POWER_ON/OFF

OPT R773 0

P700 FW20020-24S

NC

PWR ON

GND R757 POWER_ON/OFF 001:AR31;010:AG9 +24V R728 10K R725 120K OPT C762 4.7uF 6.3V OPT

GND

GND

GND

+12V

5.2V

7 C726 220uF 16V OPT C730 22uF 16V

5.2V

L706

5.2V

10

5.2V

CB4532UK121E

L707 MLB-201209-0120P-N2

GND

11

12

GND

R718

C711 15pF 50V


OPT

3 R708 33K 2 OPT R706 20K R703 0

OPT R705 10K

R726 10K C761 4.7uF 6.3V OPT

12V

13

14

12V

GND

15 OPT R727 10K B

16

GND

OPT C731 22uF 16V C721 68uF 35V PANEL_CTL 001:AR32 C723 1uF 35V +5V_GENERAL R717 3.3K +3.3V_ST C B 0 OPT R753 10K INV_CTL 001:AR31 R721 10K OPT R719 10K R720 10K R713 C727 68uF 35V

C728 0.1uF 50V

C722 47uF 25V

17

18

24V

L704 CB4532UK121E

C720 0.1uF 50V OPT

24V NC A.DIM

19

20

INV ON

21

22

NC

L700 BG2012B080TF

23

24

Err OUT PWM_DIM

C719 0.1uF 50V

A_DIM 001:AF12

R704 4.7K C706 1uF 25V

C707 16V 0.1uF OPT

R715 6.8K

C735 0.1uF 50V OPT E

100 R714

OPT Q702 2SC3052

001:AF12 OPC_OUT2

C Q708 2SC3875S(ALY) B E OPT

+3.3V +5V_EXT
+12V 001:AR30;007:B6;007:T3;007:AG9;007:AM26;007:AO16 +3.3V_FE POWER_EN R755 10K 1/10W OPT L727 BLM18PG121SN1D +3.3V C780 0.1uF 16V ERROR_OUT 001:AB20

Except_OPC R760 R707 4.7K

PWM_DIM 001:AF12

L705

001:AR30;007:B6;007:T18;007:T3;007:AG9;007:AO16 OPT R754 100 POWER_EN R1508 2K Close to IC C772 560pF R746 1/10W 5%

OPC_OUT1 001:AF12

0 OPT R756 100

C725 1uF 25V OPT

BG2012B080TF

R709 0 OPT

C709 0.1uF 16V OPT

+5V

CB3216PA501E L716

OPT R733 10K Vout=0.8*(1+R1/R2)

CB3216PA501E L722

IC704 MP2212DN
82K R741 1 SW_2 Placed on SMD-TOP NR8040T3R6N Placed on SMD-TOP SW_1 C751 10uF 6.3V R774 100K 5% 8 EN/SYNC 1uF 10V C782 L714 BLM18PG121SN1D

BLM18PG121SN1D L720

CB3216PA501E L725

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
+3.3V_MEMC FB

R761 OPC_EN

+1.26 Core for Saturn5


R770 Close to IC C724 R1 560pF 56K 1/10W 50V 1% FB

IC706 MP2212DN

68K R1 Close to IC +5V_EXT 1 GND 8 EN/SYNC L718 3.6uH 2 IN 7 SW_2 NR8040T3R6N 3 6 SW_1

+5V_GENERAL

465 mA @85% efficiency


GND 2 7 R769 18K R2 1/10W 1%

Close to IC R762 13K R2 1/8W 1%

GND

L710 3.6uH

+3.3V IN 3 6 VCC C765 22uF 16V

D701 OPT

CB3216PA501E L711 C746 0.1uF C750 22uF 16V


D700 OPT 4 5 BS C741 10nF 50V R737 R734 10 1/10W 1% 47

C753 0.1uF 16V

BS OPT C768 22uF 16V 100V 1N4148W_DIODES

VCC

C718 10nF 50V R749 47 R745 10 1/10W 1%

C773 22uF 16V 3225

C774 0.1uF 16V

C747 0.1uF 16V PI Result +5V_GENERAL OPT R748 10K 1/10W

MAX 3A
+1.26V_VDDC
OPT

OPT R731

R738 1/10W 10K

Vout=0.8*(1+R1/R2) Placed on SMD-TOP

10K 1/10W

C732 22uF 16V C733 22uF


100V 1N4148W_DIODES

Close to IC R736

C790 OPT 0.1uF 16V

POWER

Close to IC

IC705 MP2212DN 1600 mA GND GND GND GND GND


3A, DCR=0.025 ohm L717 BLM18PG121SN1D

24K 1% 1/8W

C737 1uF 10V

R723 R782 22K 560pF 1/10W 50V 1%

R1

$0.07 4.9A 0.0150OHM 34MHZ

+5V_GENERAL

FB

EN/SYNC

GND

C734 1uF 10V

R2

R722 75K 1/8W 1%

GND

SW_2

L726 3.6uH

NR8040T3R6N C793 0.1uF

Placed on SMD-TOP

IN

3 C792 22uF 16V Placed on SMD-TOP

SW_1

C OUT

C786 22uF

C787 22uF

OPT

D703 OPT

BS

VCC

C IN

100V 1N4148W_DIODES

C789 10nF 50V

C791 22uF 16V

R742

+1.26 Core for URSA


+5V_GENERAL

+1.8V_MEMC for URSA DDR


415 mA @85% efficiency

R724

47

10 1/10W 1% OPT R716 100 Replaced Part R2 POWER_EN 1% 1/10W 30K R750 1% 1/10W 27K R751

C788 1uF 16V

Vout=0.8*(1+R1/R2) +1.26V_MEMC

IC708 APE8953MP
EN 8 FB 1 GND

OPT R765 100

POWER_EN

450 mA
R1 R752 33K 1/10W 1%

+5V_EXT
Replaced Part R763 Vout=0.8*(1+R1/R2) 25V 0.01uF C779 10K 1/10W Close to IC R764 0 C781 560pF 50V R766 390K 1/8W 1% Close to R1 FB R2

+1.8V for Saturn5 DDR


1.5mA +1.8V_MEMC C770 1uF 16V C766 OPT VCNTL 6 VOUT_2 3 VOUT_1 BLM18PG121SN1D L719 VIN 5 4 7 2 POK

+3.3V

IC701 SC4215ISTRT

+1.8V_DDR

BLM18PG121SN1D NC_1 L702 C771 10uF 6.3V C759 10uF 6.3V Placed on SMD-TOP R744 1K

GND

R711 12K 1%

IC707 I CMP2212DN

400 mA + 600 mA
EN/SYNC 1 GND C754 10uF 6.3V Placed on SMD-TOP D702 OPT C IN C763 22uF OPT C764 22uF BS C778 10uF 6.3V 8 $0.07 4.9A 0.0150OHM 34MHZ +1.8V_MEMC 2 IN $0.24 7 SW_2 L712 3.6uH NR8040T3R6N 3 6 SW_1 About 1.84V

R710 3.3K

EN

ADJ

VIN

3 R1/R2 = 12K/20K => Vout=1.28

VO

R767 300K 1/8W 1%

C712 10uF 10V

C713 0.1uF 16V

NC_2 OPT C716 0.47uF 16V

NC_3

R712 9.1K 1%

C714 22uF 16V

C715 0.1uF 16V

C OUT

4 100V 1N4148W_DIODES

VCC

R781 10nF 50V R759 Placed on SMD-TOP R768 10 1/10W 1% 47 C767 1uF 16V

C776 22uF 16V

C777 22uF 16V

R1/R2 : 27K / 20K => Vout=1.88 R1/R2 : 15K / 12K => Vout=1.80 R1/R2 : 12K / 9.1K => Vout=1.85

Placed on SMD-TOP

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+5V_TU

R2232 0

L1003 500

OPT

C1008 0.01uF 25V

C1005 0.1uF 50V

C1007 0.1uF 50V

C1011 10uF 10V

C1013 220uF 16V

C1054 220uF 16V +5V_TU

L1006 500

OPT +3.3V_AVDD_PVSB

TDVW-H103F TU1001 1N4148W D1000 OPT R1075 VSB_RESET

OPT OPT C1051 C1052 10uF 0.1uF 10V 50V

OPT C1053 0.01uF 25V

+5V_TU

1 X1005 25MHz Close to tuner +3.3V_AVDD_PVSB IF_Short OPT +1.2V_DVDD_PVSB +3.3V_DVDD_PVSB L1009 CB3216PA501E L1011-*2 0 R1072 1M C1073 1uF 10V

NC_1 R1074 47K C1072 27pF 50V

NC_2

GND_1

C1071 27pF 50V

+B1

RF_AGC

NC[VT]

R1013 4.7K

R1017 4.7K

7 (I2C Channel 6) FE_TUNER_SDA FE_TUNER_SCL C1016 0.1uF 50V VDD_3 46 XM 45 VSS_3 44 XTALO 43 XTALI 42 R1068
XM VDD VSS OPM XTALI VSS33 VSSAD10 XTALO VDD33 SLIM_SCAN NRST

GND_2 L1011 220nH I F _ C o i l

9 OPT C1045 36pF 50V

CLOCK

R1022 22

R1027 0

10 OPM 38 NRST 37

AS

R1031 0

VCCAAD10A 48 VSSDAD10 47

12 R1033 0 100 R1061 OPT


VROA VINA2 VINA1 INCAP VSSAAD10A I2CSEL ANTCON VDD SDA NIRQ TPSOP TPCLK VDD33 SCL VSS VDD VSS VSS33 PLLAVDD PLLAVSS

DIF[+] C1006 47pF 5.1K PLLAVSS 36 PLLAVDD 35 VSS33_2 34 VSS_2 33 VDD_2 32 VSS_1 31 SCL 30 VDD33_2 29 SDA 28 NIRQ 27 TPSOP 26 TPCLK 25 C1074 OPT OPT R1076 22R1077 IF_P IF_N R1064 100 R10650 L1012-*2 0 IF_Short FE_TUNER_SCL FE_TUNER_SDA 1K IF_AGC R1060 1K R1063
VSS33 TPERR RF OUT VDD33 TPVALID TPDATA[0] TPDATA[1] TPDATA[2] TPDATA[3] TPDATA[4] TPDATA[5] TPDATA[6] TPDATA[7]

R1032 0 L1002 270nH


VCCAAD10A

13

DIF[-]

14

OPT C1046 36pF 50V

IF_AGC

IF_AGC
L1012 220nH I F _ C o i l 0.1uF C1068 ANTCON7 VDD_1 8 +5V_TU INCAP 4 VSSAAD10A5 I2CSEL 6

IF_P

C1069 0.01uF 100 R1062 0 . 0 1 u FC1070

NC_1 1 VINA2 2 VINA1 3

15

+B2

16

SIF

17

NC_4

6.8uH

IC1004 LGDT3305

18

AUDIO

L1004 CM2012F6R8KT

VSS33_3 41 NC_2 40 VDD33_3 39

11

NC_3

OPT

C1015 100pF 50V

C1017 100pF 50V

OPT C1024 27pF 50V

OPT C1025 27pF 50V

IF_N

R1073 0

DATA

R1023 22

R1026 0

FE_DEMOD_SCL 22R1078 FE_DEMOD_SDA C1075 OPT

19

VIDEO

R1007 12K

R1009 OPT

R1010 470

R1003 0

20 C1066 0.1uF C1067 0.1uF +3.3V_DVDD_PVSB JP1007 JP1006 JP1005 JP1004 LD1000 PV

FE_SIF 001:W30

R1066 OPT I2CRPT_SCL 9 I2CRPT_SCL I2CRPT_SDA 10 R1067 OPT I2CRPT_SDA IFOUT 11 IF OUT RFOUT 12

SHIELD

C1009 0.01uF 50V

MStar Application

ISA1530AC1 Q1000

TPVALID 15 TPDATA[0] 16

VSS33_1 17 TPDATA[1] 18

TPDATA[2] 19 TPDATA[3] 20

TPDATA[4] 21 TPDATA[5] 22

TPDATA[6] 23 TPDATA[7] 24

TS_VALID TS_SYNC TS_CLK

TPERR 13 VDD33_1 14

R1008 10K

C PV 470 R1069

JTAG

AR1072 100 1/16W TS_SYNC TS_CLK TS_VALID

OPT

50V 0.1uF C1014

270 270 R1020 R1019

E Option for FM Rejection The value of coil & cap could be changed to optimized each

L1001 CM3216F100KE

ISA1530AC1 Q1001

R1006 10K OPT

C1012 0.047uF 50V

C1004 82pF 50V

OPT

TUNER

VCOMO 001:D24

MStar Application

10uH

VSB +3.3V B+ BLOCK


+3.3V_PVSB +3.3V_AVDD_PVSB +3.3V_PVSB

TS_DATA[0-7]

TS_DATA[0-7]

L1013 MLB-201209-0120P-N2 +3.3V_DVDD_PVSB

VIN C1026 0.1uF 50V C1030 0.1uF 50V C1028 10uF 16V 3216 C1032 C1033 0.1uF 0.1uF 50V 50V

2 4.7K R1001 VSB_CTRL R1002 1K EN

VO R1014 1 3 GND 5 ADJ 15K R1015 8.2K

C1023 10uF 16V 3216

GND2

IC1002

C1002 100uF 16V

C1003 0.1uF 50V

KIA78R05F

C1018 100uF 16V

C1020 0.1uF 50V

VC

GND1

VOUT

+12V +5V_TU

VIN

NC

001:AR30;007:AH18 POWER_EN

VSB +1.0V B+ BLOCK


R1030 100 OPT +1.2V_PVSB +1.2V_DVDD_PVSB NC_1

IC1000 SC4215ISTRT
GND 1 R1034 0 R1000 20K EN 8 +1.2V_PVSB

IC1003

AS7809DTRE1

INPUT

OUTPUT

L1010 BG2012B800

R1028 100

2 C1040 0.1uF C1041 0.01uF 25V

OPT

R2 2 1/4W 5% VIN C1038 10uF 16V 3216 C1000 2.2uF 16V C1001 2.2uF 16V C1043 C1044 0.1uF 0.1uF 50V 50V 7 ADJ

C1010 1uF 16V

3 NC_2

VO

NC_3

V0 = 0.8(R1+R2) / R2 C1019 100uF 16V

R1012 R1011 10K 20K

C1076 0.1uF 16V

C1077 100uF 16V

GND

C1034 0.1uF 16V

C1035 100uF 16V

C1036 0.33uF 16V

OPT C1037 0.1uF 16V

C1039 47uF 16V

R1

C1022 0.1uF 50V

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OPT

500 L1005 SC156515M-1.8TR

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
SIFMO001:W30
TS_DATA[0-7] TS_DATA[0] TS_DATA[1] TS_DATA[2] TS_DATA[3] 001:D24 TS_DATA[4] TS_DATA[5] TS_DATA[6] TS_DATA[7] AR1070 100 50V OPT

GND

R1004 2.2K

C1021 0.1uF

+5V_TU

R1016 47 OPT

MStar Application

OPT

R1005 0

R1018 0

R1021 0

FE_VMAIN

AR1071 100

+5V_EXT

IC1001

+3.3V_PVSB

+3.3V_FE

CB3216PA501E L1007 L1008 500

DDR2 1.8V By CAP - Place these Caps near Memory


+1.8V_DDR L1 BLM18PG121SN1D +1.8V_S_DDR

C23

10uF C31

C36

10uF C24

0.1uF C25

0.1uF C27

0.1uF C29

0.1uF C41

0.1uF C43 1%

C3

10uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C13

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C30

0.1uF C32

0.1uF C33

0.1uF C34

0.1uF

0.1uF C38

C5

C6

C7

C8

C9

C10

C11

C12

10uF C14

C15

C17

C19

C20

C21

0.1uF C35

0.1uF C37

0.1uF C39

+1.8V_S_DDR +1.8V_S_DDR 1K 1% +1.8V_S_DDR

R4

R23

0.1uF

1K 1%

1% 1K 1% 0.1uF

1000pF

R44 1K

C4

R5

G2

DQ1

A0

M8

H7

DQ2

A1

M3

H3

DQ3

C2

DDR_Hynix512 VREF J2

G8

DQ0

C16

C18

IC1 HYB18TC512160B2F-2.5
1K

1000pF

IC1-*1 H5PS5162FFR-S6C

R24

MSD3159GV
D15 VREF J2 DDR_Qimonda512 G2 TDDR_A[0] M8 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ6 DQ5 DQ4 DQ3 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 TDDR_A[1] TDDR_A[2] TDDR_A[3] TDDR_A[5] TDDR_A[12] 56 TDDR_A[7] TDDR_A[7] TDDR_A[8] TDDR_A[9] TDDR_A[10] TDDR_A[11] TDDR_A[12] A12 A11 A10/AP A9 A8 A7 TDDR_A[0] TDDR_A[2] TDDR_A[4] 56 TDDR_A[6] 56 56 TDDR_BA[0] BA0 L2 L3 A1 E1 CK CK /TDDR_MCLK TDDR_CKE ODT K9 CS RAS U25 /BDDR2_RAS R35 R36 /TDDR_CAS /TDDR_WE LDQS F7 UDQS B7 R37 56 56 56 /BDDR2_CAS /BDDR2_WE U24 AB24 /TDDR_RAS CAS WE L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 TDDR_DQS1_P LDM F3 TDDR_DQM0_P 56 TDDR_DQM1_P LDQS E8 56 56 TDDR_DQS0_N TDDR_DQS1_N NC4 TDDR_D[11] TDDR_D[12] TDDR_D[9] TDDR_D[14] AR8 BDDR2_D[4] BDDR2_D[3] BDDR2_D[1] BDDR2_D[6] BDDR2_D[15] BDDR2_D[8] BDDR2_D[10] BDDR2_D[13] AR9 BDDR2_D[7] BDDR2_D[0] BDDR2_D[2] BDDR2_D[5] 56 56 56 AR11 56 TDDR_D[4] TDDR_D[3] TDDR_D[1] TDDR_D[6] TDDR_D[15] TDDR_D[8] TDDR_D[10] TDDR_D[13] VDDL TDDR_D[7] TDDR_D[0] TDDR_D[2] TDDR_D[5] J1 +1.8V_S_DDR VSSDL J7 NC5 NC6 OPT R51 0 L1 R3 R7 VSSQ10 NC1 NC2 NC3 B2 A2 E2 R8 B8 A7 D2 D8 E7 F2 F8 H2 H8 VSSQ9 VSSQ8 VSSQ7 VSSQ6 UDQS A8 A3 E3 J3 N1 P9 VSS5 VSS4 VSS3 VSS2 VSS1 UDM B3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 CKE J8 K8 K2 J9 M9 R1 VDD5 VDD4 BA1 TDDR_BA[1] TDDR_A[8] TDDR_A[11] AR14 TDDR_A[6] A6 TDDR_A[5] A5 TDDR_A[4] A4 A3 A2 A1 A0 H7 DQ2 DQ1 G8 DQ0 AR13 BDDR2_A[9] ADDR2_A[0] B_DDR2_A0 AF26 BDDR2_A[1] BDDR2_A[10] AR12 BDDR2_A[5] BDDR2_A[12] BDDR2_A[7] BDDR2_A[0] BDDR2_A[2] BDDR2_A[4] BDDR2_A[6] BDDR2_A[11] R27 BDDR2_A[8] AC23 BDDR2_BA[0] R29 R30 R50 R31 TDDR_MCLK OPT 33 56 OPT 0 56 BDDR2_BA[1] AC24 AB22 V25 BDDR2_MCLK R28 56 TDDR_A[10] TDDR_A[1] T25 BDDR2_A[2] BDDR2_A[3] BDDR2_A[4] BDDR2_A[5] BDDR2_A[6] BDDR2_A[7] BDDR2_A[8] BDDR2_A[9] AF23 T24 AE23 R26 AD22 R25 AC22 AD23 BDDR2_A[10] R24 BDDR2_A[11] AE22 BDDR2_A[12] BDDR2_A[1] B_DDR2_A1 B_DDR2_A2 B_DDR2_A3 B_DDR2_A4 B_DDR2_A5 B_DDR2_A6 B_DDR2_A7 B_DDR2_A8 B_DDR2_A9 B_DDR2_A10 B_DDR2_A11 B_DDR2_A12 C13 T26 BDDR2_A[0] BDDR2_A[3] TDDR_A[3] TDDR_A[9] A_MVREF

1%

IC100 IC2 HYB18TC512160B2F-2.5

C40 C42 0 . 1 u F 1000pF

R47 1K

0.1uF

C1 0.1uF

C22 0.1uF

IC1-*2 HYB18TC512160CF-2.5

A2

M7

H1

DQ4

A3

N2

H9

DQ5

SDDR_D[0] SDDR_A[5] SDDR_A[3] SDDR_A[0] SDDR_A[1] SDDR_A[2] AR3 SDDR_A[9] SDDR_A[12] SDDR_A[7] AR2 ADDR2_A[0] ADDR2_A[2] ADDR2_A[4] 56 R21 56 ADDR2_A[11] ADDR2_A[8] R22 56 ADDR2_A[6] SDDR_A[0] SDDR_A[2] SDDR_A[4] SDDR_A[6] SDDR_A[11] SDDR_A[8] ADDR2_A[7] ADDR2_A[12] ADDR2_A[9] SDDR_A[3] SDDR_A[4] SDDR_A[5] SDDR_A[6] SDDR_A[7] SDDR_A[8] SDDR_A[9] SDDR_A[10] SDDR_A[11] SDDR_A[12] SDDR_A[10] 56 56 ADDR2_A[10] SDDR_A[1] ADDR2_A[1] ADDR2_A[3] ADDR2_A[5]

DQ0

G8

J2

VREF AR1

TDDR_D[0] TDDR_D[1] TDDR_D[2] TDDR_D[3] TDDR_D[4] TDDR_D[5] TDDR_D[6] TDDR_D[7] TDDR_D[8] TDDR_D[9] TDDR_D[10] TDDR_D[11] TDDR_D[12] TDDR_D[13] TDDR_D[14] TDDR_D[15] +1.8V_S_DDR

A4

N8

F1

DQ6

A5

N3

F9

DQ7

SDDR_D[1]

DQ1

DDR_Qimonda512_DieRevision VREF J2

G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 BA0 BA1 L2 L3 A1 E1 CK CK CKE J8 K8 K2 J9 M9 R1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

G2

A6

N7

C8

DQ8

A7

P2

C2

DQ9

SDDR_D[2]

DQ2

DDR_Qimonda512

H7

A8

P8

D7

DQ10

A9

P3

D3

DQ11

SDDR_D[3]

DQ3

H3

M8

A0

A10/AP

M2

D1

DQ12

A11

P7

D9

DQ13

SDDR_D[4]

DQ4

H1

M3

A1

A12

R2

B1

DQ14

B9

DQ15

SDDR_D[5]

DQ5

H9

M7

A2

BA0

L2

SDDR_D[6]

DQ6

F1

N2

A3

BA1

L3

A1

VDD5

E1

VDD4

SDDR_D[7]

DQ7

F9

N8

A4

CK

J8

J9

VDD3

CK

K8

M9

VDD2

SDDR_D[8]

DQ8

C8

N3

A5

SDDR_A[0-12]

CS

L8

A9

VDDQ10

RAS

K7

C1

VDDQ9

SDDR_D[11]

DQ11

D3

P8

A8

ADDR2_A[0-12]

K9

SDDR_D[0-15]

ODT

SDDR_D[10]

DQ10

D7

P2

TDDR_D[0-15]

C9

VDDQ6

LDQS

F7

E9

VDDQ5

SDDR_D[13]

DQ13

M2

A10/AP

BDDR2_A[0-12]

W E

K3

C7

VDDQ7

SDDR_D[12]

DQ12

D1

P3

TDDR_A[0-12]

150 R2

D8

VSSQ6

VDD1 /SDDR_CK SDDR_CKE A_DDR2_CKE B_DDR2_CKE U26 BDDR2_ODT R34 56 R10 56 ADDR2_CKE D23 AB23 BDDR2_CKE R33 56 /A_DDR2_MCLK /B_DDR2_MCLK R9 33 /ADDR2_MCLK R32 33

R1

K2

CKE

A14 V24 /BDDR2_MCLK

R45 150

D2

OPT

BDDR2_D[0-15]

NC1

A2

B2

VSSQ10

ADDR2_D[0-15]

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
VDD5 VDD4 VDD3 VDD2 VDD1 ODT CS RAS CAS W E K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 LDQS UDQS F7 B7 E9 G1 G3 G7 L D M U D M F3 B3 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

CKE

K2

R1

VDD1

SDDR_D[9]

DQ9

C2

N7

A6

A7

CAS

L7

C3

VDDQ8

A9

D9

UDQS

B7

G1

VDDQ4

G3

VDDQ3

SDDR_D[14]

DQ14

B1

P7

A11

G7

VDDQ2

L D M

F3

G9

VDDQ1

SDDR_D[15] SDDR_BA[0] A_DDR2_BA0 B_DDR2_BA0 B_DDR2_BA1 B_DDR2_BA2 B_DDR2_MCLK A_DDR2_BA1 A_DDR2_BA2 A_DDR2_MCLK SDDR_BA[1] D24 ADDR2_MCLK B14 SDDR_CK R8 33 ADDR2_BA[1] B24 R7 56 R49 OPT 0 R6 56 ADDR2_BA[0] C24

DQ15

B9

R2

A12

A_DDR2_A0 ADDR2_A[1] A22 A_DDR2_A1 ADDR2_A[2] B13 A_DDR2_A2 ADDR2_A[3] C22 A_DDR2_A3 ADDR2_A[4] A13 A_DDR2_A4 ADDR2_A[5] A23 A_DDR2_A5 ADDR2_A[6] C12 A_DDR2_A6 ADDR2_A[7] B23 A_DDR2_A7 ADDR2_A[8] B12 A_DDR2_A8 ADDR2_A[9] C23 A_DDR2_A9 ADDR2_A[10] B22 A_DDR2_A10 ADDR2_A[11] A12 A_DDR2_A11 ADDR2_A[12] A24 A_DDR2_A12

U D M

B3

LDQS

E8

A3

VSS5

+1.8V_S_DDR

UDQS

A8

E3

VSS4

L2

BA0

J3

VSS3

NC4

L1

N1

VSS2

VDD5

NC5

R3

P9

VSS1

A1

L3

BA1

NC6

R7

VDD4

E1

LDQS

E8

A3

VSS5

NC1

A2

B2

VSSQ10

VDD3

J9

J8

CK

VDD3 VDD2 VDD1

UDQS

A8

E3 J3 NC4 NC5 NC6 L1 R3 R7 B2 NC1 NC2 NC3 A2 E2 R8 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8 N1 P9

VSS4 VSS3 VSS2 VSS1

NC2

E2

B8

VSSQ9

NC3

R8

A7

VSSQ8

VDD2

M9

K8

CK

VSSQ7

VSSDL

J7

E7

VSSQ5

F2

VSSQ4

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

F8

VSSQ3

H2

VSSQ2

VDDL

J1

H8

VSSQ1

K9 SDDR_ODT R11 A_DDR2_ODT B_DDR2_ODT /B_DDR2_RAS /B_DDR2_CAS /B_DDR2_WE AB26 BDDR2_DQS0_P R38 R39 56 56 BDDR2_DQS1_P AA26 /A_DDR2_RAS /A_DDR2_CAS /A_DDR2_WE R12 R13 R14 56 /ADDR2_WE D22 56 /ADDR2_CAS D12 56 /ADDR2_RAS D13 56 /SDDR_RAS /SDDR_CAS /SDDR_WE ADDR2_ODT D14

ODT

VDDQ10

A9

L8

CS

VDDQ9

C1

K7

RAS

VDDQ8

IC2-*1

C3

L7

CAS

H5PS5162FFR-S6C

VDDQ7

C7

K3

WE

VDDQ6

C9

DDR_Hynix512 VREF J2

G8

DQ0

G2

DQ1

VDDQ5 SDDR_DQS0_P A_DDR2_DQS0 B_DDR2_DQS0 B_DDR2_DQS1 AC25 BDDR2_DQM0_P R40 R41 BDDR2_DQM1_P AC26 A_DDR2_DQS1 SDDR_DQS1_P R16 56 ADDR2_DQS1_P C17 R15 56 ADDR2_DQS0_P B18

E9

A0

M8

H7

DQ2

A1

DDR2

M3

H3

DQ3

VDDQ4

G1

F7

LDQS TDDR_DQS0_P

IC2-*2 HYB18TC512160CF-2.5
DDR_Qimonda512_DieRevision VREF J2 G8 G2 A0 M8 H7 H3 DQ0 DQ1 DQ2 DQ3

A2

M7

H1

DQ4

A3

N2

H9

DQ5

VDDQ3

G3

B7

UDQS

A4

N8

F1

DQ6

A5

N3

F9

DQ7

VDDQ2

G7 ADDR2_DQM0_P A_DDR2_DQM0 B_DDR2_DQM0 B_DDR2_DQM1 AB25 BDDR2_DQS0_N BDDR2_DQS1_N AR10 BDDR2_D[0] BDDR2_D[1] BDDR2_D[2] BDDR2_D[3] BDDR2_D[4] BDDR2_D[5] BDDR2_D[6] BDDR2_D[7] BDDR2_D[8] BDDR2_D[9] BDDR2_D[14] BDDR2_D[9] BDDR2_D[12] BDDR2_D[11] R43 R42 AA25 A_DDR2_DQM1 ADDR2_DQM1_P A19 C18 56

A6

N7

C8

DQ8

A7

P2

C2

DQ9

VDDQ1 SDDR_DQM0_P SDDR_DQM1_P R18 56 R17 56

G9

F3

LDM

VDDQ1

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 BA0 BA1 L2 L3 A1 E1 CK CK CKE J8 K8 K2 J9 M9 R1

DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

A8

P8

D7

DQ10

A9

P3

D3

DQ11

B3

UDM

A10/AP

M2

D1

DQ12

A11

P7

D9

DQ13

A12

R2

B1

DQ14

B9

DQ15

VSS5 SDDR_DQS0_N A_DDR2_DQSB0 B_DDR2_DQSB0 A_DDR2_DQSB1 B_DDR2_DQSB1 W25 AE26 W24 AF24 AF25 V26 AE25 W26 Y26 AD25 A_DDR2_DQ0 B_DDR2_DQ0 B_DDR2_DQ1 B_DDR2_DQ2 B_DDR2_DQ3 B_DDR2_DQ4 B_DDR2_DQ5 B_DDR2_DQ6 B_DDR2_DQ7 B_DDR2_DQ8 B_DDR2_DQ9 B_DDR2_DQ10 B_DDR2_DQ11 B_DDR2_DQ12 Y24 BDDR2_D[13] B_DDR2_DQ13 B_DDR2_DQ14 B_DDR2_DQ15 AD24 BDDR2_D[14] AA24 BDDR2_D[15] A_DDR2_DQ1 A_DDR2_DQ2 A_DDR2_DQ3 A_DDR2_DQ4 A_DDR2_DQ5 A_DDR2_DQ6 A_DDR2_DQ7 A_DDR2_DQ8 A_DDR2_DQ9 SDDR_DQS1_N AR4 SDDR_D[11] SDDR_D[12] SDDR_D[9] SDDR_D[14] SDDR_D[4] SDDR_D[3] SDDR_D[1] SDDR_D[6] AR5 ADDR2_D[8] ADDR2_D[9] C19 ADDR2_D[15] ADDR2_D[8] ADDR2_D[10] ADDR2_D[13] ADDR2_D[7] ADDR2_D[0] ADDR2_D[2] ADDR2_D[5] 56 56 AR7 C16 SDDR_D[15] +1.8V_S_DDR SDDR_D[10] SDDR_D[13] SDDR_D[7] SDDR_D[0] SDDR_D[2] SDDR_D[5] SDDR_D[8] 56 ADDR2_D[6] ADDR2_D[7] C15 ADDR2_D[1] ADDR2_D[6] C20 ADDR2_D[3] ADDR2_D[5] C14 ADDR2_D[4] ADDR2_D[4] C21 ADDR2_D[14] ADDR2_D[3] B21 56 AR6 ADDR2_D[9] ADDR2_D[2] A15 ADDR2_D[12] ADDR2_D[1] A21 ADDR2_D[11] ADDR2_D[0] B15 R20 56 ADDR2_DQS1_N B17 R19 56 ADDR2_DQS0_N A18

A3

E8

LDQS

BA0

L2

BA1

VSS4

L3

A1

VDD5

E3

A8

UDQS

E1

VDD4

VSS3

CK

J8

J9

VDD3

J3

CK

K8

M9

VDD2

VSS2

CKE

K2

R1

VDD1

N1

VSS1

P9

L1

NC4

VDD5 VDD4 VDD3 VDD2 VDD1

ODT

K9

R3 OPT R48 0

NC5

CS

L8

A9

VDDQ10

RAS

K7

C1

VDDQ9

R7

NC6

CAS

L7

C3

VDDQ8

W E

K3

C7

VDDQ7

C9

VDDQ6

LDQS

F7

E9

VDDQ5

VSSQ10

ODT CS RAS CAS W E

K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 LDQS UDQS F7 B7 E9 G1 G3 G7 L D M F3 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

B2

UDQS

B7

G1

VDDQ4

G3

VDDQ3

VSSQ9

B8

A2

NC1

G7

VDDQ2

L D M

F3

G9

VDDQ1

VSSQ8

A7

E2

NC2

U D M

B3

VSSQ7

D2

R8

NC3

LDQS

E8

A3

VSS5

VSSQ6

UDQS

A8

E3

VSS4

D8

J3

VSS3

VSSQ5

NC4

L1

N1

VSS2

E7

J7

VSSDL

VSSQ5 VSSQ4

U D M

B3

NC5

R3

P9

VSS1

VSSQ4

F2

LDQS

NC6

E8

A3

VSS5

R7

VSSQ3

F8

VSSQ3 VSSQ2 VSSQ1

UDQS

A8

E3 J3 NC4 NC5 NC6 L1 R3 R7 B2 NC1 NC2 NC3 A2 E2 R8 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8 N1 P9

VSS4 VSS3 VSS2 VSS1

NC2

E2

B8

VSSQ9

VSSQ2

H2

NC3

R8

A7

VSSQ8

D2

VSSQ7

VSSQ1

H8

J1

VDDL

Y25 BDDR2_D[10] AE24 BDDR2_D[11] AD26 BDDR2_D[12]

D8

VSSQ6

VSSDL

J7

E7

VSSQ5

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

F2

VSSQ4

F8

VSSQ3

H2

VSSQ2

VDDL

J1

H8

VSSQ1

ADDR2_D[10] B16 A_DDR2_DQ10 ADDR2_D[11] B20 A_DDR2_DQ11 ADDR2_D[12] A20 A_DDR2_DQ12 ADDR2_D[13] A16 A_DDR2_DQ13 ADDR2_D[14] B19 A_DDR2_DQ14 ADDR2_D[15] A17 A_DDR2_DQ15

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LGE Internal Use Only

P800 12V_TCON TF05-51S L807

SMD Gasket Option


R804 1M OPT C850 C849 3 4 5 6 R812 100 R813 BLM18PG121SN1D +3.3V_MEMC 9 10 URSA_B-[4] 11 12 13 14 15 URSA_BCKC804 10uF 10V URSA_B-[2] C806 10uF URSA_B+[2] C858 820 URSA_B+[1] URSA_B-[0] URSA_B+[0] 0.1uF C841 BIT_SEL 0.1uF URSA_B+[2] URSA_B-[2] URSA_BCK+ URSA_BCKURSA_B+[3] URSA_B-[3] URSA_B+[4] URSA_B-[4] C846 URSA_C+[0] 0.1uF URSA_C+[1] URSA_C-[1] URSA_C+[2] URSA_C-[2] URSA_CCK+ URSA_CCKURSA_C+[3] URSA_C-[3] URSA_C+[4] URSA_C-[4] URSA_D+[0] URSA_D-[0] URSA_D+[1] URSA_D-[1] PWM_DIM 0 C847 G9 L14 L15 L16 M16 F8 M15 M14 N16 N15 H6 N6 E12 D14 F12 E13 F13 G13 H13 J13 K12 [N13] [L9] [N5] [N4] [N12] L12 K13 M12 M13 L13 N14 N13 N12 J7 M11 T3 R3 P3 T4 R4 J10 P4 T5 R5 P5 T6 R6 P6 T7 L11 R7 P7 T8 R8 P8 N8 K10 F7 T9 R9 K7 P9 T10 K11 R10 P10 T11 R11 J11 P11 T12 R12 P12 H11 T13 R13 P13 T14 R14 P14 T15 R15 P15 T16 R16 P16 G6 LVD3P LVD3M LVD4P LVD4M VDDC_5 GPIO[24] GPIO[7] GPIO[6] GPIO[5] GPIO[4] GPIO[3] GPIO[2] GPIO[1] GPIO[0] PWM0 PWM1 CSZ SDO SDI SCK GPIO[30] GPIO[29] GPIO[28] M_SPI_CZ M_SPI_DO M_SPI_DI M_SPI_CK DQS[1] RESET
1

XTAL
1 0.1uF 2

001:R35

001:R35

001:R35

001:R36 001:R36

001:R35

001:R35

001:R34

001:R36

001:R37

001:R38

001:R38

001:R39

001:R38

001:R38

001:R37

001:R38

001:R39

001:R37

001:R39

001:R39

001:R34

001:R36

001:R36

GAS1 SMD_Gasket_1 X800 M_XTALI 0 0 8 : P 2 7 12MHz C801 +3.3V_MEMC 15pF R818 100 R819 C803 1uF 100 R820 100 L806 R821 URSA_B+[4] URSA_B-[3] URSA_B+[3] 100 R822 100 R823 100 C838 0.1uF URSA_BCK+ 8 L805 7 C848

008:P2 7 M_XTALO

MEMC_RXE4-

MEMC_RXE3-

MEMC_RXE2-

MEMC_RXE1-

MEMC_RXE0-

MEMC_RXO4-

MEMC_RXO3-

MEMC_RXO2-

MEMC_RXO1-

MEMC_RXE4+

MEMC_RXE3+

MEMC_RXE2+

MEMC_RXE1+

MEMC_RXE0+

MEMC_RXO4+

MEMC_RXO3+

MEMC_RXOC-

MEMC_RXO2+

MEMC_RXO1+

MEMC_RXEC+

T-GASKET_10X8

15pF

GAS3 SMD_Gasket_3 100 R814 100 R815 +3.3V_MEMC R816 100 R817 100 C836 0.1uF 100 URSA_ACK0.1uF C805 URSA_A+[0] URSA_B-[0] URSA_A-[0] URSA_A-[1] URSA_A-[2] URSA_A-[3] URSA_A-[4] URSA_B+[0] URSA_A+[1] URSA_A+[2] URSA_A+[3] URSA_A+[4] URSA_B+[1] URSA_B-[1]

GAS4 SMD_Gasket_4

L803

22uF 16V

BLM18PG121SN1D

T-GASKET_10X8

L804

GAS5 SMD_Gasket_5

BLM18PG121SN1D

BLM18PG121SN1D

T-GASKET_10X8

URSA_ACK+

+1.26V_MEMC

008:AF11 M_XTALO 008:AJ11 M_XTALI

T-GASKET_10X8

MEMC_RXOC+

MEMC_RXO0+

GAS2 SMD_Gasket_2

MEMC_RXEC-

MEMC_RXO0-

C800

22uF 25V

1000pF

T-GASKET_10X8

CB3216PA501E

16 17 18 19 20 21 22 23 24 OPT R833 0 25 26 27 28 29 30 31

C811

C813

10uF

C853 0 . 1 u F

C854 0 . 1 u F

C855 0 . 1 u F

C829

10uF

for FRC one-board


PI Result R825 URSA_B-[1]

C807

R835 XIN 0 B4 B5 C5 C6 B6 B7 C7 C8 B8 B9 B1 C1 C2 B2 B3 C3 A1 A2 A3 C4 A4 H8 A5 A6 A7 A8 H7 D4 D3 D5 D6 N7 G8 A9 C9 D9 F11 B14 E11 F10 C10 B10 B11 C11 C12 B12 D7 B13 C13 G11 K15 K16 A14 D13 D11 A10 A11 A12 A13 C14 D12 0.1uF C845 D8 GPIO_7 GPIO_11 GPIO_10 GPIO_3 URSA_A-[4] URSA_A+[4] URSA_A-[3] URSA_A+[3] LVB2P LVB2M LVBCKP LVBCKM LVB3P LVB3M LVB4P LVB4M AVDD_33_2 GND_4 LVC0P LVC0M LVC1P LVC1M LVC2P LVC2M LVCCKP LVCCKM LVC3P LVC3M LVC4P LVC4M LVD0P LVD0M LVD1P LVD1M URSA_C-[0] URSA_A-[2] URSA_A+[2] URSA_A-[1] URSA_A+[1] URSA_A-[0] URSA_A+[0] 0 OPC_OUT2 0 OPC_EN 0 OPC_OUT1 R846 E10 E3 [E1] [D1] B15 A15 A16 B16 C16 D15 D16 F9 G10 E15 E16 E14 F14 F16 F15 G15 G16 G14 VDDC_2 URSA_DQ[20] MDATA[20] H1 H16 H15 J15 J16 J14 K14 URSA_DQ[27] MDATA[27] J2 J3 GND_3 LVD2P LVD2M LVDCKP LVDCKM AVDD_33_1 URSA_D+[3] URSA_D-[3] URSA_D+[4] C844 URSA_D-[4] 0.1uF URSA_D+[2] URSA_DCK+ URSA_DCKURSA_D-[2] K1 K2 K6 K3 L1 J8 L2 L3 L6 L8 H10 M1 M2 L7 M3 N1 J9 N2 N3 L10 P1 R1 T1 T2 R2 P2 G7 L9 N5 N4 0.1uF +3.3V_MEMC LVDS_SEL 0.1uF MDATA[28] MDATA[25] MDATA[30] AVDD_DDR_2 DQM[3] DQM[2] 0.1uF C819 DQS[2] DQSB[2] AVDD_DDR_4 0.1uF VDDP_3 GND_8 DQS[3] DQSB[3] AVDD_DDR_5 URSA_DQ[31] MDATA[31] 0.1uF MDATA[24] GND_11 MDATA[26] MDATA[29] AVDD_DDR_6 URSA_DQ[23] MDATA[23] MDATA[16] MDATA[18] MDATA[21] MCLK[0] 0.1uF MCLKZ[0] GND_1 AVDD_MEMPLL MVREF ODT 0 . 1 u F C821 0.1uF WEZ RASZ CASZ DQM[1] MCLKE DQM[0] VDDC_3 BADR[1] BADR[0] C822 C824 URSA_DQ[16] URSA_DQ[18] URSA_DQ[21] C820 URSA_DQ[26] URSA_DQ[29] URSA_DQ[24] C826 GND_10 C818 URSA_DQ[28] URSA_DQ[25] URSA_DQ[30] H2 H3 J1 MDATA[19] MDATA[17] MDATA[22] URSA_DQ[19] URSA_DQ[17] URSA_DQ[22] C825 F6 H14 C15 D2 GPIO_5

10uF 10V C809

0.1uF C830

0.1uF

10uF 10V C840

RE4P RE4N

RE3P RE3N

RECKP RECKN RE2P RE2N

RE1P RE1N

RE0P RE0N

AVDD_LVDS_1 GND_6 RO4P RO4N

RO3P RO3N

ROCKP RO2P RO2N

ROCKN

RO1P RO1N

RO0P RO0N

AVDD_LVDS_2 GND_5 GPIO_13 XOUT

GPIO_14

GPIO_2 SDAM SCLM

GPIO_1

GPIO[25] GPIO_12 GPIO_9 GND_2 GPIO_8

AVDD_PLL LVA0P LVA0M

LVA1P LVA1M

LVA2P LVA2M

LVACKP LVA3P LVA3M

LVACKM

LVA4P LVA4M

GPIO_6 LVB0P LVB0M

GPIO_4

LVB1P LVB1M REXT D10

ISP_RXD_TR 001:L5 +3.3V_MEMC 001:L5ISP_TXD_TR SDAS E1 D1 GPIO[8] F1 GPIO[9] G1 GND_14 K8 VDDC_1 E5 GPIO[10] E2 GPIO[11] F2 GPIO[12] F3 GPIO[13] G2 GPIO[22] M4 GPIO[23] M5 GPIO[14] G3 GPIO[15] E4 C857 0.1uF 16V GPIO[18] H4 GPIO[19] J 4 GPIO[20] K4 GPIO[21] L4 C828 VDDP_2 J6 GND_7 0 . 1 u F0 . 1 u F H9 GND_15 K9 GPIO[16] F4 GPIO[17] G4 SCLS 100 100

R836

R808

1K

R837

0 0 1 : AMEMC_SDA I7 0 0 1 : A MEMC_SCL I7 0.1uF OPT R2219 LVDS_SEL0 C827 +3.3V_MEMC 1KOPT 1KOPT 1K

R838

R809 OPT

1K

1K

+3.3V_MEMC

R849 R848

R851 R850

GPIO12 Non M+S LVDS LOW M+S 42" Mini LVDS LOW M+S 47" Mini LVDS HIGH M+S 37" Mini LVDS HIGH URSA_ACKURSA_ACK+

GPIO14 LOW HIGH LOW HIGH

32 33 34 35 36 37 38 39 40 41 R847 OPC_EN R842 OPC_EN 0 R843 R845 OPC_EN OPT 0 42 43 44 45 46 OPT 47 R854 48 49 50 51 52

BLM18PG121SN1D

C816

10uF

+1.8V_MEMC

C815 10uF 10V

C808 22uF 16V

C810

10uF

C851

0.1uF C852

0.1uF

URSA_DQ[0-31]

1K

R826

SMW250-04

1K R828

OPT R827

1K R829

1K OPT

2.2K R204

2.2K R190

L801

BLM18PG121SN1D

C812

10uF

C814

0.1uF

DQS[0]

GND_9

GND_12

GND_16

GND_13

VDDP_1

DQSB[0]

DQSB[1]

GPIO[26] N9 GPIO[27] N10 GND_17 N11

VDDC_4

MCLK[1]

MADR[0]

MADR[2]

MADR[4]

MADR[6]

MADR[8]

MADR[1]

MADR[5]

MADR[9]

MADR[7]

MADR[11]

MADR[10]

MADR[12]

MADR[3]

MDATA[4]

MDATA[3]

MDATA[1]

MDATA[6]

MDATA[9]

MDATA[8]

MDATA[7]

MDATA[0]

MDATA[2]

MDATA[5]

MCLKZ[1]

MDATA[11]

MDATA[12]

MDATA[14]

MDATA[15]

MDATA[10]

MDATA[13]

AVDD_DDR_7

AVDD_DDR_3

AVDD_DDR_1

C842

C837

0.1uF

0.1uF

C839

0.1uF

C843

0.1uF

C831

C832

C833

10K R810

C834

C835

R824

10K R811

0.1uF

C817

URSA_A[0]

URSA_A[2]

URSA_A[4]

URSA_A[6]

URSA_A[8]

URSA_A[11]

URSA_A[1]

URSA_A[10]

URSA_A[5]

URSA_A[9]

URSA_A[12]

URSA_A[7]

C823 1uF

URSA_A[3]

IC800

C802

0.1uF

URSA_DQ[4]

URSA_DQ[3]

URSA_DQ[1]

URSA_DQ[6]

URSA_DQ[11]

URSA_DQ[12]

URSA_DQ[9]

URSA_DQ[14]

URSA_DQ[15]

URSA_DQ[8]

URSA_DQ[10]

URSA_DQ[13]

URSA_DQ[7]

URSA_DQ[0]

URSA_DQ[2]

GND

DIO

R807

56

M_SPI_DI 008:Y11 URSA_DQ[0-31] 009:D21;009:AL21

URSA_BA1

URSA_WEZ

URSA_BA0

URSA_DQS0

URSA_RASZ

URSA_CASZ

URSA_DQM1

URSA_DQM0

URSA_DQSB0

URSA_DQS1

URSA_A[0-12]

URSA_DQSB1

URSA_DQ[5]

URSA_MCLKE

URSA_MCLK1

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

URSA_MCLKZ1

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
IC801 LGE7329A

L802

C856 0.1uF 16V

PI Result

BLM18PG121SN1D

L800

009:Q13 URSA_DQM3 009:Q13 URSA_DQM2

009:Q13

URSA_DQS2

LVDS/ FRC

009:Q12 URSA_DQSB2

009:Q13

URSA_DQS3

009:Q12 URSA_DQSB3

ISP Port for MEMC

P801 TF05-41S

P101

2 3 4 5 6 7

+5V_GENERAL

URSA_D-[4] URSA_D+[4] URSA_D-[3] URSA_D+[3] URSA_DCKURSA_DCK+

URSA_Debug

+3.3V_MEMC

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

009:Q16 URSA_MCLK

ISP_RXD_TR

URSA_MCLKZ 009:Q15

008:C23

009:Q15;009:Y15 URSA_ODT

URSA_D-[2] URSA_D+[2] URSA_D-[1] URSA_D+[1] URSA_D-[0] URSA_D+[0]

ISP_TXD_TR

008:C23

URSA_C-[4] URSA_C+[4] URSA_C-[3] URSA_C+[3] URSA_CCKURSA_CCK+

24 25 26 27

GPIO8

PWM1

PWM0

28 29 30 31

SPI FLASH

I 2C

HIGH

LOW

HIGH

URSA_C-[2] URSA_C+[2] URSA_C-[1] URSA_C+[1] URSA_C-[0] URSA_C+[0]

32 33 34

+3.3V_MEMC

EEPROM

HIGH

HIGH

LOW

35 36 37

0.1uF 0.1uF 0.1uF 0.1uF

0.1uF

SPI

HIGH

HIGH

HIGH

38 39 40 41 42

W25X20AVSNIG

+3.3V_ST R831 10K MEMC_RESET 001:AB21

M_SPI_CZ 008:Y11

R801

56

CS

VCC

M_SPI_DO 008:Y11

R802

56

DO

HOLD

R803

10K

W P

CLK

R806

56

M_SPI_CK 008:Y10

DDR2 1.8V By CAP - Place these Caps near Memory


+1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR

+1.8V_MEMC BLM18PG121SN1D L900 10V 10V

0.1uF

0.1uF

C942

0.1uF C943

C944

0.1uF

C921

10uF C929

C936

C900

0.1uF

C923

10uF C924

0.1uF C925

0.1uF C926

0.1uF C927

0.1uF C940

0.1uF C941

C902

10uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C913

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C928

0.1uF C931

0.1uF C933

0.1uF C934

0.1uF

0.1uF C938

C903

C904

C905

C906

C907

C909

C911

C912

10uF C914

C915

C916

C917

C918

C919

C920

C922

0.1uF C935

C901

PI Result

10uF

008:N4

10uF

+1.8V_FRC_DDR

+1.8V_FRC_DDR

R901

1K1%

R921

1K1%

0.1uF C937

0.1uF C939

0.1uF

1K 1%

URSA_A[0-12]

008:U4;009:AL21 URSA_DQ[0-31] R922

URSA_DQ[0-31]

008:U4;009:D21

R902

1K1% C930

0.1uF

0.1uF C932

C908

URSA_DQ[27] DDR_DQ[8] DDR_DQ[10] G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 009:Q14 22 DDRA_A[11] 009:V10 A_URSA_BA0 BA1 L3 A1 E1 CK J8 J9 M9 R1 VDD_1 VDD_2 K8 K2 VDD_3 CK CKE VDD_4 VDD_5 A_URSA_BA1 22 150 R923 OPT BA0 L2 URSA_MCLK1 R913 A_URSA_MCLKE 22 009:V10 R912 +1.8V_FRC_DDR L2 B_URSA_BA0 B_URSA_BA1 R903 22 008:C11 008:U4 009:T11 URSA_MCLK OPT R900 150 22 A1 E1 J9 M9 URSA_MCLKZ 008:C10 B_URSA_MCLKE 009:T11 R914 ODT K9 L8 A9 C1 C3 C7 C9 F7 URSA_DQS2 008:C14 R916 B7 56 UDQS 008:C13 R917 F3 B3 R918 UDM 56 56 LDM 008:R4 URSA_DQS1 008:Q4 URSA_DQS3 URSA_DQS0 B7 UDQS R907 56 LDQS F7 R906 LDQS 56 R915 56 E9 G1 G3 G7 F3 URSA_DQM2 008:C15 008:C15 R919 E8 A8 R920 56 UDQS 56 LDQS 008:P4 URSA_DQM1 008:Q4 URSA_DQM3 URSA_DQM0 B3 UDM R909 56 LDM R908 56 G9 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 K7 L7 K3 VDDQ_10 CS RAS CAS WE 22 R1 K2 CKE 008:U4 URSA_MCLKZ1 009:V10 K8 CK R904 22 J8 CK L3 BA1 BA0 DDRB_A[8] 009:T11 URSA_A[8] URSA_A[11] B_URSA_CASZ DDRB_A[11] 009:Y14 A_URSA_CASZ DDRA_A[8] R2 B9 DQ15 DDR_DQ[15] A12 R2 DDRB_A[12] 009:Q14 A12 B_URSA_RASZ DDRA_A[12] 009:Y14 A_URSA_RASZ URSA_RASZ URSA_RASZ 008:I4 0; 0 0 80 :I 9 4 :; S 01 0 7 9:W17 URSA_CASZ URSA_CASZ 008:J 0 4 0 ;8 0: 0 J9 4:;S 00 1 9 7: W 1 7 URSA_A[8] URSA_A[11] P7 AR910 B1 DQ14 DDR_DQ[14] A11 AR907 P7 DDRB_A[11] A11 DDRA_A[11] M2 DDRB_A[6] D9 DQ13 DDR_DQ[13] URSA_A[6] URSA_A[4] DDRA_A[4] A10/AP M2 DDRB_A[10] A10/AP DDRA_A[10] P3 DDRB_A[4] D1 DQ12 DDR_DQ[12] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] A9 P3 DDRB_A[9] A9 DDRA_A[9] P8 DDRB_A[2] D3 DQ11 DDR_DQ[11] AR906 URSA_A[2] URSA_A[0] DDRA_A[0] AR913 A8 P8 DDRB_A[8] A8 DDRA_A[8] P2 DDRB_A[0] D7 DQ10 DDR_DQ[10] URSA_A[0] URSA_A[2] DDRA_A[2] A7 P2 DDRB_A[7] A7 DDRA_A[7] N7 DDRB_A[5] C2 DQ9 DDR_DQ[9] URSA_A[5] URSA_A[5] DDRA_A[5] A6 N7 DDRB_A[6] A6 DDRA_A[6] DDR_DQ[9] DDR_DQ[14] DDR_DQ[6] DDR_DQ[1] DDR_DQ[3] DDR_DQ[4] AR917 56 N3 DDRB_A[7] C8 DQ8 DDR_DQ[8] 22 URSA_A[7] URSA_A[7] 22 DDRA_A[7] A5 N3 DDRB_A[5] A5 DDRA_A[5] DDR_DQ[12] N8 DDRB_A[12] F9 DQ7 DDR_DQ[7] URSA_A[12] URSA_A[12] AR912 DDRA_A[12] A4 AR905 N8 DDRB_A[4] A4 DDRA_A[4] DDR_DQ[11] N2 URSA_A[9] F1 DQ6 DDR_DQ[6] DDRA_A[9] A3 N2 DDRB_A[3] A3 DDRA_A[3] AR916 56 M7 DDRB_A[3] DDRB_A[9] H9 DQ5 URSA_A[3] URSA_A[9] DDR_DQ[5] A2 M7 DDRB_A[2] A2 DDRA_A[2] DDR_DQ[5] M3 DDRB_A[1] H1 DQ4 DDR_DQ[4] 22 URSA_A[1] URSA_A[10] DDRA_A[10] A1 M3 DDRB_A[1] A1 DDRA_A[1] DDR_DQ[2] M8 DDRB_A[10] H3 DQ3 DDR_DQ[3] AR904 URSA_A[10] URSA_A[1] 22 DDRA_A[1] A0 M8 56 DDRB_A[0] A0 DDRA_A[0] DDR_DQ[0] URSA_A[3] AR911 H7 DQ2 DDR_DQ[2] DDRA_A[3] DDR_DQ[7] G2 DQ1 DDR_DQ[1] AR915 J2 G8 VREF DDR_Qimonda256 DQ0 VREF DDR_Qimonda256 J2 DDR_DQ[0] DDR_DQ[13] 56

DDR_DQ[27]

1000pF C910

1000pF

AR900 AR914 DDR_DQ[15] URSA_DQ[15] URSA_DQ[8] URSA_DQ[10] URSA_DQ[13] URSA_DQ[7] URSA_DQ[0] URSA_DQ[2] URSA_DQ[5] URSA_DQ[11] URSA_DQ[12] URSA_DQ[9] URSA_DQ[14] URSA_DQ[6] URSA_DQ[1] URSA_DQ[3] URSA_DQ[4]

URSA_DQ[28]

DDR_DQ[28]

IC900 HYB18TC256160BF-2.5

IC901 HYB18TC256160BF-2.5

URSA_DQ[25]

56

DDR_DQ[25]

URSA_DQ[30]

DDR_DQ[30]

DDR_DQ[16]

DQ0

URSA_DQ[22]

AR901

DDR_DQ[22]

DDR_DQ[17]

DQ1

URSA_DQ[17]

DDR_DQ[17]

DDR_DQ[18]

DQ2

URSA_DQ[19]

56

DDR_DQ[19]

DDR_DQ[19]

DQ3

URSA_DQ[20]

DDR_DQ[20]

DDR_DQ[20]

DQ4

DDR_DQ[21]

DQ5

URSA_DQ[31]

AR902

DDR_DQ[31]

DDR_DQ[22]

DQ6

DDR_DQ[16-31]

C945

0.1uF

C946

C947

0.1uF

0.1uF C949

0.1uF C950

0.1uF C951

0.1uF

NC4

L1

N1

VSS2

0.1uF

J3

C952

VSS3

C948

A8

E3

0.1uF

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
DDRB_A[0-12] DDRA_A[0-12] DDR_DQ[0-15]
IC900-*2 HYB18TC512160CF-2.5
DDR_Qimonda512_DieRevision VREF J2 G8 G2 H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 BA0 BA1 L2 L3 A1 E1 CK CK CKE J8 K8 K2 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

URSA_DQ[24]

DDR_DQ[24]

DDR_DQ[23]

DQ7

URSA_DQ[26]

56

DDR_DQ[26]

DDR_DQ[24]

DQ8

URSA_DQ[29]

DDR_DQ[29]

DDR_DQ[25]

DQ9

DDR_DQ[26] DQ10

URSA_DQ[23]

AR903

DDR_DQ[23]

DDR_DQ[27] DQ11

URSA_DQ[16]

DDR_DQ[16]

DDR_DQ[28] DQ12

URSA_DQ[18]

56

DDR_DQ[18]

DDR_DQ[29] DQ13

URSA_DQ[21]

DDR_DQ[21]

DDR_DQ[30] DQ14

DDR_DQ[31] DQ15

+1.8V_FRC_DDR

VDD_5

VDD_4

IC900-*1

VDD_3

H5PS5162FFR-S6C

VDD_2

VDD_1

DDR_Hynix512 VREF J2

G8

DQ0

G2

DQ1

A0

M8

H7

DQ2

A1

M3

H3

DQ3

A2

M7

H1

DQ4

A3

N2

H9

DQ5

K9 URSA_ODT 008:C10;009:Y15 A_URSA_RASZ A_URSA_CASZ A_URSA_WEZ URSA_ODT 008:C10;009:Q15 A9 C1 B_URSA_RASZ 009:R17 009:R17 009:T11 009:V10 009:X17 009:X17 B_URSA_CASZ B_URSA_WEZ C3 C7 C9 E9 G1 G3 G7 G9 K3 WE L7 CAS K7 RAS L8 CS

ODT

R905

22

A4

N8

F1

DQ6

VDDQ_10

A5

N3

F9

DQ7

A6

N7

C8

DQ8

VDDQ_9

A7

P2

C2

DQ9

A8

P8

D7

DQ10

VDDQ_8

A9

P3

D3

DQ11

A10/AP

M2

D1

DQ12

VDDQ_7

A11

P7

D9

DQ13

A12

R2

B1

DQ14

VDDQ_6

B9

DQ15

VDDQ_5

BA0

L2

BA1

L3

A1

VDD5

VDDQ_4

E1

VDD4

CK

J8

J9

VDD3

VDDQ_3

CK

K8

M9

VDD2

CKE

K2

R1

VDD1

VDDQ_2

VDDQ_1

ODT

K9

CS

L8

A9

VDDQ10

ODT CS RAS CAS W E

RAS

K7

C1

VDDQ9

K9 L8 K7 L7 K3 A9 C1 C3 C7 VDDQ10 VDDQ9 VDDQ8 VDDQ7

CAS

L7

C3

VDDQ8

W E

K3

C7

VDDQ7

FRC DDR

C9

VDDQ6

LDQS

F7

E9

VDDQ5

VSS_5 A3 008:Q4 008:R4 AR908 009:O16 B_URSA_BA1 008:K4;009:T10 008:M4;009:T10 008:K4;009:T10 NC_1 NC_2 A_URSA_BA0 009:AA16 +1.8V_FRC_DDR 009:AA16 009:Z15 009:Y14 VSSDL J7 A_URSA_BA1 A_URSA_MCLKE 22 A_URSA_WEZ NC_3 B_URSA_MCLKE B_URSA_WEZ 22 AR909 008:L4;009:V11 +1.8V_FRC_DDR J7 VSSDL 008:K4;009:V11 URSA_WEZ URSA_BA0 URSA_WEZ URSA_MCLKE URSA_BA1 009:O16 009:Q15 009:Q14 B_URSA_BA0 008:L4;009:T10 NC_5 NC_6 URSA_BA0 NC_4 URSA_DQSB1 URSA_DQSB0 E3 A8 J3 N1 L1 R3 R7 NC_6 NC_5 NC_4 P9 L1 R3 R7 UDQS R911 56 URSA_DQSB2 008:C14 URSA_DQSB3 008:C13 E8

LDQS

R910

56

UDQS

B7

G1

VDDQ4

A3 E3 J3 N1 P9

VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

C9 LDQS UDQS F7 B7 E9 G1 G3 G7 L D M U D M F3 B3 G9

VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

G3

VDDQ3

VSS_4

G7

VDDQ2

L D M

F3

G9

VDDQ1

VSS_3

U D M

B3

VSS_2

LDQS

E8

A3

VSS5

UDQS

A8

E3

VSS4

VSS_1

LDQS UDQS

J3

VSS3

E8 A8

A3 E3 J3 NC4 NC5 NC6 L1 R3 R7 N1 P9

VSS5 VSS4 VSS3 VSS2 VSS1

NC4

L1

N1

VSS2

NC5

R3

P9

VSS1

NC6

R7

NC1

A2

B2

VSSQ10

VSSQ_10 B2 A2 E2 R8 URSA_BA1 008:K4;009:V11 URSA_MCLKE 008:M4;009:V11 NC_3 NC_2 NC_1 B8 A7 D2 D8 E7 F2 F8 H2 H8 J1 VDDL

NC2

E2

B8

VSSQ9

B2 A2 E2 R8 B8 A7 D2 D8 E7 F2 F8 H2 VDDL J1 H8

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1

NC3

R8

A7

VSSQ8

VSSQ_9

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

D2

VSSQ7

D8

VSSQ6

VSSQ_8

VSSDL

J7

E7

VSSQ5

F2

VSSQ4

VSSQ_7

F8

VSSQ3

H2

VSSQ2

VSSQ_6

VDDL

J1

H8

VSSQ1

VSSQ_5

VSSQ_4

VSSQ_3

IC901-*1 H5PS5162FFR-S6C

VSSQ_2

VSSQ_1

IC901-*2 HYB18TC512160CF-2.5
DDR_Qimonda512_DieRevision VREF J2 G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 BA0 BA1 L2 L3 A1 E1 CK CK CKE J8 K8 K2 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

DDR_Hynix512 VREF J2

G8

DQ0

G2

DQ1

A0

M8

H7

DQ2

A1

M3

H3

DQ3

A2

M7

H1

DQ4

A3

N2

H9

DQ5

A4

N8

F1

DQ6

A5

N3

F9

DQ7

A6

N7

C8

DQ8

A7

P2

C2

DQ9

A8

P8

D7

DQ10

A9

P3

D3

DQ11

A10/AP

M2

D1

DQ12

A11

P7

D9

DQ13

A12

R2

B1

DQ14

B9

DQ15

BA0

L2

BA1

L3

A1

VDD5

E1

VDD4

CK

J8

J9

VDD3

CK

K8

M9

VDD2

CKE

K2

R1

VDD1

resonance Compensation
+1.8V_MEMC +1.8V_FRC_DDR

ODT

K9

ODT CS RAS CAS W E

K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 LDQS UDQS F7 B7 E9 G1 G3 G7 L D M U D M F3 B3 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

CS

L8

A9

VDDQ10

RAS

K7

C1

VDDQ9

CAS

L7

C3

VDDQ8

W E

K3

C7

VDDQ7

C9

VDDQ6

LDQS

F7

E9

VDDQ5

UDQS

B7

G1

VDDQ4

G3

VDDQ3

G7

VDDQ2

L D M

F3

G9

VDDQ1

U D M

B3

LDQS

E8

A3

VSS5

LDQS UDQS

E8 A8

A3 E3 J3 NC4 NC5 NC6 L1 R3 R7 B2 NC1 NC2 NC3 A2 E2 R8 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8 N1 P9

VSS5 VSS4 VSS3 VSS2 VSS1

UDQS

VSS4

NC5

R3

P9

VSS1

NC6

R7

NC1

A2

B2

VSSQ10

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

NC2

E2

B8

VSSQ9

NC3

R8

A7

VSSQ8

D2

VSSQ7

D8

VSSQ6

VSSDL

J7

E7

VSSQ5

F2

VSSQ4

F8

VSSQ3

H2

VSSQ2

VDDL

J1

H8

VSSQ1

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB JACK

[CONTROL IR & LED]


+3.3V_ST +5V_USB_1 001:I2

USB

P1200

12507WS-12L 1

4.7K R1202

KJA-UB-4-0004 JK1204

SDA_SUB/AMP 001:AI5;006:D12 L1203 BG2012B080TF R1200 100 KEY1 001:AB23 5 4 L1202 BG2012B080TF R1201 100 KEY2 001:AB23 +5V_ST L1201 CB3216PA501E 3 USB_DP 001:AR34 D1232 D1233 ADMC5M03200L_AMODIODE ADMC5M03200L_AMODIODE 5.6V OPT 5.6V OPT

SDA

4.7K R1203

D1201 ADMC5M03200L_AMODIODE 5.6V 5.6V R1230 0 C1209 330uF 25V

SCL_SUB/AMP 001:AI5;006:D11 2 USB_DM 001:AR34

SCL

R1229 0

USB DOWN STREAM

GND

D1202 ADMC5M03200L_AMODIODE

50V 100pF C1249

50V 100pF C1248

KEY1

KEY2

5V_ST

0.1uF C1203

0.1uF C1204

7 LED_B P i n t o P i n R e p l a c a b l e w i t h T - M I C 2 0 1 9 Y M +3.3V 6 CL40 R1214 +5V_USB_1 001:I2


IC1202 MIC2009YM6-TR

GND

D1240 5.6B C1201 1000pF 50V C1200 0.1uF 16V

D1238 5.6B

Except_CL40

10
VOUT 6 GND 1 VIN

5.6B L1200 CB3216PA501E


ILIMIT 5 ENABLE 2 FAULT/ 4 3

C1207 100pF 50V CDS3C05HDMI1 D1203 +3.3V_ST

R1250 10K

11 180 R1209

3.3V_ST

R1239 0

Copyright C 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
0 IR 001:AB22;004:AD4 5.6V C1208 0.1uF 16V R1219 4.7K OPT USB_CTL L1219 CB3216PA501E +5V_EXT C1245 10uF 10V C1244 0.1uF C1205 1000pF 50V C1202 0.1uF 16V R1226 47 For testing CL40 & Small model +3.3V_ST R1231 USB_OCD

WARM_ST

IR

L1204 BG2012B080TF

D1239

GND

12

PWR_ON

13

+3.3V_ST

GND

10K R1228

C R1225 0 LED_MOVING/LED_R 001:AR32 LED_MOVING/LED_R 001:AR32 LED_B 001:AR32 D1204 ENKMC2838-T112 R1221 0 A1 R1220 0 C R1222 0 A2 R1223 10K R1224 10K OPT OPT R1213 120K OPT

OPT100

USB +5V Over Current Protection -->

USB Jack

ETC SUB BOARD I /F

C1253 0.1uF OPT

Q1202 2SC3052 E

R1227 4.7K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LGE Internal Use Only

P/NO : MFL58436002

Feb., 2009 Printed in Korea

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