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VCC
kp=kn
Increase W of PMOS kp increases VTC moves to right Increase W of NMOS kn increases VTC moves to left For VTH = Vcc/2 kn = kp Wn 2Wp
Vout
kp=0.2kn
kp=5kn
VCC
Vin
At the switching point, both transistors are biased in the saturation region. It is to be noted that the actual current characteristic does not have a sharp discontinuity.
Power Dissipation
Although there isn't power dissipation in the CMOS inverter when the output is either at logic 0 or 1. However, during switching of the CMOS inverter from low logic 0 to logic 1, current flows and power is dissipated. Usually CMOS inverter and logic circuit are used to drive other MOS devices by connecting a capacitor across the output of a CMOS inverter. This capacitor must be charged and discharged during the switching cycle.
IDt =
Rp Vout CL Rn Vout CL
Vin = V DD