Published in IET Power Electronics

Received on 3rd December 2012

Revised on 31st May 2013
Accepted on 22nd June 2013
doi: 10.1049/iet-pel.2013.0254
ISSN 1755-4535
Digital current control of a three-phase four-leg
voltage source inverter by using pqr theory
Ayhan Ozdemir, Zekeriya Ozdemir
Electrical and Electronics Engineering Department, Sakarya University, Esentepe Campus, 54187 Sakarya, Turkey
E-mail: aozdemir@sakarya.edu.tr
Abstract: In this study, balanced/unbalanced linear/non-linear current control in three-phase four-leg voltage source inverter
(VSI) is carried out by using modied pqr method instead of the classical pqr method, digital proportional integral
derivative (PID) control rule and three-dimensional (3D) space vector pulse width modulation (3D SVPWM). For this
purpose, three-phase four-leg power inverter and PWM signal generation circuits are designed and modelled separately. Even
if the power source voltage is unsymmetrical, the proposed modied pqr method leads to measurement and to generating
the instantaneous harmonic and reactive components of load current accurately. The performance of the classical pqr
theory under non-ideal mains voltages is improved and the accuracy of the proposed modied pqr theory is demonstrated
both through simulation and real-time application. Each phase of the three-phase four-leg VSI modelled directly in abc
reference frame is decoupled from each other This simplies the digital PID controller design signicantly. Modelling of the
whole system, modied pqr measurement and digital PID design steps are given in detail. Real-time experimental results
for the designed three-phase four-leg VSI in stand-alone mode are compared with the simulation results.
1 Introduction
Common use of non-linear balanced/unbalanced loads in
power systems requires simultaneous solution of one and/or
more problems of harmonics elimination, reactive power
compensation and symmetrisation of asymmetrical
three-phase load. For this purpose, the solution can be
obtained by using the following tools: instantaneous power
measurement, modelling, assessment and control and
instantaneous reference current generation. The rst
instantaneous imaginary power measurement as a new
electrical entity in three-phase circuits was proposed in [1].
Three power components are dened as linearly
independent in [2] for three-phase four wire systems in
pqr reference frame rotating with respect to voltage space
vector. pqr theory is compared with instantaneous power
theories pq theory and cross vector theory in [3, 4].
Spectral analysis is performed in frequency domain in [5]
for one-phase and three-phase systems. Hybrid control
approach is implemented for two different instantaneous
power theories pq0 and pqr power theory in [6] for
three-phase four-leg active power lter. Carrier-based pulse
width modulation (PWM) modulation and current control
strategies for a four-leg converter when it is particularly
feeding a three-phase load with imbalances in abc
reference frame are given in [7]. The neutral leg of
three-phase four leg is controlled separately from the other
three legs according to the maximum and minimum values
among three errors between three output currents and their
respective reference values in [8]. A current control strategy
using constant switching frequency method for a
three-phase four-leg voltage source inverter (VSI) is
presented in [9]. A predictive current control strategy is
proposed for the grid-connected four-leg inverters in [10].
For current control in three-phase four-leg VSI, modelling
and sliding mode control is discussed in [1113], a
non-linear control approach is given in [14] and a predictive
non-linear control algorithm is developed in [15]. For
instantaneous power generation in three-phase four-leg VSI,
three-dimensional space vector PWM (3D SVPWM) is
discussed in [1618], and a hysteresis control method is
presented in [19].
The advantages of the four-leg voltage source converter are
explored in [20], such as reduced number of switches, high
performance and dc-link voltage equal to that of standard
converter with ve legs.
The instantaneous measurement theories given in [16]
do not provide good performance if the power system
voltages are unbalanced and/or distorted. However,
distortions such as phase-voltage unbalance and harmonics
are usually present in power systems. The methods given in
[16] are only accurate if voltages of power system are
sinusoidal.
In this study, in order to improve the performance of the
classical pqr theory under non-ideal mains voltage the
proposed modied pqr theory and its applications with
the stand-alone power inverter are presented. Stand-alone
mode means that the system, composed of load and current
generator three-phase four-leg VSI, measures the
instantaneous active, reactive and harmonic currents of load
currents and generates the calculated currents independently
of the utility grid.
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IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
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& The Institution of Engineering and Technology 2014
Currents consumed by non-linear balanced/unbalanced
loads are measured by using instantaneous power
measurement modied pqr theory for 20 kHz sampling
frequency. The calculated instantaneous reference currents
are generated by using digital proportional integral
derivative (PID) controlled three-phase four-leg VSI at 20
kHz switching frequency. The simplied block diagram of
the experimental setup consisting of measurement and
controller together with three-phase four-leg VSI and
inverter loads are given in Fig. 1.
The real-time experimental setup consists of three main
parts: digital signal processor (DSP)-based measurement
and control, grid-connected linear/non-linear load and the
three-phase four-leg VSI. First, the reference currents are
obtained by using the proposed pqr method for linear/
non-linear grid-connected load. Then, the reference currents
are generated by using the three-phase four-leg VSI in
stand-alone mode.
This study is organised as follows: (i) modelling and
digitisation of each phase independent of each other in abc
reference frame of three-phase four-leg VSI, (ii) modelling
of PWM on DSP architecture as zero-order hold (ZOH),
(iii) digital PID controller design, instantaneous power
measurement-modied pqr method and 3D SVPWM
signal generation algorithm and (iv) simulation and
real-time results for measurement of various load currents
and their generation with inverter.
2 Three-phase four-leg VSI and PWM module
modelling
Three-phase four-leg VSI power circuit and PWM signal
generation module used for digital current control are
shown in Fig. 2. Modelling of PWM module on DSP
architecture and four-leg VSI power circuit will be
described separately.
2.1 Modelling of three-phase four-leg VSI
Three-phase four-leg power circuit with ideal switches and R,
L loads are shown in Fig. 3.
Applying Kirchhoffs voltage laws for loops 1 and 2
indicated in Fig. 3 gives
U
ipwm
(t) = L
i
di
i
(t)
dt
+R
i
i
i
(t) +U
Npwm
(t) (1)
Fig. 1 Simplied block diagram of real-time experimental setup
Fig. 2 Inverter and PWM module for current generation
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IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
U
in
(t) = U
ipwm
(t) U
npwm
(t) (2)
U
npwm
(t) = U
Npwm
(t) (3)
where i = a, b, c. Circuit parameters are L
a
= L
b
= L
c
= L and
R
a
= R
b
= R
c
= R. Continuous-time state equations in vector
matrix form for three-phase four-leg VSI can be obtained
by using (1)(3). The result is shown in (4).
di
a
(t)
dt
di
b
(t)
dt
di
c
(t)
dt
_
_
_
_
_
_
_
_

_
=
R
L
0 0
0
R
L
0
0 0
R
L
_
_
_
_
_
_
_
_

_
i
a
(t)
i
b
(t)
i
c
(t)
_
_
_
_

_
+
1
L
0 0
0
1
L
0
0 0
1
L
_
_
_
_
_
_
_
_

_
U
an
(t)
U
bn
(t)
U
cn
(t)
_
_
_
_

_
(4)
2.2 Modelling of PWM module
The switches in the same branch in the four-leg VSI in Fig. 3
work as complementary to each other. Voltage expressions
can be written as
U
apwm
U
bpwm
U
cpwm
U
npwm
_
_
_
_
_

_
=
1 0 0 0
0 1 0 0
0 0 1 0
0 0 0 1
_
_
_
_
_

_
d
a
d
b
d
c
d
n
_
_
_
_
_

_
u
dc
(5)
where i = a, b, c. Four-leg VSI output voltages U
in
(t) can be
written in terms of upper insulated gate bipolar transistor
(IGBT) on-times d
j
, where j = a, b, c, n and DC-line voltage
u
dc
as
U
an
U
bn
U
cn
_
_
_
_
=
d
a
d
n
d
b
d
n
d
c
d
n
_
_
_
_
u
dc
=
d
an
d
bn
d
cn
_
_
_
_
u
dc
(6)
One way of generating the signals d
j
is to use PWM module in
the DSP architecture. It is possible to convert d
j
to pulse
signals by implementing 3D SVPWM algorithm in
software, where the obtained upper IGBT on-times are T
j
,
where j = a, b, c, n. PWM signals to be generated are
synchronised with voltage sampling instants. The simplied
PWM module and the generated signals are shown in
Figs. 4a and b, respectively.
The sampling instants in Fig. 4b are synchronised to the
peak point of the triangle-shaped carrier signal. Hence,
transient signals are avoided by performing sampling at the
instances other than the switching onoff times in Fig. 4b.
T
i
, where i = a, b, c, n represent the upper IGBT duty cycles
of three-phase four-leg VSI for each leg and similarly T
i
(t)
denote the duty cycle programmed to 16-bit duty cycle
register in PWM module with T sampling interval.

T
i
(t) in
Fig. 4b can be written in terms of unit step functions as

T
i
t ( ) = T
i
0 ( ) u(t) u(t T)
_ _
+T
i
(1) u(t T) u(t 2T)
_ _
+. . .
+T
i
(n) u(t nT) u t (n +1)T
_ _ _ _
(7)
Fig. 3 Three-phase four-leg power circuit with ideal switches
Fig. 4 Modelling of PWM module
a PWM module
b PWM signals generation
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doi: 10.1049/iet-pel.2013.0254
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& The Institution of Engineering and Technology 2014
Taking the Laplace transform of both sides of (7) gives

T
i
(s) = T
i
(0)
1
s

1
s
e
sT
_ _
+T
i
(1)
1
s
e
sT

1
s
e
2sT
_ _
+. . . . . . . . . . . .
+T
i
(n)
1
s
e
nsT

1
s
e
(n+1)sT
_ _
(8)
where

T
i
(s) = L

T
i
(t)
_ _
. Rearranging (8), we have

T
i
(s) =
1 e
sT
s
T
i
(0) +T
i
(1)e
sT
+T
i
(2)e
2sT
+. . . . . . . . . . . . .
_ _
(9)
Equation (9) can be written in compact form as

T
i
(s) =
1 e
sT
s

1
n=0
T
i
(n)e
nsT
= G
h0
(s)T
i
(s)

(10)
Close examination of (10) indicates that it consists of two
transfer functions, where
G
h0
(s) =
1 e
sT
s
and T
i
(s)

1
n=0
T
i
(n)e
nsT
are the hold transfer function and the mathematical expression
of writing T
i
duty cycles to 16-bit register with T sampling
interval, respectively.
The control block diagram corresponding to this
observation is given in Fig. 5.
The average value is computed from
U
in
=
1
T
_
t+T
on
t
U
dc
dt (11)
where U
in
, i = a, b, c, are the inverter output voltages.
Recalling T
on =
d
in
(t)T gives
U
in
= d
in
(t)U
dc
(12)
Inverter gain K
inv
is the variation of inverter output voltage
with respect to d
in
(t). That is
K
inv
=
U
in
d
in
(t)
= U
dc
(13)
The open-loop control block diagram corresponding to
current control for each phase in three-phase four-leg VSI
can be obtained as given in Fig. 6 by using (4), (6) and (13).
3 Discrete time PID design
The closed-loop control block diagram corresponding to
applying feedback to the open-loop control block diagram
given in Fig. 6 and generating control signal by processing
the error signal with digital PID control rule is given in Fig. 7.
The goal in controller design is to determine PID controller
coefcients K
p
, K
i
, K
d
satisfying the required performance for
the system. For this purpose, to obtain discrete-time transfer
function G(z) = Z G(s)
ZOH
G(s)
_ _
from continuous transfer
function G(s) =
I
i
(s)
d
in
(s)
the sampling period T will be
selected rst. From (4), the general dynamic equation is
obtained as
di
i
(t)
dt
=
R
L
i
i
(t) +
1
L
U
in
(t) i = a, b, c (14)
Using U
in
= d
in
u
dc
gives
G(s) =
I
i
(s)
d
in
(s)
=
u
dc
L
1
s +(R/L)
(15)
Fig. 5 PWM module control block diagram
Fig. 6 Open-loop control block diagram for each phase current
control
Fig. 7 Closed-loop control of each phase current
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IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
Applying the z-transform in the last equality, we have
G(z) = Z G(s)
ZOH
G(s)
_ _
= Z
1 e
sT
s
u
dc
L
1
s +(R/L)
_ _
(16)
Let R = 16.63 , L = 1.25 mH, T = 50 s and G(z) = (u
dc
/R)
((1 e
(R/L)T
)/(z e
(R/L)T
)). Then, G(z) becomes
G(z) =
0.02996
z 0.5015
(17)
The closed-loop transfer function of the system given in Fig. 7
can be written as (see (18))
where the discrete-time PID transfer function is given by
(see (19))
= K
pid
z
2
za +b
z(z 1)
(20)
K
pid
, aand b parameters will be calculated from the closed
loop reference characteristic equation obtained using the
predened transient parameters for overshoot %4, (
0.75) and %2 settling time t
s
= 500 s. The second-order
reference characteristic equation poles are determined by
z W e
sT
. Since the characteristic equation in (18) is of the
third order, the order of the reference characteristic equation
must also be made three by pole addition. Pole addition
should be performed such that the response of these
second-order discrete systems is affected as less as possible
and the resulting transfer function is causal. Taking these
considerations into account gives rise to the condition |

r
| < |
1
| < 12|
r
|, where
1
and
r
are the real parts of
the additional pole and the reference second-order system
pole, respectively. The third-order reference characteristic
equation used in this study is given by
F(z) = z
2
1.4827z +0.4958
_ _
(z +0.008) = 0 (21)
By comparing the denominator of (18) and (21), discrete-time
PID controller coefcients are determined as K
i
= 0.45 K
d
=
0.013 K
p
= 0.20, respectively.
The predened poles of the closed-loop characteristic
equation are assigned by the digital PID controller and the
closed-loop poles are z
1
= 0.9742, z
2
= 0.506 and z
3
=
0.0008. Since the all poles are inside of unit circle on
z-plane the closed-loop system is asymptotically stable. The
Figs. 12 and 13 of the simulation results obtained by using
the closed-loop control block diagram given in Fig. 7 are
also the double conrmation of the stability.
4 Reference current calculation using
modified pqr theory
One of the most important problems in current control is
instantaneous accurate measurement of active, reactive and
total harmonic reference currents. Calculation of reference
currents I
aref
, I
bref
, I
cref
with classical pqr and the proposed
modied pqr instantaneous power measurement algorithm
are illustrated in Fig. 8, where V
an
, V
bn
, V
cn
are phase-neutral
power system voltages and I
a
, I
b
, I
c
are phase currents.
In order to improve the performance of the classical pqr
theory under non-ideal mains voltages, the proposed modied
pqr theory is shortly presented as follows.
Non-ideal mains voltages are rst converted to 0
coordinate and then to stationary dq coordinates. The
produced dq components of voltages are ltered by using
the fourth-order Butterworth low-pass lter whose
specications are cut-off frequency of f
c
= 10 Hz and stop
band frequency of f
s
= 20 Hz. The lter outputs are reverse
converted 0 coordinates to obtain the positive-phase
sequence V
+
0
, V
+
a
, V
+
b
shown in Fig. 8b as dark-coloured
in schematic block diagram. The proposed modied pqr
measurement can be used when the main voltages are not
sinusoidal and sinusoidal currents are desired in active
power lter or similar applications. The classical pqr
technique does not require a phase-locked loop (PLL). The
proposed modied pqr requires a PLL. In this study the
PLL is implemented by software in the TMS320F210 DSP.
V
d_dc
, V
q_dc
phase voltages and currents are converted from
abc reference frame to 0 reference frame by using (22) and
(23) as seen in Fig. 8b.
V
a
V
b
V
0
_
_
_
_

_ =
..
2
3
_
1
1
2

1
2
0
..
3

2

..
3

2
1
..
2

1
..
2

1
..
2

_
_
_
_
_
_
_
_
_

_
V
an
V
bn
V
acn
_
_
_
_

_
V
d
V
q
_ _
=
cosu sin u
sinu cosu
_ _
,....................,
T
V
a
V
b
_ _
(22)
I
a
I
b
I
0
_
_
_
_

_ =
..
2
3
_
1
1
2

1
2
0
..
3

2

..
3

2
1
..
2

1
..
2

1
..
2

_
_
_
_
_
_
_
_
_

_
I
a
I
b
I
c
_
_
_
_

_
V
+
a
V
+
b
_ _
=
cosu sinu
sinu cosu
_ _
,....................,
T
1
(23)
T(z) =
0.4985K
pid
z
2
0.4985aK
pid
z +0.4985bK
pid
z
3
+(0.4985K
pid
1.5015) z
2
+ 0.5015 0.4985aK
pid
_ _
z +0.49851bK
pid
(18)
G(z)
PID
= K
p
+K
i
+K
d
_ _
.........,,.........
K
pid
z
2
z K
p
+2K
d
_ _
/ K
p
+K
i
+K
d
_ _ _ _
+ K
d
/ K
p
+K
i
+K
d
_ _ _ _ _ _
z z 1 ( )
(19)
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& The Institution of Engineering and Technology 2014
The current and voltage space vectors on the pqr reference
frame are given by
I
p
I
q
I
r
_
_
_
_
=
1
V
+
ab0
0
V
+
ab0
V
+
b
V
+
ab
V
+
ab0
V
+
b
V
+
ab
V
+
ab

V
+
ab0
V
+
a
V
+
ab

V
+
b
V
+
0
V
+
ab
V
+
0
V
+
a
V
+
b
_
_
_
_
_
_
_
_
_

_
I
a
I
b
I
0
_
_
_
_
(24)
e
p
e
q
e
r
_
_
_
_

_ =
1
V
+
ab0
0
V
+
ab0
V
+
b
V
+
ab
V
+
ab0
V
+
b
V
+
ab
V
+
ab

V
+
ab0
V
+
a
V
+
ab

V
+
b
V
+
0
V
+
ab
V
+
0
V
+
a
V
+
b
_
_
_
_
_
_
_
_
_

_
e
a
e
b
e
0
_
_
_
_

_
=
e
ab0
0
0
_
_
_
_

_ (25)
where
V
+
ab0
=
....................
V
+2
a
+V
+2
b
+V
+2
0
_
, V
+
ab
=
.............
V
+2
a
+V
+2
b
_
Conversion from 0 reference frame to pqr is discussed
in [2]. e
p
Voltage consists of dc component e
pdc
and ac
component e
pac
. Fundamental component of system
voltages is converted to e
pdc
whereas negative sequence or
harmonic components are converted to e
pac
. Instantaneous
real power p in pqr reference frame is dened as the
scalar product of voltage and current vectors
p = e
pqr
i
pqr
= e
p
i
p
(26)
Instantaneous imaginary power q is obtained from cross
product of voltage and current vectors
q = e
pqr
i
pqr
=
0
e
p
I
r
e
p
I
r
_
_
_
_
(27)
Fig. 8 Calculation of reference currents I
aref
, I
bref
, I
cref
with
a Classical pqr method
b Proposed pqr method
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& The Institution of Engineering and Technology 2014
IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
It is possible to write (26) and (27) in matrix form as
p
q
q
q
r
_
_
_
_
=
e
p
I
p
e
p
I
r
e
p
I
q
_
_
_
_
(28)
In (28), p, q
q
and q
r
are independent of each other. For this
reason, three current components can be controlled
independently giving rise to balancing three instantaneous
powers in turns. Hence, pqr method has exactly three
degrees of freedom. P
ac
is obtained from P as shown in
Fig. 8b. The displacement factor of the system current
becomes unity, the system currents can be controlled
balanced and sinusoidal by compensating the instantaneous
power q
r
and the ac part of the instantaneous power P. For
this purpose, I
aref
, I
bref
and I
cref
reference currents are
obtained rst from (29).
I
pc
I
qc
I
rc
_
_
_
_
=
^
I
p
I
q
I
r
+
V
0
V
ab
_ _
I
p
_
_
_
_
_
_
_

_
(29)
Then, reference currents I
aref
, I
bref
and I
cref
for current control
corresponding to the closed-loop control block diagram given
in Fig. 7 are obtained by inverting (24) and (23) in that order.
Reference currents I
aref
, I
bref
, I
cref
given in Fig. 8 are
calculated and compared by using both classical pqr
method and proposed pqr method for non-linear load
currents under distorted phase voltages in the simulation
study given below. The unsymmetrical distorted phase
voltages are
V
an
(t) = V
m
sin vt 0.6912 ( ) +0.09V
m
sin 3vt 2.32 ( )
+0.075V
m
sin 5vt 1.47 ( )
+0.05V
m
sin 7vt +1.31 ( ) +0.025V
m
sin 9vt +2.16 ( )
V
bn
(t) = V
m
sin vt 0.6912 ( ) +0.065V
m
sin 2vt 2.32 ( )
+0.045V
m
sin 4vt 1.47 ( ) +0.03V
m
sin 6vt +1.31 ( )
+0.025V
m
sin 8vt +2.16 ( )vt = vt
2p
3
V
cn
(t) = 1.05V
m
sin vt 0.6912 ( ) +0.075V
m
sin 5vt 1.47 ( )
+0.05V
m
sin 7vt +1.31 ( )
+0.045V
m
sin 11vt +2.16 ( )
+0.004V
m
sin 13vt +1.01 ( )vt = vt
4p
3
where V
m
= 320 V and = 250 rad/s.
Fig. 9 Accuracy and effectiveness of the proposed pqr method via simulation results
a The unsymmetrical distorted phase voltages of V
an
, V
bn
, V
cn
b Non-linear load currents
c Calculation of reference currents of I
aref
, I
bref
, I
cref
using classical pqr method under pure sinusoidal voltages of V
an
, V
bn
, V
cn
d Calculation of reference currents of I
aref
, I
bref
, I
cref
using proposed pqr method under unsymmetrical distorted phase voltages of V
an
, V
bn
, V
cn
e Calculation of reference currents of I
aref
, I
bref
, I
cref
using classical pqr method under unsymmetrical distorted phase voltages of V
an
, V
bn
, V
cn
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doi: 10.1049/iet-pel.2013.0254
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& The Institution of Engineering and Technology 2014
The simulation results given in Fig. 9d shows that the
proposed pqr method overcomes the limitations of the
classical pqr method under distorted voltages. Accuracy
and effectiveness of the proposed pqr method is
demonstrated via simulation results given in Fig. 9.
Real-time application of the proposed pqr method for
two case studies are given in Section 4.
5 Three-dimensional space vector
modulation
Upper IGBT on-times T
i
where i = a, b, c, n are calculated via
3D SVPWM algorithm by using PID controller output signals
U
aref
, U
bref
and U
cref
in Fig. 10b. IGBT PWM signals are
generated by using PWM modules in DSP architecture and
they are applied to gates of the power switching element
IGBT by using driving circuits. Calculation of three-phase
four-leg inverter upper IGBT on-time durations with 3D
SVPWM is briey discussed in this section and the reader
is referred to corresponding reference or details. The main
steps are listed in the following:
i. The prism containing the reference space vector V
ref
is
obtained as shown in Fig. 4 given in [21] with the help of
U
aref
U
bref
_ _
T
determined by using
U
aref
U
bref
U
cref
_ _
T
in the transformation matrix given
in (19).
Fig. 10 Experimental setup and the whole system
a Experimental setup
b Simplied block diagram of the whole system
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doi: 10.1049/iet-pel.2013.0254
ii. The tetrahedron containing V
ref
is determined from
Table II given in [17] by using the prism determined in the
previous step and U
aref
U
bref
U
cref
_ _
T
.
iii. Information regarding the prism and tetrahedron
determined in the previous steps and V
1
V
2
V
3
_ _
vectors obtained by using the table for the computation of
matrices for duty ratio calculation in 24 tetrahedrons are
used to calculate the corresponding duty ratios of the
switching vectors resulting in expressions given in (15)
through (17) in [17]. The matrices used for 24 tetrahedrons
duty ratio computations are used from the reference [16]
and given in the Table 1 in Appendix. The reader can refer
to the study given in [22] for a new and simple method to
identify the tetrahedron and three adjacent non-zero
switching vectors.
6 Experimental results
Real-time experiments were performed with the main board
designed based on 32-bit 150 MHz DSP TMS320F2810.
Instantaneous power measurement method modied pqr,
digital PID controller, implementation of 3D SVPWM
algorithm and PWM signal generation were realised. A
three-phase four-leg VSI whose phase voltages can be
controlled independent of each other were designed using
eight discrete IGBT IXDH 30N120D and used in order to
generate currents in desired forms. Capacitance value of
DC-line condenser was C
dc
= 1410 F, load resistance and
inductance parameters were R = R
abc
= 16.63 and L = L
abc
=
1.25 mH, respectively. DC-line voltage was V
dc
=
..
2

220 V
and the sampling and inverter switching frequency was f
s
=
20 kHz. The picture showing the experimental setup and
simplied block diagram of the whole system are depicted in
Figs. 10a and b, respectively.
Experiments consist of two main parts:
1. Instantaneous reference currents measurement and
validation: Instantaneous reference currents I
aref
, I
bref
, I
cref
are calculated by using modied pqr theory given in
Section 2 and Fig. 8b for various load types in real-time.
Calculated reference currents in real-time comprised both
instantaneous harmonic current and reactive current.
Accuracy of modied pqr algorithm validated in
real-time is given in Fig. 11.
2. Instantaneous reference currents generation using
three-phase four-leg VSI: I
aref
, I
bref
and I
cref
reference
currents are generated as power signals with 3D SVPWM
in three-phase four-leg VSI in real-time by using
three-phase four-leg VSI. Simulation and real-time results
show the validities of the PWM module model, three-phase
four-leg VSI model and the designed digital PID controller.
The reference currents I
aref
, I
bref
, I
cref
are generated as
power signals I
na
, I
nb
, I
nc
and can be seen in Figs. 12 and 13.
6.1 Application of modied pqr theory
For real-time instantaneous modied pqr theory
application, non-linear unbalanced load currents i
a
, i
b
, i
c
were consumed by the three-phase bridge rectier with a
purely resistive load and the RL load between phase a and
phase c (A = 0 switch off, B = 1 switch on) in the
experimental setup shown in Fig. 10b.
Three-phase source voltages V
a
, V
b
, V
c
and non-linear load
currents i
a
, i
b
, i
c
were sampled with f
s
= 20 kHz sampling
frequency. These samples for each phase and reference
current instantaneous values obtained by modied pqr
were stored for one period in DSP RAM. Then, they were
used to generate gures.
Fig. 11 Generation and validation of I
aref
, I
bref
and I
cref
reference currents with modied pqr
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doi: 10.1049/iet-pel.2013.0254
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& The Institution of Engineering and Technology 2014
Instantaneous reference current values I
aref
, I
bref
and I
cref
were calculated using (26). All the waveforms are shown in
Fig. 11.
The accuracy of the proposed modied pqr theory is
demonstrated by subtracting the calculated reference
currents from the load currents for each phase. The results
(i
a
i
refa
), (i
b
i
refb
) and (i
c
i
refc
) are seen to be balanced
and sinusoidal in Fig 11. Furthermore, the displacement
factor of the results is unity as proposed.
6.2 Generating of calculated reference currents
Real-time experimental studies in this section were performed
for two different types of loads in the power circuit shown in
Fig. 10b.
i. A non-linear unbalanced load was created as mentioned
above (A = 0 switch off, B = 1 switch on) in Fig. 10b.
ii. A non-linear balanced load was created by the
three-phase bridge rectier with a purely resistive load in
Fig. 10b.
Reference currents I
aref
, I
bref
, I
cref
for two load types were
calculated with modied pqr for every T = 50 s and i
na
,
i
nb
, i
nc
currents were generated instantaneously in
three-phase four-leg VSI based on digital PID control. I
aref
,
I
bref
, I
cref
were used as reference current inputs both in the
simulation study in Fig. 7 and in the real-time application
in Fig. 10b. In the simulations, K
p
, K
i
and K
d
digital PID
controller coefcients obtained in Section 3 were used.
Currents i
na
, i
nb
, i
nc
generated in real-time and currents i
nas
,
i
nbs
, i
ncs
obtained from simulations were shown on the same
gure for comparison. In addition, images obtained by the
harmonic analyser for generated current signals i
na
, i
nb
, i
nc
were provided.
In Figs. 11 and 12, V
a
, V
b
, V
c
source voltages, i
a
, i
b
, i
c
source load currents, reference currents I
aref
, I
bref
, I
cref
calculated by modied pqr method and i
na
, i
nb
, i
nc
denote
the currents generated by the inverter, whereas i
nas
, i
nbs
, i
ncs
represent the currents obtained from simulations with the
control block diagram given in Fig. 7.
The following observations can be obtained from the
theoretical, simulation and real-time studies performed in
this study. Three-phase four-leg VSI model are obtained by
modelling each phase independent of each other in abc
reference frame and by modelling PWM module as ZOH in
three-phase four-leg VSI for each leg. Validity of the model
is demonstrated by showing i
nas
, i
nbs
, i
ncs
obtained from
simulations and i
na
, i
nb
, i
nc
obtained in real-time on the
same graphics in Figs. 12 and 13. Modelling of each phase
of three-phase four-leg VSI independent of each other in
abc reference frame simplies calculation of digital PID
coefcients K
p
, K
i
and K
d
signicantly. Stability of the
closed-loop control system is guaranteed since all poles of
Fig. 12 Source voltages and currents for non-linear unbalanced load
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IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
the characteristic equation are determined with digital PID
coefcients according to the reference characteristic
equation. Performance of the designed digital PID control
rule are shown with i
na
, i
nb
, i
nc
given in Figs. 12 and 13
generated in real-time for reference inputs I
aref
, I
bref
, I
cref
.
Modied pqr instantaneous power measurement method
has three degrees of freedom. I
pc
, I
qc
, I
rc
are calculated
according to (29) in pqr reference frame and I
aref
, I
bref
and I
cref
reference currents are obtained via transformation
in abc frame. Fig. 11 shows that the currents generated for
each phase are balanced, sinusoidal and the displacement
factor of the system is unity.
The performance of the classical pqr theory under
non-ideal mains voltages is improved and accuracy of
proposed modied pqr theory is demonstrated both
simulation and real-time application.
IGBT on-time durations are calculated for three-phase
four-leg inverter with 3D SVPWM and driving signals are
generated by PWM circuits. There is no detailed discussion
on 3D SVPWM but the related references are given.
7 Conclusions
In this study modied pqr theory based digital current
control in three-phase four-leg VSI was proposed. The
performance of the classical pqr theory under non-ideal
mains voltages is improved and accuracy of proposed
modied p-q-r theory is demonstrated both simulation and
real-time application. Three-phase four-leg VSI power
circuit and PWM modules were modelled in abc reference
frame such that each phase is independent of each other.
Hence, digital PID design becomes simple. The reference
currents obtained by modied pqr theory with three
degrees of freedom were generated by using 3D SVPWM
with digital PID control rule in three-phase four-leg VSI.
It was shown that the displacement factor of the system
current becomes unity when the calculated currents
obtained using modied pqr theory is subtracted from the
load currents, it is balanced and sinusoidal. The simple
DSP-based digital current control method that is applicable
in real-time was discussed in detail.
8 Acknowledgment
This work is supported by the Scientic and Technological
Research Council of Turkey (TUBITAK) under Project
number 107E165.
9 References
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2 Akagi, H., Kim, H.: The instantaneous power theory on the rotating
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Fig. 13 Source voltages and currents for non-linear balanced load
www.ietdl.org
IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
537
& The Institution of Engineering and Technology 2014
3 Aredes, M., Akagi, H., Watanabe, E.H., Salgado, E.V., Encarnao, L.F.:
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13 Mendalek, N., Al-Haddad, K., Kanaan, H.Y., Hassoun, G.: Sliding
mode control of three-phase four-leg shunt active power lter. Power
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10 Appendix
See Table 1
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538
& The Institution of Engineering and Technology 2014
IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
Table 1 Matrices for duty ratio computation
Tetrahedron prism 1 2 3 4
I V
1
:pnnn V
1
:pnnn V
1
:pnnn V
1
:pnnp
V
2
:pnnp V
2
:ppnn V
2
:ppnn V
2
:ppnp
V
3
:ppnp V
3
:ppnp V
3
:pppn V
3
:nnnp
1 0 1
1
2

..
3

2
1
0
..
3

0
_
_
_
_
_

_
3
2

..
3

2
0

1
2
..
3

2
1
1
2
..
3

2
1
_
_
_
_
_
_
_
_
_

_
3
2

..
3

2
0
0
..
3

1
2

..
3

2
1
_
_
_
_
_
_
_

_
3
2

..
3

2
0
0
..
3

0
1 0 1
_
_
_
_
_

_
II V
1
:ppnn V
1
:ppnp V
1
:ppnn V
1
:ppnp
V
2
:ppnp V
2
:npnn V
2
:npnn V
2
:npnp
V
3
:npnn V
3
:npnp V
3
:pppn V
3
:nnnp
1 0 1
1
2
..
3

2
1

3
2
..
3

2
0
_
_
_
_
_
_
_

_
3
2
..
3

2
0

1
2
..
3

2
1
1 0 1
_
_
_
_
_
_
_

_
3
2
..
3

2
0

3
2
..
3

2
0

1
2

..
3

2
1
_
_
_
_
_
_
_
_
_

_
3
2
..
3

2
0

3
2
..
3

2
0
1
2

..
3

2
1
_
_
_
_
_
_
_
_
_

_
III V
1
:npnn V
1
:npnn V
1
:npnn V
1
:npnp
V
2
:npnp V
2
:nppn V
2
:nppn V
2
:nppp
V
3
:nppp V
3
:nppp V
3
:pppn V
3
:nnnp

1
2
..
3

2
1
1
2
..
3

2
1

3
2

..
3

2
0
_
_
_
_
_
_
_
_
_

_
0
..
3

1
2

..
3

2
1
1 0 1
_
_
_
_
_

_
0
..
3

3
2

..
3

2
0
1 0 1
_
_
_
_
_

_
0
..
3

3
2

..
3

2
0
1
2

..
3

2
1
_
_
_
_
_
_
_

_
IV V
1
:nppn V
1
:nppp V
1
:pnnn V
1
:nnnp
V
2
:nppp V
2
:nnpn V
2
:pnnp V
2
:nnpp
V
3
:nnpn V
3
:nnpp V
3
:ppnp V
3
:nnnp

1
2
..
3

2
1
1 0 1
0
..
3

0
_
_
_
_
_

3
2
..
3

2
0

1
2

..
3

2
1
1
2

..
3

2
1
_
_
_
_
_
_
_
_
_

3
2
..
3

2
0
0
..
3

0
1 0 1
_
_
_
_
_

3
2
..
3

2
0
0
..
3

0
1
2
..
3

2
1
_
_
_
_
_
_
_

_
V V
1
:nnpn V
1
:nnpn V
1
:nnpn V
1
:nnnp
V
2
:nnpp V
2
:pnpn V
2
:pnpn V
2
:nnpp
V
3
:pnpp V
3
:pnpp V
3
:pppn V
3
:nnnp

1
2

..
3

2
1
1 0 1
3
2

..
3

2
0
_
_
_
_
_
_
_

3
2

..
3

2
0
1 0 1
1
2

..
3

2
1
_
_
_
_
_
_
_

3
2

..
3

2
0
3
2

..
3

2
0

1
2
..
3

2
1
_
_
_
_
_
_
_
_
_

3
2

..
3

2
0
3
2

..
3

2
0
1
2
..
3

2
1
_
_
_
_
_
_
_
_
_

_
VI V
1
:pnpn V
1
:pnpp V
1
:pnpn V
1
:pnpp
V
2
:pnpp V
2
:pnnn V
2
:pnnn V
2
:pnnp
V
3
:pnnn V
3
:pnnp V
3
:pppn V
3
:nnnp

1
2

..
3

2
1
1
2

..
3

2
1
3
2
..
3

2
0
_
_
_
_
_
_
_
_
_

_
0
..
3

0
1 0 1
1
2
..
3

2
1
_
_
_
_
_

_
0
..
3

0
3
2
..
3

2
0

1
2
..
3

2
1
_
_
_
_
_
_
_

_
0
..
3

0
3
2
..
3

2
1
1 0 1
_
_
_
_
_

_
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IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527539
doi: 10.1049/iet-pel.2013.0254
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& The Institution of Engineering and Technology 2014