968

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 22, NO. 2, APRIL 2007

Power Quality Problems Compensation With Universal Power Quality Conditioning System
, Senior Member, IEEE, and Alfred Rufer, Fellow, IEEE Du san Graovac, Senior Member, IEEE, Vladimir A. Katic
AbstractThe aim of this paper is to present a universal power quality conditioning system (UPQS) named after unied power quality conditioner, which is extended by adding a shunt active lter at the load side. Its main purpose is to compensate for both supply voltage and load current imperfections, such as: sags, swells, interruptions, imbalance, icker, harmonics, reactive currents and current unbalance. Such system has better harmonic compensation characteristic, since there are no problems associated with passive lter operation. Converter and control analysis is presented, together with results showing the UPQS modes of operation. Index TermsActive lter, converter, harmonics, power conditioning, power quality.
Fig. 1. Power quality issues in a typical industrial installation.

I. INTRODUCTION OWER electronics loads are continually overtaking industry space from other type of loads. Such nonlinear devices inject harmonic currents in the ac system and increase overall reactive power demanded by the equivalent load. On the other hand, development in the digital electronics/communications and in process control have increased the number of sensitive loads that require ideal sinusoidal supply voltages for their proper operation [1]. The load/supply and supply/load inuences are listed in Fig. 1. In order to keep power quality under limits proposed by standards it is necessary to include some sort of compensation. Modern solutions for active power factor correction can be found [2] in forms of active rectication (active wave shaping) or active ltering. Such solutions are well suited for elimination of negative load inuence on the supply network. If there are supply voltage imperfections, none of them can provide proper compensation. In last few years, solutions based on exible ac transmission systems (FACTS) have appeared. FACTS converters have been modied to operate in a distribution network and, through a modication of a unied power ow controller (UPFC). The unied power quality conditioner (UPQC) was presented during 1998. Such solutions [3] are still in phase of research and development, but are very promising. The aim of this paper is to present a universal power quality conditioning system (UPQS). Its main purpose is to compensate for both supply voltage and load current imperfections, such as:

Fig. 2. Parallel active lter compensation of current and voltage type loads.

sags, swells, interruptions, imbalance, icker, harmonics, reactive currents and current unbalance. This makes the UPQS suitable for installation at the point of common coupling of several industrial loads. II. DRAWBACKS OF ACTIVE FILTERING Parallel ltering is based on controlled current injection in order to compensate harmonic currents drawn by the non-linear load. Basic principle of a shunt lter operation can be explained is and discussed based on block diagram in Fig. 2. is the current type rectier current supply/load impedance, is the voltage-type ac/dc converter voltage. To elimand inate harmonics, lter current Ipf has to have equal magnitude and opposite phase to the load harmonics. Therefore, desired control function (G) has to fulll the following demand: (1) where is fundamental frequency. In praxis (caused by non. ideal measurement and control) In case of current type load, supply, and load current are (2)

Manuscript received January 31, 2006. Paper no. TPWRD-00054-2006. D. Graovac is with the Inneon Technologies, Munich 85579, Germany (e-mail: dusan.graovac@ieee.org). is with the Faculty of Engineering, University of Novi Sad, Novi V. Katic Sad 21000, Serbia and Montenegro. A. Rufer is with the Ecole Polytechnique Fdrale de Lausanne, Lausanne 1015, Switzerland. Digital Object Identier 10.1109/TPWRD.2006.883027

0885-8977/$25.00 2007 IEEE

GRAOVAC et al.: PQ PROBLEMS COMPENSATION WITH PQ CONDITIONING SYSTEM

969

Series lter output voltage equals (13) where is dened as in (1) and is the regulator (impedance) gain. If a supply current harmonic is detected, then a high impedance at harmonic frequency is set between supply and load. Supply current equals
Fig. 3. Series active lter supplying current and voltage type loads.

(14) If condition (15) is fullled, then (16) and (17) (3) (15) (16) (17) If the equivalent load consists of a thyristor rectier supplying is very inductive load without passive lters at its input, than large and compensation is not possible. A solution can be to combine a series active and a shunt passive lter and to form a hybrid lter. Such lter is more expensive and it still has a problem of passive lter damping and detuning. If a series lter is to compensate a load with a diode-capacitive front-end, then the supply current is (18) The necessary condition (19) for proper ltering (20) and (21) is (19) (20) (21) Large gain can be easily implemented by the use of hysteresis control, or with PI regulator with high proportional value. It is obvious from (19)(21) that harmonic elimination in the case of voltage source load is very convenient by using series active lter. Therefore, series active lter used with capacitive rectier load has performance similar to shunt active lter used with inductive rectier load. It can be noted that inclusion of series voltage source between supply and the load could also lead to efcient elimination of supply voltage imperfections. III. UPQS TOPOLOGY As known from the literature [4], elimination of supply voltage imperfections can be done using series lter. Also, as noted in II., the series lter can compensate load current harmonics in case of voltage-type harmonic producing loads. If such solution is implemented, the series lter voltage regulation demands dc bus capacitor charging. If a diode rectier is used for charging, then only voltage sags can be compensated. If a voltage swell compensation is desired, then an active rectier should be used, leading to solution known as unied power quality conditioner (UPQC) [5]. This conditioner, for its proper operation, needs the passive lter banks for elimination of the load harmonics. It is a very good solution, but there is still

If condition (4) is fullled, then (5)(7) (4) (5)

(6) (7) In the case of high load impedance i.e., , compensation is independent of the source impedance. If this is not fullled, as is the case when there is existing passive lter or power factor correction capacitor at the point of shunt lter connection, then the system performance is deteriorated. Therefore, if one tries to use both passive and active shunt lter great care should be exercised: active lter should be used for 5. and 7. (max. to 13.) harmonic elimination, while passive lter should be tuned to higher harmonic frequencies. In the case of voltage type load, supply, and load current are and If condition (9) is fullled, then 1012 (9) (10) (11) (12) Unfortunately, capacitive loaded diode rectier has a very low and therefore condition (9) cannot be fullled. It is obvious that in the case of voltage type rectier, shunt ltering can not give satisfying performance. Series lter operation is based on controllable voltage injection in series with the supply voltage. Basic idea is to insert a high impedance on harmonic frequencies in order to compensate harmonic currents drawn by the load. The principle of series lter operation is presented in Fig. 3. (8)

970

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 22, NO. 2, APRIL 2007

dedicated hardware (space vector modulators, fast digital PWM signal generators) enables the minimization of control hardware and thus the use of the synchronously rotating frame (dq) control. dq domain quantities of any voltage and current shown in Fig. 4 are given by following equations: (22)

(23)
Fig. 4. Universal power quality conditioning system.

Transformation matrix

, and its inverse are

a small inherent danger of passive lter resonance and problems of the series lter compensating harmonics of current type load (inductively loaded thyristor rectier) still remain. Together with that, such system has a limited power factor compensation capability [6]. Therefore, the authors would like to propose a modied system as presented in Fig. 4. Active rectier and parallel lter have a three phase voltage source topology, while the series lter has a three phase-four wire topology. Universal Power Quality Conditioning System (UPQS) consists of the following. Active Rectier (AR) for real power transfer to/from common dc bus, and dc bus voltage control with a unity input power factor. Series Filter (SF) that suppresses supply voltage harmonics, icker, voltage sags and swells, as well as the voltage unbalance and forces diode rectier (capacitive load) type harmonics to ow into the parallel lter. Parallel lter (PF) that eliminates load current harmonics and compensates load power factor. On the left hand side of the Fig. 4, there is a distorted power supply, having a signicant amount of harmonics, icker, unbalance, voltage drops, and possible over/under-voltages. Load consists of a parallel connection of harmonic producing loads (Thyristor-inductive and diode-capacitive rectier) and a sensitive load, demanding a harmonic-free voltages at its input. IV. DERIVATION OF REFERENCE SIGNALS Control schemes for both parallel and series active ltering usually use the instantaneous reactive power theory (pq theory) [7] for reference signals determination. Although this theory presents a very powerful tool, its implementation is quite involving, since it requires a large number of analog multipliers, dividers, lters etc. Development in DSP technology, its mathematical speed together with fast A/D conversion and different

(24) where is the instantaneous supply voltage angle, derived from the synchronization circuitry (25) Currents in rotating frame (either , , etc.) can be decomposed in dc (50 Hz) and ac (harmonic, subharmonic or interharmonic) component (26) (27) corresponds to the reactive and to the active power component. The ac and dc components can be extracted by means of ltering (28) (29) (30) (31) Advantage of a dq domain control is in easy ltration, since the 50 Hz components are transferred into dc quantities and all harmonic components are ac quantities and therefore no band-pass ltering is necessary. Therefore, a HPF(z) is a high-pass digital lter transfer function which can be obtained by the digitalization of its well known rst-order analog counterpart HPF(s) (see (32) at the bottom of the page). is

(32)

GRAOVAC et al.: PQ PROBLEMS COMPENSATION WITH PQ CONDITIONING SYSTEM

971

the sampling period that for proper ltering has to be at least , where is the period of the highest harmonic . For instance, if a component to be eliminated highest harmonic is 21, then should approximately be 1 ms. Based on these considerations, reference currents for parallel lter can be calculated as in (33) if only harmonics are to be eliminated, or as in (34) if power factor has to be corrected together with the harmonic elimination

(33)
Fig. 5. Control of active rectier.

(34) Reference voltages for the series active lter can be determined based on same procedure, starting from the following equation: (35)

it is necessary to have a precise and fast control of an active rectier inside UPQS. Transfer function connecting reference input current and dc bus voltage in dq domain equals [8] (40) and the parameters are

is the series lter voltage vector, is the harmonic where is the compensation voltage supply currents vector and vector needed to remove the supply voltage imperfections. Again, if only a harmonic compensation is required, reference voltages are (36) If the voltage compensation is required, then reference voltages are (37) where voltage compensation factor is presented in (38) and (39) (38) Now, the voltage loop can be written as

(41)

(42) where is the reference -component current and , Iref is the rms nominal value of . is the equivalent is the equivalent dc-load resistance. In dc-bus voltage and order to provide a faster response, a feed-forward component is added, which minimizes the inuence of the positive zero typical for boost converter operation, as in Fig. 5. Feed-forward parameters are (43) (44)

(39) where the nominal , , and zero voltage are pre-calculated from the ideal voltage supply waveform and are equal to , , and . V. CONTROL OF CONVERTERS Constant dc bus voltage is essential for the proper operation of both parallel and series lter. Also, the dc bus voltage provided by the active ac/dc converter eliminates the need for dc voltage control loop in parallel lter control system. Therefore,

(45) , , and are PID regulator parameters, is adwhere ditional compensation function, intended to increase system robustness level, and the last factor is the same as in (40), without a positive zero. If an internal model control procedure is implemented than the regulator parameters are (46) (47)

972

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 22, NO. 2, APRIL 2007

(48) In order to provide fast current control, a hysteresis current controllers are chosen, as shown in Fig. 5. Hysteresis band should be chosen in order not to exceed allowed instantaneous and average switching frequency for the chosen components

(49) where is the maximum modulation index. Control of parallel lter currents is provided using the dq PI linear control, and then the modulating signals are later compared with the triangle carrier. PI regulator parameters are (empirically) (50) Control of series lter voltages was implemented using PD regulators. It is not a good practice to include an integral part into the controller, since series active lter has a LC switching ripple lter at its output, having an oscillatory open loop characteristic (51) is the gain of PWM technique and is the modwhere ulation index. If a PD regulator is used, then overall closed loop transfer function of the system is (52) From this equation it is obvious that should be chosen according to the desired speed of response (i.e., according to deaccording to desired stasired undamped frequency ) and bility (i.e., according to desired damping factor ) (53)

Fig. 6. Input current of a thyristor ac/dc converter with inductive load, parallel lter current, and supply current.

VI. SIMULATION RESULTS Complete system (converters, control circuitry, supply, load) was simulated using SIMULINK toolbox from MATLAB. The UPQS and its control system have been tested at different load/ supply imperfections. Results presented in Figs. 6 and 7 show load harmonics together with power factor compensation, while Figs. 8 and 9 show supply voltage regulation characteristics. From Fig. 6 it can be seen that UPQS can easily eliminate current type load harmonics and perform a unity PF operation. By examining Fig. 7, it can be noted that parallel lter alone can not compensate for high level harmonics produced by voltage (capacitive) type load, while UPQS can.
Fig. 7. (a) Input current of a diode ac/dc converter with capacitive load, parallel lter current and supply current with parallel lter alone. (b) Input current of a diode ac/dc converter with capacitive load, parallel lter current and supply current with UPQS.

Abbreviations on the top of the Figs. 8 and 9 are as follows. Usa, Usb, Usc Usa,b,cnom supply voltages; nominal value of the supply voltage;

GRAOVAC et al.: PQ PROBLEMS COMPENSATION WITH PQ CONDITIONING SYSTEM

973

Fig. 9. Supply voltages (upper trace): 5th harmonic icker swell in phase b in phase c and voltage at load terminal (lower trace). Supply voltage h f; h f; regulation: h f.

+ + + sag Usa = Usanom + 5 + Usb = Usbnom + 5 + Usc = Uscnom 0 30%+5 +

Fig. 8. Supply voltages (upper trace): 5th harmonic and voltage at load terminal (lower trace).

+ icker + sag in phase c

5h

existence of the 5th voltage harmonic at the level of 10% of rst harmonic; existence of the voltage icker at and level of 4% of the rst harmonic; supply voltage in the phase has the magnitude variation of .
Fig. 10. RMS value of c-phase voltage (Ucrms) in the case of an supply interruptionsupply and load voltage in phase c.

Figs. 1012 display UPQS behavior in the case of supply voltage interruption in phase , having a duration of 1s. It can be seen that the load voltage, having a rms-value of 200 V during voltage limits. In order interruption, is maintained under to provide both a proper load voltage and harmonic/reactive power compensation, a dc bus voltage have to be maintained at a constant value, i.e., AR has to be capable to provide/absorb enough power. Fig. 11 shows dc bus voltage in the steady state and during the voltage interruption. Its average value is constant (630 V) as requested, but during the interruption a voltage ripple is increased due to the two-phase converter operation. Converter input currents are shown in Fig. 12. VII. EXPERIMENTAL RESULTS Complete system was extensively tested on single phase prototype. UPQS converter consists of three single phase half bridge converters, with 10 kHz switching frequency. Measurements and converter control were implemented on ADMC 401
Fig. 11. Common dc bus voltage in the case of an interruption in phase c.

DSP Motor Control Development Tool Kit. All variables are presented per unit.

974

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 22, NO. 2, APRIL 2007

Fig. 12. AR input currents in the case of an interruption in phase c.

Fig. 14. (a) Load (uncompensated) current spectrum. (b) Supply (compensated) current spectrum. Fig. 13. Voltage and current waveforms in the case of load consisting of inductively loaded diode rectier and linear predominantly inductive load.

Fig. 13 shows behavior of the UPQS in the case of compound load consisting of a parallel connection of inductively loaded diode bridge ac/dc converter and linear RL load . Therefore, UPQS has to work both as a static VAr compensator and as an active lter. Supply voltage (Us) and current (Is) are displayed, together with currents drawn by the load (IL) and parallel lter (Ipf). Resulting supply current has a sinusoidal waveshape and is in phase with the supply voltage. Total current harmonic disto . tortion was reduced from As shown in Fig. 14(a) and (b). In Fig. 15, the voltage and current waveforms in the case of load consisting of resistively loaded ac switch (applications such as industry heather or thyristor power controller) are presented. Fig. 16 shows UPQS dynamic response in the case of 20% voltage sag lasting 0.34 s. It can be seen that reaction time is inside one supply voltage period and that load voltage never drops below 90% of nominal voltage, mainly staying at value of approximately 94% of nominal voltage. Fig. 17 shows the static response in the case of 30% voltage swell. VIII. CONCLUSION This paper presented a universal power quality conditioning system as a combination of a unied power quality conditioner and shunt active lter at the load side. It can compensate at the same time for sags, swells, interruptions, unbalance,

Fig. 15. Voltage and current waveforms in the case of load consisting of a resistively loaded ac switch.

icker, harmonics, reactive currents, and current unbalance. Active rectier control system keeps constant dc bus voltage necessary for proper operation of the lters. Series lter provides sinusoidal load voltages and parallel lter compensates power factor of non-linear loads. Converter power level and price is somewhat higher than in conventional systems, but the compensation characteristics is superior. Both power level and price can be diminished if the reactive power compensation or voltage regulation is not desired. Control system for the UPQS was designed using a dq domain, thus enabling the easy ltering and exible control implementation. The system was veried both in simulations and experimentally.

GRAOVAC et al.: PQ PROBLEMS COMPENSATION WITH PQ CONDITIONING SYSTEM

975

Fig. 16. Supply (U ) and load (U ) voltage in the case of 20% voltage sag.

[12] G. W. Chang and T.-C. Shee, A novel reference compensation current strategy for shunt active power lter control, IEEE Trans. Power Del., vol. 19, no. 4, pp. 17511758, Oct. 2004. [13] Y.-G. Jung, W.-Y. Kim, Y.-C. Lim, S.-H. Yang, and F. Harashima, The algorithm of expanded current synchronous detection for active power lters considering three-phase unbalanced power system, IEEE Trans. Ind. Electron., vol. 50, no. 5, pp. 10001006, Oct. 2003. [14] K. J. P. Macken, K. Vanthournout, J. Van den Keybus, G. Deconinck, and R. J. M. Belmans, Distributed control of renewable generation units with integrated active lter, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 13531360, Sep. 2004. [15] F. Barrero, S. Martinez, F. Yeves, F. Mur, and P. M. Martinez, Universal and recongurable to UPS active power lter for line conditioning, IEEE Trans. Power Del., vol. 18, no. 1, pp. 283290, Jan. 2003. [16] C. X. Pang and M. Z. Tarnawecky, Generator winding I R losses and harmonic interference under variable frequency operation of an HVDC unit-connection scheme, IEEE Trans. Energy Convers., vol. 10, no. 1, pp. 133139, Mar. 1995. [17] S. Mariethoz and A. C. Rufer, Open loop and closed loop spectral frequency active ltering, IEEE Trans. Power Electron., vol. 17, no. 4, pp. 564573, Jul. 2002. an Graovac (S95A00M02SM05) was Dus born in Novi Sad, Serbia (Yugoslavia), in 1969. He received the B.Sc., M.Sc., and Ph.D. degrees from the University of Novi Sad in 1995, 1998, and 2001, respectively, all in electrical engineering. From 1995 to 2001, he was with the University of Novi Sad, and from 2001 to 2002, he was with Baldor ASR, GmbH, Kirchheim-Munich, Germany, as the head of R&D Servo Drives Department. 20022004 he was at ATENA (MTU), Karlsfeld-Munich, as R&D Team-Manager for Hardware and Mechatronics. In 20042006, he was the head of R&D Power Electronics Department at Transtechnik GmbH Holzkirchen-Munich. Since 2006, he has been with Inneon Technologies as Senior EngineerAutomotive Power. He led a number of R&D Projects resulting in power electronics and drives products in the area of: power quality, servo drives systems, on-board railway converters, particle accelerators, automotive, aerospace, as well as solar and hydrogen power applications. He is the co-author of Power ElectronicsLaboratory Practice (Novi Sad, Yugoslavia: University of Novi Sad Press, 2000), which is used in teaching at the University of Novi Sad. He is an author or co-author of more then 50 publications on power electronics and its applications and had several invited lectures. His research interests are in the areas of power electronics converters, electric power quality, digital control of converters and drives, automotive, aerospace and railway electronics, as well as in particle accelerator supplies. Dr. Graovac won the Student Member First Prize Paper Award at IEEE MELECON98 and the Second Place IEEE Myron Zucker Award in 1998. (S90M92SM00) was born in Vladimir A. Katic Novi Sad, Novi Sad, Serbia (Yugoslavia), in 1954. He received the B.Sc. degree from the University of Novi Sad in 1978, and the M.Sc. and Ph.D. degrees from the University of Belgrade, Belgrade, Serbia, in 1981 and 1991, respectively, all in electrical engineering. Since 1978, he has been with the Faculty of Technical Sciences, Institute of Power, Electronics, and Telecommunication Engineering, University of Novi Sad, where, in 1991, he founded the Laboratory for Power Electronics. In 1992, he became an Assistant Professor, in 1997, an Associate Professor, and in 2002, a Full Professor. Since 1992, he has been Head of the Power Electronics and Converters Group. From 1993 to 1998, he was the Director of the Institute of Power, Electronics, and Telecommunication Engineering and, since 1998 he has been the Vice-Dean of the Faculty of Technical Sciences. He is the author of Electric Power QualityHarmonics (Novi Sad, Serbia: University of Novi Sad Press, 2002), Power ElectronicsLaboratory Practice (Novi Sad, Serbia: University of Novi Sad Press, 2000), Power Electronics-Worked Problems (Novi Sad, Serbia: University of Novi Sad Press, 1998), and the Editor of Modern Aspects of Power Engineering (Novi Sad, Serbia: FTN-Inst. of Power and Electron. Eng., 1995). His current interests are in the areas of power electronics, electric power quality and renewable energy sources. Dr. Katic is the Chair of the IEEE Serbia and Montenegro Section, Chairman of the IEEE Joint Chapter of the Industrial Electronics/Power Electronics/Industry Applications Societies, President of the Power Electronic Society of Serbia and Montenegro and Head of Executive Board of national conference of ETRAN.

Fig. 17. Supply (full line) and load (dotted) voltage in case of 30% voltage swell.

REFERENCES
[1] D. Sabin and A. Sundaram, Quality enhances reliability, IEEE Spectr., vol. 33, no. 2, pp. 3441, Feb. 1996. [2] M. Rastogi, R. Naik, and N. Mohan, A comparative evaluation of harmonic reduction techniques in three phase utility interface of power electronic loads, in Proc. IEEE/IAS Annu. Meeting, Toronto, ON, Canada, Oct. 1993, pp. 971978. [3] H. Akagi, New trends in active lters for power conditioning, IEEE Trans. Ind. Appl., vol. 32, no. 6, pp. 13121322, Nov./Dec. 1996. [4] F. Z. Peng, Application issues of active power lters, IEEE Ind. Appl. Mag., vol. 4, no. 5, pp. 2130, Sep./Oct. 1998. [5] H. Fujita and H. Akagi, Unied power quality conditioner: The integration of series and shunt active lter, IEEE Trans. Power Electron., vol. 13, no. 2, pp. 315322, Mar. 1998. [6] J. W. Dixon, G. Venegas, and L. A. Moran, A series active lter based on a sinusoidal current-controlled voltage-source inverter, IEEE Trans. Ind. Electron., vol. 44, no. 5, pp. 612620, Oct. 1998. [7] H. Akagi, Y. Kanazawa, and A. Nabae, Instantaneous reactive power compensators comprising switching devices without energy storage components, IEEE Trans. Ind. Appl., vol. IA-20, no. 3, pp. 625630, May/Jun. 1984. [8] D. Graovac and V. Katic, A method of PWM rectier control in voltage linked AC/DC/AC converter, in Proc. IEEE MELECON, Tel-Aviv, Israel, May 1998, pp. 10321036. [9] D. Graovac, V. Katic, and A. Rufer, Power quality compensation using universal power quality conditioning system, IEEE Power Eng. Rev., vol. 20, no. 12, pp. 5860, Dec. 2000. [10] H. Akagi, Active harmonic lters, Proc. IEEE, vol. 93, no. 12, pp. 21282141, Dec. 2005. [11] M. Cichowlas, M. Malinowski, M. P. Kazmierkowski, D. L. Sobczuk, P. Rodriguez, and J. Pou, Active ltering function of three-phase PWM boost rectier under different line voltage conditions, IEEE Trans. Ind. Electron., vol. 52, no. 2, pp. 410419, Apr. 2005.

976

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 22, NO. 2, APRIL 2007

Alfred Rufer (A95SM01F05) was born in Diessbach, Switzerland, in 1951. He received the M.S. degree from the Swiss Federal Institute of Technology Lausanne (EPFL), Lausanne, Switzerland, in 1976. In 1978, he joined ABB, Turgi, Switzerland, where he was involved in the elds of power electronics and control, such as high-power variable-frequency converters for drives. In 1985, he was a Group Leader involved with power-electronic development in ABB. In 1993, he became an Assis-

tant Professor at EPFL. Since 1996, he has been a full Professor and Head of the Industrial Electronics Laboratory, EPFL. He has authored or co-authored several publications on power electronics and applications, and he holds several patents. Prof. Rufer was co-recipient of two IEEE Prize Paper Awards. In November 2005, he was elected to the grade of IEEE Fellow for his contributions to supercapacitive energy storage techniques and asymmetrical multilevel inverters.